blob: 15c45e25095f58963b21f8755840211e871bdefc [file] [log] [blame]
Bahadir Balbana9b67db2008-04-18 22:43:13 +01001/*
2 * linux/arch/arm/mach-realview/realview_pb11mp.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/platform_device.h>
Kay Sieversedbaa602011-12-21 16:26:03 -080024#include <linux/device.h>
Bahadir Balbana9b67db2008-04-18 22:43:13 +010025#include <linux/amba/bus.h>
Russell Kingeb7fffa2009-07-05 22:41:31 +010026#include <linux/amba/pl061.h>
Linus Walleij6ef297f2009-09-22 14:29:36 +010027#include <linux/amba/mmci.h>
Linus Walleijd6ada862010-07-14 23:58:38 +010028#include <linux/amba/pl022.h>
Russell Kingfced80c2008-09-06 12:10:45 +010029#include <linux/io.h>
Rob Herring520f7bd2012-12-27 13:10:24 -060030#include <linux/irqchip/arm-gic.h>
Linus Walleijf9a6aa42012-08-06 18:32:08 +020031#include <linux/platform_data/clk-realview.h>
Robin Holt7b6d8642013-07-08 16:01:40 -070032#include <linux/reboot.h>
Bahadir Balbana9b67db2008-04-18 22:43:13 +010033
Russell Kinga09e64f2008-08-05 16:14:15 +010034#include <mach/hardware.h>
Bahadir Balbana9b67db2008-04-18 22:43:13 +010035#include <asm/irq.h>
Bahadir Balbana9b67db2008-04-18 22:43:13 +010036#include <asm/mach-types.h>
Catalin Marinascc9897d2010-06-21 15:12:40 +010037#include <asm/pgtable.h>
Bahadir Balbana9b67db2008-04-18 22:43:13 +010038#include <asm/hardware/cache-l2x0.h>
Marc Zyngier7c380f22011-08-04 11:57:04 +010039#include <asm/smp_twd.h>
Bahadir Balbana9b67db2008-04-18 22:43:13 +010040
41#include <asm/mach/arch.h>
42#include <asm/mach/flash.h>
43#include <asm/mach/map.h>
Bahadir Balbana9b67db2008-04-18 22:43:13 +010044#include <asm/mach/time.h>
45
Russell Kinga09e64f2008-08-05 16:14:15 +010046#include <mach/board-pb11mp.h>
47#include <mach/irqs.h>
Bahadir Balbana9b67db2008-04-18 22:43:13 +010048
49#include "core.h"
Bahadir Balbana9b67db2008-04-18 22:43:13 +010050
51static struct map_desc realview_pb11mp_io_desc[] __initdata = {
52 {
53 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
54 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
55 .length = SZ_4K,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
59 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
60 .length = SZ_4K,
61 .type = MT_DEVICE,
62 }, {
63 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
64 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
65 .length = SZ_4K,
66 .type = MT_DEVICE,
Marc Zyngier34ae6c92012-01-24 11:56:02 +010067 }, { /* Maps the SCU, GIC CPU interface, TWD, GIC DIST */
68 .virtual = IO_ADDRESS(REALVIEW_TC11MP_PRIV_MEM_BASE),
69 .pfn = __phys_to_pfn(REALVIEW_TC11MP_PRIV_MEM_BASE),
70 .length = REALVIEW_TC11MP_PRIV_MEM_SIZE,
Bahadir Balbana9b67db2008-04-18 22:43:13 +010071 .type = MT_DEVICE,
72 }, {
73 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
74 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
75 .length = SZ_4K,
76 .type = MT_DEVICE,
77 }, {
78 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
79 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
80 .length = SZ_4K,
81 .type = MT_DEVICE,
82 }, {
83 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
84 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
85 .length = SZ_4K,
86 .type = MT_DEVICE,
87 }, {
88 .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
89 .pfn = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
90 .length = SZ_8K,
91 .type = MT_DEVICE,
92 },
93#ifdef CONFIG_DEBUG_LL
94 {
95 .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
96 .pfn = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
97 .length = SZ_4K,
98 .type = MT_DEVICE,
99 },
100#endif
101};
102
103static void __init realview_pb11mp_map_io(void)
104{
105 iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
106}
107
Russell Kingeb7fffa2009-07-05 22:41:31 +0100108static struct pl061_platform_data gpio0_plat_data = {
109 .gpio_base = 0,
Russell Kingeb7fffa2009-07-05 22:41:31 +0100110};
111
112static struct pl061_platform_data gpio1_plat_data = {
113 .gpio_base = 8,
Russell Kingeb7fffa2009-07-05 22:41:31 +0100114};
115
116static struct pl061_platform_data gpio2_plat_data = {
117 .gpio_base = 16,
Russell Kingeb7fffa2009-07-05 22:41:31 +0100118};
119
Linus Walleijd6ada862010-07-14 23:58:38 +0100120static struct pl022_ssp_controller ssp0_plat_data = {
121 .bus_id = 0,
122 .enable_dma = 0,
123 .num_chipselect = 1,
124};
125
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100126/*
127 * RealView PB11MPCore AMBA devices
128 */
129
Russell King0dada612011-12-18 11:40:46 +0000130#define GPIO2_IRQ { IRQ_PB11MP_GPIO2 }
131#define GPIO3_IRQ { IRQ_PB11MP_GPIO3 }
132#define AACI_IRQ { IRQ_TC11MP_AACI }
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100133#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
Russell King0dada612011-12-18 11:40:46 +0000134#define KMI0_IRQ { IRQ_TC11MP_KMI0 }
135#define KMI1_IRQ { IRQ_TC11MP_KMI1 }
136#define PB11MP_SMC_IRQ { }
137#define MPMC_IRQ { }
138#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD }
139#define DMAC_IRQ { IRQ_PB11MP_DMAC }
140#define SCTL_IRQ { }
141#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG }
142#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 }
143#define GPIO1_IRQ { IRQ_PB11MP_GPIO1 }
144#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC }
145#define SCI_IRQ { IRQ_PB11MP_SCI }
146#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 }
147#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 }
148#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 }
149#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 }
150#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP }
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100151
152/* FPGA Primecells */
Russell King9199340b2011-12-18 13:38:49 +0000153APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
154APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
155APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
156APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
157APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL);
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100158
159/* DevChip Primecells */
Russell King9199340b2011-12-18 13:38:49 +0000160AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL);
161AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
162APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL);
163APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data);
164APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
165APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
166APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL);
167APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
168APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL);
169APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL);
170APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL);
171APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data);
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100172
173/* Primecells on the NEC ISSP chip */
Russell King9199340b2011-12-18 13:38:49 +0000174AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data);
175AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100176
177static struct amba_device *amba_devs[] __initdata = {
178 &dmac_device,
179 &uart0_device,
180 &uart1_device,
181 &uart2_device,
182 &uart3_device,
183 &smc_device,
184 &clcd_device,
185 &sctl_device,
186 &wdog_device,
187 &gpio0_device,
188 &gpio1_device,
189 &gpio2_device,
190 &rtc_device,
191 &sci0_device,
192 &ssp0_device,
193 &aaci_device,
194 &mmc0_device,
195 &kmi0_device,
196 &kmi1_device,
197};
198
199/*
200 * RealView PB11MPCore platform devices
201 */
202static struct resource realview_pb11mp_flash_resource[] = {
203 [0] = {
204 .start = REALVIEW_PB11MP_FLASH0_BASE,
205 .end = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
206 .flags = IORESOURCE_MEM,
207 },
208 [1] = {
209 .start = REALVIEW_PB11MP_FLASH1_BASE,
210 .end = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
211 .flags = IORESOURCE_MEM,
212 },
213};
214
215static struct resource realview_pb11mp_smsc911x_resources[] = {
216 [0] = {
217 .start = REALVIEW_PB11MP_ETH_BASE,
218 .end = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
219 .flags = IORESOURCE_MEM,
220 },
221 [1] = {
222 .start = IRQ_TC11MP_ETH,
223 .end = IRQ_TC11MP_ETH,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
Catalin Marinas7db21712009-02-12 16:00:21 +0100228static struct resource realview_pb11mp_isp1761_resources[] = {
229 [0] = {
230 .start = REALVIEW_PB11MP_USB_BASE,
231 .end = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
232 .flags = IORESOURCE_MEM,
233 },
234 [1] = {
235 .start = IRQ_TC11MP_USB,
236 .end = IRQ_TC11MP_USB,
237 .flags = IORESOURCE_IRQ,
238 },
239};
240
Will Deaconf417cba2010-04-15 10:16:26 +0100241static struct resource pmu_resources[] = {
242 [0] = {
243 .start = IRQ_TC11MP_PMU_CPU0,
244 .end = IRQ_TC11MP_PMU_CPU0,
245 .flags = IORESOURCE_IRQ,
246 },
247 [1] = {
248 .start = IRQ_TC11MP_PMU_CPU1,
249 .end = IRQ_TC11MP_PMU_CPU1,
250 .flags = IORESOURCE_IRQ,
251 },
252 [2] = {
253 .start = IRQ_TC11MP_PMU_CPU2,
254 .end = IRQ_TC11MP_PMU_CPU2,
255 .flags = IORESOURCE_IRQ,
256 },
257 [3] = {
258 .start = IRQ_TC11MP_PMU_CPU3,
259 .end = IRQ_TC11MP_PMU_CPU3,
260 .flags = IORESOURCE_IRQ,
261 },
262};
263
264static struct platform_device pmu_device = {
Mark Rutlandcbed8382014-05-23 12:12:04 +0100265 .name = "armv6-pmu",
Sudeep KarkadaNageshadf3d17e2012-07-19 09:50:21 +0100266 .id = -1,
Will Deaconf417cba2010-04-15 10:16:26 +0100267 .num_resources = ARRAY_SIZE(pmu_resources),
268 .resource = pmu_resources,
269};
270
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100271static void __init gic_init_irq(void)
272{
273 unsigned int pldctrl;
274
275 /* new irq mode with no DCC */
276 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
277 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
278 pldctrl |= 2 << 22;
279 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
280 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
281
282 /* ARM11MPCore test chip GIC, primary */
Russell Kingb580b892010-12-04 15:55:14 +0000283 gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE),
Russell Kingff2e27a2010-12-04 16:13:29 +0000284 __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100285
286 /* board GIC, secondary */
Russell Kingb580b892010-12-04 15:55:14 +0000287 gic_init(1, IRQ_PB11MP_GIC_START,
288 __io_address(REALVIEW_PB11MP_GIC_DIST_BASE),
289 __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100290 gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
291}
292
Marc Zyngier7c380f22011-08-04 11:57:04 +0100293#ifdef CONFIG_HAVE_ARM_TWD
294static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
295 REALVIEW_TC11MP_TWD_BASE,
296 IRQ_LOCALTIMER);
297
298static void __init realview_pb11mp_twd_init(void)
299{
300 int err = twd_local_timer_register(&twd_local_timer);
301 if (err)
302 pr_err("twd_local_timer_register failed %d\n", err);
303}
304#else
305#define realview_pb11mp_twd_init() do {} while(0)
306#endif
307
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100308static void __init realview_pb11mp_timer_init(void)
309{
310 timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
311 timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
312 timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
313 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
314
Linus Walleijf9a6aa42012-08-06 18:32:08 +0200315 realview_clk_init(__io_address(REALVIEW_SYS_BASE), false);
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100316 realview_timer_init(IRQ_TC11MP_TIMER0_1);
Marc Zyngier7c380f22011-08-04 11:57:04 +0100317 realview_pb11mp_twd_init();
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100318}
319
Robin Holt7b6d8642013-07-08 16:01:40 -0700320static void realview_pb11mp_restart(enum reboot_mode mode, const char *cmd)
Philby John426fcd22009-10-28 19:09:12 +0100321{
Colin Tuckley4c9f8be2010-01-11 11:09:15 +0100322 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
323 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
Philby John426fcd22009-10-28 19:09:12 +0100324
325 /*
326 * To reset, we hit the on-board reset register
327 * in the system FPGA
328 */
Colin Tuckley4c9f8be2010-01-11 11:09:15 +0100329 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
330 __raw_writel(0x0000, reset_ctrl);
331 __raw_writel(0x0004, reset_ctrl);
Russell King47cacdd42011-11-03 14:00:13 +0000332 dsb();
Philby John426fcd22009-10-28 19:09:12 +0100333}
334
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100335static void __init realview_pb11mp_init(void)
336{
337 int i;
338
Catalin Marinasba927952008-04-18 22:43:17 +0100339#ifdef CONFIG_CACHE_L2X0
Russell King39b53452014-03-19 14:53:54 +0000340 /*
341 * The PL220 needs to be manually configured as the hardware
342 * doesn't report the correct sizes.
343 * 1MB (128KB/way), 8-way associativity, event monitor and
344 * parity enabled, ignore share bit, no force write allocate
345 * Bits: .... ...0 0111 1001 0000 .... .... ....
346 */
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100347 l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
Catalin Marinasba927952008-04-18 22:43:17 +0100348#endif
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100349
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100350 realview_flash_register(realview_pb11mp_flash_resource,
351 ARRAY_SIZE(realview_pb11mp_flash_resource));
Catalin Marinas0a381332008-12-01 14:54:58 +0000352 realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100353 platform_device_register(&realview_i2c_device);
Catalin Marinas6be62ba2009-02-12 15:59:21 +0100354 platform_device_register(&realview_cf_device);
Linus Walleije4ecf2b2014-02-27 14:29:22 +0100355 platform_device_register(&realview_leds_device);
Catalin Marinas7db21712009-02-12 16:00:21 +0100356 realview_usb_register(realview_pb11mp_isp1761_resources);
Will Deaconf417cba2010-04-15 10:16:26 +0100357 platform_device_register(&pmu_device);
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100358
359 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
360 struct amba_device *d = amba_devs[i];
361 amba_device_register(d, &iomem_resource);
362 }
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100363}
364
365MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
366 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
Nicolas Pitre9ddea572011-07-05 22:38:16 -0400367 .atag_offset = 0x100,
Marc Zyngier3695adc2011-09-08 13:15:22 +0100368 .smp = smp_ops(realview_smp_ops),
Catalin Marinas5b39d152009-11-04 12:19:04 +0000369 .fixup = realview_fixup,
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100370 .map_io = realview_pb11mp_map_io,
Russell King631e55f2011-01-11 13:05:01 +0000371 .init_early = realview_init_early,
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100372 .init_irq = gic_init_irq,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700373 .init_time = realview_pb11mp_timer_init,
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100374 .init_machine = realview_pb11mp_init,
Nicolas Pitre00e91252011-07-05 22:28:09 -0400375#ifdef CONFIG_ZONE_DMA
376 .dma_zone_size = SZ_256M,
377#endif
Russell King47cacdd42011-11-03 14:00:13 +0000378 .restart = realview_pb11mp_restart,
Bahadir Balbana9b67db2008-04-18 22:43:13 +0100379MACHINE_END