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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * include/asm-s390/smp.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Heiko Carstens (heiko.carstens@de.ibm.com)
9 */
10#ifndef __ASM_SMP_H
11#define __ASM_SMP_H
12
Linus Torvalds1da177e2005-04-16 15:20:36 -070013#include <linux/threads.h>
14#include <linux/cpumask.h>
15#include <linux/bitops.h>
16
17#if defined(__KERNEL__) && defined(CONFIG_SMP) && !defined(__ASSEMBLY__)
18
19#include <asm/lowcore.h>
20#include <asm/sigp.h>
Heiko Carstensc6b5b842006-12-04 15:40:33 +010021#include <asm/ptrace.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23/*
24 s390 specific smp.c headers
25 */
26typedef struct
27{
28 int intresting;
29 sigp_ccode ccode;
30 __u32 status;
31 __u16 cpu;
32} sigp_info;
33
Heiko Carstens2b67fc42007-02-05 21:16:47 +010034extern void machine_restart_smp(char *);
35extern void machine_halt_smp(void);
36extern void machine_power_off_smp(void);
37
Linus Torvalds1da177e2005-04-16 15:20:36 -070038#define NO_PROC_ID 0xFF /* No processor magic marker */
39
40/*
41 * This magic constant controls our willingness to transfer
42 * a process across CPUs. Such a transfer incurs misses on the L1
43 * cache, and on a P6 or P5 with multiple L2 caches L2 hits. My
44 * gut feeling is this will vary by board in value. For a board
45 * with separate L2 cache it probably depends also on the RSS, and
46 * for a board with shared L2 cache it ought to decay fast as other
47 * processes are run.
48 */
49
50#define PROC_CHANGE_PENALTY 20 /* Schedule penalty */
51
Ingo Molnar39c715b2005-06-21 17:14:34 -070052#define raw_smp_processor_id() (S390_lowcore.cpu_data.cpu_nr)
Linus Torvalds1da177e2005-04-16 15:20:36 -070053
Adrian Bunk4448aaf2005-11-08 21:34:42 -080054static inline __u16 hard_smp_processor_id(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070055{
56 __u16 cpu_address;
57
Martin Schwidefsky94c12cc2006-09-28 16:56:43 +020058 asm volatile("stap %0" : "=m" (cpu_address));
Linus Torvalds1da177e2005-04-16 15:20:36 -070059 return cpu_address;
60}
61
62/*
63 * returns 1 if cpu is in stopped/check stopped state or not operational
64 * returns 0 otherwise
65 */
66static inline int
67smp_cpu_not_running(int cpu)
68{
69 __u32 status;
70
71 switch (signal_processor_ps(&status, 0, cpu, sigp_sense)) {
72 case sigp_order_code_accepted:
73 case sigp_status_stored:
74 /* Check for stopped and check stop state */
75 if (status & 0x50)
76 return 1;
77 break;
78 case sigp_not_operational:
79 return 1;
80 default:
81 break;
82 }
83 return 0;
84}
85
86#define cpu_logical_map(cpu) (cpu)
87
88extern int __cpu_disable (void);
89extern void __cpu_die (unsigned int cpu);
90extern void cpu_die (void) __attribute__ ((noreturn));
91extern int __cpu_up (unsigned int cpu);
92
Heiko Carstensdbd70fb2008-04-17 07:46:12 +020093extern struct mutex smp_cpu_state_mutex;
Heiko Carstensc10fde02008-04-17 07:46:13 +020094extern int smp_cpu_polarization[];
Heiko Carstensdbd70fb2008-04-17 07:46:12 +020095
Carsten Ottedab52092008-01-26 14:11:27 +010096extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
97 void *info, int wait);
Linus Torvalds1da177e2005-04-16 15:20:36 -070098#endif
99
100#ifndef CONFIG_SMP
Heiko Carstensc6b5b842006-12-04 15:40:33 +0100101static inline void smp_send_stop(void)
102{
103 /* Disable all interrupts/machine checks */
Gerald Schaeferc1821c22007-02-05 21:18:17 +0100104 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
Heiko Carstensc6b5b842006-12-04 15:40:33 +0100105}
106
Fernando Luis Vazquez Cao2f4dfe22007-05-09 02:33:25 -0700107#define hard_smp_processor_id() 0
Heiko Carstensa386fba2006-02-11 17:56:01 -0800108#define smp_cpu_not_running(cpu) 1
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109#endif
110
Michael Holzheu411ed322007-04-27 16:01:49 +0200111extern union save_area *zfcpdump_save_areas[NR_CPUS + 1];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112#endif