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Ben Hutchings8ceee662008-04-27 12:55:59 +01001/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
Ben Hutchings0a6f40c2011-02-25 00:01:34 +00004 * Copyright 2005-2011 Solarflare Communications Inc.
Ben Hutchings8ceee662008-04-27 12:55:59 +01005 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11/* Common definitions for all Efx net driver code */
12
13#ifndef EFX_NET_DRIVER_H
14#define EFX_NET_DRIVER_H
15
Ben Hutchings8ceee662008-04-27 12:55:59 +010016#include <linux/netdevice.h>
17#include <linux/etherdevice.h>
18#include <linux/ethtool.h>
19#include <linux/if_vlan.h>
Steve Hodgson90d683a2010-06-01 11:19:39 +000020#include <linux/timer.h>
Ben Hutchings68e7f452009-04-29 08:05:08 +000021#include <linux/mdio.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010022#include <linux/list.h>
23#include <linux/pci.h>
24#include <linux/device.h>
25#include <linux/highmem.h>
26#include <linux/workqueue.h>
Ben Hutchingscd2d5b52012-02-14 00:48:07 +000027#include <linux/mutex.h>
David S. Miller10ed61c2010-09-21 16:11:06 -070028#include <linux/vmalloc.h>
Ben Hutchings37b5a602008-05-30 22:27:04 +010029#include <linux/i2c.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010030
31#include "enum.h"
32#include "bitfield.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010033
Ben Hutchings8ceee662008-04-27 12:55:59 +010034/**************************************************************************
35 *
36 * Build definitions
37 *
38 **************************************************************************/
Ben Hutchingsc5d5f5f2010-06-23 11:30:26 +000039
Ben Hutchings6d84b982011-02-25 00:04:42 +000040#define EFX_DRIVER_VERSION "3.1"
Ben Hutchings8ceee662008-04-27 12:55:59 +010041
Ben Hutchings5f3f9d62011-11-04 22:29:14 +000042#ifdef DEBUG
Ben Hutchings8ceee662008-04-27 12:55:59 +010043#define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
44#define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
45#else
46#define EFX_BUG_ON_PARANOID(x) do {} while (0)
47#define EFX_WARN_ON_PARANOID(x) do {} while (0)
48#endif
49
Ben Hutchings8ceee662008-04-27 12:55:59 +010050/**************************************************************************
51 *
52 * Efx data structures
53 *
54 **************************************************************************/
55
Ben Hutchingsa16e5b22012-02-14 00:40:12 +000056#define EFX_MAX_CHANNELS 32U
Ben Hutchings8ceee662008-04-27 12:55:59 +010057#define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
Ben Hutchingscd2d5b52012-02-14 00:48:07 +000058#define EFX_EXTRA_CHANNEL_IOV 0
59#define EFX_MAX_EXTRA_CHANNELS 1U
Ben Hutchings8ceee662008-04-27 12:55:59 +010060
Ben Hutchingsa4900ac2010-04-28 09:30:43 +000061/* Checksum generation is a per-queue option in hardware, so each
62 * queue visible to the networking core is backed by two hardware TX
63 * queues. */
Ben Hutchings94b274b2011-01-10 21:18:20 +000064#define EFX_MAX_TX_TC 2
65#define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
66#define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
67#define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
68#define EFX_TXQ_TYPES 4
69#define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
Ben Hutchings60ac1062008-09-01 12:44:59 +010070
Ben Hutchings8ceee662008-04-27 12:55:59 +010071/**
72 * struct efx_special_buffer - An Efx special buffer
73 * @addr: CPU base address of the buffer
74 * @dma_addr: DMA base address of the buffer
75 * @len: Buffer length, in bytes
76 * @index: Buffer index within controller;s buffer table
77 * @entries: Number of buffer table entries
78 *
79 * Special buffers are used for the event queues and the TX and RX
80 * descriptor queues for each channel. They are *not* used for the
81 * actual transmit and receive buffers.
Ben Hutchings8ceee662008-04-27 12:55:59 +010082 */
83struct efx_special_buffer {
84 void *addr;
85 dma_addr_t dma_addr;
86 unsigned int len;
Ben Hutchings5bbe2f42012-02-13 23:14:23 +000087 unsigned int index;
88 unsigned int entries;
Ben Hutchings8ceee662008-04-27 12:55:59 +010089};
90
91/**
92 * struct efx_tx_buffer - An Efx TX buffer
93 * @skb: The associated socket buffer.
94 * Set only on the final fragment of a packet; %NULL for all other
95 * fragments. When this fragment completes, then we can free this
96 * skb.
Ben Hutchingsb9b39b62008-05-07 12:51:12 +010097 * @tsoh: The associated TSO header structure, or %NULL if this
98 * buffer is not a TSO header.
Ben Hutchings8ceee662008-04-27 12:55:59 +010099 * @dma_addr: DMA address of the fragment.
100 * @len: Length of this fragment.
101 * This field is zero when the queue slot is empty.
102 * @continuation: True if this fragment is not the end of a packet.
103 * @unmap_single: True if pci_unmap_single should be used.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100104 * @unmap_len: Length of this fragment to unmap
105 */
106struct efx_tx_buffer {
107 const struct sk_buff *skb;
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100108 struct efx_tso_header *tsoh;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100109 dma_addr_t dma_addr;
110 unsigned short len;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100111 bool continuation;
112 bool unmap_single;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100113 unsigned short unmap_len;
114};
115
116/**
117 * struct efx_tx_queue - An Efx TX queue
118 *
119 * This is a ring buffer of TX fragments.
120 * Since the TX completion path always executes on the same
121 * CPU and the xmit path can operate on different CPUs,
122 * performance is increased by ensuring that the completion
123 * path and the xmit path operate on different cache lines.
124 * This is particularly important if the xmit path is always
125 * executing on one CPU which is different from the completion
126 * path. There is also a cache line for members which are
127 * read but not written on the fast path.
128 *
129 * @efx: The associated Efx NIC
130 * @queue: DMA queue number
Ben Hutchings8ceee662008-04-27 12:55:59 +0100131 * @channel: The associated channel
Ben Hutchingsc04bfc62010-12-10 01:24:16 +0000132 * @core_txq: The networking core TX queue structure
Ben Hutchings8ceee662008-04-27 12:55:59 +0100133 * @buffer: The software buffer ring
134 * @txd: The hardware descriptor ring
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000135 * @ptr_mask: The size of the ring minus 1.
Ben Hutchings94b274b2011-01-10 21:18:20 +0000136 * @initialised: Has hardware queue been initialised?
Ben Hutchings8ceee662008-04-27 12:55:59 +0100137 * @read_count: Current read pointer.
138 * This is the number of buffers that have been removed from both rings.
Ben Hutchingscd385572010-11-15 23:53:11 +0000139 * @old_write_count: The value of @write_count when last checked.
140 * This is here for performance reasons. The xmit path will
141 * only get the up-to-date value of @write_count if this
142 * variable indicates that the queue is empty. This is to
143 * avoid cache-line ping-pong between the xmit path and the
144 * completion path.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100145 * @insert_count: Current insert pointer
146 * This is the number of buffers that have been added to the
147 * software ring.
148 * @write_count: Current write pointer
149 * This is the number of buffers that have been added to the
150 * hardware ring.
151 * @old_read_count: The value of read_count when last checked.
152 * This is here for performance reasons. The xmit path will
153 * only get the up-to-date value of read_count if this
154 * variable indicates that the queue is full. This is to
155 * avoid cache-line ping-pong between the xmit path and the
156 * completion path.
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100157 * @tso_headers_free: A list of TSO headers allocated for this TX queue
158 * that are not in use, and so available for new TSO sends. The list
159 * is protected by the TX queue lock.
160 * @tso_bursts: Number of times TSO xmit invoked by kernel
161 * @tso_long_headers: Number of packets with headers too long for standard
162 * blocks
163 * @tso_packets: Number of packets via the TSO xmit path
Ben Hutchingscd385572010-11-15 23:53:11 +0000164 * @pushes: Number of times the TX push feature has been used
165 * @empty_read_count: If the completion path has seen the queue as empty
166 * and the transmission path has not yet checked this, the value of
167 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100168 */
169struct efx_tx_queue {
170 /* Members which don't change on the fast path */
171 struct efx_nic *efx ____cacheline_aligned_in_smp;
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000172 unsigned queue;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100173 struct efx_channel *channel;
Ben Hutchingsc04bfc62010-12-10 01:24:16 +0000174 struct netdev_queue *core_txq;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100175 struct efx_tx_buffer *buffer;
176 struct efx_special_buffer txd;
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000177 unsigned int ptr_mask;
Ben Hutchings94b274b2011-01-10 21:18:20 +0000178 bool initialised;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100179
180 /* Members used mainly on the completion path */
181 unsigned int read_count ____cacheline_aligned_in_smp;
Ben Hutchingscd385572010-11-15 23:53:11 +0000182 unsigned int old_write_count;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100183
184 /* Members used only on the xmit path */
185 unsigned int insert_count ____cacheline_aligned_in_smp;
186 unsigned int write_count;
187 unsigned int old_read_count;
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100188 struct efx_tso_header *tso_headers_free;
189 unsigned int tso_bursts;
190 unsigned int tso_long_headers;
191 unsigned int tso_packets;
Ben Hutchingscd385572010-11-15 23:53:11 +0000192 unsigned int pushes;
193
194 /* Members shared between paths and sometimes updated */
195 unsigned int empty_read_count ____cacheline_aligned_in_smp;
196#define EFX_EMPTY_COUNT_VALID 0x80000000
Ben Hutchings8ceee662008-04-27 12:55:59 +0100197};
198
199/**
200 * struct efx_rx_buffer - An Efx RX data buffer
201 * @dma_addr: DMA base address of the buffer
Ben Hutchingsdb339562011-08-26 18:05:11 +0100202 * @skb: The associated socket buffer. Valid iff !(@flags & %EFX_RX_BUF_PAGE).
203 * Will be %NULL if the buffer slot is currently free.
204 * @page: The associated page buffer. Valif iff @flags & %EFX_RX_BUF_PAGE.
205 * Will be %NULL if the buffer slot is currently free.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100206 * @len: Buffer length, in bytes.
Ben Hutchingsdb339562011-08-26 18:05:11 +0100207 * @flags: Flags for buffer and packet state.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100208 */
209struct efx_rx_buffer {
210 dma_addr_t dma_addr;
Steve Hodgson8ba53662011-02-24 23:36:01 +0000211 union {
212 struct sk_buff *skb;
213 struct page *page;
214 } u;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100215 unsigned int len;
Ben Hutchingsdb339562011-08-26 18:05:11 +0100216 u16 flags;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100217};
Ben Hutchingsdb339562011-08-26 18:05:11 +0100218#define EFX_RX_BUF_PAGE 0x0001
219#define EFX_RX_PKT_CSUMMED 0x0002
220#define EFX_RX_PKT_DISCARD 0x0004
Ben Hutchings8ceee662008-04-27 12:55:59 +0100221
222/**
Steve Hodgson62b330b2010-06-01 11:20:53 +0000223 * struct efx_rx_page_state - Page-based rx buffer state
224 *
225 * Inserted at the start of every page allocated for receive buffers.
226 * Used to facilitate sharing dma mappings between recycled rx buffers
227 * and those passed up to the kernel.
228 *
229 * @refcnt: Number of struct efx_rx_buffer's referencing this page.
230 * When refcnt falls to zero, the page is unmapped for dma
231 * @dma_addr: The dma address of this page.
232 */
233struct efx_rx_page_state {
234 unsigned refcnt;
235 dma_addr_t dma_addr;
236
237 unsigned int __pad[0] ____cacheline_aligned;
238};
239
240/**
Ben Hutchings8ceee662008-04-27 12:55:59 +0100241 * struct efx_rx_queue - An Efx RX queue
242 * @efx: The associated Efx NIC
Ben Hutchings8ceee662008-04-27 12:55:59 +0100243 * @buffer: The software buffer ring
244 * @rxd: The hardware descriptor ring
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000245 * @ptr_mask: The size of the ring minus 1.
Ben Hutchings9f2cb712012-02-08 00:11:20 +0000246 * @enabled: Receive queue enabled indicator.
247 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
248 * @rxq_flush_pending.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100249 * @added_count: Number of buffers added to the receive queue.
250 * @notified_count: Number of buffers given to NIC (<= @added_count).
251 * @removed_count: Number of buffers removed from the receive queue.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100252 * @max_fill: RX descriptor maximum fill level (<= ring size)
253 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
254 * (<= @max_fill)
255 * @fast_fill_limit: The level to which a fast fill will fill
256 * (@fast_fill_trigger <= @fast_fill_limit <= @max_fill)
257 * @min_fill: RX descriptor minimum non-zero fill level.
258 * This records the minimum fill level observed when a ring
259 * refill was triggered.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100260 * @alloc_page_count: RX allocation strategy counter.
261 * @alloc_skb_count: RX allocation strategy counter.
Steve Hodgson90d683a2010-06-01 11:19:39 +0000262 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
Ben Hutchings8ceee662008-04-27 12:55:59 +0100263 */
264struct efx_rx_queue {
265 struct efx_nic *efx;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100266 struct efx_rx_buffer *buffer;
267 struct efx_special_buffer rxd;
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000268 unsigned int ptr_mask;
Ben Hutchings9f2cb712012-02-08 00:11:20 +0000269 bool enabled;
270 bool flush_pending;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100271
272 int added_count;
273 int notified_count;
274 int removed_count;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100275 unsigned int max_fill;
276 unsigned int fast_fill_trigger;
277 unsigned int fast_fill_limit;
278 unsigned int min_fill;
279 unsigned int min_overfill;
280 unsigned int alloc_page_count;
281 unsigned int alloc_skb_count;
Steve Hodgson90d683a2010-06-01 11:19:39 +0000282 struct timer_list slow_fill;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100283 unsigned int slow_fill_count;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100284};
285
286/**
287 * struct efx_buffer - An Efx general-purpose buffer
288 * @addr: host base address of the buffer
289 * @dma_addr: DMA base address of the buffer
290 * @len: Buffer length, in bytes
291 *
Ben Hutchings754c6532010-02-03 09:31:57 +0000292 * The NIC uses these buffers for its interrupt status registers and
Ben Hutchings8ceee662008-04-27 12:55:59 +0100293 * MAC stats dumps.
294 */
295struct efx_buffer {
296 void *addr;
297 dma_addr_t dma_addr;
298 unsigned int len;
299};
300
301
Ben Hutchings8ceee662008-04-27 12:55:59 +0100302enum efx_rx_alloc_method {
303 RX_ALLOC_METHOD_AUTO = 0,
304 RX_ALLOC_METHOD_SKB = 1,
305 RX_ALLOC_METHOD_PAGE = 2,
306};
307
308/**
309 * struct efx_channel - An Efx channel
310 *
311 * A channel comprises an event queue, at least one TX queue, at least
312 * one RX queue, and an associated tasklet for processing the event
313 * queue.
314 *
315 * @efx: Associated Efx NIC
Ben Hutchings8ceee662008-04-27 12:55:59 +0100316 * @channel: Channel instance number
Ben Hutchings7f967c02012-02-13 23:45:02 +0000317 * @type: Channel type definition
Ben Hutchings8ceee662008-04-27 12:55:59 +0100318 * @enabled: Channel enabled indicator
319 * @irq: IRQ number (MSI and MSI-X only)
Ben Hutchings0d86ebd2009-10-23 08:32:13 +0000320 * @irq_moderation: IRQ moderation value (in hardware ticks)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100321 * @napi_dev: Net device used with NAPI
322 * @napi_str: NAPI control structure
Ben Hutchings8ceee662008-04-27 12:55:59 +0100323 * @work_pending: Is work pending via NAPI?
324 * @eventq: Event queue buffer
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000325 * @eventq_mask: Event queue pointer mask
Ben Hutchings8ceee662008-04-27 12:55:59 +0100326 * @eventq_read_ptr: Event queue read pointer
327 * @last_eventq_read_ptr: Last event queue read pointer value.
Ben Hutchings1646a6f2012-01-05 20:14:10 +0000328 * @last_irq_cpu: Last CPU to handle interrupt for this channel
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000329 * @irq_count: Number of IRQs since last adaptive moderation decision
330 * @irq_mod_score: IRQ moderation score
Ben Hutchings8ceee662008-04-27 12:55:59 +0100331 * @rx_alloc_level: Watermark based heuristic counter for pushing descriptors
332 * and diagnostic counters
333 * @rx_alloc_push_pages: RX allocation method currently in use for pushing
334 * descriptors
Ben Hutchings8ceee662008-04-27 12:55:59 +0100335 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
Ben Hutchings8ceee662008-04-27 12:55:59 +0100336 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
337 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
Ben Hutchingsc1ac4032009-11-28 05:36:29 +0000338 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
Ben Hutchings8ceee662008-04-27 12:55:59 +0100339 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
340 * @n_rx_overlength: Count of RX_OVERLENGTH errors
341 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
Ben Hutchings8313aca2010-09-10 06:41:57 +0000342 * @rx_queue: RX queue for this channel
Ben Hutchings8313aca2010-09-10 06:41:57 +0000343 * @tx_queue: TX queues for this channel
Ben Hutchings8ceee662008-04-27 12:55:59 +0100344 */
345struct efx_channel {
346 struct efx_nic *efx;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100347 int channel;
Ben Hutchings7f967c02012-02-13 23:45:02 +0000348 const struct efx_channel_type *type;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100349 bool enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100350 int irq;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100351 unsigned int irq_moderation;
352 struct net_device *napi_dev;
353 struct napi_struct napi_str;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100354 bool work_pending;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100355 struct efx_special_buffer eventq;
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000356 unsigned int eventq_mask;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100357 unsigned int eventq_read_ptr;
358 unsigned int last_eventq_read_ptr;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100359
Ben Hutchings1646a6f2012-01-05 20:14:10 +0000360 int last_irq_cpu;
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000361 unsigned int irq_count;
362 unsigned int irq_mod_score;
Ben Hutchings64d8ad62011-01-05 00:50:41 +0000363#ifdef CONFIG_RFS_ACCEL
364 unsigned int rfs_filters_added;
365#endif
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000366
Ben Hutchings8ceee662008-04-27 12:55:59 +0100367 int rx_alloc_level;
368 int rx_alloc_push_pages;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100369
370 unsigned n_rx_tobe_disc;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100371 unsigned n_rx_ip_hdr_chksum_err;
372 unsigned n_rx_tcp_udp_chksum_err;
Ben Hutchingsc1ac4032009-11-28 05:36:29 +0000373 unsigned n_rx_mcast_mismatch;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100374 unsigned n_rx_frm_trunc;
375 unsigned n_rx_overlength;
376 unsigned n_skbuff_leaks;
377
378 /* Used to pipeline received packets in order to optimise memory
379 * access with prefetches.
380 */
381 struct efx_rx_buffer *rx_pkt;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100382
Ben Hutchings8313aca2010-09-10 06:41:57 +0000383 struct efx_rx_queue rx_queue;
Ben Hutchings94b274b2011-01-10 21:18:20 +0000384 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100385};
386
Ben Hutchings7f967c02012-02-13 23:45:02 +0000387/**
388 * struct efx_channel_type - distinguishes traffic and extra channels
389 * @handle_no_channel: Handle failure to allocate an extra channel
390 * @pre_probe: Set up extra state prior to initialisation
391 * @post_remove: Tear down extra state after finalisation, if allocated.
392 * May be called on channels that have not been probed.
393 * @get_name: Generate the channel's name (used for its IRQ handler)
394 * @copy: Copy the channel state prior to reallocation. May be %NULL if
395 * reallocation is not supported.
396 * @keep_eventq: Flag for whether event queue should be kept initialised
397 * while the device is stopped
398 */
399struct efx_channel_type {
400 void (*handle_no_channel)(struct efx_nic *);
401 int (*pre_probe)(struct efx_channel *);
402 void (*get_name)(struct efx_channel *, char *buf, size_t len);
403 struct efx_channel *(*copy)(const struct efx_channel *);
404 bool keep_eventq;
405};
406
Ben Hutchings398468e2009-11-23 16:03:45 +0000407enum efx_led_mode {
408 EFX_LED_OFF = 0,
409 EFX_LED_ON = 1,
410 EFX_LED_DEFAULT = 2
411};
412
Ben Hutchingsc4593022009-11-23 16:08:17 +0000413#define STRING_TABLE_LOOKUP(val, member) \
414 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
415
Ben Hutchings18e83e42012-01-05 19:05:20 +0000416extern const char *const efx_loopback_mode_names[];
Ben Hutchingsc4593022009-11-23 16:08:17 +0000417extern const unsigned int efx_loopback_mode_max;
418#define LOOPBACK_MODE(efx) \
419 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
420
Ben Hutchings18e83e42012-01-05 19:05:20 +0000421extern const char *const efx_reset_type_names[];
Ben Hutchingsc4593022009-11-23 16:08:17 +0000422extern const unsigned int efx_reset_type_max;
423#define RESET_TYPE(type) \
424 STRING_TABLE_LOOKUP(type, efx_reset_type)
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100425
Ben Hutchings8ceee662008-04-27 12:55:59 +0100426enum efx_int_mode {
427 /* Be careful if altering to correct macro below */
428 EFX_INT_MODE_MSIX = 0,
429 EFX_INT_MODE_MSI = 1,
430 EFX_INT_MODE_LEGACY = 2,
431 EFX_INT_MODE_MAX /* Insert any new items before this */
432};
433#define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
434
Ben Hutchings8ceee662008-04-27 12:55:59 +0100435enum nic_state {
436 STATE_INIT = 0,
437 STATE_RUNNING = 1,
438 STATE_FINI = 2,
Ben Hutchings3c787082008-09-01 12:49:08 +0100439 STATE_DISABLED = 3,
Ben Hutchings8ceee662008-04-27 12:55:59 +0100440 STATE_MAX,
441};
442
443/*
444 * Alignment of page-allocated RX buffers
445 *
446 * Controls the number of bytes inserted at the start of an RX buffer.
447 * This is the equivalent of NET_IP_ALIGN [which controls the alignment
448 * of the skb->head for hardware DMA].
449 */
Ben Hutchings13e9ab12008-09-01 12:50:28 +0100450#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
Ben Hutchings8ceee662008-04-27 12:55:59 +0100451#define EFX_PAGE_IP_ALIGN 0
452#else
453#define EFX_PAGE_IP_ALIGN NET_IP_ALIGN
454#endif
455
456/*
457 * Alignment of the skb->head which wraps a page-allocated RX buffer
458 *
459 * The skb allocated to wrap an rx_buffer can have this alignment. Since
460 * the data is memcpy'd from the rx_buf, it does not need to be equal to
461 * EFX_PAGE_IP_ALIGN.
462 */
463#define EFX_PAGE_SKB_ALIGN 2
464
465/* Forward declaration */
466struct efx_nic;
467
468/* Pseudo bit-mask flow control field */
David S. Millerb56269462011-05-17 17:53:22 -0400469#define EFX_FC_RX FLOW_CTRL_RX
470#define EFX_FC_TX FLOW_CTRL_TX
471#define EFX_FC_AUTO 4
Ben Hutchings8ceee662008-04-27 12:55:59 +0100472
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800473/**
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000474 * struct efx_link_state - Current state of the link
475 * @up: Link is up
476 * @fd: Link is full-duplex
477 * @fc: Actual flow control flags
478 * @speed: Link speed (Mbps)
479 */
480struct efx_link_state {
481 bool up;
482 bool fd;
David S. Millerb56269462011-05-17 17:53:22 -0400483 u8 fc;
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000484 unsigned int speed;
485};
486
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000487static inline bool efx_link_state_equal(const struct efx_link_state *left,
488 const struct efx_link_state *right)
489{
490 return left->up == right->up && left->fd == right->fd &&
491 left->fc == right->fc && left->speed == right->speed;
492}
493
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000494/**
Ben Hutchings8ceee662008-04-27 12:55:59 +0100495 * struct efx_phy_operations - Efx PHY operations table
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000496 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
497 * efx->loopback_modes.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100498 * @init: Initialise PHY
499 * @fini: Shut down PHY
500 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000501 * @poll: Update @link_state and report whether it changed.
502 * Serialised by the mac_lock.
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800503 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
504 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000505 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800506 * (only needed where AN bit is set in mmds)
Ben Hutchings4f16c072010-02-03 09:30:50 +0000507 * @test_alive: Test that PHY is 'alive' (online)
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000508 * @test_name: Get the name of a PHY-specific test/result
Ben Hutchings4f16c072010-02-03 09:30:50 +0000509 * @run_tests: Run tests and record results as appropriate (offline).
Ben Hutchings17967212008-12-26 13:47:25 -0800510 * Flags are the ethtool tests flags.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100511 */
512struct efx_phy_operations {
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000513 int (*probe) (struct efx_nic *efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100514 int (*init) (struct efx_nic *efx);
515 void (*fini) (struct efx_nic *efx);
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000516 void (*remove) (struct efx_nic *efx);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000517 int (*reconfigure) (struct efx_nic *efx);
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000518 bool (*poll) (struct efx_nic *efx);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800519 void (*get_settings) (struct efx_nic *efx,
520 struct ethtool_cmd *ecmd);
521 int (*set_settings) (struct efx_nic *efx,
522 struct ethtool_cmd *ecmd);
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000523 void (*set_npage_adv) (struct efx_nic *efx, u32);
Ben Hutchings4f16c072010-02-03 09:30:50 +0000524 int (*test_alive) (struct efx_nic *efx);
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000525 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
Ben Hutchings17967212008-12-26 13:47:25 -0800526 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100527};
528
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100529/**
530 * @enum efx_phy_mode - PHY operating mode flags
531 * @PHY_MODE_NORMAL: on and should pass traffic
532 * @PHY_MODE_TX_DISABLED: on with TX disabled
Ben Hutchings3e133c42008-11-04 20:34:56 +0000533 * @PHY_MODE_LOW_POWER: set to low power through MDIO
534 * @PHY_MODE_OFF: switched off through external control
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100535 * @PHY_MODE_SPECIAL: on but will not pass traffic
536 */
537enum efx_phy_mode {
538 PHY_MODE_NORMAL = 0,
539 PHY_MODE_TX_DISABLED = 1,
Ben Hutchings3e133c42008-11-04 20:34:56 +0000540 PHY_MODE_LOW_POWER = 2,
541 PHY_MODE_OFF = 4,
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100542 PHY_MODE_SPECIAL = 8,
543};
544
545static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
546{
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100547 return !!(mode & ~PHY_MODE_TX_DISABLED);
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100548}
549
Ben Hutchings8ceee662008-04-27 12:55:59 +0100550/*
551 * Efx extended statistics
552 *
553 * Not all statistics are provided by all supported MACs. The purpose
554 * is this structure is to contain the raw statistics provided by each
555 * MAC.
556 */
557struct efx_mac_stats {
558 u64 tx_bytes;
559 u64 tx_good_bytes;
560 u64 tx_bad_bytes;
Ben Hutchingsf9c76252011-10-12 17:20:25 +0100561 u64 tx_packets;
562 u64 tx_bad;
563 u64 tx_pause;
564 u64 tx_control;
565 u64 tx_unicast;
566 u64 tx_multicast;
567 u64 tx_broadcast;
568 u64 tx_lt64;
569 u64 tx_64;
570 u64 tx_65_to_127;
571 u64 tx_128_to_255;
572 u64 tx_256_to_511;
573 u64 tx_512_to_1023;
574 u64 tx_1024_to_15xx;
575 u64 tx_15xx_to_jumbo;
576 u64 tx_gtjumbo;
577 u64 tx_collision;
578 u64 tx_single_collision;
579 u64 tx_multiple_collision;
580 u64 tx_excessive_collision;
581 u64 tx_deferred;
582 u64 tx_late_collision;
583 u64 tx_excessive_deferred;
584 u64 tx_non_tcpudp;
585 u64 tx_mac_src_error;
586 u64 tx_ip_src_error;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100587 u64 rx_bytes;
588 u64 rx_good_bytes;
589 u64 rx_bad_bytes;
Ben Hutchingsf9c76252011-10-12 17:20:25 +0100590 u64 rx_packets;
591 u64 rx_good;
592 u64 rx_bad;
593 u64 rx_pause;
594 u64 rx_control;
595 u64 rx_unicast;
596 u64 rx_multicast;
597 u64 rx_broadcast;
598 u64 rx_lt64;
599 u64 rx_64;
600 u64 rx_65_to_127;
601 u64 rx_128_to_255;
602 u64 rx_256_to_511;
603 u64 rx_512_to_1023;
604 u64 rx_1024_to_15xx;
605 u64 rx_15xx_to_jumbo;
606 u64 rx_gtjumbo;
607 u64 rx_bad_lt64;
608 u64 rx_bad_64_to_15xx;
609 u64 rx_bad_15xx_to_jumbo;
610 u64 rx_bad_gtjumbo;
611 u64 rx_overflow;
612 u64 rx_missed;
613 u64 rx_false_carrier;
614 u64 rx_symbol_error;
615 u64 rx_align_error;
616 u64 rx_length_error;
617 u64 rx_internal_error;
618 u64 rx_good_lt64;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100619};
620
621/* Number of bits used in a multicast filter hash address */
622#define EFX_MCAST_HASH_BITS 8
623
624/* Number of (single-bit) entries in a multicast filter hash */
625#define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
626
627/* An Efx multicast filter hash */
628union efx_multicast_hash {
629 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
630 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
631};
632
Ben Hutchings64eebcf2010-09-20 08:43:07 +0000633struct efx_filter_state;
Ben Hutchingscd2d5b52012-02-14 00:48:07 +0000634struct efx_vf;
635struct vfdi_status;
Ben Hutchings64eebcf2010-09-20 08:43:07 +0000636
Ben Hutchings8ceee662008-04-27 12:55:59 +0100637/**
638 * struct efx_nic - an Efx NIC
639 * @name: Device name (net device name or bus id before net device registered)
640 * @pci_dev: The PCI device
641 * @type: Controller type attributes
642 * @legacy_irq: IRQ number
Ben Hutchings94dec6a2010-12-07 19:24:45 +0000643 * @legacy_irq_enabled: Are IRQs enabled on NIC (INT_EN_KER register)?
Ben Hutchings8d9853d2008-07-18 19:01:20 +0100644 * @workqueue: Workqueue for port reconfigures and the HW monitor.
645 * Work items do not hold and must not acquire RTNL.
Ben Hutchings6977dc62008-12-26 13:44:39 -0800646 * @workqueue_name: Name of workqueue
Ben Hutchings8ceee662008-04-27 12:55:59 +0100647 * @reset_work: Scheduled reset workitem
Ben Hutchings8ceee662008-04-27 12:55:59 +0100648 * @membase_phys: Memory BAR value as physical address
649 * @membase: Memory BAR value
Ben Hutchings8ceee662008-04-27 12:55:59 +0100650 * @interrupt_mode: Interrupt mode
Ben Hutchingscc180b62011-12-08 19:51:47 +0000651 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000652 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
653 * @irq_rx_moderation: IRQ moderation time for RX event queues
Ben Hutchings62776d02010-06-23 11:30:07 +0000654 * @msg_enable: Log message enable flags
Ben Hutchings8ceee662008-04-27 12:55:59 +0100655 * @state: Device state flag. Serialised by the rtnl_lock.
Ben Hutchingsa7d529a2011-06-24 20:46:31 +0100656 * @reset_pending: Bitmask for pending resets
Ben Hutchings8ceee662008-04-27 12:55:59 +0100657 * @tx_queue: TX DMA queues
658 * @rx_queue: RX DMA queues
659 * @channel: Channels
Ben Hutchings46426102010-09-10 06:42:33 +0000660 * @channel_name: Names for channels and their IRQs
Ben Hutchings7f967c02012-02-13 23:45:02 +0000661 * @extra_channel_types: Types of extra (non-traffic) channels that
662 * should be allocated for this NIC
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000663 * @rxq_entries: Size of receive queues requested by user.
664 * @txq_entries: Size of transmit queues requested by user.
Ben Hutchings28e47c42012-02-15 01:58:49 +0000665 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
666 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
667 * @sram_lim_qw: Qword address limit of SRAM
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000668 * @next_buffer_table: First available buffer table id
Neil Turton28b581a2008-12-12 21:41:06 -0800669 * @n_channels: Number of channels in use
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000670 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
671 * @n_tx_channels: Number of channels used for TX
Ben Hutchings8ceee662008-04-27 12:55:59 +0100672 * @rx_buffer_len: RX buffer length
673 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
Ben Hutchings78d41892010-12-02 13:47:56 +0000674 * @rx_hash_key: Toeplitz hash key for RSS
Ben Hutchings765c9f42010-06-30 05:06:28 +0000675 * @rx_indir_table: Indirection table for RSS
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000676 * @int_error_count: Number of internal errors seen recently
677 * @int_error_expire: Time at which error count will be expired
Ben Hutchings8ceee662008-04-27 12:55:59 +0100678 * @irq_status: Interrupt status buffer
Ben Hutchingsc28884c2010-04-28 09:30:00 +0000679 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
Ben Hutchings1646a6f2012-01-05 20:14:10 +0000680 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
Ben Hutchings76884832009-11-29 15:10:44 +0000681 * @mtd_list: List of MTDs attached to the NIC
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300682 * @nic_data: Hardware dependent state
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100683 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
Ben Hutchingse4abce82011-05-16 18:51:24 +0100684 * efx_monitor() and efx_reconfigure_port()
Ben Hutchings8ceee662008-04-27 12:55:59 +0100685 * @port_enabled: Port enabled indicator.
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000686 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
687 * efx_mac_work() with kernel interfaces. Safe to read under any
688 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
689 * be held to modify it.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100690 * @port_initialized: Port initialized?
691 * @net_dev: Operating system network device. Consider holding the rtnl lock
Ben Hutchings8ceee662008-04-27 12:55:59 +0100692 * @stats_buffer: DMA buffer for statistics
Ben Hutchings8ceee662008-04-27 12:55:59 +0100693 * @phy_type: PHY type
Ben Hutchings8ceee662008-04-27 12:55:59 +0100694 * @phy_op: PHY interface
695 * @phy_data: PHY private data (including PHY-specific stats)
Ben Hutchings68e7f452009-04-29 08:05:08 +0000696 * @mdio: PHY MDIO interface
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000697 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100698 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000699 * @link_advertising: Autonegotiation advertising flags
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000700 * @link_state: Current state of the link
Ben Hutchings8ceee662008-04-27 12:55:59 +0100701 * @n_link_state_changes: Number of times the link has changed state
702 * @promiscuous: Promiscuous flag. Protected by netif_tx_lock.
703 * @multicast_hash: Multicast hash table
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800704 * @wanted_fc: Wanted flow control flags
Steve Hodgsona606f432011-05-23 12:18:45 +0100705 * @fc_disable: When non-zero flow control is disabled. Typically used to
706 * ensure that network back pressure doesn't delay dma queue flushes.
707 * Serialised by the rtnl lock.
Ben Hutchings8be4f3e2009-11-25 16:12:16 +0000708 * @mac_work: Work item for changing MAC promiscuity and multicast hash
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100709 * @loopback_mode: Loopback status
710 * @loopback_modes: Supported loopback mode bitmask
711 * @loopback_selftest: Offline self-test private state
Ben Hutchings9f2cb712012-02-08 00:11:20 +0000712 * @drain_pending: Count of RX and TX queues that haven't been flushed and drained.
713 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
714 * Decremented when the efx_flush_rx_queue() is called.
715 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
716 * completed (either success or failure). Not used when MCDI is used to
717 * flush receive queues.
718 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
Ben Hutchingscd2d5b52012-02-14 00:48:07 +0000719 * @vf: Array of &struct efx_vf objects.
720 * @vf_count: Number of VFs intended to be enabled.
721 * @vf_init_count: Number of VFs that have been fully initialised.
722 * @vi_scale: log2 number of vnics per VF.
723 * @vf_buftbl_base: The zeroth buffer table index used to back VF queues.
724 * @vfdi_status: Common VFDI status page to be dmad to VF address space.
725 * @local_addr_list: List of local addresses. Protected by %local_lock.
726 * @local_page_list: List of DMA addressable pages used to broadcast
727 * %local_addr_list. Protected by %local_lock.
728 * @local_lock: Mutex protecting %local_addr_list and %local_page_list.
729 * @peer_work: Work item to broadcast peer addresses to VMs.
Ben Hutchingsab28c122010-12-06 22:53:15 +0000730 * @monitor_work: Hardware monitor workitem
731 * @biu_lock: BIU (bus interface unit) lock
Ben Hutchings1646a6f2012-01-05 20:14:10 +0000732 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
733 * field is used by efx_test_interrupts() to verify that an
734 * interrupt has occurred.
Ben Hutchingsab28c122010-12-06 22:53:15 +0000735 * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
736 * @mac_stats: MAC statistics. These include all statistics the MACs
737 * can provide. Generic code converts these into a standard
738 * &struct net_device_stats.
739 * @stats_lock: Statistics update lock. Serialises statistics fetches
Ben Hutchings1cb34522011-09-02 23:23:00 +0100740 * and access to @mac_stats.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100741 *
Ben Hutchings754c6532010-02-03 09:31:57 +0000742 * This is stored in the private area of the &struct net_device.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100743 */
744struct efx_nic {
Ben Hutchingsab28c122010-12-06 22:53:15 +0000745 /* The following fields should be written very rarely */
746
Ben Hutchings8ceee662008-04-27 12:55:59 +0100747 char name[IFNAMSIZ];
748 struct pci_dev *pci_dev;
749 const struct efx_nic_type *type;
750 int legacy_irq;
Ben Hutchings94dec6a2010-12-07 19:24:45 +0000751 bool legacy_irq_enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100752 struct workqueue_struct *workqueue;
Ben Hutchings6977dc62008-12-26 13:44:39 -0800753 char workqueue_name[16];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100754 struct work_struct reset_work;
Ben Hutchings086ea352008-05-16 21:17:06 +0100755 resource_size_t membase_phys;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100756 void __iomem *membase;
Ben Hutchingsab28c122010-12-06 22:53:15 +0000757
Ben Hutchings8ceee662008-04-27 12:55:59 +0100758 enum efx_int_mode interrupt_mode;
Ben Hutchingscc180b62011-12-08 19:51:47 +0000759 unsigned int timer_quantum_ns;
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000760 bool irq_rx_adaptive;
761 unsigned int irq_rx_moderation;
Ben Hutchings62776d02010-06-23 11:30:07 +0000762 u32 msg_enable;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100763
Ben Hutchings8ceee662008-04-27 12:55:59 +0100764 enum nic_state state;
Ben Hutchingsa7d529a2011-06-24 20:46:31 +0100765 unsigned long reset_pending;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100766
Ben Hutchings8313aca2010-09-10 06:41:57 +0000767 struct efx_channel *channel[EFX_MAX_CHANNELS];
Ben Hutchingsefbc2d72010-09-13 04:14:49 +0000768 char channel_name[EFX_MAX_CHANNELS][IFNAMSIZ + 6];
Ben Hutchings7f967c02012-02-13 23:45:02 +0000769 const struct efx_channel_type *
770 extra_channel_type[EFX_MAX_EXTRA_CHANNELS];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100771
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000772 unsigned rxq_entries;
773 unsigned txq_entries;
Ben Hutchings28e47c42012-02-15 01:58:49 +0000774 unsigned tx_dc_base;
775 unsigned rx_dc_base;
776 unsigned sram_lim_qw;
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000777 unsigned next_buffer_table;
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000778 unsigned n_channels;
779 unsigned n_rx_channels;
Ben Hutchingscd2d5b52012-02-14 00:48:07 +0000780 unsigned rss_spread;
Ben Hutchings97653432011-01-12 18:26:56 +0000781 unsigned tx_channel_offset;
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000782 unsigned n_tx_channels;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100783 unsigned int rx_buffer_len;
784 unsigned int rx_buffer_order;
Ben Hutchings5d3a6fc2010-06-25 07:05:43 +0000785 u8 rx_hash_key[40];
Ben Hutchings765c9f42010-06-30 05:06:28 +0000786 u32 rx_indir_table[128];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100787
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000788 unsigned int_error_count;
789 unsigned long int_error_expire;
790
Ben Hutchings8ceee662008-04-27 12:55:59 +0100791 struct efx_buffer irq_status;
Ben Hutchingsc28884c2010-04-28 09:30:00 +0000792 unsigned irq_zero_count;
Ben Hutchings1646a6f2012-01-05 20:14:10 +0000793 unsigned irq_level;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100794
Ben Hutchings76884832009-11-29 15:10:44 +0000795#ifdef CONFIG_SFC_MTD
796 struct list_head mtd_list;
797#endif
Ben Hutchings4a5b5042008-09-01 12:47:16 +0100798
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000799 void *nic_data;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100800
801 struct mutex mac_lock;
Ben Hutchings766ca0f2008-12-12 21:59:24 -0800802 struct work_struct mac_work;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100803 bool port_enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100804
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100805 bool port_initialized;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100806 struct net_device *net_dev;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100807
Ben Hutchings8ceee662008-04-27 12:55:59 +0100808 struct efx_buffer stats_buffer;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100809
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000810 unsigned int phy_type;
stephen hemminger6c8c2512011-04-14 05:50:12 +0000811 const struct efx_phy_operations *phy_op;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100812 void *phy_data;
Ben Hutchings68e7f452009-04-29 08:05:08 +0000813 struct mdio_if_info mdio;
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000814 unsigned int mdio_bus;
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100815 enum efx_phy_mode phy_mode;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100816
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000817 u32 link_advertising;
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000818 struct efx_link_state link_state;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100819 unsigned int n_link_state_changes;
820
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100821 bool promiscuous;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100822 union efx_multicast_hash multicast_hash;
David S. Millerb56269462011-05-17 17:53:22 -0400823 u8 wanted_fc;
Steve Hodgsona606f432011-05-23 12:18:45 +0100824 unsigned fc_disable;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100825
826 atomic_t rx_reset;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100827 enum efx_loopback_mode loopback_mode;
Ben Hutchingse58f69f2009-11-29 15:08:41 +0000828 u64 loopback_modes;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100829
830 void *loopback_selftest;
Ben Hutchings64eebcf2010-09-20 08:43:07 +0000831
832 struct efx_filter_state *filter_state;
Ben Hutchingsab28c122010-12-06 22:53:15 +0000833
Ben Hutchings9f2cb712012-02-08 00:11:20 +0000834 atomic_t drain_pending;
835 atomic_t rxq_flush_pending;
836 atomic_t rxq_flush_outstanding;
837 wait_queue_head_t flush_wq;
838
Ben Hutchingscd2d5b52012-02-14 00:48:07 +0000839#ifdef CONFIG_SFC_SRIOV
840 struct efx_channel *vfdi_channel;
841 struct efx_vf *vf;
842 unsigned vf_count;
843 unsigned vf_init_count;
844 unsigned vi_scale;
845 unsigned vf_buftbl_base;
846 struct efx_buffer vfdi_status;
847 struct list_head local_addr_list;
848 struct list_head local_page_list;
849 struct mutex local_lock;
850 struct work_struct peer_work;
851#endif
852
Ben Hutchingsab28c122010-12-06 22:53:15 +0000853 /* The following fields may be written more often */
854
855 struct delayed_work monitor_work ____cacheline_aligned_in_smp;
856 spinlock_t biu_lock;
Ben Hutchings1646a6f2012-01-05 20:14:10 +0000857 int last_irq_cpu;
Ben Hutchingsab28c122010-12-06 22:53:15 +0000858 unsigned n_rx_nodesc_drop_cnt;
859 struct efx_mac_stats mac_stats;
860 spinlock_t stats_lock;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100861};
862
Ben Hutchings55668612008-05-16 21:16:10 +0100863static inline int efx_dev_registered(struct efx_nic *efx)
864{
865 return efx->net_dev->reg_state == NETREG_REGISTERED;
866}
867
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000868static inline unsigned int efx_port_num(struct efx_nic *efx)
869{
Ben Hutchings3df95ce2010-06-02 10:39:56 +0000870 return efx->net_dev->dev_id;
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000871}
872
Ben Hutchings8ceee662008-04-27 12:55:59 +0100873/**
874 * struct efx_nic_type - Efx device type definition
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000875 * @probe: Probe the controller
876 * @remove: Free resources allocated by probe()
877 * @init: Initialise the controller
Ben Hutchings28e47c42012-02-15 01:58:49 +0000878 * @dimension_resources: Dimension controller resources (buffer table,
879 * and VIs once the available interrupt resources are clear)
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000880 * @fini: Shut down the controller
881 * @monitor: Periodic function for polling link state and hardware monitor
Ben Hutchings0e2a9c72011-06-24 20:50:07 +0100882 * @map_reset_reason: Map ethtool reset reason to a reset method
883 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000884 * @reset: Reset the controller hardware and possibly the PHY. This will
885 * be called while the controller is uninitialised.
886 * @probe_port: Probe the MAC and PHY
887 * @remove_port: Free resources allocated by probe_port()
Ben Hutchings40641ed2010-12-02 13:47:45 +0000888 * @handle_global_event: Handle a "global" event (may be %NULL)
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000889 * @prepare_flush: Prepare the hardware for flushing the DMA queues
890 * @update_stats: Update statistics not provided by event handling
891 * @start_stats: Start the regular fetching of statistics
892 * @stop_stats: Stop the regular fetching of statistics
Ben Hutchings06629f02009-11-29 03:43:43 +0000893 * @set_id_led: Set state of identifying LED or revert to automatic function
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000894 * @push_irq_moderation: Apply interrupt moderation value
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000895 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
Ben Hutchings30b81cd2011-09-13 19:47:48 +0100896 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
897 * to the hardware. Serialised by the mac_lock.
Ben Hutchings710b2082011-09-03 00:15:00 +0100898 * @check_mac_fault: Check MAC fault state. True if fault present.
Ben Hutchings89c758f2009-11-29 03:43:07 +0000899 * @get_wol: Get WoL configuration from driver state
900 * @set_wol: Push WoL configuration to the NIC
901 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
Ben Hutchings9bfc4bb2009-11-29 03:43:23 +0000902 * @test_registers: Test read/write functionality of control registers
Ben Hutchings0aa3fba2009-11-29 03:43:33 +0000903 * @test_nvram: Test validity of NVRAM contents
Ben Hutchingsdaeda632009-11-28 05:36:04 +0000904 * @revision: Hardware architecture revision
Ben Hutchings8ceee662008-04-27 12:55:59 +0100905 * @mem_map_size: Memory BAR mapped size
906 * @txd_ptr_tbl_base: TX descriptor ring base address
907 * @rxd_ptr_tbl_base: RX descriptor ring base address
908 * @buf_tbl_base: Buffer table base address
909 * @evq_ptr_tbl_base: Event queue pointer table base address
910 * @evq_rptr_tbl_base: Event queue read-pointer table base address
Ben Hutchings8ceee662008-04-27 12:55:59 +0100911 * @max_dma_mask: Maximum possible DMA mask
Ben Hutchings39c9cf02010-06-23 11:31:28 +0000912 * @rx_buffer_hash_size: Size of hash at start of RX buffer
913 * @rx_buffer_padding: Size of padding at end of RX buffer
Ben Hutchings8ceee662008-04-27 12:55:59 +0100914 * @max_interrupt_mode: Highest capability interrupt mode supported
915 * from &enum efx_init_mode.
916 * @phys_addr_channels: Number of channels with physically addressed
917 * descriptors
Ben Hutchingscc180b62011-12-08 19:51:47 +0000918 * @timer_period_max: Maximum period of interrupt timer (in ticks)
Ben Hutchingsc383b532009-11-29 15:11:02 +0000919 * @offload_features: net_device feature flags for protocol offload
920 * features implemented in hardware
Ben Hutchings8ceee662008-04-27 12:55:59 +0100921 */
922struct efx_nic_type {
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000923 int (*probe)(struct efx_nic *efx);
924 void (*remove)(struct efx_nic *efx);
925 int (*init)(struct efx_nic *efx);
Ben Hutchings28e47c42012-02-15 01:58:49 +0000926 void (*dimension_resources)(struct efx_nic *efx);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000927 void (*fini)(struct efx_nic *efx);
928 void (*monitor)(struct efx_nic *efx);
Ben Hutchings0e2a9c72011-06-24 20:50:07 +0100929 enum reset_type (*map_reset_reason)(enum reset_type reason);
930 int (*map_reset_flags)(u32 *flags);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000931 int (*reset)(struct efx_nic *efx, enum reset_type method);
932 int (*probe_port)(struct efx_nic *efx);
933 void (*remove_port)(struct efx_nic *efx);
Ben Hutchings40641ed2010-12-02 13:47:45 +0000934 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000935 void (*prepare_flush)(struct efx_nic *efx);
936 void (*update_stats)(struct efx_nic *efx);
937 void (*start_stats)(struct efx_nic *efx);
938 void (*stop_stats)(struct efx_nic *efx);
Ben Hutchings06629f02009-11-29 03:43:43 +0000939 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000940 void (*push_irq_moderation)(struct efx_channel *channel);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000941 int (*reconfigure_port)(struct efx_nic *efx);
Ben Hutchings710b2082011-09-03 00:15:00 +0100942 int (*reconfigure_mac)(struct efx_nic *efx);
943 bool (*check_mac_fault)(struct efx_nic *efx);
Ben Hutchings89c758f2009-11-29 03:43:07 +0000944 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
945 int (*set_wol)(struct efx_nic *efx, u32 type);
946 void (*resume_wol)(struct efx_nic *efx);
Ben Hutchings9bfc4bb2009-11-29 03:43:23 +0000947 int (*test_registers)(struct efx_nic *efx);
Ben Hutchings0aa3fba2009-11-29 03:43:33 +0000948 int (*test_nvram)(struct efx_nic *efx);
Steve Hodgsonb895d732009-11-28 05:35:00 +0000949
Ben Hutchingsdaeda632009-11-28 05:36:04 +0000950 int revision;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100951 unsigned int mem_map_size;
952 unsigned int txd_ptr_tbl_base;
953 unsigned int rxd_ptr_tbl_base;
954 unsigned int buf_tbl_base;
955 unsigned int evq_ptr_tbl_base;
956 unsigned int evq_rptr_tbl_base;
Ben Hutchings9bbd7d92008-05-16 21:18:48 +0100957 u64 max_dma_mask;
Ben Hutchings39c9cf02010-06-23 11:31:28 +0000958 unsigned int rx_buffer_hash_size;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100959 unsigned int rx_buffer_padding;
960 unsigned int max_interrupt_mode;
961 unsigned int phys_addr_channels;
Ben Hutchingscc180b62011-12-08 19:51:47 +0000962 unsigned int timer_period_max;
Michał Mirosławc8f44af2011-11-15 15:29:55 +0000963 netdev_features_t offload_features;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100964};
965
966/**************************************************************************
967 *
968 * Prototypes and inline functions
969 *
970 *************************************************************************/
971
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +0000972static inline struct efx_channel *
973efx_get_channel(struct efx_nic *efx, unsigned index)
974{
975 EFX_BUG_ON_PARANOID(index >= efx->n_channels);
Ben Hutchings8313aca2010-09-10 06:41:57 +0000976 return efx->channel[index];
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +0000977}
978
Ben Hutchings8ceee662008-04-27 12:55:59 +0100979/* Iterate over all used channels */
980#define efx_for_each_channel(_channel, _efx) \
Ben Hutchings8313aca2010-09-10 06:41:57 +0000981 for (_channel = (_efx)->channel[0]; \
982 _channel; \
983 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
984 (_efx)->channel[_channel->channel + 1] : NULL)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100985
Ben Hutchings7f967c02012-02-13 23:45:02 +0000986/* Iterate over all used channels in reverse */
987#define efx_for_each_channel_rev(_channel, _efx) \
988 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
989 _channel; \
990 _channel = _channel->channel ? \
991 (_efx)->channel[_channel->channel - 1] : NULL)
992
Ben Hutchings97653432011-01-12 18:26:56 +0000993static inline struct efx_tx_queue *
994efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
995{
996 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
997 type >= EFX_TXQ_TYPES);
998 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type];
999}
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001000
Ben Hutchings525da902011-02-07 23:04:38 +00001001static inline bool efx_channel_has_tx_queues(struct efx_channel *channel)
1002{
1003 return channel->channel - channel->efx->tx_channel_offset <
1004 channel->efx->n_tx_channels;
1005}
1006
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001007static inline struct efx_tx_queue *
1008efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type)
1009{
Ben Hutchings525da902011-02-07 23:04:38 +00001010 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel) ||
1011 type >= EFX_TXQ_TYPES);
1012 return &channel->tx_queue[type];
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001013}
Ben Hutchings8ceee662008-04-27 12:55:59 +01001014
Ben Hutchings94b274b2011-01-10 21:18:20 +00001015static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue)
1016{
1017 return !(tx_queue->efx->net_dev->num_tc < 2 &&
1018 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI);
1019}
1020
Ben Hutchings8ceee662008-04-27 12:55:59 +01001021/* Iterate over all TX queues belonging to a channel */
1022#define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
Ben Hutchings525da902011-02-07 23:04:38 +00001023 if (!efx_channel_has_tx_queues(_channel)) \
1024 ; \
1025 else \
1026 for (_tx_queue = (_channel)->tx_queue; \
Ben Hutchings94b274b2011-01-10 21:18:20 +00001027 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1028 efx_tx_queue_used(_tx_queue); \
Ben Hutchings525da902011-02-07 23:04:38 +00001029 _tx_queue++)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001030
Ben Hutchings94b274b2011-01-10 21:18:20 +00001031/* Iterate over all possible TX queues belonging to a channel */
1032#define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
Ben Hutchings73e00262012-02-23 00:45:50 +00001033 if (!efx_channel_has_tx_queues(_channel)) \
1034 ; \
1035 else \
1036 for (_tx_queue = (_channel)->tx_queue; \
1037 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1038 _tx_queue++)
Ben Hutchings94b274b2011-01-10 21:18:20 +00001039
Ben Hutchings525da902011-02-07 23:04:38 +00001040static inline bool efx_channel_has_rx_queue(struct efx_channel *channel)
1041{
1042 return channel->channel < channel->efx->n_rx_channels;
1043}
1044
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001045static inline struct efx_rx_queue *
1046efx_channel_get_rx_queue(struct efx_channel *channel)
1047{
Ben Hutchings525da902011-02-07 23:04:38 +00001048 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel));
1049 return &channel->rx_queue;
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001050}
1051
Ben Hutchings8ceee662008-04-27 12:55:59 +01001052/* Iterate over all RX queues belonging to a channel */
1053#define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
Ben Hutchings525da902011-02-07 23:04:38 +00001054 if (!efx_channel_has_rx_queue(_channel)) \
1055 ; \
1056 else \
1057 for (_rx_queue = &(_channel)->rx_queue; \
1058 _rx_queue; \
1059 _rx_queue = NULL)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001060
Ben Hutchingsba1e8a32010-09-10 06:41:36 +00001061static inline struct efx_channel *
1062efx_rx_queue_channel(struct efx_rx_queue *rx_queue)
1063{
Ben Hutchings8313aca2010-09-10 06:41:57 +00001064 return container_of(rx_queue, struct efx_channel, rx_queue);
Ben Hutchingsba1e8a32010-09-10 06:41:36 +00001065}
1066
1067static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue)
1068{
Ben Hutchings8313aca2010-09-10 06:41:57 +00001069 return efx_rx_queue_channel(rx_queue)->channel;
Ben Hutchingsba1e8a32010-09-10 06:41:36 +00001070}
1071
Ben Hutchings8ceee662008-04-27 12:55:59 +01001072/* Returns a pointer to the specified receive buffer in the RX
1073 * descriptor queue.
1074 */
1075static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
1076 unsigned int index)
1077{
Eric Dumazet807540b2010-09-23 05:40:09 +00001078 return &rx_queue->buffer[index];
Ben Hutchings8ceee662008-04-27 12:55:59 +01001079}
1080
1081/* Set bit in a little-endian bitfield */
Ben Hutchings18c2fc02008-09-01 12:43:39 +01001082static inline void set_bit_le(unsigned nr, unsigned char *addr)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001083{
1084 addr[nr / 8] |= (1 << (nr % 8));
1085}
1086
1087/* Clear bit in a little-endian bitfield */
Ben Hutchings18c2fc02008-09-01 12:43:39 +01001088static inline void clear_bit_le(unsigned nr, unsigned char *addr)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001089{
1090 addr[nr / 8] &= ~(1 << (nr % 8));
1091}
1092
1093
1094/**
1095 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1096 *
1097 * This calculates the maximum frame length that will be used for a
1098 * given MTU. The frame length will be equal to the MTU plus a
1099 * constant amount of header space and padding. This is the quantity
1100 * that the net driver will program into the MAC as the maximum frame
1101 * length.
1102 *
Ben Hutchings754c6532010-02-03 09:31:57 +00001103 * The 10G MAC requires 8-byte alignment on the frame
Ben Hutchings8ceee662008-04-27 12:55:59 +01001104 * length, so we round up to the nearest 8.
Ben Hutchingscc117632009-08-26 08:17:59 +00001105 *
1106 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1107 * XGMII cycle). If the frame length reaches the maximum value in the
1108 * same cycle, the XMAC can miss the IPG altogether. We work around
1109 * this by adding a further 16 bytes.
Ben Hutchings8ceee662008-04-27 12:55:59 +01001110 */
1111#define EFX_MAX_FRAME_LEN(mtu) \
Ben Hutchingscc117632009-08-26 08:17:59 +00001112 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001113
1114
1115#endif /* EFX_NET_DRIVER_H */