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Erik Gilling5ad36c52010-03-15 23:04:46 -07001/*
Colin Cross938fa342011-05-01 14:10:10 -07002 * Copyright (C) 2011 Google, Inc.
Erik Gilling5ad36c52010-03-15 23:04:46 -07003 *
4 * Author:
Colin Cross938fa342011-05-01 14:10:10 -07005 * Colin Cross <ccross@android.com>
Erik Gilling5ad36c52010-03-15 23:04:46 -07006 *
Joseph Loe307cc82013-04-03 19:31:45 +08007 * Copyright (C) 2010,2013, NVIDIA Corporation
Gary King460907b2010-04-05 20:30:59 -07008 *
Erik Gilling5ad36c52010-03-15 23:04:46 -07009 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
Joseph Lo7e8b15d2013-07-19 17:25:24 +080020#include <linux/cpu_pm.h>
Erik Gilling5ad36c52010-03-15 23:04:46 -070021#include <linux/interrupt.h>
Erik Gilling5ad36c52010-03-15 23:04:46 -070022#include <linux/io.h>
Rob Herring520f7bd2012-12-27 13:10:24 -060023#include <linux/irqchip/arm-gic.h>
Thierry Redinga0524ac2014-07-11 09:44:49 +020024#include <linux/irq.h>
25#include <linux/kernel.h>
26#include <linux/of_address.h>
27#include <linux/of.h>
Joseph Loe307cc82013-04-03 19:31:45 +080028#include <linux/syscore_ops.h>
Erik Gilling5ad36c52010-03-15 23:04:46 -070029
Erik Gilling5ad36c52010-03-15 23:04:46 -070030#include "board.h"
Stephen Warren2be39c02012-10-04 14:24:09 -060031#include "iomap.h"
Thierry Reding4f71a882016-04-28 14:54:27 +020032#include "irq.h"
Erik Gilling5ad36c52010-03-15 23:04:46 -070033
Joseph Lod4b92fb2013-01-15 22:10:26 +000034#define SGI_MASK 0xFFFF
35
Joseph Loe307cc82013-04-03 19:31:45 +080036#ifdef CONFIG_PM_SLEEP
Joseph Lo7e8b15d2013-07-19 17:25:24 +080037static void __iomem *tegra_gic_cpu_base;
Joseph Loe307cc82013-04-03 19:31:45 +080038#endif
39
Joseph Lod4b92fb2013-01-15 22:10:26 +000040bool tegra_pending_sgi(void)
41{
42 u32 pending_set;
43 void __iomem *distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE);
44
45 pending_set = readl_relaxed(distbase + GIC_DIST_PENDING_SET);
46
47 if (pending_set & SGI_MASK)
48 return true;
49
50 return false;
51}
52
Joseph Loe307cc82013-04-03 19:31:45 +080053#ifdef CONFIG_PM_SLEEP
Joseph Lo7e8b15d2013-07-19 17:25:24 +080054static int tegra_gic_notifier(struct notifier_block *self,
55 unsigned long cmd, void *v)
56{
57 switch (cmd) {
58 case CPU_PM_ENTER:
59 writel_relaxed(0x1E0, tegra_gic_cpu_base + GIC_CPU_CTRL);
60 break;
61 }
62
63 return NOTIFY_OK;
64}
65
66static struct notifier_block tegra_gic_notifier_block = {
67 .notifier_call = tegra_gic_notifier,
68};
69
70static const struct of_device_id tegra114_dt_gic_match[] __initconst = {
71 { .compatible = "arm,cortex-a15-gic" },
72 { }
73};
74
75static void tegra114_gic_cpu_pm_registration(void)
76{
77 struct device_node *dn;
78
79 dn = of_find_matching_node(NULL, tegra114_dt_gic_match);
80 if (!dn)
81 return;
82
83 tegra_gic_cpu_base = of_iomap(dn, 1);
84
85 cpu_pm_register_notifier(&tegra_gic_notifier_block);
86}
Joseph Loe307cc82013-04-03 19:31:45 +080087#else
Joseph Lo7e8b15d2013-07-19 17:25:24 +080088static void tegra114_gic_cpu_pm_registration(void) { }
Joseph Loe307cc82013-04-03 19:31:45 +080089#endif
90
Marc Zyngiere9479e02015-03-11 15:43:00 +000091static const struct of_device_id tegra_ictlr_match[] __initconst = {
92 { .compatible = "nvidia,tegra20-ictlr" },
93 { .compatible = "nvidia,tegra30-ictlr" },
94 { }
95};
96
Erik Gilling5ad36c52010-03-15 23:04:46 -070097void __init tegra_init_irq(void)
98{
Marc Zyngier1a703bf2015-03-11 15:43:03 +000099 if (WARN_ON(!of_find_matching_node(NULL, tegra_ictlr_match)))
100 pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
Colin Crossd1d8c662011-05-01 15:26:51 -0700101
Joseph Lo7e8b15d2013-07-19 17:25:24 +0800102 tegra114_gic_cpu_pm_registration();
Erik Gilling5ad36c52010-03-15 23:04:46 -0700103}