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Marc Zyngier1a89dd92013-01-21 19:36:12 -05001/*
2 * Copyright (C) 2012 ARM Ltd.
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef __ASM_ARM_KVM_VGIC_H
20#define __ASM_ARM_KVM_VGIC_H
21
Marc Zyngierb47ef922013-01-21 19:36:14 -050022#include <linux/kernel.h>
23#include <linux/kvm.h>
Marc Zyngierb47ef922013-01-21 19:36:14 -050024#include <linux/irqreturn.h>
25#include <linux/spinlock.h>
26#include <linux/types.h>
Marc Zyngier1a89dd92013-01-21 19:36:12 -050027
Marc Zyngier5fb66da2014-07-08 12:09:05 +010028#define VGIC_NR_IRQS_LEGACY 256
Marc Zyngierb47ef922013-01-21 19:36:14 -050029#define VGIC_NR_SGIS 16
30#define VGIC_NR_PPIS 16
31#define VGIC_NR_PRIVATE_IRQS (VGIC_NR_SGIS + VGIC_NR_PPIS)
Marc Zyngier8f186d52014-02-04 18:13:03 +000032
33#define VGIC_V2_MAX_LRS (1 << 6)
Marc Zyngierb2fb1c02013-07-12 15:15:23 +010034#define VGIC_V3_MAX_LRS 16
Marc Zyngierc3c91832014-07-08 12:09:04 +010035#define VGIC_MAX_IRQS 1024
Marc Zyngierb47ef922013-01-21 19:36:14 -050036
37/* Sanity checks... */
Marc Zyngierfc675e32014-07-08 12:09:03 +010038#if (KVM_MAX_VCPUS > 8)
Marc Zyngierb47ef922013-01-21 19:36:14 -050039#error Invalid number of CPU interfaces
40#endif
41
Marc Zyngier5fb66da2014-07-08 12:09:05 +010042#if (VGIC_NR_IRQS_LEGACY & 31)
Marc Zyngierb47ef922013-01-21 19:36:14 -050043#error "VGIC_NR_IRQS must be a multiple of 32"
44#endif
45
Marc Zyngier5fb66da2014-07-08 12:09:05 +010046#if (VGIC_NR_IRQS_LEGACY > VGIC_MAX_IRQS)
Marc Zyngierb47ef922013-01-21 19:36:14 -050047#error "VGIC_NR_IRQS must be <= 1024"
48#endif
49
50/*
51 * The GIC distributor registers describing interrupts have two parts:
52 * - 32 per-CPU interrupts (SGI + PPI)
53 * - a bunch of shared interrupts (SPI)
54 */
55struct vgic_bitmap {
Marc Zyngierc1bfb572014-07-08 12:09:01 +010056 /*
57 * - One UL per VCPU for private interrupts (assumes UL is at
58 * least 32 bits)
59 * - As many UL as necessary for shared interrupts.
60 *
61 * The private interrupts are accessed via the "private"
62 * field, one UL per vcpu (the state for vcpu n is in
63 * private[n]). The shared interrupts are accessed via the
64 * "shared" pointer (IRQn state is at bit n-32 in the bitmap).
65 */
66 unsigned long *private;
67 unsigned long *shared;
Marc Zyngierb47ef922013-01-21 19:36:14 -050068};
69
70struct vgic_bytemap {
Marc Zyngierc1bfb572014-07-08 12:09:01 +010071 /*
72 * - 8 u32 per VCPU for private interrupts
73 * - As many u32 as necessary for shared interrupts.
74 *
75 * The private interrupts are accessed via the "private"
76 * field, (the state for vcpu n is in private[n*8] to
77 * private[n*8 + 7]). The shared interrupts are accessed via
78 * the "shared" pointer (IRQn state is at byte (n-32)%4 of the
79 * shared[(n-32)/4] word).
80 */
81 u32 *private;
82 u32 *shared;
Marc Zyngierb47ef922013-01-21 19:36:14 -050083};
84
Marc Zyngier8d5c6b02013-06-03 15:55:02 +010085struct kvm_vcpu;
86
Marc Zyngier1a9b1302013-06-21 11:57:56 +010087enum vgic_type {
88 VGIC_V2, /* Good ol' GICv2 */
Marc Zyngierb2fb1c02013-07-12 15:15:23 +010089 VGIC_V3, /* New fancy GICv3 */
Marc Zyngier1a9b1302013-06-21 11:57:56 +010090};
91
Marc Zyngier8d5c6b02013-06-03 15:55:02 +010092#define LR_STATE_PENDING (1 << 0)
93#define LR_STATE_ACTIVE (1 << 1)
94#define LR_STATE_MASK (3 << 0)
95#define LR_EOI_INT (1 << 2)
96
97struct vgic_lr {
98 u16 irq;
99 u8 source;
100 u8 state;
101};
102
Marc Zyngierbeee38b2014-02-04 17:48:10 +0000103struct vgic_vmcr {
104 u32 ctlr;
105 u32 abpr;
106 u32 bpr;
107 u32 pmr;
108};
109
Marc Zyngier8d5c6b02013-06-03 15:55:02 +0100110struct vgic_ops {
111 struct vgic_lr (*get_lr)(const struct kvm_vcpu *, int);
112 void (*set_lr)(struct kvm_vcpu *, int, struct vgic_lr);
Marc Zyngier69bb2c92013-06-04 10:29:39 +0100113 void (*sync_lr_elrsr)(struct kvm_vcpu *, int, struct vgic_lr);
114 u64 (*get_elrsr)(const struct kvm_vcpu *vcpu);
Marc Zyngier8d6a0312013-06-04 10:33:43 +0100115 u64 (*get_eisr)(const struct kvm_vcpu *vcpu);
Marc Zyngier495dd852013-06-04 11:02:10 +0100116 u32 (*get_interrupt_status)(const struct kvm_vcpu *vcpu);
Marc Zyngier909d9b52013-06-04 11:24:17 +0100117 void (*enable_underflow)(struct kvm_vcpu *vcpu);
118 void (*disable_underflow)(struct kvm_vcpu *vcpu);
Marc Zyngierbeee38b2014-02-04 17:48:10 +0000119 void (*get_vmcr)(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
120 void (*set_vmcr)(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
Marc Zyngierda8dafd12013-06-04 11:36:38 +0100121 void (*enable)(struct kvm_vcpu *vcpu);
Marc Zyngier8d5c6b02013-06-03 15:55:02 +0100122};
123
Marc Zyngierca85f622013-06-18 19:17:28 +0100124struct vgic_params {
Marc Zyngier1a9b1302013-06-21 11:57:56 +0100125 /* vgic type */
126 enum vgic_type type;
Marc Zyngierca85f622013-06-18 19:17:28 +0100127 /* Physical address of vgic virtual cpu interface */
128 phys_addr_t vcpu_base;
129 /* Number of list registers */
130 u32 nr_lr;
131 /* Interrupt number */
132 unsigned int maint_irq;
133 /* Virtual control interface base address */
134 void __iomem *vctrl_base;
135};
136
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500137struct vgic_dist {
Marc Zyngierb47ef922013-01-21 19:36:14 -0500138#ifdef CONFIG_KVM_ARM_VGIC
139 spinlock_t lock;
Marc Zyngierf982cf42014-05-15 10:03:25 +0100140 bool in_kernel;
Marc Zyngier01ac5e32013-01-21 19:36:16 -0500141 bool ready;
Marc Zyngierb47ef922013-01-21 19:36:14 -0500142
Marc Zyngierc1bfb572014-07-08 12:09:01 +0100143 int nr_cpus;
144 int nr_irqs;
145
Marc Zyngierb47ef922013-01-21 19:36:14 -0500146 /* Virtual control interface mapping */
147 void __iomem *vctrl_base;
148
Christoffer Dall330690c2013-01-21 19:36:13 -0500149 /* Distributor and vcpu interface mapping in the guest */
150 phys_addr_t vgic_dist_base;
151 phys_addr_t vgic_cpu_base;
Marc Zyngierb47ef922013-01-21 19:36:14 -0500152
153 /* Distributor enabled */
154 u32 enabled;
155
156 /* Interrupt enabled (one bit per IRQ) */
157 struct vgic_bitmap irq_enabled;
158
Christoffer Dallfaa1b462014-06-14 21:54:51 +0200159 /* Level-triggered interrupt external input is asserted */
160 struct vgic_bitmap irq_level;
161
162 /*
163 * Interrupt state is pending on the distributor
164 */
Christoffer Dall227844f2014-06-09 12:27:18 +0200165 struct vgic_bitmap irq_pending;
Marc Zyngierb47ef922013-01-21 19:36:14 -0500166
Christoffer Dallfaa1b462014-06-14 21:54:51 +0200167 /*
168 * Tracks writes to GICD_ISPENDRn and GICD_ICPENDRn for level-triggered
169 * interrupts. Essentially holds the state of the flip-flop in
170 * Figure 4-10 on page 4-101 in ARM IHI 0048B.b.
171 * Once set, it is only cleared for level-triggered interrupts on
172 * guest ACKs (when we queue it) or writes to GICD_ICPENDRn.
173 */
174 struct vgic_bitmap irq_soft_pend;
175
Christoffer Dalldbf20f92014-06-09 12:55:13 +0200176 /* Level-triggered interrupt queued on VCPU interface */
177 struct vgic_bitmap irq_queued;
Marc Zyngierb47ef922013-01-21 19:36:14 -0500178
179 /* Interrupt priority. Not used yet. */
180 struct vgic_bytemap irq_priority;
181
182 /* Level/edge triggered */
183 struct vgic_bitmap irq_cfg;
184
Marc Zyngierc1bfb572014-07-08 12:09:01 +0100185 /*
186 * Source CPU per SGI and target CPU:
187 *
188 * Each byte represent a SGI observable on a VCPU, each bit of
189 * this byte indicating if the corresponding VCPU has
190 * generated this interrupt. This is a GICv2 feature only.
191 *
192 * For VCPUn (n < 8), irq_sgi_sources[n*16] to [n*16 + 15] are
193 * the SGIs observable on VCPUn.
194 */
195 u8 *irq_sgi_sources;
Marc Zyngierb47ef922013-01-21 19:36:14 -0500196
Marc Zyngierc1bfb572014-07-08 12:09:01 +0100197 /*
198 * Target CPU for each SPI:
199 *
200 * Array of available SPI, each byte indicating the target
201 * VCPU for SPI. IRQn (n >=32) is at irq_spi_cpu[n-32].
202 */
203 u8 *irq_spi_cpu;
204
205 /*
206 * Reverse lookup of irq_spi_cpu for faster compute pending:
207 *
208 * Array of bitmaps, one per VCPU, describing if IRQn is
209 * routed to a particular VCPU.
210 */
211 struct vgic_bitmap *irq_spi_target;
Marc Zyngierb47ef922013-01-21 19:36:14 -0500212
213 /* Bitmap indicating which CPU has something pending */
Marc Zyngierc1bfb572014-07-08 12:09:01 +0100214 unsigned long *irq_pending_on_cpu;
Marc Zyngierb47ef922013-01-21 19:36:14 -0500215#endif
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500216};
217
Marc Zyngiereede8212013-05-30 10:20:36 +0100218struct vgic_v2_cpu_if {
219 u32 vgic_hcr;
220 u32 vgic_vmcr;
221 u32 vgic_misr; /* Saved only */
Christoffer Dall2df36a52014-09-28 16:04:26 +0200222 u64 vgic_eisr; /* Saved only */
223 u64 vgic_elrsr; /* Saved only */
Marc Zyngiereede8212013-05-30 10:20:36 +0100224 u32 vgic_apr;
Marc Zyngier8f186d52014-02-04 18:13:03 +0000225 u32 vgic_lr[VGIC_V2_MAX_LRS];
Marc Zyngiereede8212013-05-30 10:20:36 +0100226};
227
Marc Zyngierb2fb1c02013-07-12 15:15:23 +0100228struct vgic_v3_cpu_if {
229#ifdef CONFIG_ARM_GIC_V3
230 u32 vgic_hcr;
231 u32 vgic_vmcr;
232 u32 vgic_misr; /* Saved only */
233 u32 vgic_eisr; /* Saved only */
234 u32 vgic_elrsr; /* Saved only */
235 u32 vgic_ap0r[4];
236 u32 vgic_ap1r[4];
237 u64 vgic_lr[VGIC_V3_MAX_LRS];
238#endif
239};
240
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500241struct vgic_cpu {
Marc Zyngier9d949dc2013-01-21 19:36:14 -0500242#ifdef CONFIG_KVM_ARM_VGIC
243 /* per IRQ to LR mapping */
Marc Zyngierc1bfb572014-07-08 12:09:01 +0100244 u8 *vgic_irq_lr_map;
Marc Zyngier9d949dc2013-01-21 19:36:14 -0500245
246 /* Pending interrupts on this VCPU */
247 DECLARE_BITMAP( pending_percpu, VGIC_NR_PRIVATE_IRQS);
Marc Zyngierc1bfb572014-07-08 12:09:01 +0100248 unsigned long *pending_shared;
Marc Zyngier9d949dc2013-01-21 19:36:14 -0500249
250 /* Bitmap of used/free list registers */
Marc Zyngier8f186d52014-02-04 18:13:03 +0000251 DECLARE_BITMAP( lr_used, VGIC_V2_MAX_LRS);
Marc Zyngier9d949dc2013-01-21 19:36:14 -0500252
253 /* Number of list registers on this CPU */
254 int nr_lr;
255
256 /* CPU vif control registers for world switch */
Marc Zyngiereede8212013-05-30 10:20:36 +0100257 union {
258 struct vgic_v2_cpu_if vgic_v2;
Marc Zyngierb2fb1c02013-07-12 15:15:23 +0100259 struct vgic_v3_cpu_if vgic_v3;
Marc Zyngiereede8212013-05-30 10:20:36 +0100260 };
Marc Zyngier9d949dc2013-01-21 19:36:14 -0500261#endif
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500262};
263
Marc Zyngier9d949dc2013-01-21 19:36:14 -0500264#define LR_EMPTY 0xff
265
Marc Zyngier495dd852013-06-04 11:02:10 +0100266#define INT_STATUS_EOI (1 << 0)
267#define INT_STATUS_UNDERFLOW (1 << 1)
268
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500269struct kvm;
270struct kvm_vcpu;
271struct kvm_run;
272struct kvm_exit_mmio;
273
274#ifdef CONFIG_KVM_ARM_VGIC
Christoffer Dallce01e4e2013-09-23 14:55:56 -0700275int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write);
Marc Zyngier01ac5e32013-01-21 19:36:16 -0500276int kvm_vgic_hyp_init(void);
Peter Maydell6d3cfbe2014-12-04 15:02:24 +0000277int kvm_vgic_map_resources(struct kvm *kvm);
Marc Zyngier01ac5e32013-01-21 19:36:16 -0500278int kvm_vgic_create(struct kvm *kvm);
Marc Zyngierc1bfb572014-07-08 12:09:01 +0100279void kvm_vgic_destroy(struct kvm *kvm);
Marc Zyngierc1bfb572014-07-08 12:09:01 +0100280void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu);
Marc Zyngier9d949dc2013-01-21 19:36:14 -0500281void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);
282void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu);
Marc Zyngier5863c2c2013-01-21 19:36:15 -0500283int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int irq_num,
284 bool level);
Marc Zyngier9d949dc2013-01-21 19:36:14 -0500285int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu);
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500286bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
287 struct kvm_exit_mmio *mmio);
288
Marc Zyngierf982cf42014-05-15 10:03:25 +0100289#define irqchip_in_kernel(k) (!!((k)->arch.vgic.in_kernel))
Christoffer Dall1f57be22014-12-09 14:30:36 +0100290#define vgic_initialized(k) (!!((k)->arch.vgic.nr_cpus))
Christoffer Dallc52edf52014-12-09 14:28:09 +0100291#define vgic_ready(k) ((k)->arch.vgic.ready)
Marc Zyngier9d949dc2013-01-21 19:36:14 -0500292
Marc Zyngier8f186d52014-02-04 18:13:03 +0000293int vgic_v2_probe(struct device_node *vgic_node,
294 const struct vgic_ops **ops,
295 const struct vgic_params **params);
Marc Zyngierb2fb1c02013-07-12 15:15:23 +0100296#ifdef CONFIG_ARM_GIC_V3
297int vgic_v3_probe(struct device_node *vgic_node,
298 const struct vgic_ops **ops,
299 const struct vgic_params **params);
300#else
301static inline int vgic_v3_probe(struct device_node *vgic_node,
302 const struct vgic_ops **ops,
303 const struct vgic_params **params)
304{
305 return -ENODEV;
306}
307#endif
Marc Zyngier8f186d52014-02-04 18:13:03 +0000308
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500309#else
310static inline int kvm_vgic_hyp_init(void)
311{
312 return 0;
313}
314
Christoffer Dall330690c2013-01-21 19:36:13 -0500315static inline int kvm_vgic_set_addr(struct kvm *kvm, unsigned long type, u64 addr)
316{
317 return 0;
318}
319
Marc Zyngier6cbde822014-03-06 03:30:46 +0000320static inline int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write)
321{
322 return -ENXIO;
323}
324
Peter Maydell6d3cfbe2014-12-04 15:02:24 +0000325static inline int kvm_vgic_map_resources(struct kvm *kvm)
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500326{
327 return 0;
328}
329
330static inline int kvm_vgic_create(struct kvm *kvm)
331{
332 return 0;
333}
334
Arnd Bergmannb5e7a952014-09-30 13:38:20 +0200335static inline void kvm_vgic_destroy(struct kvm *kvm)
336{
337}
338
339static inline void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
340{
341}
342
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500343static inline int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
344{
345 return 0;
346}
347
348static inline void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) {}
349static inline void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu) {}
350
Marc Zyngier5863c2c2013-01-21 19:36:15 -0500351static inline int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid,
352 unsigned int irq_num, bool level)
353{
354 return 0;
355}
356
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500357static inline int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)
358{
359 return 0;
360}
361
362static inline bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
363 struct kvm_exit_mmio *mmio)
364{
365 return false;
366}
367
368static inline int irqchip_in_kernel(struct kvm *kvm)
369{
370 return 0;
371}
Marc Zyngier01ac5e32013-01-21 19:36:16 -0500372
Christoffer Dall1f57be22014-12-09 14:30:36 +0100373static inline bool vgic_initialized(struct kvm *kvm)
374{
375 return true;
376}
377
Christoffer Dallc52edf52014-12-09 14:28:09 +0100378static inline bool vgic_ready(struct kvm *kvm)
Marc Zyngier01ac5e32013-01-21 19:36:16 -0500379{
380 return true;
381}
Marc Zyngier1a89dd92013-01-21 19:36:12 -0500382#endif
383
384#endif