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Andy Gross5d144e32014-04-24 11:31:21 -05001#
2# QCOM Soc drivers
3#
Channagoud Kadabi7e8d55a2016-08-23 14:04:44 -07004config QCOM_CPUSS_DUMP
5 bool "CPU Subsystem Dumping support"
6 help
7 Add support to dump various hardware entities such as the instruction
8 and data tlb's as well as the unified tlb, which are a part of the
9 cpu subsystem to an allocated buffer. This allows for analysis of the
10 the entities if corruption is suspected.
11 If unsure, say N
12
Kyle Yan36d78702016-08-23 16:07:11 -070013config QCOM_RUN_QUEUE_STATS
14 bool "Enable collection and exporting of QTI Run Queue stats to userspace"
15 help
16 This option enables the driver to periodically collecting the statistics
17 of kernel run queue information and calculate the load of the system.
18 This information is exported to usespace via sysfs entries and userspace
19 algorithms uses info and decide when to turn on/off the cpu cores.
20
Andy Gross5d144e32014-04-24 11:31:21 -050021config QCOM_GSBI
22 tristate "QCOM General Serial Bus Interface"
23 depends on ARCH_QCOM
Andy Grosse5fdad62015-02-09 16:01:06 -060024 select MFD_SYSCON
Andy Gross5d144e32014-04-24 11:31:21 -050025 help
26 Say y here to enable GSBI support. The GSBI provides control
27 functions for connecting the underlying serial UART, SPI, and I2C
28 devices to the output pins.
29
Channagoud Kadabi97335b22016-08-17 13:40:46 -070030config QCOM_LLCC
31 tristate "Qualcomm Technologies, Inc. LLCC driver"
32 depends on ARCH_QCOM
33 help
34 Qualcomm Technologies, Inc. platform specific LLCC driver for Last
35 Level Cache. This provides interfaces to client's that use the LLCC.
36 Say yes here to enable LLCC slice driver.
37
Kyle Yan6a20fae2017-02-14 13:34:41 -080038config QCOM_SDM845_LLCC
39 tristate "Qualcomm Technologies, Inc. SDM845 LLCC driver"
Channagoud Kadabib1fec942016-08-17 17:00:26 -070040 depends on QCOM_LLCC
41 help
Kyle Yan6a20fae2017-02-14 13:34:41 -080042 Say yes here to enable the LLCC driver for SDM845. This is provides
Channagoud Kadabib1fec942016-08-17 17:00:26 -070043 data required to configure LLCC so that clients can start using the
44 LLCC slices.
45
Lingutla Chandrasekhar9cecdb22017-05-30 10:36:38 +053046config QCOM_SDM670_LLCC
47 tristate "Qualcomm Technologies, Inc. SDM670 LLCC driver"
48 depends on QCOM_LLCC
49 help
50 This provides Last level cache controller driver for SDM670.
51 This driver provides data required to configure LLCC, so that clients
52 can start using the LLCC slices.
53 Say yes here to enable llcc driver for SDM670.
54
55
Imran Khan1b223902016-09-21 17:11:58 +053056config QCOM_LLCC_AMON
57 tristate "Qualcomm Technologies, Inc. LLCC Activity Monitor(AMON) driver"
58 depends on QCOM_LLCC
59 help
60 This option enables a activity monitor driver for last level cache
61 controller. This driver configures the activity monitor as
62 deadlock detector and dumps the AMON registers upon detection of
63 deadlock.
64
65config QCOM_LLCC_AMON_PANIC
66 tristate "Panic on detecting LLCC Activity Monitor(AMON) error"
67 depends on QCOM_LLCC_AMON
68 help
69 This option enables panic upon detection of LLCC Activity Monitor(AMON)
70 errors. Say yes here to enable deadlock detection mode of AMON. In
71 deadlock detection mode AMON will trigger an interrupt if some LLCC request
72 ages out.
73
Sankaran Nampoothiri666cfeb2017-06-27 17:41:29 +053074config QCOM_LLCC_PERFMON
75 tristate "Qualcomm Technologies, Inc. LLCC Perfmon driver"
76 depends on QCOM_LLCC
77 help
78 This option enables driver for LLCC Performance monitor block. Using
79 this various events in different LLCC sub block ports can be monitored.
80 This is used for performance and debug activity and exports SYSFS
81 interface. SYSFS interface used for configure and dump the LLCC
82 performance events.
83
Lina Iyer7ce75bb2015-04-09 13:20:41 -060084config QCOM_PM
85 bool "Qualcomm Power Management"
86 depends on ARCH_QCOM && !ARM64
Arnd Bergmannd9d68882015-11-24 23:13:09 +010087 select ARM_CPU_SUSPEND
Lina Iyer23b38ce2015-07-10 14:18:00 -060088 select QCOM_SCM
Lina Iyer7ce75bb2015-04-09 13:20:41 -060089 help
90 QCOM Platform specific power driver to manage cores and L2 low power
91 modes. It interface with various system drivers to put the cores in
92 low power modes.
Bjorn Andersson4b638df42015-06-26 14:50:10 -070093
Stephen Boyd7d0c8be2015-08-28 11:23:33 -070094config QCOM_SMEM
95 tristate "Qualcomm Shared Memory Manager (SMEM)"
96 depends on ARCH_QCOM
Arnd Bergmann73ebb852015-10-13 17:05:39 +020097 depends on HWSPINLOCK
Stephen Boyd7d0c8be2015-08-28 11:23:33 -070098 help
99 Say y here to enable support for the Qualcomm Shared Memory Manager.
100 The driver provides an interface to items in a heap shared among all
101 processors in a Qualcomm platform.
102
Channagoud Kadabi4d480b02016-12-20 11:57:51 -0800103config MSM_SERVICE_LOCATOR
104 bool "Service Locator"
105 depends on MSM_QMI_INTERFACE
106 help
107 The Service Locator provides a library to retrieve location
108 information given a service identifier. Location here translates
109 to what process domain exports the service, and which subsystem
110 that process domain will execute in.
111
112config MSM_SERVICE_NOTIFIER
113 bool "Service Notifier"
114 depends on MSM_SERVICE_LOCATOR && MSM_SUBSYSTEM_RESTART
115 help
116 The Service Notifier provides a library for a kernel client to
117 register for state change notifications regarding a remote service.
118 A remote service here refers to a process providing certain services
119 like audio, the identifier for which is provided by the service
120 locator.
121
Bjorn Anderssonf2ab3292015-07-27 20:20:30 -0700122config QCOM_SMD
123 tristate "Qualcomm Shared Memory Driver (SMD)"
124 depends on QCOM_SMEM
125 help
126 Say y here to enable support for the Qualcomm Shared Memory Driver
127 providing communication channels to remote processors in Qualcomm
128 platforms.
129
Bjorn Andersson936f14c2015-07-27 20:20:32 -0700130config QCOM_SMD_RPM
131 tristate "Qualcomm Resource Power Manager (RPM) over SMD"
132 depends on QCOM_SMD && OF
133 help
134 If you say yes to this option, support will be included for the
135 Resource Power Manager system found in the Qualcomm 8974 based
136 devices.
137
138 This is required to access many regulators, clocks and bus
139 frequencies controlled by the RPM on these devices.
140
141 Say M here if you want to include support for the Qualcomm RPM as a
142 module. This will build a module called "qcom-smd-rpm".
Bjorn Andersson9460ae22015-09-24 18:25:01 -0700143
Channagoud Kadabieee0ffd2016-08-11 14:18:17 -0700144config QCOM_SCM
145 bool "Secure Channel Manager (SCM) support"
146 default n
147
Bjorn Andersson9460ae22015-09-24 18:25:01 -0700148config QCOM_SMEM_STATE
149 bool
Bjorn Anderssonc97c4092015-09-24 18:25:02 -0700150
Bjorn Andersson50e99642015-09-24 18:25:03 -0700151config QCOM_SMP2P
Arnd Bergmann10475d52015-11-20 11:32:21 +0100152 tristate "Qualcomm Shared Memory Point to Point support"
Bjorn Andersson50e99642015-09-24 18:25:03 -0700153 depends on QCOM_SMEM
154 select QCOM_SMEM_STATE
155 help
156 Say yes here to support the Qualcomm Shared Memory Point to Point
157 protocol.
158
Bjorn Anderssonc97c4092015-09-24 18:25:02 -0700159config QCOM_SMSM
Arnd Bergmann10475d52015-11-20 11:32:21 +0100160 tristate "Qualcomm Shared Memory State Machine"
Bjorn Anderssonc97c4092015-09-24 18:25:02 -0700161 depends on QCOM_SMEM
162 select QCOM_SMEM_STATE
163 help
164 Say yes here to support the Qualcomm Shared Memory State Machine.
165 The state machine is represented by bits in shared memory.
Bjorn Anderssonea7a1f22015-09-21 10:52:55 -0700166
167config QCOM_WCNSS_CTRL
168 tristate "Qualcomm WCNSS control driver"
169 depends on QCOM_SMD
170 help
171 Client driver for the WCNSS_CTRL SMD channel, used to download nv
172 firmware to a newly booted WCNSS chip.
Kyle Yanbf6dedf2016-08-19 16:47:30 -0700173
Channagoud Kadabi0fb6cf62016-08-23 15:12:52 -0700174config MSM_BOOT_STATS
175 bool "Use MSM boot stats reporting"
176 help
177 Use this to report msm boot stats such as bootloader throughput,
178 display init, total boot time.
179 This figures are reported in mpm sleep clock cycles and have a
180 resolution of 31 bits as 1 bit is used as an overflow check.
181
Kyle Yana6029442016-08-19 17:07:58 -0700182config MSM_CORE_HANG_DETECT
183 tristate "MSM Core Hang Detection Support"
184 help
185 This enables the core hang detection module. It causes SoC
186 reset on core hang detection and collects the core context
187 for hang.
188
Kyle Yanbf6dedf2016-08-19 16:47:30 -0700189config MSM_GLADIATOR_HANG_DETECT
190 tristate "MSM Gladiator Hang Detection Support"
191 help
192 This enables the gladiator hang detection module.
193 If the configured threshold is reached, it causes SoC reset on
194 gladiator hang detection and collects the context for the
195 gladiator hang.
Kyle Yancc90ead2016-08-19 16:53:28 -0700196
Kyle Yan3a641f42016-11-21 14:00:04 -0800197config MSM_GLADIATOR_ERP
198 tristate "GLADIATOR coherency interconnect error reporting driver"
Kyle Yancc90ead2016-08-19 16:53:28 -0700199 help
200 Support dumping debug information for the GLADIATOR
201 cache interconnect in the error interrupt handler.
202 Meant to be used for debug scenarios only.
203
204 If unsure, say N.
205
Kyle Yan3a641f42016-11-21 14:00:04 -0800206config PANIC_ON_GLADIATOR_ERROR
207 depends on MSM_GLADIATOR_ERP
208 bool "Panic on GLADIATOR error report"
Kyle Yancc90ead2016-08-19 16:53:28 -0700209 help
210 Panic upon detection of an Gladiator coherency interconnect error
211 in order to support dumping debug information.
212 Meant to be used for debug scenarios only.
213
214 If unsure, say N.
Satyajit Desai5255cea2016-08-04 16:02:50 -0700215
Satya Durga Srinivasu Prabhala60909002016-09-12 11:36:09 -0700216config QCOM_EUD
217 tristate "QTI Embedded USB Debugger (EUD)"
218 depends on ARCH_QCOM
219 select SERIAL_CORE
220 help
221 The EUD (Embedded USB Debugger) is a mini-USB hub implemented
222 on chip to support the USB-based debug and trace capabilities.
223 This module enables support for Qualcomm Technologies, Inc.
224 Embedded USB Debugger (EUD).
225
226 If unsure, say N.
227
Satyajit Desai5255cea2016-08-04 16:02:50 -0700228config QCOM_WATCHDOG_V2
229 bool "Qualcomm Watchdog Support"
230 depends on ARCH_QCOM
231 help
232 This enables the watchdog module. It causes kernel panic if the
233 watchdog times out. It allows for detection of cpu hangs and
234 deadlocks. It does not run during the bootup process, so it will
235 not catch any early lockups.
Satyajit Desai11e470c2016-08-10 15:36:45 -0700236
Kiran Gunda04967c82017-02-14 14:22:18 +0530237config QPNP_PBS
238 tristate "PBS trigger support for QPNP PMIC"
239 depends on SPMI
240 help
241 This driver supports configuring software PBS trigger event through PBS
242 RAM on Qualcomm Technologies, Inc. QPNP PMICs. This module provides
243 the APIs to the client drivers that wants to send the PBS trigger
244 event to the PBS RAM.
245
Satyajit Desai11e470c2016-08-10 15:36:45 -0700246config QCOM_MEMORY_DUMP_V2
247 bool "QCOM Memory Dump V2 Support"
248 help
249 This enables memory dump feature. It allows various client
250 subsystems to register respective dump regions. At the time
251 of deadlocks or cpu hangs these dump regions are captured to
252 give a snapshot of the system at the time of the crash.
David Dai87584a42016-09-01 17:13:35 -0700253
Lingutla Chandrasekhar8bbf9a72017-09-25 15:56:24 +0530254config QCOM_MINIDUMP
255 bool "QCOM Minidump Support"
256 depends on MSM_SMEM && QCOM_DLOAD_MODE
257 help
258 This enables minidump feature. It allows various clients to
259 register to dump their state at system bad state (panic/WDT,etc.,).
260 Minidump would dump all registered entries, only when DLOAD mode
261 is enabled.
262
Lingutla Chandrasekhar5d4442b2017-10-03 15:21:30 +0530263config MINIDUMP_MAX_ENTRIES
264 int "Minidump Maximum num of entries"
265 default 200
266 depends on QCOM_MINIDUMP
267 help
268 This defines maximum number of entries to be allocated for application
269 subsytem in Minidump table.
270
David Dai87584a42016-09-01 17:13:35 -0700271config QCOM_BUS_SCALING
272 bool "Bus scaling driver"
273 help
274 This option enables bus scaling on MSM devices. Bus scaling
275 allows devices to request the clocks be set to rates sufficient
276 for the active devices needs without keeping the clocks at max
277 frequency when a slower speed is sufficient.
Chris Lewb4791c32016-08-01 11:58:55 -0700278
David Dai04ce4202016-09-26 16:24:13 -0700279config QCOM_BUS_CONFIG_RPMH
280 bool "RPMH Bus scaling driver"
281 depends on QCOM_BUS_SCALING
282 help
283 This option enables bus scaling using QCOM specific hardware
284 accelerators. It enables the translation of bandwidth requests
285 from logical nodes to hardware nodes controlled by the BCM (Bus
286 Clock Manager)
287
Patrick Dalya125d5d2016-09-30 16:16:10 -0700288config QCOM_SECURE_BUFFER
289 bool "Helper functions for securing buffers through TZ"
290 help
291 Say 'Y' here for targets that need to call into TZ to secure
292 memory buffers. This ensures that only the correct clients can
293 use this memory and no unauthorized access is made to the
294 buffer
295
Laura Abbott130e1d02013-08-09 18:17:06 -0700296config QCOM_EARLY_RANDOM
297 bool "Initialize random pool very early"
298 help
299 The standard random pool may not initialize until late in the boot
300 process which means that any calls to get random numbers before then
301 may not be truly random. Select this option to make an early call
302 to get some random data to put in the pool. If unsure, say N.
303
Chris Lewb4791c32016-08-01 11:58:55 -0700304config MSM_SMEM
305 depends on ARCH_QCOM
306 depends on REMOTE_SPINLOCK_MSM
307 bool "MSM Shared Memory (SMEM)"
308 help
309 Support for the shared memory interface between the various
310 processors in the System on a Chip (SoC) which allows basic
311 inter-processor communication.
Chris Lewfa6135e2016-08-01 13:29:46 -0700312
313config MSM_GLINK
314 bool "Generic Link (G-Link)"
315 help
316 G-Link is a generic link transport that replaces SMD. It is used
317 within a System-on-Chip (SoC) for communication between both internal
318 processors and external peripherals. The actual physical transport
319 is handled by transport plug-ins that can be individually enabled and
320 configured separately.
321
322config MSM_GLINK_LOOPBACK_SERVER
323 bool "Generic Link (G-Link) Loopback Server"
324 help
325 G-Link Loopback Server that enable loopback test framework to test
326 and validate the G-Link protocol stack. It support both local and
327 remote clients to configure the loopback server and echo back the
328 data received from the clients.
329
330config MSM_GLINK_SMEM_NATIVE_XPRT
331 depends on MSM_SMEM
332 depends on MSM_GLINK
333 bool "Generic Link (G-Link) SMEM Native Transport"
334 help
335 G-Link SMEM Native Transport is a G-Link Transport plug-in. It allows
336 G-Link communication to remote entities through a shared memory
337 physical transport. The nature of shared memory limits this G-Link
338 transport to only connecting with entities internal to the
339 System-on-Chip.
340
341config MSM_GLINK_SPI_XPRT
342 depends on MSM_GLINK
343 tristate "Generic Link (G-Link) SPI Transport"
344 help
345 G-Link SPI Transport is a Transport plug-in developed over SPI
346 bus. This transport plug-in performs marshaling of G-Link
347 commands & data to the appropriate SPI bus wire format and
348 allows for G-Link communication with remote subsystems that are
349 external to the System-on-Chip.
350
Kineret Berger5bb47422017-02-09 11:51:32 +0200351config MSM_SPCOM
352 depends on MSM_GLINK
353 bool "Secure Processor Communication over GLINK"
354 help
355 spcom driver allows loading Secure Processor Applications and
356 sending messages to Secure Processor Applications.
357 spcom provides interface to both user space app and kernel driver.
358 It is using glink as the transport layer, which provides multiple
359 logical channels over single physical channel.
360 The physical layer is based on shared memory and interrupts.
361 spcom provides clients/server API, although currently only one client
362 or server is allowed per logical channel.
363
Reut Zysman92bfac82017-04-05 18:18:50 +0300364config MSM_SPSS_UTILS
365 depends on MSM_PIL
366 bool "Secure Processor Utilities"
367 help
368 spss-utils driver selects Secure Processor firmware file name.
369 The firmware file name for dev, test or production is selected
370 based on two fuses.
371 Different file name is used for differnt SPSS HW versions,
372 because the SPSS firmware size is too small to support multiple
373 HW versions.
374
Chris Lewfa6135e2016-08-01 13:29:46 -0700375config TRACER_PKT
376 bool "Tracer Packet"
377 help
378 Tracer Packet helps in profiling the performance of inter-
379 processor communication protocols. The profiling information
380 can be logged into the tracer packet itself.
Lina Iyerd7194ff2016-04-20 17:13:34 -0600381
382config QTI_RPMH_API
383 bool "QTI RPMH (h/w accelerators) Communication API"
384 select MAILBOX
385 select QTI_RPMH_MBOX
Lina Iyer15d6df32016-08-18 12:10:27 -0600386 select QTI_SYSTEM_PM
Lina Iyerd7194ff2016-04-20 17:13:34 -0600387 help
388 This option enables RPMH hardware communication for making shared
389 resource requests on Qualcomm Technologies Inc SoCs.
Lina Iyer15d6df32016-08-18 12:10:27 -0600390
391config QTI_SYSTEM_PM
392 bool
Karthikeyan Ramasubramanian97a10282016-09-16 12:01:18 -0600393
394config MSM_SMP2P
395 bool "SMSM Point-to-Point (SMP2P)"
396 depends on MSM_SMEM
397 help
398 Provide point-to-point remote signaling support.
399 SMP2P enables transferring 32-bit values between
400 the local and a remote system using shared
401 memory and interrupts. A client can open multiple
402 32-bit values by specifying a unique string and
403 remote processor ID.
404
Karthikeyan Ramasubramanian9f9c4a72016-10-18 14:06:18 -0600405config MSM_IPC_ROUTER_SMD_XPRT
406 depends on MSM_SMD
407 depends on IPC_ROUTER
408 bool "MSM SMD XPRT Layer"
409 help
410 SMD Transport Layer that enables IPC Router communication within
411 a System-on-Chip(SoC). When the SMD channels become available,
412 this layer registers a transport with IPC Router and enable
413 message exchange.
Karthikeyan Ramasubramanianf0d46a82016-09-16 16:43:51 -0600414
415config MSM_IPC_ROUTER_HSIC_XPRT
416 depends on USB_QCOM_IPC_BRIDGE
417 depends on IPC_ROUTER
418 bool "MSM HSIC XPRT Layer"
419 help
420 HSIC Transport Layer that enables off-chip communication of
421 IPC Router. When the HSIC endpoint becomes available, this layer
422 registers the transport with IPC Router and enable message
423 exchange.
Karthikeyan Ramasubramanianbf94cab2016-09-16 16:50:04 -0600424
425config MSM_IPC_ROUTER_MHI_XPRT
426 depends on MSM_MHI
427 depends on IPC_ROUTER
428 bool "MSM MHI XPRT Layer"
429 help
430 MHI Transport Layer that enables off-chip communication of
431 IPC Router. When the MHI endpoint becomes available, this layer
432 registers the transport with IPC Router and enable message
433 exchange.
Karthikeyan Ramasubramanian4f4074f2016-09-16 16:53:30 -0600434
435config MSM_IPC_ROUTER_GLINK_XPRT
436 depends on MSM_GLINK
437 depends on IPC_ROUTER
438 bool "MSM GLINK XPRT Layer"
439 help
440 GLINK Transport Layer that enables IPC Router communication within
441 a System-on-Chip(SoC). When the GLINK channels become available,
442 this layer registers a transport with IPC Router and enable
443 message exchange.
Karthikeyan Ramasubramanianfafd67f12016-09-16 17:15:13 -0600444
445config MSM_QMI_INTERFACE
446 depends on IPC_ROUTER
447 depends on QMI_ENCDEC
448 bool "MSM QMI Interface Library"
449 help
450 Library to send and receive QMI messages over IPC Router.
451 This library provides interface functions to the kernel drivers
452 to perform QMI message marshaling and transport them over IPC
453 Router.
Karthikeyan Ramasubramanian5d797a82016-09-16 17:56:18 -0600454
455config MSM_GLINK_PKT
456 bool "Enable device interface for GLINK packet channels"
457 depends on MSM_GLINK
458 help
459 G-link packet driver provides the interface for the userspace
460 clients to communicate over G-Link via device nodes.
461 This enable the userspace clients to read and write to
462 some glink packets channel.
Karthikeyan Ramasubramanian04e3f902016-09-19 09:24:36 -0600463
464config MSM_SYSTEM_HEALTH_MONITOR
465 bool "System Health Monitor"
466 depends on MSM_QMI_INTERFACE && MSM_SUBSYSTEM_RESTART
467 help
468 System Health Monitor (SHM) passively monitors the health of the
469 peripherals connected to the application processor. Software
470 components in the application processor that experience
471 communication failure can request the SHM to perform a system-wide
472 health check. If any failures are detected during the health-check,
473 then a subsystem restart will be triggered for the failed subsystem.
Kyle Yane45fa022016-08-29 11:40:26 -0700474
475config MSM_SUBSYSTEM_RESTART
476 bool "MSM Subsystem Restart"
477 help
478 This option enables the MSM subsystem restart framework.
479
480 The MSM subsystem restart framework provides support to boot,
481 shutdown, and restart subsystems with a reference counted API.
482 It also notifies userspace of transitions between these states via
483 sysfs.
484
485config MSM_PIL
486 bool "Peripheral image loading"
487 select FW_LOADER
488 default n
489 help
490 Some peripherals need to be loaded into memory before they can be
491 brought out of reset.
492
493 Say yes to support these devices.
494
495config MSM_SYSMON_GLINK_COMM
496 bool "MSM System Monitor communication support using GLINK transport"
497 depends on MSM_GLINK && MSM_SUBSYSTEM_RESTART
498 help
499 This option adds support for MSM System Monitor APIs using the GLINK
500 transport layer. The APIs provided may be used for notifying
501 subsystems within the SoC about other subsystems' power-up/down
502 state-changes.
503
504config MSM_PIL_SSR_GENERIC
505 tristate "MSM Subsystem Boot Support"
506 depends on MSM_PIL && MSM_SUBSYSTEM_RESTART
507 help
508 Support for booting and shutting down MSM Subsystem processors.
509 This driver also monitors the SMSM status bits and the watchdog
510 interrupt for the subsystem and restarts it on a watchdog bite
511 or a fatal error. Subsystems include LPASS, Venus, VPU, WCNSS and
512 BCSS.
513
514config MSM_PIL_MSS_QDSP6V5
515 tristate "MSS QDSP6v5 (Hexagon) Boot Support"
516 depends on MSM_PIL && MSM_SUBSYSTEM_RESTART
517 help
518 Support for booting and shutting down QDSP6v5 (Hexagon) processors
519 in modem subsystems. If you would like to make or receive phone
520 calls then say Y here.
521
522 If unsure, say N.
Yuanyuan Liu607051c2016-11-28 17:04:13 -0800523
524config ICNSS
525 tristate "Platform driver for Q6 integrated connectivity"
Yuanyuan Liu13e7cdf2017-06-13 11:48:00 -0700526 select CNSS_UTILS
Yuanyuan Liu607051c2016-11-28 17:04:13 -0800527 ---help---
528 This module adds support for Q6 integrated WLAN connectivity
529 subsystem. This module is responsible for communicating WLAN on/off
530 control messages to FW over QMI channel. It is also responsible for
531 handling WLAN PD restart notifications.
532
533config ICNSS_DEBUG
534 bool "ICNSS debug support"
535 depends on ICNSS
536 ---help---
537 Say 'Y' here to enable ICNSS driver debug support. Debug support
538 primarily consists of logs consisting of information related to
539 hardware register access and enabling BUG_ON for certain cases to aid
Mahesh Sivasubramaniancb649522016-08-19 14:04:44 -0600540 the debugging.
541
542config QCOM_COMMAND_DB
543 bool "Command DB"
544 help
545 Command DB queries shared memory by key string for shared system
546 resources
Banajit Goswamiaec1b462016-11-21 21:54:23 -0800547
Vijay Ganti10772c02017-05-05 11:47:40 -0700548config MSM_PERFORMANCE
549 tristate "msm performacne driver to support userspace hotplug requests"
550 default n
551 help
552 This driver is used to provide CPU hotplug support to userspace.
553 It ensures that no more than a user specified number of CPUs stay
554 online at any given point in time. This module can also restrict
555 max freq or min freq of cpu cluster
556
Sathish Ambley5a8b3102017-01-23 09:56:24 -0800557config MSM_CDSP_LOADER
558 tristate "CDSP loader support"
559 depends on MSM_GLINK
560 help
561 Enable CDSP image loader.
562 The CDSP loader brings CDSP out of reset
563 for platforms that have compute DSP.
564 Say M if you want to enable this module.
565
AnilKumar Chimata4cf128e2017-07-13 01:22:31 +0530566config QCOM_SMCINVOKE
567 bool "Secure QSEE Support"
568 help
569 Enable SMCInvoke driver which supports capability based secure
570 communication between QTI Secure Execution Environment (QSEE)
571 and high level operating system. It exposes APIs for both
572 userspace and kernel clients.
573
Mahesh Sivasubramanianc2ea76f2016-02-01 10:40:26 -0700574config MSM_EVENT_TIMER
575 bool "Event timer"
576 help
577 This option enables a modules that manages a list of event timers
578 that need to be monitored by the PM. The enables the PM code to
579 monitor events that require the core to be awake and ready to
580 handle the event.
581
582config MSM_PM
583 depends on PM
584 select MSM_IDLE_STATS if DEBUG_FS
585 select CPU_IDLE_MULTIPLE_DRIVERS
586 bool "Qualcomm platform specific PM driver"
587 help
588 Platform specific power driver to manage cores and l2 low power
589 modes. It interface with various system driver and put the cores
590 into low power modes. It implements OS initiated scheme and
591 determines last CPU to call into PSCI for cluster Low power
592 modes.
593
594config MSM_NOPM
595 default y if !PM
596 bool
597 help
598 This enables bare minimum support of power management at platform level.
599 i.e WFI
600
Abir Ghosh989d5e92016-10-09 11:47:28 +0300601config MSM_QBT1000
602 bool "QBT1000 Ultrasonic Fingerprint Sensor"
603 help
604 This driver provides services for configuring the fingerprint
605 sensor hardware and for communicating with the trusted app which
606 uses it. It enables clocks and provides commands for loading
607 trusted apps, unloading them and marshalling buffers to the
608 trusted fingerprint app.
609
Mahesh Sivasubramanianc2ea76f2016-02-01 10:40:26 -0700610if MSM_PM
611menuconfig MSM_IDLE_STATS
612 bool "Collect idle statistics"
613 help
614 Collect cores various low power mode idle statistics
615 and export them in proc/msm_pm_stats. User can read
616 this data and determine what low power modes and how
617 many times cores have entered into LPM modes.
618
619if MSM_IDLE_STATS
620
621config MSM_IDLE_STATS_FIRST_BUCKET
622 int "First bucket time"
623 default 62500
624 help
625 Upper time limit in nanoseconds of first bucket.
626
627config MSM_IDLE_STATS_BUCKET_SHIFT
628 int "Bucket shift"
629 default 2
630
631config MSM_IDLE_STATS_BUCKET_COUNT
632 int "Bucket count"
633 default 10
634
635config MSM_SUSPEND_STATS_FIRST_BUCKET
636 int "First bucket time for suspend"
637 default 1000000000
638 help
639 Upper time limit in nanoseconds of first bucket of the
640 histogram. This is for collecting statistics on suspend.
641
642endif # MSM_IDLE_STATS
643endif # MSM_PM
Satyajit Desai765e7ef2016-11-09 14:27:45 -0800644
645config QCOM_DCC_V2
646 bool "Qualcomm Technologies Data Capture and Compare enigne support for V2"
647 help
648 This option enables driver for Data Capture and Compare engine. DCC
649 driver provides interface to configure DCC block and read back
650 captured data from DCC's internal SRAM.
Mahesh Sivasubramanian6d0cfea2016-04-12 14:46:05 -0600651
652config QTI_RPM_STATS_LOG
653 bool "Qualcomm Technologies RPM Stats Driver"
Mahesh Sivasubramanian7c9528f2017-05-30 11:02:59 -0600654 depends on SYSFS
Mahesh Sivasubramanian6d0cfea2016-04-12 14:46:05 -0600655 default n
656 help
657 This option enables a driver which reads RPM messages from a shared
658 memory location. These messages provide statistical information about
659 the low power modes that RPM enters. The drivers outputs the message
660 via a debugfs node.
Satyajit Desaia6dfbd62017-05-02 10:49:52 -0700661
662config QCOM_FORCE_WDOG_BITE_ON_PANIC
663 bool "QCOM force watchdog bite"
664 depends on QCOM_WATCHDOG_V2
665 help
666 This forces a watchdog bite when the device restarts due to a
667 kernel panic. On certain MSM SoCs, this provides us
668 additional debugging information.
Manoj Prabhu Bc0c03572017-04-24 18:16:50 +0530669
Mahesh Sivasubramaniana8b87902017-06-15 14:56:23 -0600670config QMP_DEBUGFS_CLIENT
671 bool "Debugfs Client to communicate with AOP using QMP protocol"
672 depends on DEBUG_FS
673 default n
674 help
675 This options enables a driver which allows clients to send messages
676 to Alway On processor using QMP transport.
677
Manoj Prabhu Bc0c03572017-04-24 18:16:50 +0530678source "drivers/soc/qcom/memshare/Kconfig"
Chris Lewd2f6d512017-05-17 11:40:13 -0700679
Satyajit Desaid57f0e22017-08-15 12:53:00 -0700680config MSM_REMOTEQDSS
681 bool "Allow debug tools to enable events on other processors"
682 depends on QCOM_SCM && DEBUG_FS
683 help
684 Other onchip processors/execution environments may support debug
685 events. Provide a sysfs interface for debug tools to dynamically
686 enable/disable these events. Interface located in
687 /sys/class/remoteqdss.
688
Chris Lewd2f6d512017-05-17 11:40:13 -0700689config QSEE_IPC_IRQ_BRIDGE
690 tristate "QSEE IPC Interrupt Bridge"
691 help
692 This module enables bridging an Inter-Processor Communication(IPC)
693 interrupt from a remote subsystem directed towards Qualcomm
694 Technologies, Inc. Secure Execution Environment(QSEE).
Satyajit Desai66b6c452017-06-27 17:10:46 -0700695
696config MSM_JTAGV8
697 bool "Debug and ETM trace support across power collapse for ARMv8"
698 default y if CORESIGHT_SOURCE_ETM4X
699 help
700 Enables support for debugging (specifically breakpoints) and ETM
701 processor tracing across power collapse both for JTag and OS hosted
702 software running on ARMv8 target. Enabling this will ensure debug
703 and ETM registers are saved and restored across power collapse.
704 If unsure, say 'N' here to avoid potential power, performance and
705 memory penalty.
Satyajit Desaifa04d092017-10-30 15:19:15 -0700706
707config QCOM_QDSS_BRIDGE
708 bool "Configure bridge driver for QTI/Qualcomm Technologies, Inc. MDM"
709 depends on MSM_MHI
710 help
711 The driver will help route diag traffic from modem side over the QDSS
712 sub-system to USB on APSS side. The driver acts as a bridge between the
Linux Build Service Accountde467c02017-11-28 06:04:05 -0800713 MHI and USB interface. If unsure, say N.