Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the Free |
| 6 | * Software Foundation; either version 2 of the License, or (at your option) |
| 7 | * any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 14 | * The full GNU General Public License is included in this distribution in the |
| 15 | * file called COPYING. |
| 16 | */ |
| 17 | |
| 18 | /* |
| 19 | * This code implements the DMA subsystem. It provides a HW-neutral interface |
| 20 | * for other kernel code to use asynchronous memory copy capabilities, |
| 21 | * if present, and allows different HW DMA drivers to register as providing |
| 22 | * this capability. |
| 23 | * |
| 24 | * Due to the fact we are accelerating what is already a relatively fast |
| 25 | * operation, the code goes to great lengths to avoid additional overhead, |
| 26 | * such as locking. |
| 27 | * |
| 28 | * LOCKING: |
| 29 | * |
Dan Williams | aa1e6f1 | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 30 | * The subsystem keeps a global list of dma_device structs it is protected by a |
| 31 | * mutex, dma_list_mutex. |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 32 | * |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 33 | * A subsystem can get access to a channel by calling dmaengine_get() followed |
| 34 | * by dma_find_channel(), or if it has need for an exclusive channel it can call |
| 35 | * dma_request_channel(). Once a channel is allocated a reference is taken |
| 36 | * against its corresponding driver to disable removal. |
| 37 | * |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 38 | * Each device has a channels list, which runs unlocked but is never modified |
| 39 | * once the device is registered, it's just setup by the driver. |
| 40 | * |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 41 | * See Documentation/dmaengine.txt for more details |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 42 | */ |
| 43 | |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 44 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 45 | |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 46 | #include <linux/platform_device.h> |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 47 | #include <linux/dma-mapping.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 48 | #include <linux/init.h> |
| 49 | #include <linux/module.h> |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 50 | #include <linux/mm.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 51 | #include <linux/device.h> |
| 52 | #include <linux/dmaengine.h> |
| 53 | #include <linux/hardirq.h> |
| 54 | #include <linux/spinlock.h> |
| 55 | #include <linux/percpu.h> |
| 56 | #include <linux/rcupdate.h> |
| 57 | #include <linux/mutex.h> |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 58 | #include <linux/jiffies.h> |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 59 | #include <linux/rculist.h> |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 60 | #include <linux/idr.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 61 | #include <linux/slab.h> |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 62 | #include <linux/acpi.h> |
| 63 | #include <linux/acpi_dma.h> |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 64 | #include <linux/of_dma.h> |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 65 | #include <linux/mempool.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 66 | |
| 67 | static DEFINE_MUTEX(dma_list_mutex); |
Axel Lin | 21ef4b8 | 2011-07-20 11:32:28 +0800 | [diff] [blame] | 68 | static DEFINE_IDR(dma_idr); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 69 | static LIST_HEAD(dma_device_list); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 70 | static long dmaengine_ref_count; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 71 | |
| 72 | /* --- sysfs implementation --- */ |
| 73 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 74 | /** |
| 75 | * dev_to_dma_chan - convert a device pointer to the its sysfs container object |
| 76 | * @dev - device node |
| 77 | * |
| 78 | * Must be called under dma_list_mutex |
| 79 | */ |
| 80 | static struct dma_chan *dev_to_dma_chan(struct device *dev) |
| 81 | { |
| 82 | struct dma_chan_dev *chan_dev; |
| 83 | |
| 84 | chan_dev = container_of(dev, typeof(*chan_dev), device); |
| 85 | return chan_dev->chan; |
| 86 | } |
| 87 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 88 | static ssize_t memcpy_count_show(struct device *dev, |
| 89 | struct device_attribute *attr, char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 90 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 91 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 92 | unsigned long count = 0; |
| 93 | int i; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 94 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 95 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 96 | mutex_lock(&dma_list_mutex); |
| 97 | chan = dev_to_dma_chan(dev); |
| 98 | if (chan) { |
| 99 | for_each_possible_cpu(i) |
| 100 | count += per_cpu_ptr(chan->local, i)->memcpy_count; |
| 101 | err = sprintf(buf, "%lu\n", count); |
| 102 | } else |
| 103 | err = -ENODEV; |
| 104 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 105 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 106 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 107 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 108 | static DEVICE_ATTR_RO(memcpy_count); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 109 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 110 | static ssize_t bytes_transferred_show(struct device *dev, |
| 111 | struct device_attribute *attr, char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 112 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 113 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 114 | unsigned long count = 0; |
| 115 | int i; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 116 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 117 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 118 | mutex_lock(&dma_list_mutex); |
| 119 | chan = dev_to_dma_chan(dev); |
| 120 | if (chan) { |
| 121 | for_each_possible_cpu(i) |
| 122 | count += per_cpu_ptr(chan->local, i)->bytes_transferred; |
| 123 | err = sprintf(buf, "%lu\n", count); |
| 124 | } else |
| 125 | err = -ENODEV; |
| 126 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 127 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 128 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 129 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 130 | static DEVICE_ATTR_RO(bytes_transferred); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 131 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 132 | static ssize_t in_use_show(struct device *dev, struct device_attribute *attr, |
| 133 | char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 134 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 135 | struct dma_chan *chan; |
| 136 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 137 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 138 | mutex_lock(&dma_list_mutex); |
| 139 | chan = dev_to_dma_chan(dev); |
| 140 | if (chan) |
| 141 | err = sprintf(buf, "%d\n", chan->client_count); |
| 142 | else |
| 143 | err = -ENODEV; |
| 144 | mutex_unlock(&dma_list_mutex); |
| 145 | |
| 146 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 147 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 148 | static DEVICE_ATTR_RO(in_use); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 149 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 150 | static struct attribute *dma_dev_attrs[] = { |
| 151 | &dev_attr_memcpy_count.attr, |
| 152 | &dev_attr_bytes_transferred.attr, |
| 153 | &dev_attr_in_use.attr, |
| 154 | NULL, |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 155 | }; |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 156 | ATTRIBUTE_GROUPS(dma_dev); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 157 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 158 | static void chan_dev_release(struct device *dev) |
| 159 | { |
| 160 | struct dma_chan_dev *chan_dev; |
| 161 | |
| 162 | chan_dev = container_of(dev, typeof(*chan_dev), device); |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 163 | if (atomic_dec_and_test(chan_dev->idr_ref)) { |
| 164 | mutex_lock(&dma_list_mutex); |
| 165 | idr_remove(&dma_idr, chan_dev->dev_id); |
| 166 | mutex_unlock(&dma_list_mutex); |
| 167 | kfree(chan_dev->idr_ref); |
| 168 | } |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 169 | kfree(chan_dev); |
| 170 | } |
| 171 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 172 | static struct class dma_devclass = { |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 173 | .name = "dma", |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 174 | .dev_groups = dma_dev_groups, |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 175 | .dev_release = chan_dev_release, |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 176 | }; |
| 177 | |
| 178 | /* --- client and device registration --- */ |
| 179 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 180 | #define dma_device_satisfies_mask(device, mask) \ |
| 181 | __dma_device_satisfies_mask((device), &(mask)) |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 182 | static int |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 183 | __dma_device_satisfies_mask(struct dma_device *device, |
| 184 | const dma_cap_mask_t *want) |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 185 | { |
| 186 | dma_cap_mask_t has; |
| 187 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 188 | bitmap_and(has.bits, want->bits, device->cap_mask.bits, |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 189 | DMA_TX_TYPE_END); |
| 190 | return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END); |
| 191 | } |
| 192 | |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 193 | static struct module *dma_chan_to_owner(struct dma_chan *chan) |
| 194 | { |
| 195 | return chan->device->dev->driver->owner; |
| 196 | } |
| 197 | |
| 198 | /** |
| 199 | * balance_ref_count - catch up the channel reference count |
| 200 | * @chan - channel to balance ->client_count versus dmaengine_ref_count |
| 201 | * |
| 202 | * balance_ref_count must be called under dma_list_mutex |
| 203 | */ |
| 204 | static void balance_ref_count(struct dma_chan *chan) |
| 205 | { |
| 206 | struct module *owner = dma_chan_to_owner(chan); |
| 207 | |
| 208 | while (chan->client_count < dmaengine_ref_count) { |
| 209 | __module_get(owner); |
| 210 | chan->client_count++; |
| 211 | } |
| 212 | } |
| 213 | |
| 214 | /** |
| 215 | * dma_chan_get - try to grab a dma channel's parent driver module |
| 216 | * @chan - channel to grab |
| 217 | * |
| 218 | * Must be called under dma_list_mutex |
| 219 | */ |
| 220 | static int dma_chan_get(struct dma_chan *chan) |
| 221 | { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 222 | struct module *owner = dma_chan_to_owner(chan); |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 223 | int ret; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 224 | |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 225 | /* The channel is already in use, update client count */ |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 226 | if (chan->client_count) { |
| 227 | __module_get(owner); |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 228 | goto out; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 229 | } |
| 230 | |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 231 | if (!try_module_get(owner)) |
| 232 | return -ENODEV; |
| 233 | |
| 234 | /* allocate upon first client reference */ |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 235 | if (chan->device->device_alloc_chan_resources) { |
| 236 | ret = chan->device->device_alloc_chan_resources(chan); |
| 237 | if (ret < 0) |
| 238 | goto err_out; |
| 239 | } |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 240 | |
| 241 | if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask)) |
| 242 | balance_ref_count(chan); |
| 243 | |
| 244 | out: |
| 245 | chan->client_count++; |
| 246 | return 0; |
| 247 | |
| 248 | err_out: |
| 249 | module_put(owner); |
| 250 | return ret; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 251 | } |
| 252 | |
| 253 | /** |
| 254 | * dma_chan_put - drop a reference to a dma channel's parent driver module |
| 255 | * @chan - channel to release |
| 256 | * |
| 257 | * Must be called under dma_list_mutex |
| 258 | */ |
| 259 | static void dma_chan_put(struct dma_chan *chan) |
| 260 | { |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 261 | /* This channel is not in use, bail out */ |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 262 | if (!chan->client_count) |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 263 | return; |
| 264 | |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 265 | chan->client_count--; |
| 266 | module_put(dma_chan_to_owner(chan)); |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 267 | |
| 268 | /* This channel is not in use anymore, free it */ |
Lars-Peter Clausen | b36f09c | 2015-10-20 11:46:28 +0200 | [diff] [blame] | 269 | if (!chan->client_count && chan->device->device_free_chan_resources) { |
| 270 | /* Make sure all operations have completed */ |
| 271 | dmaengine_synchronize(chan); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 272 | chan->device->device_free_chan_resources(chan); |
Lars-Peter Clausen | b36f09c | 2015-10-20 11:46:28 +0200 | [diff] [blame] | 273 | } |
Peter Ujfalusi | 56f13c0 | 2015-04-09 12:35:47 +0300 | [diff] [blame] | 274 | |
| 275 | /* If the channel is used via a DMA request router, free the mapping */ |
| 276 | if (chan->router && chan->router->route_free) { |
| 277 | chan->router->route_free(chan->router->dev, chan->route_data); |
| 278 | chan->router = NULL; |
| 279 | chan->route_data = NULL; |
| 280 | } |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 281 | } |
| 282 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 283 | enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) |
| 284 | { |
| 285 | enum dma_status status; |
| 286 | unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); |
| 287 | |
| 288 | dma_async_issue_pending(chan); |
| 289 | do { |
| 290 | status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); |
| 291 | if (time_after_eq(jiffies, dma_sync_wait_timeout)) { |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 292 | pr_err("%s: timeout!\n", __func__); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 293 | return DMA_ERROR; |
| 294 | } |
Bartlomiej Zolnierkiewicz | 2cbe7fe | 2012-11-08 10:02:07 +0000 | [diff] [blame] | 295 | if (status != DMA_IN_PROGRESS) |
| 296 | break; |
| 297 | cpu_relax(); |
| 298 | } while (1); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 299 | |
| 300 | return status; |
| 301 | } |
| 302 | EXPORT_SYMBOL(dma_sync_wait); |
| 303 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 304 | /** |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 305 | * dma_cap_mask_all - enable iteration over all operation types |
| 306 | */ |
| 307 | static dma_cap_mask_t dma_cap_mask_all; |
| 308 | |
| 309 | /** |
| 310 | * dma_chan_tbl_ent - tracks channel allocations per core/operation |
| 311 | * @chan - associated channel for this entry |
| 312 | */ |
| 313 | struct dma_chan_tbl_ent { |
| 314 | struct dma_chan *chan; |
| 315 | }; |
| 316 | |
| 317 | /** |
| 318 | * channel_table - percpu lookup table for memory-to-memory offload providers |
| 319 | */ |
Tejun Heo | a29d8b8 | 2010-02-02 14:39:15 +0900 | [diff] [blame] | 320 | static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END]; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 321 | |
| 322 | static int __init dma_channel_table_init(void) |
| 323 | { |
| 324 | enum dma_transaction_type cap; |
| 325 | int err = 0; |
| 326 | |
| 327 | bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END); |
| 328 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 329 | /* 'interrupt', 'private', and 'slave' are channel capabilities, |
| 330 | * but are not associated with an operation so they do not need |
| 331 | * an entry in the channel_table |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 332 | */ |
| 333 | clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 334 | clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 335 | clear_bit(DMA_SLAVE, dma_cap_mask_all.bits); |
| 336 | |
| 337 | for_each_dma_cap_mask(cap, dma_cap_mask_all) { |
| 338 | channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent); |
| 339 | if (!channel_table[cap]) { |
| 340 | err = -ENOMEM; |
| 341 | break; |
| 342 | } |
| 343 | } |
| 344 | |
| 345 | if (err) { |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 346 | pr_err("initialization failure\n"); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 347 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
Markus Elfring | a9507ca | 2014-12-01 06:06:57 +0100 | [diff] [blame] | 348 | free_percpu(channel_table[cap]); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 349 | } |
| 350 | |
| 351 | return err; |
| 352 | } |
Dan Williams | 652afc2 | 2009-01-06 11:38:22 -0700 | [diff] [blame] | 353 | arch_initcall(dma_channel_table_init); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 354 | |
| 355 | /** |
| 356 | * dma_find_channel - find a channel to carry out the operation |
| 357 | * @tx_type: transaction type |
| 358 | */ |
| 359 | struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) |
| 360 | { |
Christoph Lameter | e7dcaa4 | 2009-10-03 19:48:23 +0900 | [diff] [blame] | 361 | return this_cpu_read(channel_table[tx_type]->chan); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 362 | } |
| 363 | EXPORT_SYMBOL(dma_find_channel); |
| 364 | |
| 365 | /** |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 366 | * dma_issue_pending_all - flush all pending operations across all channels |
| 367 | */ |
| 368 | void dma_issue_pending_all(void) |
| 369 | { |
| 370 | struct dma_device *device; |
| 371 | struct dma_chan *chan; |
| 372 | |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 373 | rcu_read_lock(); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 374 | list_for_each_entry_rcu(device, &dma_device_list, global_node) { |
| 375 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 376 | continue; |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 377 | list_for_each_entry(chan, &device->channels, device_node) |
| 378 | if (chan->client_count) |
| 379 | device->device_issue_pending(chan); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 380 | } |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 381 | rcu_read_unlock(); |
| 382 | } |
| 383 | EXPORT_SYMBOL(dma_issue_pending_all); |
| 384 | |
| 385 | /** |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 386 | * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 387 | */ |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 388 | static bool dma_chan_is_local(struct dma_chan *chan, int cpu) |
| 389 | { |
| 390 | int node = dev_to_node(chan->device->dev); |
| 391 | return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node)); |
| 392 | } |
| 393 | |
| 394 | /** |
| 395 | * min_chan - returns the channel with min count and in the same numa-node as the cpu |
| 396 | * @cap: capability to match |
| 397 | * @cpu: cpu index which the channel should be close to |
| 398 | * |
| 399 | * If some channels are close to the given cpu, the one with the lowest |
| 400 | * reference count is returned. Otherwise, cpu is ignored and only the |
| 401 | * reference count is taken into account. |
| 402 | * Must be called under dma_list_mutex. |
| 403 | */ |
| 404 | static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 405 | { |
| 406 | struct dma_device *device; |
| 407 | struct dma_chan *chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 408 | struct dma_chan *min = NULL; |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 409 | struct dma_chan *localmin = NULL; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 410 | |
| 411 | list_for_each_entry(device, &dma_device_list, global_node) { |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 412 | if (!dma_has_cap(cap, device->cap_mask) || |
| 413 | dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 414 | continue; |
| 415 | list_for_each_entry(chan, &device->channels, device_node) { |
| 416 | if (!chan->client_count) |
| 417 | continue; |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 418 | if (!min || chan->table_count < min->table_count) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 419 | min = chan; |
| 420 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 421 | if (dma_chan_is_local(chan, cpu)) |
| 422 | if (!localmin || |
| 423 | chan->table_count < localmin->table_count) |
| 424 | localmin = chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 425 | } |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 426 | } |
| 427 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 428 | chan = localmin ? localmin : min; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 429 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 430 | if (chan) |
| 431 | chan->table_count++; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 432 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 433 | return chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 434 | } |
| 435 | |
| 436 | /** |
| 437 | * dma_channel_rebalance - redistribute the available channels |
| 438 | * |
| 439 | * Optimize for cpu isolation (each cpu gets a dedicated channel for an |
| 440 | * operation type) in the SMP case, and operation isolation (avoid |
| 441 | * multi-tasking channels) in the non-SMP case. Must be called under |
| 442 | * dma_list_mutex. |
| 443 | */ |
| 444 | static void dma_channel_rebalance(void) |
| 445 | { |
| 446 | struct dma_chan *chan; |
| 447 | struct dma_device *device; |
| 448 | int cpu; |
| 449 | int cap; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 450 | |
| 451 | /* undo the last distribution */ |
| 452 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 453 | for_each_possible_cpu(cpu) |
| 454 | per_cpu_ptr(channel_table[cap], cpu)->chan = NULL; |
| 455 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 456 | list_for_each_entry(device, &dma_device_list, global_node) { |
| 457 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 458 | continue; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 459 | list_for_each_entry(chan, &device->channels, device_node) |
| 460 | chan->table_count = 0; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 461 | } |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 462 | |
| 463 | /* don't populate the channel_table if no clients are available */ |
| 464 | if (!dmaengine_ref_count) |
| 465 | return; |
| 466 | |
| 467 | /* redistribute available channels */ |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 468 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 469 | for_each_online_cpu(cpu) { |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 470 | chan = min_chan(cap, cpu); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 471 | per_cpu_ptr(channel_table[cap], cpu)->chan = chan; |
| 472 | } |
| 473 | } |
| 474 | |
Laurent Pinchart | 0d5484b | 2014-10-29 00:30:58 +0200 | [diff] [blame] | 475 | int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) |
| 476 | { |
| 477 | struct dma_device *device; |
| 478 | |
| 479 | if (!chan || !caps) |
| 480 | return -EINVAL; |
| 481 | |
| 482 | device = chan->device; |
| 483 | |
| 484 | /* check if the channel supports slave transactions */ |
| 485 | if (!test_bit(DMA_SLAVE, device->cap_mask.bits)) |
| 486 | return -ENXIO; |
| 487 | |
| 488 | /* |
| 489 | * Check whether it reports it uses the generic slave |
| 490 | * capabilities, if not, that means it doesn't support any |
| 491 | * kind of slave capabilities reporting. |
| 492 | */ |
| 493 | if (!device->directions) |
| 494 | return -ENXIO; |
| 495 | |
| 496 | caps->src_addr_widths = device->src_addr_widths; |
| 497 | caps->dst_addr_widths = device->dst_addr_widths; |
| 498 | caps->directions = device->directions; |
Shawn Lin | 6d5bbed | 2016-01-22 19:06:50 +0800 | [diff] [blame] | 499 | caps->max_burst = device->max_burst; |
Laurent Pinchart | 0d5484b | 2014-10-29 00:30:58 +0200 | [diff] [blame] | 500 | caps->residue_granularity = device->residue_granularity; |
Robert Jarzmik | 9eeacd3 | 2015-10-13 21:54:29 +0200 | [diff] [blame] | 501 | caps->descriptor_reuse = device->descriptor_reuse; |
Laurent Pinchart | 0d5484b | 2014-10-29 00:30:58 +0200 | [diff] [blame] | 502 | |
Krzysztof Kozlowski | 88d0464 | 2015-06-10 17:17:07 +0900 | [diff] [blame] | 503 | /* |
| 504 | * Some devices implement only pause (e.g. to get residuum) but no |
| 505 | * resume. However cmd_pause is advertised as pause AND resume. |
| 506 | */ |
| 507 | caps->cmd_pause = !!(device->device_pause && device->device_resume); |
Laurent Pinchart | 0d5484b | 2014-10-29 00:30:58 +0200 | [diff] [blame] | 508 | caps->cmd_terminate = !!device->device_terminate_all; |
| 509 | |
| 510 | return 0; |
| 511 | } |
| 512 | EXPORT_SYMBOL_GPL(dma_get_slave_caps); |
| 513 | |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 514 | static struct dma_chan *private_candidate(const dma_cap_mask_t *mask, |
| 515 | struct dma_device *dev, |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 516 | dma_filter_fn fn, void *fn_param) |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 517 | { |
| 518 | struct dma_chan *chan; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 519 | |
Peter Ujfalusi | 26b6425 | 2015-12-14 22:47:38 +0200 | [diff] [blame] | 520 | if (mask && !__dma_device_satisfies_mask(dev, mask)) { |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 521 | pr_debug("%s: wrong capabilities\n", __func__); |
| 522 | return NULL; |
| 523 | } |
| 524 | /* devices with multiple channels need special handling as we need to |
| 525 | * ensure that all channels are either private or public. |
| 526 | */ |
| 527 | if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask)) |
| 528 | list_for_each_entry(chan, &dev->channels, device_node) { |
| 529 | /* some channels are already publicly allocated */ |
| 530 | if (chan->client_count) |
| 531 | return NULL; |
| 532 | } |
| 533 | |
| 534 | list_for_each_entry(chan, &dev->channels, device_node) { |
| 535 | if (chan->client_count) { |
| 536 | pr_debug("%s: %s busy\n", |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 537 | __func__, dma_chan_name(chan)); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 538 | continue; |
| 539 | } |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 540 | if (fn && !fn(chan, fn_param)) { |
| 541 | pr_debug("%s: %s filter said false\n", |
| 542 | __func__, dma_chan_name(chan)); |
| 543 | continue; |
| 544 | } |
| 545 | return chan; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 546 | } |
| 547 | |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 548 | return NULL; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 549 | } |
| 550 | |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 551 | static struct dma_chan *find_candidate(struct dma_device *device, |
| 552 | const dma_cap_mask_t *mask, |
| 553 | dma_filter_fn fn, void *fn_param) |
| 554 | { |
| 555 | struct dma_chan *chan = private_candidate(mask, device, fn, fn_param); |
| 556 | int err; |
| 557 | |
| 558 | if (chan) { |
| 559 | /* Found a suitable channel, try to grab, prep, and return it. |
| 560 | * We first set DMA_PRIVATE to disable balance_ref_count as this |
| 561 | * channel will not be published in the general-purpose |
| 562 | * allocator |
| 563 | */ |
| 564 | dma_cap_set(DMA_PRIVATE, device->cap_mask); |
| 565 | device->privatecnt++; |
| 566 | err = dma_chan_get(chan); |
| 567 | |
| 568 | if (err) { |
| 569 | if (err == -ENODEV) { |
| 570 | pr_debug("%s: %s module removed\n", __func__, |
| 571 | dma_chan_name(chan)); |
| 572 | list_del_rcu(&device->global_node); |
| 573 | } else |
| 574 | pr_debug("%s: failed to get %s: (%d)\n", |
| 575 | __func__, dma_chan_name(chan), err); |
| 576 | |
| 577 | if (--device->privatecnt == 0) |
| 578 | dma_cap_clear(DMA_PRIVATE, device->cap_mask); |
| 579 | |
| 580 | chan = ERR_PTR(err); |
| 581 | } |
| 582 | } |
| 583 | |
| 584 | return chan ? chan : ERR_PTR(-EPROBE_DEFER); |
| 585 | } |
| 586 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 587 | /** |
Stefan Agner | 19d643d | 2015-06-01 23:53:43 +0200 | [diff] [blame] | 588 | * dma_get_slave_channel - try to get specific channel exclusively |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 589 | * @chan: target channel |
| 590 | */ |
| 591 | struct dma_chan *dma_get_slave_channel(struct dma_chan *chan) |
| 592 | { |
| 593 | int err = -EBUSY; |
| 594 | |
| 595 | /* lock against __dma_request_channel */ |
| 596 | mutex_lock(&dma_list_mutex); |
| 597 | |
Vinod Koul | d9a6c8f | 2013-08-19 10:47:26 +0530 | [diff] [blame] | 598 | if (chan->client_count == 0) { |
Peter Ujfalusi | 214fc4e | 2015-09-24 12:03:35 +0300 | [diff] [blame] | 599 | struct dma_device *device = chan->device; |
| 600 | |
| 601 | dma_cap_set(DMA_PRIVATE, device->cap_mask); |
| 602 | device->privatecnt++; |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 603 | err = dma_chan_get(chan); |
Peter Ujfalusi | 214fc4e | 2015-09-24 12:03:35 +0300 | [diff] [blame] | 604 | if (err) { |
Vinod Koul | d9a6c8f | 2013-08-19 10:47:26 +0530 | [diff] [blame] | 605 | pr_debug("%s: failed to get %s: (%d)\n", |
| 606 | __func__, dma_chan_name(chan), err); |
Peter Ujfalusi | 214fc4e | 2015-09-24 12:03:35 +0300 | [diff] [blame] | 607 | chan = NULL; |
| 608 | if (--device->privatecnt == 0) |
| 609 | dma_cap_clear(DMA_PRIVATE, device->cap_mask); |
| 610 | } |
Vinod Koul | d9a6c8f | 2013-08-19 10:47:26 +0530 | [diff] [blame] | 611 | } else |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 612 | chan = NULL; |
| 613 | |
| 614 | mutex_unlock(&dma_list_mutex); |
| 615 | |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 616 | |
| 617 | return chan; |
| 618 | } |
| 619 | EXPORT_SYMBOL_GPL(dma_get_slave_channel); |
| 620 | |
Stephen Warren | 8010dad | 2013-11-26 12:40:51 -0700 | [diff] [blame] | 621 | struct dma_chan *dma_get_any_slave_channel(struct dma_device *device) |
| 622 | { |
| 623 | dma_cap_mask_t mask; |
| 624 | struct dma_chan *chan; |
Stephen Warren | 8010dad | 2013-11-26 12:40:51 -0700 | [diff] [blame] | 625 | |
| 626 | dma_cap_zero(mask); |
| 627 | dma_cap_set(DMA_SLAVE, mask); |
| 628 | |
| 629 | /* lock against __dma_request_channel */ |
| 630 | mutex_lock(&dma_list_mutex); |
| 631 | |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 632 | chan = find_candidate(device, &mask, NULL, NULL); |
Stephen Warren | 8010dad | 2013-11-26 12:40:51 -0700 | [diff] [blame] | 633 | |
| 634 | mutex_unlock(&dma_list_mutex); |
| 635 | |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 636 | return IS_ERR(chan) ? NULL : chan; |
Stephen Warren | 8010dad | 2013-11-26 12:40:51 -0700 | [diff] [blame] | 637 | } |
| 638 | EXPORT_SYMBOL_GPL(dma_get_any_slave_channel); |
| 639 | |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 640 | /** |
Daniel Mack | 6b9019a | 2013-08-14 18:35:03 +0200 | [diff] [blame] | 641 | * __dma_request_channel - try to allocate an exclusive channel |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 642 | * @mask: capabilities that the channel must satisfy |
| 643 | * @fn: optional callback to disposition available channels |
| 644 | * @fn_param: opaque parameter to pass to dma_filter_fn |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 645 | * |
| 646 | * Returns pointer to appropriate DMA channel on success or NULL. |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 647 | */ |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 648 | struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, |
| 649 | dma_filter_fn fn, void *fn_param) |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 650 | { |
| 651 | struct dma_device *device, *_d; |
| 652 | struct dma_chan *chan = NULL; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 653 | |
| 654 | /* Find a channel */ |
| 655 | mutex_lock(&dma_list_mutex); |
| 656 | list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 657 | chan = find_candidate(device, mask, fn, fn_param); |
| 658 | if (!IS_ERR(chan)) |
| 659 | break; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 660 | |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 661 | chan = NULL; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 662 | } |
| 663 | mutex_unlock(&dma_list_mutex); |
| 664 | |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 665 | pr_debug("%s: %s (%s)\n", |
| 666 | __func__, |
| 667 | chan ? "success" : "fail", |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 668 | chan ? dma_chan_name(chan) : NULL); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 669 | |
| 670 | return chan; |
| 671 | } |
| 672 | EXPORT_SYMBOL_GPL(__dma_request_channel); |
| 673 | |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 674 | static const struct dma_slave_map *dma_filter_match(struct dma_device *device, |
| 675 | const char *name, |
| 676 | struct device *dev) |
| 677 | { |
| 678 | int i; |
| 679 | |
| 680 | if (!device->filter.mapcnt) |
| 681 | return NULL; |
| 682 | |
| 683 | for (i = 0; i < device->filter.mapcnt; i++) { |
| 684 | const struct dma_slave_map *map = &device->filter.map[i]; |
| 685 | |
| 686 | if (!strcmp(map->devname, dev_name(dev)) && |
| 687 | !strcmp(map->slave, name)) |
| 688 | return map; |
| 689 | } |
| 690 | |
| 691 | return NULL; |
| 692 | } |
| 693 | |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 694 | /** |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 695 | * dma_request_chan - try to allocate an exclusive slave channel |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 696 | * @dev: pointer to client device structure |
| 697 | * @name: slave channel name |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 698 | * |
| 699 | * Returns pointer to appropriate DMA channel on success or an error pointer. |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 700 | */ |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 701 | struct dma_chan *dma_request_chan(struct device *dev, const char *name) |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 702 | { |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 703 | struct dma_device *d, *_d; |
| 704 | struct dma_chan *chan = NULL; |
| 705 | |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 706 | /* If device-tree is present get slave info from here */ |
| 707 | if (dev->of_node) |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 708 | chan = of_dma_request_slave_channel(dev->of_node, name); |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 709 | |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 710 | /* If device was enumerated by ACPI get slave info from here */ |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 711 | if (has_acpi_companion(dev) && !chan) |
| 712 | chan = acpi_dma_request_slave_chan_by_name(dev, name); |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 713 | |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 714 | if (chan) { |
| 715 | /* Valid channel found or requester need to be deferred */ |
| 716 | if (!IS_ERR(chan) || PTR_ERR(chan) == -EPROBE_DEFER) |
| 717 | return chan; |
| 718 | } |
| 719 | |
| 720 | /* Try to find the channel via the DMA filter map(s) */ |
| 721 | mutex_lock(&dma_list_mutex); |
| 722 | list_for_each_entry_safe(d, _d, &dma_device_list, global_node) { |
| 723 | dma_cap_mask_t mask; |
| 724 | const struct dma_slave_map *map = dma_filter_match(d, name, dev); |
| 725 | |
| 726 | if (!map) |
| 727 | continue; |
| 728 | |
| 729 | dma_cap_zero(mask); |
| 730 | dma_cap_set(DMA_SLAVE, mask); |
| 731 | |
| 732 | chan = find_candidate(d, &mask, d->filter.fn, map->param); |
| 733 | if (!IS_ERR(chan)) |
| 734 | break; |
| 735 | } |
| 736 | mutex_unlock(&dma_list_mutex); |
| 737 | |
| 738 | return chan ? chan : ERR_PTR(-EPROBE_DEFER); |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 739 | } |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 740 | EXPORT_SYMBOL_GPL(dma_request_chan); |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 741 | |
| 742 | /** |
| 743 | * dma_request_slave_channel - try to allocate an exclusive slave channel |
| 744 | * @dev: pointer to client device structure |
| 745 | * @name: slave channel name |
| 746 | * |
| 747 | * Returns pointer to appropriate DMA channel on success or NULL. |
| 748 | */ |
| 749 | struct dma_chan *dma_request_slave_channel(struct device *dev, |
| 750 | const char *name) |
| 751 | { |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 752 | struct dma_chan *ch = dma_request_chan(dev, name); |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 753 | if (IS_ERR(ch)) |
| 754 | return NULL; |
Robert Baldyga | 05aa1a7 | 2015-08-07 12:26:47 +0200 | [diff] [blame] | 755 | |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 756 | return ch; |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 757 | } |
| 758 | EXPORT_SYMBOL_GPL(dma_request_slave_channel); |
| 759 | |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 760 | /** |
| 761 | * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities |
| 762 | * @mask: capabilities that the channel must satisfy |
| 763 | * |
| 764 | * Returns pointer to appropriate DMA channel on success or an error pointer. |
| 765 | */ |
| 766 | struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask) |
| 767 | { |
| 768 | struct dma_chan *chan; |
| 769 | |
| 770 | if (!mask) |
| 771 | return ERR_PTR(-ENODEV); |
| 772 | |
| 773 | chan = __dma_request_channel(mask, NULL, NULL); |
| 774 | if (!chan) |
| 775 | chan = ERR_PTR(-ENODEV); |
| 776 | |
| 777 | return chan; |
| 778 | } |
| 779 | EXPORT_SYMBOL_GPL(dma_request_chan_by_mask); |
| 780 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 781 | void dma_release_channel(struct dma_chan *chan) |
| 782 | { |
| 783 | mutex_lock(&dma_list_mutex); |
| 784 | WARN_ONCE(chan->client_count != 1, |
| 785 | "chan reference count %d != 1\n", chan->client_count); |
| 786 | dma_chan_put(chan); |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 787 | /* drop PRIVATE cap enabled by __dma_request_channel() */ |
| 788 | if (--chan->device->privatecnt == 0) |
| 789 | dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 790 | mutex_unlock(&dma_list_mutex); |
| 791 | } |
| 792 | EXPORT_SYMBOL_GPL(dma_release_channel); |
| 793 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 794 | /** |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 795 | * dmaengine_get - register interest in dma_channels |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 796 | */ |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 797 | void dmaengine_get(void) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 798 | { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 799 | struct dma_device *device, *_d; |
| 800 | struct dma_chan *chan; |
| 801 | int err; |
| 802 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 803 | mutex_lock(&dma_list_mutex); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 804 | dmaengine_ref_count++; |
| 805 | |
| 806 | /* try to grab channels */ |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 807 | list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { |
| 808 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 809 | continue; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 810 | list_for_each_entry(chan, &device->channels, device_node) { |
| 811 | err = dma_chan_get(chan); |
| 812 | if (err == -ENODEV) { |
| 813 | /* module removed before we could use it */ |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 814 | list_del_rcu(&device->global_node); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 815 | break; |
| 816 | } else if (err) |
Fabio Estevam | 0eb5a35 | 2012-10-04 17:11:16 -0700 | [diff] [blame] | 817 | pr_debug("%s: failed to get %s: (%d)\n", |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 818 | __func__, dma_chan_name(chan), err); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 819 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 820 | } |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 821 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 822 | /* if this is the first reference and there were channels |
| 823 | * waiting we need to rebalance to get those channels |
| 824 | * incorporated into the channel table |
| 825 | */ |
| 826 | if (dmaengine_ref_count == 1) |
| 827 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 828 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 829 | } |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 830 | EXPORT_SYMBOL(dmaengine_get); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 831 | |
| 832 | /** |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 833 | * dmaengine_put - let dma drivers be removed when ref_count == 0 |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 834 | */ |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 835 | void dmaengine_put(void) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 836 | { |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 837 | struct dma_device *device; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 838 | struct dma_chan *chan; |
| 839 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 840 | mutex_lock(&dma_list_mutex); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 841 | dmaengine_ref_count--; |
| 842 | BUG_ON(dmaengine_ref_count < 0); |
| 843 | /* drop channel references */ |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 844 | list_for_each_entry(device, &dma_device_list, global_node) { |
| 845 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 846 | continue; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 847 | list_for_each_entry(chan, &device->channels, device_node) |
| 848 | dma_chan_put(chan); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 849 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 850 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 851 | } |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 852 | EXPORT_SYMBOL(dmaengine_put); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 853 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 854 | static bool device_has_all_tx_types(struct dma_device *device) |
| 855 | { |
| 856 | /* A device that satisfies this test has channels that will never cause |
| 857 | * an async_tx channel switch event as all possible operation types can |
| 858 | * be handled. |
| 859 | */ |
| 860 | #ifdef CONFIG_ASYNC_TX_DMA |
| 861 | if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask)) |
| 862 | return false; |
| 863 | #endif |
| 864 | |
| 865 | #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE) |
| 866 | if (!dma_has_cap(DMA_MEMCPY, device->cap_mask)) |
| 867 | return false; |
| 868 | #endif |
| 869 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 870 | #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE) |
| 871 | if (!dma_has_cap(DMA_XOR, device->cap_mask)) |
| 872 | return false; |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 873 | |
| 874 | #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA |
Dan Williams | 4499a24 | 2009-11-19 17:10:25 -0700 | [diff] [blame] | 875 | if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask)) |
| 876 | return false; |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 877 | #endif |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 878 | #endif |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 879 | |
| 880 | #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE) |
| 881 | if (!dma_has_cap(DMA_PQ, device->cap_mask)) |
| 882 | return false; |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 883 | |
| 884 | #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA |
Dan Williams | 4499a24 | 2009-11-19 17:10:25 -0700 | [diff] [blame] | 885 | if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask)) |
| 886 | return false; |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 887 | #endif |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 888 | #endif |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 889 | |
| 890 | return true; |
| 891 | } |
| 892 | |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 893 | static int get_dma_id(struct dma_device *device) |
| 894 | { |
| 895 | int rc; |
| 896 | |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 897 | mutex_lock(&dma_list_mutex); |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 898 | |
Tejun Heo | 69ee266 | 2013-02-27 17:04:03 -0800 | [diff] [blame] | 899 | rc = idr_alloc(&dma_idr, NULL, 0, 0, GFP_KERNEL); |
| 900 | if (rc >= 0) |
| 901 | device->dev_id = rc; |
| 902 | |
| 903 | mutex_unlock(&dma_list_mutex); |
| 904 | return rc < 0 ? rc : 0; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 905 | } |
| 906 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 907 | /** |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 908 | * dma_async_device_register - registers DMA devices found |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 909 | * @device: &dma_device |
| 910 | */ |
| 911 | int dma_async_device_register(struct dma_device *device) |
| 912 | { |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 913 | int chancnt = 0, rc; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 914 | struct dma_chan* chan; |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 915 | atomic_t *idr_ref; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 916 | |
| 917 | if (!device) |
| 918 | return -ENODEV; |
| 919 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 920 | /* validate device routines */ |
| 921 | BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) && |
| 922 | !device->device_prep_dma_memcpy); |
| 923 | BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) && |
| 924 | !device->device_prep_dma_xor); |
Dan Williams | 099f53c | 2009-04-08 14:28:37 -0700 | [diff] [blame] | 925 | BUG_ON(dma_has_cap(DMA_XOR_VAL, device->cap_mask) && |
| 926 | !device->device_prep_dma_xor_val); |
Dan Williams | b2f46fd | 2009-07-14 12:20:36 -0700 | [diff] [blame] | 927 | BUG_ON(dma_has_cap(DMA_PQ, device->cap_mask) && |
| 928 | !device->device_prep_dma_pq); |
| 929 | BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) && |
| 930 | !device->device_prep_dma_pq_val); |
Maxime Ripard | 4983a50 | 2015-05-18 13:46:15 +0200 | [diff] [blame] | 931 | BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) && |
| 932 | !device->device_prep_dma_memset); |
Zhang Wei | 9b941c6 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 933 | BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) && |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 934 | !device->device_prep_dma_interrupt); |
Ira Snyder | a86ee03 | 2010-09-30 11:46:44 +0000 | [diff] [blame] | 935 | BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) && |
| 936 | !device->device_prep_dma_sg); |
Sascha Hauer | 782bc95 | 2010-09-30 13:56:32 +0000 | [diff] [blame] | 937 | BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) && |
| 938 | !device->device_prep_dma_cyclic); |
Jassi Brar | b14dab7 | 2011-10-13 12:33:30 +0530 | [diff] [blame] | 939 | BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && |
| 940 | !device->device_prep_interleaved_dma); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 941 | |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 942 | BUG_ON(!device->device_tx_status); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 943 | BUG_ON(!device->device_issue_pending); |
| 944 | BUG_ON(!device->dev); |
| 945 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 946 | /* note: this only matters in the |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 947 | * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 948 | */ |
| 949 | if (device_has_all_tx_types(device)) |
| 950 | dma_cap_set(DMA_ASYNC_TX, device->cap_mask); |
| 951 | |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 952 | idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL); |
| 953 | if (!idr_ref) |
| 954 | return -ENOMEM; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 955 | rc = get_dma_id(device); |
| 956 | if (rc != 0) { |
| 957 | kfree(idr_ref); |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 958 | return rc; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 959 | } |
| 960 | |
| 961 | atomic_set(idr_ref, 0); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 962 | |
| 963 | /* represent channels in sysfs. Probably want devs too */ |
| 964 | list_for_each_entry(chan, &device->channels, device_node) { |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 965 | rc = -ENOMEM; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 966 | chan->local = alloc_percpu(typeof(*chan->local)); |
| 967 | if (chan->local == NULL) |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 968 | goto err_out; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 969 | chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL); |
| 970 | if (chan->dev == NULL) { |
| 971 | free_percpu(chan->local); |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 972 | chan->local = NULL; |
| 973 | goto err_out; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 974 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 975 | |
| 976 | chan->chan_id = chancnt++; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 977 | chan->dev->device.class = &dma_devclass; |
| 978 | chan->dev->device.parent = device->dev; |
| 979 | chan->dev->chan = chan; |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 980 | chan->dev->idr_ref = idr_ref; |
| 981 | chan->dev->dev_id = device->dev_id; |
| 982 | atomic_inc(idr_ref); |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 983 | dev_set_name(&chan->dev->device, "dma%dchan%d", |
Kay Sievers | 06190d8 | 2008-11-11 13:12:33 -0700 | [diff] [blame] | 984 | device->dev_id, chan->chan_id); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 985 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 986 | rc = device_register(&chan->dev->device); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 987 | if (rc) { |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 988 | free_percpu(chan->local); |
| 989 | chan->local = NULL; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 990 | kfree(chan->dev); |
| 991 | atomic_dec(idr_ref); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 992 | goto err_out; |
| 993 | } |
Dan Williams | 7cc5bf9 | 2008-07-08 11:58:21 -0700 | [diff] [blame] | 994 | chan->client_count = 0; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 995 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 996 | device->chancnt = chancnt; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 997 | |
| 998 | mutex_lock(&dma_list_mutex); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 999 | /* take references on public channels */ |
| 1000 | if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1001 | list_for_each_entry(chan, &device->channels, device_node) { |
| 1002 | /* if clients are already waiting for channels we need |
| 1003 | * to take references on their behalf |
| 1004 | */ |
| 1005 | if (dma_chan_get(chan) == -ENODEV) { |
| 1006 | /* note we can only get here for the first |
| 1007 | * channel as the remaining channels are |
| 1008 | * guaranteed to get a reference |
| 1009 | */ |
| 1010 | rc = -ENODEV; |
| 1011 | mutex_unlock(&dma_list_mutex); |
| 1012 | goto err_out; |
| 1013 | } |
| 1014 | } |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1015 | list_add_tail_rcu(&device->global_node, &dma_device_list); |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 1016 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 1017 | device->privatecnt++; /* Always private */ |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1018 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1019 | mutex_unlock(&dma_list_mutex); |
| 1020 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1021 | return 0; |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 1022 | |
| 1023 | err_out: |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 1024 | /* if we never registered a channel just release the idr */ |
| 1025 | if (atomic_read(idr_ref) == 0) { |
| 1026 | mutex_lock(&dma_list_mutex); |
| 1027 | idr_remove(&dma_idr, device->dev_id); |
| 1028 | mutex_unlock(&dma_list_mutex); |
| 1029 | kfree(idr_ref); |
| 1030 | return rc; |
| 1031 | } |
| 1032 | |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 1033 | list_for_each_entry(chan, &device->channels, device_node) { |
| 1034 | if (chan->local == NULL) |
| 1035 | continue; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1036 | mutex_lock(&dma_list_mutex); |
| 1037 | chan->dev->chan = NULL; |
| 1038 | mutex_unlock(&dma_list_mutex); |
| 1039 | device_unregister(&chan->dev->device); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 1040 | free_percpu(chan->local); |
| 1041 | } |
| 1042 | return rc; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1043 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 1044 | EXPORT_SYMBOL(dma_async_device_register); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1045 | |
| 1046 | /** |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1047 | * dma_async_device_unregister - unregister a DMA device |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 1048 | * @device: &dma_device |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 1049 | * |
| 1050 | * This routine is called by dma driver exit routines, dmaengine holds module |
| 1051 | * references to prevent it being called while channels are in use. |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 1052 | */ |
| 1053 | void dma_async_device_unregister(struct dma_device *device) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1054 | { |
| 1055 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1056 | |
| 1057 | mutex_lock(&dma_list_mutex); |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1058 | list_del_rcu(&device->global_node); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1059 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1060 | mutex_unlock(&dma_list_mutex); |
| 1061 | |
| 1062 | list_for_each_entry(chan, &device->channels, device_node) { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1063 | WARN_ONCE(chan->client_count, |
| 1064 | "%s called while %d clients hold a reference\n", |
| 1065 | __func__, chan->client_count); |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1066 | mutex_lock(&dma_list_mutex); |
| 1067 | chan->dev->chan = NULL; |
| 1068 | mutex_unlock(&dma_list_mutex); |
| 1069 | device_unregister(&chan->dev->device); |
Anatolij Gustschin | adef477 | 2010-01-26 10:26:06 +0100 | [diff] [blame] | 1070 | free_percpu(chan->local); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1071 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1072 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 1073 | EXPORT_SYMBOL(dma_async_device_unregister); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1074 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1075 | struct dmaengine_unmap_pool { |
| 1076 | struct kmem_cache *cache; |
| 1077 | const char *name; |
| 1078 | mempool_t *pool; |
| 1079 | size_t size; |
| 1080 | }; |
| 1081 | |
| 1082 | #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) } |
| 1083 | static struct dmaengine_unmap_pool unmap_pool[] = { |
| 1084 | __UNMAP_POOL(2), |
Dan Williams | 3cc377b | 2013-12-09 10:33:16 -0800 | [diff] [blame] | 1085 | #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1086 | __UNMAP_POOL(16), |
| 1087 | __UNMAP_POOL(128), |
| 1088 | __UNMAP_POOL(256), |
| 1089 | #endif |
| 1090 | }; |
| 1091 | |
| 1092 | static struct dmaengine_unmap_pool *__get_unmap_pool(int nr) |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1093 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1094 | int order = get_count_order(nr); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1095 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1096 | switch (order) { |
| 1097 | case 0 ... 1: |
| 1098 | return &unmap_pool[0]; |
| 1099 | case 2 ... 4: |
| 1100 | return &unmap_pool[1]; |
| 1101 | case 5 ... 7: |
| 1102 | return &unmap_pool[2]; |
| 1103 | case 8: |
| 1104 | return &unmap_pool[3]; |
| 1105 | default: |
| 1106 | BUG(); |
| 1107 | return NULL; |
| 1108 | } |
| 1109 | } |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1110 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1111 | static void dmaengine_unmap(struct kref *kref) |
| 1112 | { |
| 1113 | struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref); |
| 1114 | struct device *dev = unmap->dev; |
| 1115 | int cnt, i; |
| 1116 | |
| 1117 | cnt = unmap->to_cnt; |
| 1118 | for (i = 0; i < cnt; i++) |
| 1119 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1120 | DMA_TO_DEVICE); |
| 1121 | cnt += unmap->from_cnt; |
| 1122 | for (; i < cnt; i++) |
| 1123 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1124 | DMA_FROM_DEVICE); |
| 1125 | cnt += unmap->bidi_cnt; |
Dan Williams | 7476bd7 | 2013-10-18 19:35:29 +0200 | [diff] [blame] | 1126 | for (; i < cnt; i++) { |
| 1127 | if (unmap->addr[i] == 0) |
| 1128 | continue; |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1129 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1130 | DMA_BIDIRECTIONAL); |
Dan Williams | 7476bd7 | 2013-10-18 19:35:29 +0200 | [diff] [blame] | 1131 | } |
Xuelin Shi | c1f43dd | 2014-05-21 14:02:37 -0700 | [diff] [blame] | 1132 | cnt = unmap->map_cnt; |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1133 | mempool_free(unmap, __get_unmap_pool(cnt)->pool); |
| 1134 | } |
| 1135 | |
| 1136 | void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) |
| 1137 | { |
| 1138 | if (unmap) |
| 1139 | kref_put(&unmap->kref, dmaengine_unmap); |
| 1140 | } |
| 1141 | EXPORT_SYMBOL_GPL(dmaengine_unmap_put); |
| 1142 | |
| 1143 | static void dmaengine_destroy_unmap_pool(void) |
| 1144 | { |
| 1145 | int i; |
| 1146 | |
| 1147 | for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { |
| 1148 | struct dmaengine_unmap_pool *p = &unmap_pool[i]; |
| 1149 | |
Julia Lawall | 240eb916 | 2015-09-13 14:15:19 +0200 | [diff] [blame] | 1150 | mempool_destroy(p->pool); |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1151 | p->pool = NULL; |
Julia Lawall | 240eb916 | 2015-09-13 14:15:19 +0200 | [diff] [blame] | 1152 | kmem_cache_destroy(p->cache); |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1153 | p->cache = NULL; |
| 1154 | } |
| 1155 | } |
| 1156 | |
| 1157 | static int __init dmaengine_init_unmap_pool(void) |
| 1158 | { |
| 1159 | int i; |
| 1160 | |
| 1161 | for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { |
| 1162 | struct dmaengine_unmap_pool *p = &unmap_pool[i]; |
| 1163 | size_t size; |
| 1164 | |
| 1165 | size = sizeof(struct dmaengine_unmap_data) + |
| 1166 | sizeof(dma_addr_t) * p->size; |
| 1167 | |
| 1168 | p->cache = kmem_cache_create(p->name, size, 0, |
| 1169 | SLAB_HWCACHE_ALIGN, NULL); |
| 1170 | if (!p->cache) |
| 1171 | break; |
| 1172 | p->pool = mempool_create_slab_pool(1, p->cache); |
| 1173 | if (!p->pool) |
| 1174 | break; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1175 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1176 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1177 | if (i == ARRAY_SIZE(unmap_pool)) |
| 1178 | return 0; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1179 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1180 | dmaengine_destroy_unmap_pool(); |
| 1181 | return -ENOMEM; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1182 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1183 | |
Dan Williams | 8971646 | 2013-10-18 19:35:25 +0200 | [diff] [blame] | 1184 | struct dmaengine_unmap_data * |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1185 | dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1186 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1187 | struct dmaengine_unmap_data *unmap; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1188 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1189 | unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags); |
| 1190 | if (!unmap) |
| 1191 | return NULL; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1192 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1193 | memset(unmap, 0, sizeof(*unmap)); |
| 1194 | kref_init(&unmap->kref); |
| 1195 | unmap->dev = dev; |
Xuelin Shi | c1f43dd | 2014-05-21 14:02:37 -0700 | [diff] [blame] | 1196 | unmap->map_cnt = nr; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1197 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1198 | return unmap; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1199 | } |
Dan Williams | 8971646 | 2013-10-18 19:35:25 +0200 | [diff] [blame] | 1200 | EXPORT_SYMBOL(dmaengine_get_unmap_data); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1201 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1202 | void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, |
| 1203 | struct dma_chan *chan) |
| 1204 | { |
| 1205 | tx->chan = chan; |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 1206 | #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1207 | spin_lock_init(&tx->lock); |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1208 | #endif |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1209 | } |
| 1210 | EXPORT_SYMBOL(dma_async_tx_descriptor_init); |
| 1211 | |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1212 | /* dma_wait_for_async_tx - spin wait for a transaction to complete |
| 1213 | * @tx: in-flight transaction to wait on |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1214 | */ |
| 1215 | enum dma_status |
| 1216 | dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) |
| 1217 | { |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1218 | unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1219 | |
| 1220 | if (!tx) |
Vinod Koul | adfedd9 | 2013-10-16 13:29:02 +0530 | [diff] [blame] | 1221 | return DMA_COMPLETE; |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1222 | |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1223 | while (tx->cookie == -EBUSY) { |
| 1224 | if (time_after_eq(jiffies, dma_sync_wait_timeout)) { |
| 1225 | pr_err("%s timeout waiting for descriptor submission\n", |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 1226 | __func__); |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1227 | return DMA_ERROR; |
| 1228 | } |
| 1229 | cpu_relax(); |
| 1230 | } |
| 1231 | return dma_sync_wait(tx->chan, tx->cookie); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1232 | } |
| 1233 | EXPORT_SYMBOL_GPL(dma_wait_for_async_tx); |
| 1234 | |
| 1235 | /* dma_run_dependencies - helper routine for dma drivers to process |
| 1236 | * (start) dependent operations on their target channel |
| 1237 | * @tx: transaction with dependencies |
| 1238 | */ |
| 1239 | void dma_run_dependencies(struct dma_async_tx_descriptor *tx) |
| 1240 | { |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1241 | struct dma_async_tx_descriptor *dep = txd_next(tx); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1242 | struct dma_async_tx_descriptor *dep_next; |
| 1243 | struct dma_chan *chan; |
| 1244 | |
| 1245 | if (!dep) |
| 1246 | return; |
| 1247 | |
Yuri Tikhonov | dd59b85 | 2009-01-12 15:17:20 -0700 | [diff] [blame] | 1248 | /* we'll submit tx->next now, so clear the link */ |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1249 | txd_clear_next(tx); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1250 | chan = dep->chan; |
| 1251 | |
| 1252 | /* keep submitting up until a channel switch is detected |
| 1253 | * in that case we will be called again as a result of |
| 1254 | * processing the interrupt from async_tx_channel_switch |
| 1255 | */ |
| 1256 | for (; dep; dep = dep_next) { |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1257 | txd_lock(dep); |
| 1258 | txd_clear_parent(dep); |
| 1259 | dep_next = txd_next(dep); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1260 | if (dep_next && dep_next->chan == chan) |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1261 | txd_clear_next(dep); /* ->next will be submitted */ |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1262 | else |
| 1263 | dep_next = NULL; /* submit current dep and terminate */ |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1264 | txd_unlock(dep); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1265 | |
| 1266 | dep->tx_submit(dep); |
| 1267 | } |
| 1268 | |
| 1269 | chan->device->device_issue_pending(chan); |
| 1270 | } |
| 1271 | EXPORT_SYMBOL_GPL(dma_run_dependencies); |
| 1272 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1273 | static int __init dma_bus_init(void) |
| 1274 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1275 | int err = dmaengine_init_unmap_pool(); |
| 1276 | |
| 1277 | if (err) |
| 1278 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1279 | return class_register(&dma_devclass); |
| 1280 | } |
Dan Williams | 652afc2 | 2009-01-06 11:38:22 -0700 | [diff] [blame] | 1281 | arch_initcall(dma_bus_init); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1282 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1283 | |