Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 1 | /* |
Wim Van Sebroeck | cb711a1 | 2009-11-15 13:44:54 +0000 | [diff] [blame] | 2 | * intel TCO Watchdog Driver |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 3 | * |
Wim Van Sebroeck | deb9197 | 2011-10-19 23:59:26 +0200 | [diff] [blame] | 4 | * (c) Copyright 2006-2011 Wim Van Sebroeck <wim@iguana.be>. |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor |
| 12 | * provide warranty for any of this software. This material is |
| 13 | * provided "AS-IS" and at no charge. |
| 14 | * |
| 15 | * The TCO watchdog is implemented in the following I/O controller hubs: |
| 16 | * (See the intel documentation on http://developer.intel.com.) |
Wim Van Sebroeck | cb711a1 | 2009-11-15 13:44:54 +0000 | [diff] [blame] | 17 | * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO) |
| 18 | * document number 290687-002, 298242-027: 82801BA (ICH2) |
| 19 | * document number 290733-003, 290739-013: 82801CA (ICH3-S) |
| 20 | * document number 290716-001, 290718-007: 82801CAM (ICH3-M) |
| 21 | * document number 290744-001, 290745-025: 82801DB (ICH4) |
| 22 | * document number 252337-001, 252663-008: 82801DBM (ICH4-M) |
| 23 | * document number 273599-001, 273645-002: 82801E (C-ICH) |
| 24 | * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R) |
| 25 | * document number 300641-004, 300884-013: 6300ESB |
| 26 | * document number 301473-002, 301474-026: 82801F (ICH6) |
| 27 | * document number 313082-001, 313075-006: 631xESB, 632xESB |
| 28 | * document number 307013-003, 307014-024: 82801G (ICH7) |
Wim Van Sebroeck | d38bd47 | 2010-12-31 14:10:45 +0000 | [diff] [blame] | 29 | * document number 322896-001, 322897-001: NM10 |
Wim Van Sebroeck | cb711a1 | 2009-11-15 13:44:54 +0000 | [diff] [blame] | 30 | * document number 313056-003, 313057-017: 82801H (ICH8) |
| 31 | * document number 316972-004, 316973-012: 82801I (ICH9) |
| 32 | * document number 319973-002, 319974-002: 82801J (ICH10) |
Seth Heasley | 3c9d8ec | 2010-01-14 20:58:05 +0000 | [diff] [blame] | 33 | * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH) |
Imre Kaloz | 4946f83 | 2009-12-07 20:42:26 +0100 | [diff] [blame] | 34 | * document number 320066-003, 320257-008: EP80597 (IICH) |
Seth Heasley | 203f8d8 | 2011-01-07 17:11:08 -0800 | [diff] [blame] | 35 | * document number 324645-001, 324646-001: Cougar Point (CPT) |
Seth Heasley | c54fb81 | 2010-11-17 12:15:08 -0700 | [diff] [blame] | 36 | * document number TBD : Patsburg (PBG) |
Seth Heasley | 203f8d8 | 2011-01-07 17:11:08 -0800 | [diff] [blame] | 37 | * document number TBD : DH89xxCC |
Seth Heasley | aa1f465 | 2011-04-20 10:56:20 -0700 | [diff] [blame] | 38 | * document number TBD : Panther Point |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 39 | */ |
| 40 | |
| 41 | /* |
| 42 | * Includes, defines, variables, module parameters, ... |
| 43 | */ |
| 44 | |
| 45 | /* Module and version information */ |
Wim Van Sebroeck | 7944d3a | 2008-08-06 20:19:41 +0000 | [diff] [blame] | 46 | #define DRV_NAME "iTCO_wdt" |
Wim Van Sebroeck | deb9197 | 2011-10-19 23:59:26 +0200 | [diff] [blame] | 47 | #define DRV_VERSION "1.07" |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 48 | #define PFX DRV_NAME ": " |
| 49 | |
| 50 | /* Includes */ |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 51 | #include <linux/module.h> /* For module specific items */ |
| 52 | #include <linux/moduleparam.h> /* For new moduleparam's */ |
| 53 | #include <linux/types.h> /* For standard types (like size_t) */ |
| 54 | #include <linux/errno.h> /* For the -ENODEV/... values */ |
| 55 | #include <linux/kernel.h> /* For printk/panic/... */ |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 56 | #include <linux/miscdevice.h> /* For MODULE_ALIAS_MISCDEV |
| 57 | (WATCHDOG_MINOR) */ |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 58 | #include <linux/watchdog.h> /* For the watchdog specific items */ |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 59 | #include <linux/init.h> /* For __init/__exit/... */ |
| 60 | #include <linux/fs.h> /* For file operations */ |
| 61 | #include <linux/platform_device.h> /* For platform_driver framework */ |
| 62 | #include <linux/pci.h> /* For pci functions */ |
| 63 | #include <linux/ioport.h> /* For io-port access */ |
| 64 | #include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */ |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 65 | #include <linux/uaccess.h> /* For copy_to_user/put_user/... */ |
| 66 | #include <linux/io.h> /* For inb/outb/... */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 67 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 68 | #include "iTCO_vendor.h" |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 69 | |
| 70 | /* TCO related info */ |
| 71 | enum iTCO_chipsets { |
| 72 | TCO_ICH = 0, /* ICH */ |
| 73 | TCO_ICH0, /* ICH0 */ |
| 74 | TCO_ICH2, /* ICH2 */ |
| 75 | TCO_ICH2M, /* ICH2-M */ |
| 76 | TCO_ICH3, /* ICH3-S */ |
| 77 | TCO_ICH3M, /* ICH3-M */ |
| 78 | TCO_ICH4, /* ICH4 */ |
| 79 | TCO_ICH4M, /* ICH4-M */ |
| 80 | TCO_CICH, /* C-ICH */ |
| 81 | TCO_ICH5, /* ICH5 & ICH5R */ |
| 82 | TCO_6300ESB, /* 6300ESB */ |
| 83 | TCO_ICH6, /* ICH6 & ICH6R */ |
| 84 | TCO_ICH6M, /* ICH6-M */ |
| 85 | TCO_ICH6W, /* ICH6W & ICH6RW */ |
Wim Van Sebroeck | 28d41f5 | 2008-11-19 22:25:53 +0000 | [diff] [blame] | 86 | TCO_631XESB, /* 631xESB/632xESB */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 87 | TCO_ICH7, /* ICH7 & ICH7R */ |
Wim Van Sebroeck | 28d41f5 | 2008-11-19 22:25:53 +0000 | [diff] [blame] | 88 | TCO_ICH7DH, /* ICH7DH */ |
| 89 | TCO_ICH7M, /* ICH7-M & ICH7-U */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 90 | TCO_ICH7MDH, /* ICH7-M DH */ |
Wim Van Sebroeck | d38bd47 | 2010-12-31 14:10:45 +0000 | [diff] [blame] | 91 | TCO_NM10, /* NM10 */ |
Wim Van Sebroeck | a8edd74 | 2006-10-08 21:05:21 +0200 | [diff] [blame] | 92 | TCO_ICH8, /* ICH8 & ICH8R */ |
| 93 | TCO_ICH8DH, /* ICH8DH */ |
| 94 | TCO_ICH8DO, /* ICH8DO */ |
Wim Van Sebroeck | acf6035 | 2007-08-31 08:23:10 +0000 | [diff] [blame] | 95 | TCO_ICH8M, /* ICH8M */ |
Wim Van Sebroeck | 28d41f5 | 2008-11-19 22:25:53 +0000 | [diff] [blame] | 96 | TCO_ICH8ME, /* ICH8M-E */ |
Wim Van Sebroeck | 286201d | 2007-07-26 21:11:28 +0000 | [diff] [blame] | 97 | TCO_ICH9, /* ICH9 */ |
| 98 | TCO_ICH9R, /* ICH9R */ |
| 99 | TCO_ICH9DH, /* ICH9DH */ |
Wim Van Sebroeck | 7944d3a | 2008-08-06 20:19:41 +0000 | [diff] [blame] | 100 | TCO_ICH9DO, /* ICH9DO */ |
Wim Van Sebroeck | 28d41f5 | 2008-11-19 22:25:53 +0000 | [diff] [blame] | 101 | TCO_ICH9M, /* ICH9M */ |
| 102 | TCO_ICH9ME, /* ICH9M-E */ |
| 103 | TCO_ICH10, /* ICH10 */ |
| 104 | TCO_ICH10R, /* ICH10R */ |
| 105 | TCO_ICH10D, /* ICH10D */ |
| 106 | TCO_ICH10DO, /* ICH10DO */ |
Seth Heasley | 79e8941 | 2009-11-11 02:24:01 +0100 | [diff] [blame] | 107 | TCO_PCH, /* PCH Desktop Full Featured */ |
| 108 | TCO_PCHM, /* PCH Mobile Full Featured */ |
Seth Heasley | 3c9d8ec | 2010-01-14 20:58:05 +0000 | [diff] [blame] | 109 | TCO_P55, /* P55 */ |
| 110 | TCO_PM55, /* PM55 */ |
| 111 | TCO_H55, /* H55 */ |
| 112 | TCO_QM57, /* QM57 */ |
| 113 | TCO_H57, /* H57 */ |
| 114 | TCO_HM55, /* HM55 */ |
| 115 | TCO_Q57, /* Q57 */ |
| 116 | TCO_HM57, /* HM57 */ |
Seth Heasley | 79e8941 | 2009-11-11 02:24:01 +0100 | [diff] [blame] | 117 | TCO_PCHMSFF, /* PCH Mobile SFF Full Featured */ |
Seth Heasley | 3c9d8ec | 2010-01-14 20:58:05 +0000 | [diff] [blame] | 118 | TCO_QS57, /* QS57 */ |
| 119 | TCO_3400, /* 3400 */ |
| 120 | TCO_3420, /* 3420 */ |
| 121 | TCO_3450, /* 3450 */ |
Imre Kaloz | 4946f83 | 2009-12-07 20:42:26 +0100 | [diff] [blame] | 122 | TCO_EP80579, /* EP80579 */ |
Wim Van Sebroeck | 97b08a6 | 2011-05-20 08:28:48 +0000 | [diff] [blame] | 123 | TCO_CPT, /* Cougar Point */ |
| 124 | TCO_CPTD, /* Cougar Point Desktop */ |
| 125 | TCO_CPTM, /* Cougar Point Mobile */ |
| 126 | TCO_PBG, /* Patsburg */ |
Seth Heasley | 203f8d8 | 2011-01-07 17:11:08 -0800 | [diff] [blame] | 127 | TCO_DH89XXCC, /* DH89xxCC */ |
Wim Van Sebroeck | 97b08a6 | 2011-05-20 08:28:48 +0000 | [diff] [blame] | 128 | TCO_PPT, /* Panther Point */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 129 | }; |
| 130 | |
| 131 | static struct { |
| 132 | char *name; |
| 133 | unsigned int iTCO_version; |
| 134 | } iTCO_chipset_info[] __devinitdata = { |
| 135 | {"ICH", 1}, |
| 136 | {"ICH0", 1}, |
| 137 | {"ICH2", 1}, |
| 138 | {"ICH2-M", 1}, |
| 139 | {"ICH3-S", 1}, |
| 140 | {"ICH3-M", 1}, |
| 141 | {"ICH4", 1}, |
| 142 | {"ICH4-M", 1}, |
| 143 | {"C-ICH", 1}, |
| 144 | {"ICH5 or ICH5R", 1}, |
| 145 | {"6300ESB", 1}, |
| 146 | {"ICH6 or ICH6R", 2}, |
| 147 | {"ICH6-M", 2}, |
| 148 | {"ICH6W or ICH6RW", 2}, |
Wim Van Sebroeck | 28d41f5 | 2008-11-19 22:25:53 +0000 | [diff] [blame] | 149 | {"631xESB/632xESB", 2}, |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 150 | {"ICH7 or ICH7R", 2}, |
Wim Van Sebroeck | 28d41f5 | 2008-11-19 22:25:53 +0000 | [diff] [blame] | 151 | {"ICH7DH", 2}, |
| 152 | {"ICH7-M or ICH7-U", 2}, |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 153 | {"ICH7-M DH", 2}, |
Wim Van Sebroeck | d38bd47 | 2010-12-31 14:10:45 +0000 | [diff] [blame] | 154 | {"NM10", 2}, |
Arnaud Patard (Rtp) | bcbf25b | 2006-10-04 14:18:29 +0200 | [diff] [blame] | 155 | {"ICH8 or ICH8R", 2}, |
Wim Van Sebroeck | a8edd74 | 2006-10-08 21:05:21 +0200 | [diff] [blame] | 156 | {"ICH8DH", 2}, |
| 157 | {"ICH8DO", 2}, |
Wim Van Sebroeck | acf6035 | 2007-08-31 08:23:10 +0000 | [diff] [blame] | 158 | {"ICH8M", 2}, |
Wim Van Sebroeck | 28d41f5 | 2008-11-19 22:25:53 +0000 | [diff] [blame] | 159 | {"ICH8M-E", 2}, |
Wim Van Sebroeck | 286201d | 2007-07-26 21:11:28 +0000 | [diff] [blame] | 160 | {"ICH9", 2}, |
| 161 | {"ICH9R", 2}, |
| 162 | {"ICH9DH", 2}, |
Gabriel C | a49056d | 2008-04-30 16:51:10 +0200 | [diff] [blame] | 163 | {"ICH9DO", 2}, |
Wim Van Sebroeck | 28d41f5 | 2008-11-19 22:25:53 +0000 | [diff] [blame] | 164 | {"ICH9M", 2}, |
| 165 | {"ICH9M-E", 2}, |
| 166 | {"ICH10", 2}, |
| 167 | {"ICH10R", 2}, |
| 168 | {"ICH10D", 2}, |
| 169 | {"ICH10DO", 2}, |
Seth Heasley | 79e8941 | 2009-11-11 02:24:01 +0100 | [diff] [blame] | 170 | {"PCH Desktop Full Featured", 2}, |
| 171 | {"PCH Mobile Full Featured", 2}, |
Seth Heasley | 3c9d8ec | 2010-01-14 20:58:05 +0000 | [diff] [blame] | 172 | {"P55", 2}, |
| 173 | {"PM55", 2}, |
| 174 | {"H55", 2}, |
| 175 | {"QM57", 2}, |
| 176 | {"H57", 2}, |
| 177 | {"HM55", 2}, |
| 178 | {"Q57", 2}, |
| 179 | {"HM57", 2}, |
Seth Heasley | 79e8941 | 2009-11-11 02:24:01 +0100 | [diff] [blame] | 180 | {"PCH Mobile SFF Full Featured", 2}, |
Seth Heasley | 3c9d8ec | 2010-01-14 20:58:05 +0000 | [diff] [blame] | 181 | {"QS57", 2}, |
| 182 | {"3400", 2}, |
| 183 | {"3420", 2}, |
| 184 | {"3450", 2}, |
Imre Kaloz | 4946f83 | 2009-12-07 20:42:26 +0100 | [diff] [blame] | 185 | {"EP80579", 2}, |
Seth Heasley | 4c7d849 | 2010-03-25 16:14:41 -0700 | [diff] [blame] | 186 | {"Cougar Point", 2}, |
Wim Van Sebroeck | 97b08a6 | 2011-05-20 08:28:48 +0000 | [diff] [blame] | 187 | {"Cougar Point Desktop", 2}, |
| 188 | {"Cougar Point Mobile", 2}, |
Seth Heasley | c54fb81 | 2010-11-17 12:15:08 -0700 | [diff] [blame] | 189 | {"Patsburg", 2}, |
Seth Heasley | 203f8d8 | 2011-01-07 17:11:08 -0800 | [diff] [blame] | 190 | {"DH89xxCC", 2}, |
Seth Heasley | aa1f465 | 2011-04-20 10:56:20 -0700 | [diff] [blame] | 191 | {"Panther Point", 2}, |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 192 | {NULL, 0} |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 193 | }; |
| 194 | |
| 195 | /* |
| 196 | * This data only exists for exporting the supported PCI ids |
| 197 | * via MODULE_DEVICE_TABLE. We do not actually register a |
| 198 | * pci_driver, because the I/O Controller Hub has also other |
| 199 | * functions that probably will be registered by other drivers. |
| 200 | */ |
Wim Van Sebroeck | 4562f53 | 2011-02-21 12:16:44 +0000 | [diff] [blame] | 201 | static DEFINE_PCI_DEVICE_TABLE(iTCO_wdt_pci_tbl) = { |
Wim Van Sebroeck | 97b08a6 | 2011-05-20 08:28:48 +0000 | [diff] [blame] | 202 | { PCI_VDEVICE(INTEL, 0x2410), TCO_ICH}, |
| 203 | { PCI_VDEVICE(INTEL, 0x2420), TCO_ICH0}, |
| 204 | { PCI_VDEVICE(INTEL, 0x2440), TCO_ICH2}, |
| 205 | { PCI_VDEVICE(INTEL, 0x244c), TCO_ICH2M}, |
| 206 | { PCI_VDEVICE(INTEL, 0x2480), TCO_ICH3}, |
| 207 | { PCI_VDEVICE(INTEL, 0x248c), TCO_ICH3M}, |
| 208 | { PCI_VDEVICE(INTEL, 0x24c0), TCO_ICH4}, |
| 209 | { PCI_VDEVICE(INTEL, 0x24cc), TCO_ICH4M}, |
| 210 | { PCI_VDEVICE(INTEL, 0x2450), TCO_CICH}, |
| 211 | { PCI_VDEVICE(INTEL, 0x24d0), TCO_ICH5}, |
| 212 | { PCI_VDEVICE(INTEL, 0x25a1), TCO_6300ESB}, |
| 213 | { PCI_VDEVICE(INTEL, 0x2640), TCO_ICH6}, |
| 214 | { PCI_VDEVICE(INTEL, 0x2641), TCO_ICH6M}, |
| 215 | { PCI_VDEVICE(INTEL, 0x2642), TCO_ICH6W}, |
| 216 | { PCI_VDEVICE(INTEL, 0x2670), TCO_631XESB}, |
| 217 | { PCI_VDEVICE(INTEL, 0x2671), TCO_631XESB}, |
| 218 | { PCI_VDEVICE(INTEL, 0x2672), TCO_631XESB}, |
| 219 | { PCI_VDEVICE(INTEL, 0x2673), TCO_631XESB}, |
| 220 | { PCI_VDEVICE(INTEL, 0x2674), TCO_631XESB}, |
| 221 | { PCI_VDEVICE(INTEL, 0x2675), TCO_631XESB}, |
| 222 | { PCI_VDEVICE(INTEL, 0x2676), TCO_631XESB}, |
| 223 | { PCI_VDEVICE(INTEL, 0x2677), TCO_631XESB}, |
| 224 | { PCI_VDEVICE(INTEL, 0x2678), TCO_631XESB}, |
| 225 | { PCI_VDEVICE(INTEL, 0x2679), TCO_631XESB}, |
| 226 | { PCI_VDEVICE(INTEL, 0x267a), TCO_631XESB}, |
| 227 | { PCI_VDEVICE(INTEL, 0x267b), TCO_631XESB}, |
| 228 | { PCI_VDEVICE(INTEL, 0x267c), TCO_631XESB}, |
| 229 | { PCI_VDEVICE(INTEL, 0x267d), TCO_631XESB}, |
| 230 | { PCI_VDEVICE(INTEL, 0x267e), TCO_631XESB}, |
| 231 | { PCI_VDEVICE(INTEL, 0x267f), TCO_631XESB}, |
| 232 | { PCI_VDEVICE(INTEL, 0x27b8), TCO_ICH7}, |
| 233 | { PCI_VDEVICE(INTEL, 0x27b0), TCO_ICH7DH}, |
| 234 | { PCI_VDEVICE(INTEL, 0x27b9), TCO_ICH7M}, |
| 235 | { PCI_VDEVICE(INTEL, 0x27bd), TCO_ICH7MDH}, |
| 236 | { PCI_VDEVICE(INTEL, 0x27bc), TCO_NM10}, |
| 237 | { PCI_VDEVICE(INTEL, 0x2810), TCO_ICH8}, |
| 238 | { PCI_VDEVICE(INTEL, 0x2812), TCO_ICH8DH}, |
| 239 | { PCI_VDEVICE(INTEL, 0x2814), TCO_ICH8DO}, |
| 240 | { PCI_VDEVICE(INTEL, 0x2815), TCO_ICH8M}, |
| 241 | { PCI_VDEVICE(INTEL, 0x2811), TCO_ICH8ME}, |
| 242 | { PCI_VDEVICE(INTEL, 0x2918), TCO_ICH9}, |
| 243 | { PCI_VDEVICE(INTEL, 0x2916), TCO_ICH9R}, |
| 244 | { PCI_VDEVICE(INTEL, 0x2912), TCO_ICH9DH}, |
| 245 | { PCI_VDEVICE(INTEL, 0x2914), TCO_ICH9DO}, |
| 246 | { PCI_VDEVICE(INTEL, 0x2919), TCO_ICH9M}, |
| 247 | { PCI_VDEVICE(INTEL, 0x2917), TCO_ICH9ME}, |
| 248 | { PCI_VDEVICE(INTEL, 0x3a18), TCO_ICH10}, |
| 249 | { PCI_VDEVICE(INTEL, 0x3a16), TCO_ICH10R}, |
| 250 | { PCI_VDEVICE(INTEL, 0x3a1a), TCO_ICH10D}, |
| 251 | { PCI_VDEVICE(INTEL, 0x3a14), TCO_ICH10DO}, |
| 252 | { PCI_VDEVICE(INTEL, 0x3b00), TCO_PCH}, |
| 253 | { PCI_VDEVICE(INTEL, 0x3b01), TCO_PCHM}, |
| 254 | { PCI_VDEVICE(INTEL, 0x3b02), TCO_P55}, |
| 255 | { PCI_VDEVICE(INTEL, 0x3b03), TCO_PM55}, |
| 256 | { PCI_VDEVICE(INTEL, 0x3b06), TCO_H55}, |
| 257 | { PCI_VDEVICE(INTEL, 0x3b07), TCO_QM57}, |
| 258 | { PCI_VDEVICE(INTEL, 0x3b08), TCO_H57}, |
| 259 | { PCI_VDEVICE(INTEL, 0x3b09), TCO_HM55}, |
| 260 | { PCI_VDEVICE(INTEL, 0x3b0a), TCO_Q57}, |
| 261 | { PCI_VDEVICE(INTEL, 0x3b0b), TCO_HM57}, |
| 262 | { PCI_VDEVICE(INTEL, 0x3b0d), TCO_PCHMSFF}, |
| 263 | { PCI_VDEVICE(INTEL, 0x3b0f), TCO_QS57}, |
| 264 | { PCI_VDEVICE(INTEL, 0x3b12), TCO_3400}, |
| 265 | { PCI_VDEVICE(INTEL, 0x3b14), TCO_3420}, |
| 266 | { PCI_VDEVICE(INTEL, 0x3b16), TCO_3450}, |
| 267 | { PCI_VDEVICE(INTEL, 0x5031), TCO_EP80579}, |
| 268 | { PCI_VDEVICE(INTEL, 0x1c41), TCO_CPT}, |
| 269 | { PCI_VDEVICE(INTEL, 0x1c42), TCO_CPTD}, |
| 270 | { PCI_VDEVICE(INTEL, 0x1c43), TCO_CPTM}, |
| 271 | { PCI_VDEVICE(INTEL, 0x1c44), TCO_CPT}, |
| 272 | { PCI_VDEVICE(INTEL, 0x1c45), TCO_CPT}, |
| 273 | { PCI_VDEVICE(INTEL, 0x1c46), TCO_CPT}, |
| 274 | { PCI_VDEVICE(INTEL, 0x1c47), TCO_CPT}, |
| 275 | { PCI_VDEVICE(INTEL, 0x1c48), TCO_CPT}, |
| 276 | { PCI_VDEVICE(INTEL, 0x1c49), TCO_CPT}, |
| 277 | { PCI_VDEVICE(INTEL, 0x1c4a), TCO_CPT}, |
| 278 | { PCI_VDEVICE(INTEL, 0x1c4b), TCO_CPT}, |
| 279 | { PCI_VDEVICE(INTEL, 0x1c4c), TCO_CPT}, |
| 280 | { PCI_VDEVICE(INTEL, 0x1c4d), TCO_CPT}, |
| 281 | { PCI_VDEVICE(INTEL, 0x1c4e), TCO_CPT}, |
| 282 | { PCI_VDEVICE(INTEL, 0x1c4f), TCO_CPT}, |
| 283 | { PCI_VDEVICE(INTEL, 0x1c50), TCO_CPT}, |
| 284 | { PCI_VDEVICE(INTEL, 0x1c51), TCO_CPT}, |
| 285 | { PCI_VDEVICE(INTEL, 0x1c52), TCO_CPT}, |
| 286 | { PCI_VDEVICE(INTEL, 0x1c53), TCO_CPT}, |
| 287 | { PCI_VDEVICE(INTEL, 0x1c54), TCO_CPT}, |
| 288 | { PCI_VDEVICE(INTEL, 0x1c55), TCO_CPT}, |
| 289 | { PCI_VDEVICE(INTEL, 0x1c56), TCO_CPT}, |
| 290 | { PCI_VDEVICE(INTEL, 0x1c57), TCO_CPT}, |
| 291 | { PCI_VDEVICE(INTEL, 0x1c58), TCO_CPT}, |
| 292 | { PCI_VDEVICE(INTEL, 0x1c59), TCO_CPT}, |
| 293 | { PCI_VDEVICE(INTEL, 0x1c5a), TCO_CPT}, |
| 294 | { PCI_VDEVICE(INTEL, 0x1c5b), TCO_CPT}, |
| 295 | { PCI_VDEVICE(INTEL, 0x1c5c), TCO_CPT}, |
| 296 | { PCI_VDEVICE(INTEL, 0x1c5d), TCO_CPT}, |
| 297 | { PCI_VDEVICE(INTEL, 0x1c5e), TCO_CPT}, |
| 298 | { PCI_VDEVICE(INTEL, 0x1c5f), TCO_CPT}, |
| 299 | { PCI_VDEVICE(INTEL, 0x1d40), TCO_PBG}, |
| 300 | { PCI_VDEVICE(INTEL, 0x1d41), TCO_PBG}, |
| 301 | { PCI_VDEVICE(INTEL, 0x2310), TCO_DH89XXCC}, |
| 302 | { PCI_VDEVICE(INTEL, 0x1e40), TCO_PPT}, |
| 303 | { PCI_VDEVICE(INTEL, 0x1e41), TCO_PPT}, |
| 304 | { PCI_VDEVICE(INTEL, 0x1e42), TCO_PPT}, |
| 305 | { PCI_VDEVICE(INTEL, 0x1e43), TCO_PPT}, |
| 306 | { PCI_VDEVICE(INTEL, 0x1e44), TCO_PPT}, |
| 307 | { PCI_VDEVICE(INTEL, 0x1e45), TCO_PPT}, |
| 308 | { PCI_VDEVICE(INTEL, 0x1e46), TCO_PPT}, |
| 309 | { PCI_VDEVICE(INTEL, 0x1e47), TCO_PPT}, |
| 310 | { PCI_VDEVICE(INTEL, 0x1e48), TCO_PPT}, |
| 311 | { PCI_VDEVICE(INTEL, 0x1e49), TCO_PPT}, |
| 312 | { PCI_VDEVICE(INTEL, 0x1e4a), TCO_PPT}, |
| 313 | { PCI_VDEVICE(INTEL, 0x1e4b), TCO_PPT}, |
| 314 | { PCI_VDEVICE(INTEL, 0x1e4c), TCO_PPT}, |
| 315 | { PCI_VDEVICE(INTEL, 0x1e4d), TCO_PPT}, |
| 316 | { PCI_VDEVICE(INTEL, 0x1e4e), TCO_PPT}, |
| 317 | { PCI_VDEVICE(INTEL, 0x1e4f), TCO_PPT}, |
| 318 | { PCI_VDEVICE(INTEL, 0x1e50), TCO_PPT}, |
| 319 | { PCI_VDEVICE(INTEL, 0x1e51), TCO_PPT}, |
| 320 | { PCI_VDEVICE(INTEL, 0x1e52), TCO_PPT}, |
| 321 | { PCI_VDEVICE(INTEL, 0x1e53), TCO_PPT}, |
| 322 | { PCI_VDEVICE(INTEL, 0x1e54), TCO_PPT}, |
| 323 | { PCI_VDEVICE(INTEL, 0x1e55), TCO_PPT}, |
| 324 | { PCI_VDEVICE(INTEL, 0x1e56), TCO_PPT}, |
| 325 | { PCI_VDEVICE(INTEL, 0x1e57), TCO_PPT}, |
| 326 | { PCI_VDEVICE(INTEL, 0x1e58), TCO_PPT}, |
| 327 | { PCI_VDEVICE(INTEL, 0x1e59), TCO_PPT}, |
| 328 | { PCI_VDEVICE(INTEL, 0x1e5a), TCO_PPT}, |
| 329 | { PCI_VDEVICE(INTEL, 0x1e5b), TCO_PPT}, |
| 330 | { PCI_VDEVICE(INTEL, 0x1e5c), TCO_PPT}, |
| 331 | { PCI_VDEVICE(INTEL, 0x1e5d), TCO_PPT}, |
| 332 | { PCI_VDEVICE(INTEL, 0x1e5e), TCO_PPT}, |
| 333 | { PCI_VDEVICE(INTEL, 0x1e5f), TCO_PPT}, |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 334 | { 0, }, /* End of list */ |
| 335 | }; |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 336 | MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 337 | |
| 338 | /* Address definitions for the TCO */ |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 339 | /* TCO base address */ |
Wim Van Sebroeck | 0a7e6582 | 2009-04-14 20:20:07 +0000 | [diff] [blame] | 340 | #define TCOBASE (iTCO_wdt_private.ACPIBASE + 0x60) |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 341 | /* SMI Control and Enable Register */ |
Wim Van Sebroeck | 0a7e6582 | 2009-04-14 20:20:07 +0000 | [diff] [blame] | 342 | #define SMI_EN (iTCO_wdt_private.ACPIBASE + 0x30) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 343 | |
Wim Van Sebroeck | 0a7e6582 | 2009-04-14 20:20:07 +0000 | [diff] [blame] | 344 | #define TCO_RLD (TCOBASE + 0x00) /* TCO Timer Reload and Curr. Value */ |
| 345 | #define TCOv1_TMR (TCOBASE + 0x01) /* TCOv1 Timer Initial Value */ |
| 346 | #define TCO_DAT_IN (TCOBASE + 0x02) /* TCO Data In Register */ |
| 347 | #define TCO_DAT_OUT (TCOBASE + 0x03) /* TCO Data Out Register */ |
| 348 | #define TCO1_STS (TCOBASE + 0x04) /* TCO1 Status Register */ |
| 349 | #define TCO2_STS (TCOBASE + 0x06) /* TCO2 Status Register */ |
| 350 | #define TCO1_CNT (TCOBASE + 0x08) /* TCO1 Control Register */ |
| 351 | #define TCO2_CNT (TCOBASE + 0x0a) /* TCO2 Control Register */ |
| 352 | #define TCOv2_TMR (TCOBASE + 0x12) /* TCOv2 Timer Initial Value */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 353 | |
| 354 | /* internal variables */ |
| 355 | static unsigned long is_active; |
| 356 | static char expect_release; |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 357 | static struct { /* this is private data for the iTCO_wdt device */ |
| 358 | /* TCO version/generation */ |
| 359 | unsigned int iTCO_version; |
Prarit Bhargava | 641912f | 2010-08-06 11:41:24 -0400 | [diff] [blame] | 360 | /* The device's ACPIBASE address (TCOBASE = ACPIBASE+0x60) */ |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 361 | unsigned long ACPIBASE; |
| 362 | /* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2)*/ |
| 363 | unsigned long __iomem *gcs; |
| 364 | /* the lock for io operations */ |
| 365 | spinlock_t io_lock; |
| 366 | /* the PCI-device */ |
| 367 | struct pci_dev *pdev; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 368 | } iTCO_wdt_private; |
| 369 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 370 | /* the watchdog platform device */ |
| 371 | static struct platform_device *iTCO_wdt_platform_device; |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 372 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 373 | /* module parameters */ |
| 374 | #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */ |
| 375 | static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */ |
| 376 | module_param(heartbeat, int, 0); |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 377 | MODULE_PARM_DESC(heartbeat, "Watchdog timeout in seconds. " |
| 378 | "5..76 (TCO v1) or 3..614 (TCO v2), default=" |
Wim Van Sebroeck | 143a2e5 | 2009-03-18 08:35:09 +0000 | [diff] [blame] | 379 | __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 380 | |
| 381 | static int nowayout = WATCHDOG_NOWAYOUT; |
| 382 | module_param(nowayout, int, 0); |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 383 | MODULE_PARM_DESC(nowayout, |
| 384 | "Watchdog cannot be stopped once started (default=" |
| 385 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 386 | |
Wim Van Sebroeck | deb9197 | 2011-10-19 23:59:26 +0200 | [diff] [blame] | 387 | static int turn_SMI_watchdog_clear_off = 0; |
| 388 | module_param(turn_SMI_watchdog_clear_off, int, 0); |
| 389 | MODULE_PARM_DESC(turn_SMI_watchdog_clear_off, |
| 390 | "Turn off SMI clearing watchdog (default=0)"); |
| 391 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 392 | /* |
| 393 | * Some TCO specific functions |
| 394 | */ |
| 395 | |
| 396 | static inline unsigned int seconds_to_ticks(int seconds) |
| 397 | { |
| 398 | /* the internal timer is stored as ticks which decrement |
| 399 | * every 0.6 seconds */ |
| 400 | return (seconds * 10) / 6; |
| 401 | } |
| 402 | |
| 403 | static void iTCO_wdt_set_NO_REBOOT_bit(void) |
| 404 | { |
| 405 | u32 val32; |
| 406 | |
| 407 | /* Set the NO_REBOOT bit: this disables reboots */ |
| 408 | if (iTCO_wdt_private.iTCO_version == 2) { |
| 409 | val32 = readl(iTCO_wdt_private.gcs); |
| 410 | val32 |= 0x00000020; |
| 411 | writel(val32, iTCO_wdt_private.gcs); |
| 412 | } else if (iTCO_wdt_private.iTCO_version == 1) { |
| 413 | pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32); |
| 414 | val32 |= 0x00000002; |
| 415 | pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32); |
| 416 | } |
| 417 | } |
| 418 | |
| 419 | static int iTCO_wdt_unset_NO_REBOOT_bit(void) |
| 420 | { |
| 421 | int ret = 0; |
| 422 | u32 val32; |
| 423 | |
| 424 | /* Unset the NO_REBOOT bit: this enables reboots */ |
| 425 | if (iTCO_wdt_private.iTCO_version == 2) { |
| 426 | val32 = readl(iTCO_wdt_private.gcs); |
| 427 | val32 &= 0xffffffdf; |
| 428 | writel(val32, iTCO_wdt_private.gcs); |
| 429 | |
| 430 | val32 = readl(iTCO_wdt_private.gcs); |
| 431 | if (val32 & 0x00000020) |
| 432 | ret = -EIO; |
| 433 | } else if (iTCO_wdt_private.iTCO_version == 1) { |
| 434 | pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32); |
| 435 | val32 &= 0xfffffffd; |
| 436 | pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32); |
| 437 | |
| 438 | pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32); |
| 439 | if (val32 & 0x00000002) |
| 440 | ret = -EIO; |
| 441 | } |
| 442 | |
| 443 | return ret; /* returns: 0 = OK, -EIO = Error */ |
| 444 | } |
| 445 | |
| 446 | static int iTCO_wdt_start(void) |
| 447 | { |
| 448 | unsigned int val; |
| 449 | |
| 450 | spin_lock(&iTCO_wdt_private.io_lock); |
| 451 | |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 452 | iTCO_vendor_pre_start(iTCO_wdt_private.ACPIBASE, heartbeat); |
| 453 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 454 | /* disable chipset's NO_REBOOT bit */ |
| 455 | if (iTCO_wdt_unset_NO_REBOOT_bit()) { |
Roel Kluin | 2ba7d7b | 2007-10-23 03:08:27 +0200 | [diff] [blame] | 456 | spin_unlock(&iTCO_wdt_private.io_lock); |
Wim Van Sebroeck | 143a2e5 | 2009-03-18 08:35:09 +0000 | [diff] [blame] | 457 | printk(KERN_ERR PFX "failed to reset NO_REBOOT flag, " |
Prarit Bhargava | 641912f | 2010-08-06 11:41:24 -0400 | [diff] [blame] | 458 | "reboot disabled by hardware/BIOS\n"); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 459 | return -EIO; |
| 460 | } |
| 461 | |
Wim Van Sebroeck | 7cd5b08 | 2008-11-19 19:39:58 +0000 | [diff] [blame] | 462 | /* Force the timer to its reload value by writing to the TCO_RLD |
| 463 | register */ |
| 464 | if (iTCO_wdt_private.iTCO_version == 2) |
| 465 | outw(0x01, TCO_RLD); |
| 466 | else if (iTCO_wdt_private.iTCO_version == 1) |
| 467 | outb(0x01, TCO_RLD); |
| 468 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 469 | /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */ |
| 470 | val = inw(TCO1_CNT); |
| 471 | val &= 0xf7ff; |
| 472 | outw(val, TCO1_CNT); |
| 473 | val = inw(TCO1_CNT); |
| 474 | spin_unlock(&iTCO_wdt_private.io_lock); |
| 475 | |
| 476 | if (val & 0x0800) |
| 477 | return -1; |
| 478 | return 0; |
| 479 | } |
| 480 | |
| 481 | static int iTCO_wdt_stop(void) |
| 482 | { |
| 483 | unsigned int val; |
| 484 | |
| 485 | spin_lock(&iTCO_wdt_private.io_lock); |
| 486 | |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 487 | iTCO_vendor_pre_stop(iTCO_wdt_private.ACPIBASE); |
| 488 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 489 | /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */ |
| 490 | val = inw(TCO1_CNT); |
| 491 | val |= 0x0800; |
| 492 | outw(val, TCO1_CNT); |
| 493 | val = inw(TCO1_CNT); |
| 494 | |
| 495 | /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ |
| 496 | iTCO_wdt_set_NO_REBOOT_bit(); |
| 497 | |
| 498 | spin_unlock(&iTCO_wdt_private.io_lock); |
| 499 | |
| 500 | if ((val & 0x0800) == 0) |
| 501 | return -1; |
| 502 | return 0; |
| 503 | } |
| 504 | |
| 505 | static int iTCO_wdt_keepalive(void) |
| 506 | { |
| 507 | spin_lock(&iTCO_wdt_private.io_lock); |
| 508 | |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 509 | iTCO_vendor_pre_keepalive(iTCO_wdt_private.ACPIBASE, heartbeat); |
| 510 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 511 | /* Reload the timer by writing to the TCO Timer Counter register */ |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 512 | if (iTCO_wdt_private.iTCO_version == 2) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 513 | outw(0x01, TCO_RLD); |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 514 | else if (iTCO_wdt_private.iTCO_version == 1) { |
| 515 | /* Reset the timeout status bit so that the timer |
| 516 | * needs to count down twice again before rebooting */ |
| 517 | outw(0x0008, TCO1_STS); /* write 1 to clear bit */ |
| 518 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 519 | outb(0x01, TCO_RLD); |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 520 | } |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 521 | |
| 522 | spin_unlock(&iTCO_wdt_private.io_lock); |
| 523 | return 0; |
| 524 | } |
| 525 | |
| 526 | static int iTCO_wdt_set_heartbeat(int t) |
| 527 | { |
| 528 | unsigned int val16; |
| 529 | unsigned char val8; |
| 530 | unsigned int tmrval; |
| 531 | |
| 532 | tmrval = seconds_to_ticks(t); |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 533 | |
| 534 | /* For TCO v1 the timer counts down twice before rebooting */ |
| 535 | if (iTCO_wdt_private.iTCO_version == 1) |
| 536 | tmrval /= 2; |
| 537 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 538 | /* from the specs: */ |
| 539 | /* "Values of 0h-3h are ignored and should not be attempted" */ |
| 540 | if (tmrval < 0x04) |
| 541 | return -EINVAL; |
| 542 | if (((iTCO_wdt_private.iTCO_version == 2) && (tmrval > 0x3ff)) || |
| 543 | ((iTCO_wdt_private.iTCO_version == 1) && (tmrval > 0x03f))) |
| 544 | return -EINVAL; |
| 545 | |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 546 | iTCO_vendor_pre_set_heartbeat(tmrval); |
| 547 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 548 | /* Write new heartbeat to watchdog */ |
| 549 | if (iTCO_wdt_private.iTCO_version == 2) { |
| 550 | spin_lock(&iTCO_wdt_private.io_lock); |
| 551 | val16 = inw(TCOv2_TMR); |
| 552 | val16 &= 0xfc00; |
| 553 | val16 |= tmrval; |
| 554 | outw(val16, TCOv2_TMR); |
| 555 | val16 = inw(TCOv2_TMR); |
| 556 | spin_unlock(&iTCO_wdt_private.io_lock); |
| 557 | |
| 558 | if ((val16 & 0x3ff) != tmrval) |
| 559 | return -EINVAL; |
| 560 | } else if (iTCO_wdt_private.iTCO_version == 1) { |
| 561 | spin_lock(&iTCO_wdt_private.io_lock); |
| 562 | val8 = inb(TCOv1_TMR); |
| 563 | val8 &= 0xc0; |
| 564 | val8 |= (tmrval & 0xff); |
| 565 | outb(val8, TCOv1_TMR); |
| 566 | val8 = inb(TCOv1_TMR); |
| 567 | spin_unlock(&iTCO_wdt_private.io_lock); |
| 568 | |
| 569 | if ((val8 & 0x3f) != tmrval) |
| 570 | return -EINVAL; |
| 571 | } |
| 572 | |
| 573 | heartbeat = t; |
| 574 | return 0; |
| 575 | } |
| 576 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 577 | static int iTCO_wdt_get_timeleft(int *time_left) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 578 | { |
| 579 | unsigned int val16; |
| 580 | unsigned char val8; |
| 581 | |
| 582 | /* read the TCO Timer */ |
| 583 | if (iTCO_wdt_private.iTCO_version == 2) { |
| 584 | spin_lock(&iTCO_wdt_private.io_lock); |
| 585 | val16 = inw(TCO_RLD); |
| 586 | val16 &= 0x3ff; |
| 587 | spin_unlock(&iTCO_wdt_private.io_lock); |
| 588 | |
| 589 | *time_left = (val16 * 6) / 10; |
| 590 | } else if (iTCO_wdt_private.iTCO_version == 1) { |
| 591 | spin_lock(&iTCO_wdt_private.io_lock); |
| 592 | val8 = inb(TCO_RLD); |
| 593 | val8 &= 0x3f; |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 594 | if (!(inw(TCO1_STS) & 0x0008)) |
| 595 | val8 += (inb(TCOv1_TMR) & 0x3f); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 596 | spin_unlock(&iTCO_wdt_private.io_lock); |
| 597 | |
| 598 | *time_left = (val8 * 6) / 10; |
Jeff Garzik | 8006036 | 2006-10-10 03:40:44 -0400 | [diff] [blame] | 599 | } else |
| 600 | return -EINVAL; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 601 | return 0; |
| 602 | } |
| 603 | |
| 604 | /* |
| 605 | * /dev/watchdog handling |
| 606 | */ |
| 607 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 608 | static int iTCO_wdt_open(struct inode *inode, struct file *file) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 609 | { |
| 610 | /* /dev/watchdog can only be opened once */ |
| 611 | if (test_and_set_bit(0, &is_active)) |
| 612 | return -EBUSY; |
| 613 | |
| 614 | /* |
| 615 | * Reload and activate timer |
| 616 | */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 617 | iTCO_wdt_start(); |
| 618 | return nonseekable_open(inode, file); |
| 619 | } |
| 620 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 621 | static int iTCO_wdt_release(struct inode *inode, struct file *file) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 622 | { |
| 623 | /* |
| 624 | * Shut off the timer. |
| 625 | */ |
| 626 | if (expect_release == 42) { |
| 627 | iTCO_wdt_stop(); |
| 628 | } else { |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 629 | printk(KERN_CRIT PFX |
| 630 | "Unexpected close, not stopping watchdog!\n"); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 631 | iTCO_wdt_keepalive(); |
| 632 | } |
| 633 | clear_bit(0, &is_active); |
| 634 | expect_release = 0; |
| 635 | return 0; |
| 636 | } |
| 637 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 638 | static ssize_t iTCO_wdt_write(struct file *file, const char __user *data, |
| 639 | size_t len, loff_t *ppos) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 640 | { |
| 641 | /* See if we got the magic character 'V' and reload the timer */ |
| 642 | if (len) { |
| 643 | if (!nowayout) { |
| 644 | size_t i; |
| 645 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 646 | /* note: just in case someone wrote the magic |
| 647 | character five months ago... */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 648 | expect_release = 0; |
| 649 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 650 | /* scan to see whether or not we got the |
| 651 | magic character */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 652 | for (i = 0; i != len; i++) { |
| 653 | char c; |
Wim Van Sebroeck | 7944d3a | 2008-08-06 20:19:41 +0000 | [diff] [blame] | 654 | if (get_user(c, data + i)) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 655 | return -EFAULT; |
| 656 | if (c == 'V') |
| 657 | expect_release = 42; |
| 658 | } |
| 659 | } |
| 660 | |
| 661 | /* someone wrote to us, we should reload the timer */ |
| 662 | iTCO_wdt_keepalive(); |
| 663 | } |
| 664 | return len; |
| 665 | } |
| 666 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 667 | static long iTCO_wdt_ioctl(struct file *file, unsigned int cmd, |
| 668 | unsigned long arg) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 669 | { |
| 670 | int new_options, retval = -EINVAL; |
| 671 | int new_heartbeat; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 672 | void __user *argp = (void __user *)arg; |
| 673 | int __user *p = argp; |
Wim Van Sebroeck | 42747d7 | 2009-12-26 18:55:22 +0000 | [diff] [blame] | 674 | static const struct watchdog_info ident = { |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 675 | .options = WDIOF_SETTIMEOUT | |
| 676 | WDIOF_KEEPALIVEPING | |
| 677 | WDIOF_MAGICCLOSE, |
| 678 | .firmware_version = 0, |
| 679 | .identity = DRV_NAME, |
| 680 | }; |
| 681 | |
| 682 | switch (cmd) { |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 683 | case WDIOC_GETSUPPORT: |
| 684 | return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; |
| 685 | case WDIOC_GETSTATUS: |
| 686 | case WDIOC_GETBOOTSTATUS: |
| 687 | return put_user(0, p); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 688 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 689 | case WDIOC_SETOPTIONS: |
| 690 | { |
| 691 | if (get_user(new_options, p)) |
| 692 | return -EFAULT; |
| 693 | |
| 694 | if (new_options & WDIOS_DISABLECARD) { |
| 695 | iTCO_wdt_stop(); |
| 696 | retval = 0; |
| 697 | } |
| 698 | if (new_options & WDIOS_ENABLECARD) { |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 699 | iTCO_wdt_keepalive(); |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 700 | iTCO_wdt_start(); |
| 701 | retval = 0; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 702 | } |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 703 | return retval; |
| 704 | } |
Wim Van Sebroeck | 0c06090 | 2008-07-18 11:41:17 +0000 | [diff] [blame] | 705 | case WDIOC_KEEPALIVE: |
| 706 | iTCO_wdt_keepalive(); |
| 707 | return 0; |
| 708 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 709 | case WDIOC_SETTIMEOUT: |
| 710 | { |
| 711 | if (get_user(new_heartbeat, p)) |
| 712 | return -EFAULT; |
| 713 | if (iTCO_wdt_set_heartbeat(new_heartbeat)) |
| 714 | return -EINVAL; |
| 715 | iTCO_wdt_keepalive(); |
| 716 | /* Fall */ |
| 717 | } |
| 718 | case WDIOC_GETTIMEOUT: |
| 719 | return put_user(heartbeat, p); |
| 720 | case WDIOC_GETTIMELEFT: |
| 721 | { |
| 722 | int time_left; |
| 723 | if (iTCO_wdt_get_timeleft(&time_left)) |
| 724 | return -EINVAL; |
| 725 | return put_user(time_left, p); |
| 726 | } |
| 727 | default: |
| 728 | return -ENOTTY; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 729 | } |
| 730 | } |
| 731 | |
| 732 | /* |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 733 | * Kernel Interfaces |
| 734 | */ |
| 735 | |
Arjan van de Ven | 2b8693c | 2007-02-12 00:55:32 -0800 | [diff] [blame] | 736 | static const struct file_operations iTCO_wdt_fops = { |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 737 | .owner = THIS_MODULE, |
| 738 | .llseek = no_llseek, |
| 739 | .write = iTCO_wdt_write, |
| 740 | .unlocked_ioctl = iTCO_wdt_ioctl, |
| 741 | .open = iTCO_wdt_open, |
| 742 | .release = iTCO_wdt_release, |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 743 | }; |
| 744 | |
| 745 | static struct miscdevice iTCO_wdt_miscdev = { |
| 746 | .minor = WATCHDOG_MINOR, |
| 747 | .name = "watchdog", |
| 748 | .fops = &iTCO_wdt_fops, |
| 749 | }; |
| 750 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 751 | /* |
| 752 | * Init & exit routines |
| 753 | */ |
| 754 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 755 | static int __devinit iTCO_wdt_init(struct pci_dev *pdev, |
| 756 | const struct pci_device_id *ent, struct platform_device *dev) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 757 | { |
| 758 | int ret; |
| 759 | u32 base_address; |
| 760 | unsigned long RCBA; |
Wim Van Sebroeck | 12d60e2 | 2009-01-28 20:51:04 +0000 | [diff] [blame] | 761 | unsigned long val32; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 762 | |
| 763 | /* |
| 764 | * Find the ACPI/PM base I/O address which is the base |
| 765 | * for the TCO registers (TCOBASE=ACPIBASE + 0x60) |
| 766 | * ACPIBASE is bits [15:7] from 0x40-0x43 |
| 767 | */ |
| 768 | pci_read_config_dword(pdev, 0x40, &base_address); |
Wim Van Sebroeck | 0d4804b | 2007-05-11 18:59:24 +0000 | [diff] [blame] | 769 | base_address &= 0x0000ff80; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 770 | if (base_address == 0x00000000) { |
| 771 | /* Something's wrong here, ACPIBASE has to be set */ |
Prarit Bhargava | 641912f | 2010-08-06 11:41:24 -0400 | [diff] [blame] | 772 | printk(KERN_ERR PFX "failed to get TCOBASE address, " |
| 773 | "device disabled by hardware/BIOS\n"); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 774 | return -ENODEV; |
| 775 | } |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 776 | iTCO_wdt_private.iTCO_version = |
| 777 | iTCO_chipset_info[ent->driver_data].iTCO_version; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 778 | iTCO_wdt_private.ACPIBASE = base_address; |
| 779 | iTCO_wdt_private.pdev = pdev; |
| 780 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 781 | /* Get the Memory-Mapped GCS register, we need it for the |
| 782 | NO_REBOOT flag (TCO v2). To get access to it you have to |
| 783 | read RCBA from PCI Config space 0xf0 and use it as base. |
| 784 | GCS = RCBA + ICH6_GCS(0x3410). */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 785 | if (iTCO_wdt_private.iTCO_version == 2) { |
| 786 | pci_read_config_dword(pdev, 0xf0, &base_address); |
Denis V. Lunev | de8cd9a | 2009-06-05 15:13:08 +0400 | [diff] [blame] | 787 | if ((base_address & 1) == 0) { |
Prarit Bhargava | 641912f | 2010-08-06 11:41:24 -0400 | [diff] [blame] | 788 | printk(KERN_ERR PFX "RCBA is disabled by hardware" |
| 789 | "/BIOS, device disabled\n"); |
Denis V. Lunev | de8cd9a | 2009-06-05 15:13:08 +0400 | [diff] [blame] | 790 | ret = -ENODEV; |
| 791 | goto out; |
| 792 | } |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 793 | RCBA = base_address & 0xffffc000; |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 794 | iTCO_wdt_private.gcs = ioremap((RCBA + 0x3410), 4); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 795 | } |
| 796 | |
| 797 | /* Check chipset's NO_REBOOT bit */ |
Wim Van Sebroeck | e033351 | 2006-11-12 18:05:09 +0100 | [diff] [blame] | 798 | if (iTCO_wdt_unset_NO_REBOOT_bit() && iTCO_vendor_check_noreboot_on()) { |
Naga Chumbalkar | ec26985 | 2010-02-09 00:42:02 +0100 | [diff] [blame] | 799 | printk(KERN_INFO PFX "unable to reset NO_REBOOT flag, " |
Prarit Bhargava | 641912f | 2010-08-06 11:41:24 -0400 | [diff] [blame] | 800 | "device disabled by hardware/BIOS\n"); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 801 | ret = -ENODEV; /* Cannot reset NO_REBOOT bit */ |
Denis V. Lunev | de8cd9a | 2009-06-05 15:13:08 +0400 | [diff] [blame] | 802 | goto out_unmap; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 803 | } |
| 804 | |
| 805 | /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ |
| 806 | iTCO_wdt_set_NO_REBOOT_bit(); |
| 807 | |
Wim Van Sebroeck | 7cd5b08 | 2008-11-19 19:39:58 +0000 | [diff] [blame] | 808 | /* The TCO logic uses the TCO_EN bit in the SMI_EN register */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 809 | if (!request_region(SMI_EN, 4, "iTCO_wdt")) { |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 810 | printk(KERN_ERR PFX |
Prarit Bhargava | 641912f | 2010-08-06 11:41:24 -0400 | [diff] [blame] | 811 | "I/O address 0x%04lx already in use, " |
| 812 | "device disabled\n", SMI_EN); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 813 | ret = -EIO; |
Denis V. Lunev | de8cd9a | 2009-06-05 15:13:08 +0400 | [diff] [blame] | 814 | goto out_unmap; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 815 | } |
Wim Van Sebroeck | deb9197 | 2011-10-19 23:59:26 +0200 | [diff] [blame] | 816 | if (turn_SMI_watchdog_clear_off) { |
| 817 | /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ |
| 818 | val32 = inl(SMI_EN); |
| 819 | val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ |
| 820 | outl(val32, SMI_EN); |
| 821 | } |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 822 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 823 | /* The TCO I/O registers reside in a 32-byte range pointed to |
| 824 | by the TCOBASE value */ |
| 825 | if (!request_region(TCOBASE, 0x20, "iTCO_wdt")) { |
Prarit Bhargava | 641912f | 2010-08-06 11:41:24 -0400 | [diff] [blame] | 826 | printk(KERN_ERR PFX "I/O address 0x%04lx already in use " |
| 827 | "device disabled\n", TCOBASE); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 828 | ret = -EIO; |
Wim Van Sebroeck | 7cd5b08 | 2008-11-19 19:39:58 +0000 | [diff] [blame] | 829 | goto unreg_smi_en; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 830 | } |
| 831 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 832 | printk(KERN_INFO PFX |
| 833 | "Found a %s TCO device (Version=%d, TCOBASE=0x%04lx)\n", |
| 834 | iTCO_chipset_info[ent->driver_data].name, |
| 835 | iTCO_chipset_info[ent->driver_data].iTCO_version, |
| 836 | TCOBASE); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 837 | |
| 838 | /* Clear out the (probably old) status */ |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 839 | outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */ |
| 840 | outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */ |
| 841 | outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 842 | |
| 843 | /* Make sure the watchdog is not running */ |
| 844 | iTCO_wdt_stop(); |
| 845 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 846 | /* Check that the heartbeat value is within it's range; |
| 847 | if not reset to the default */ |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 848 | if (iTCO_wdt_set_heartbeat(heartbeat)) { |
| 849 | iTCO_wdt_set_heartbeat(WATCHDOG_HEARTBEAT); |
Wim Van Sebroeck | 143a2e5 | 2009-03-18 08:35:09 +0000 | [diff] [blame] | 850 | printk(KERN_INFO PFX |
Pádraig Brady | 7e6811d | 2010-04-19 13:38:25 +0100 | [diff] [blame] | 851 | "timeout value out of range, using %d\n", heartbeat); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 852 | } |
| 853 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 854 | ret = misc_register(&iTCO_wdt_miscdev); |
| 855 | if (ret != 0) { |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 856 | printk(KERN_ERR PFX |
| 857 | "cannot register miscdev on minor=%d (err=%d)\n", |
| 858 | WATCHDOG_MINOR, ret); |
Wim Van Sebroeck | 1bef84b | 2006-08-05 20:59:01 +0200 | [diff] [blame] | 859 | goto unreg_region; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 860 | } |
| 861 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 862 | printk(KERN_INFO PFX "initialized. heartbeat=%d sec (nowayout=%d)\n", |
| 863 | heartbeat, nowayout); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 864 | |
| 865 | return 0; |
| 866 | |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 867 | unreg_region: |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 868 | release_region(TCOBASE, 0x20); |
Wim Van Sebroeck | 7cd5b08 | 2008-11-19 19:39:58 +0000 | [diff] [blame] | 869 | unreg_smi_en: |
| 870 | release_region(SMI_EN, 4); |
Denis V. Lunev | de8cd9a | 2009-06-05 15:13:08 +0400 | [diff] [blame] | 871 | out_unmap: |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 872 | if (iTCO_wdt_private.iTCO_version == 2) |
| 873 | iounmap(iTCO_wdt_private.gcs); |
Denis V. Lunev | de8cd9a | 2009-06-05 15:13:08 +0400 | [diff] [blame] | 874 | out: |
Wim Van Sebroeck | 1bef84b | 2006-08-05 20:59:01 +0200 | [diff] [blame] | 875 | iTCO_wdt_private.ACPIBASE = 0; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 876 | return ret; |
| 877 | } |
| 878 | |
Wim Van Sebroeck | 08113e3 | 2007-08-31 08:15:34 +0000 | [diff] [blame] | 879 | static void __devexit iTCO_wdt_cleanup(void) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 880 | { |
| 881 | /* Stop the timer before we leave */ |
| 882 | if (!nowayout) |
| 883 | iTCO_wdt_stop(); |
| 884 | |
| 885 | /* Deregister */ |
| 886 | misc_deregister(&iTCO_wdt_miscdev); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 887 | release_region(TCOBASE, 0x20); |
Wim Van Sebroeck | 7cd5b08 | 2008-11-19 19:39:58 +0000 | [diff] [blame] | 888 | release_region(SMI_EN, 4); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 889 | if (iTCO_wdt_private.iTCO_version == 2) |
| 890 | iounmap(iTCO_wdt_private.gcs); |
Wim Van Sebroeck | 4802c65 | 2006-07-19 22:39:13 +0200 | [diff] [blame] | 891 | pci_dev_put(iTCO_wdt_private.pdev); |
Wim Van Sebroeck | 1bef84b | 2006-08-05 20:59:01 +0200 | [diff] [blame] | 892 | iTCO_wdt_private.ACPIBASE = 0; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 893 | } |
| 894 | |
Wim Van Sebroeck | 08113e3 | 2007-08-31 08:15:34 +0000 | [diff] [blame] | 895 | static int __devinit iTCO_wdt_probe(struct platform_device *dev) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 896 | { |
Naga Chumbalkar | ec26985 | 2010-02-09 00:42:02 +0100 | [diff] [blame] | 897 | int ret = -ENODEV; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 898 | int found = 0; |
| 899 | struct pci_dev *pdev = NULL; |
| 900 | const struct pci_device_id *ent; |
| 901 | |
| 902 | spin_lock_init(&iTCO_wdt_private.io_lock); |
| 903 | |
| 904 | for_each_pci_dev(pdev) { |
| 905 | ent = pci_match_id(iTCO_wdt_pci_tbl, pdev); |
| 906 | if (ent) { |
Naga Chumbalkar | ec26985 | 2010-02-09 00:42:02 +0100 | [diff] [blame] | 907 | found++; |
| 908 | ret = iTCO_wdt_init(pdev, ent, dev); |
| 909 | if (!ret) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 910 | break; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 911 | } |
| 912 | } |
| 913 | |
Naga Chumbalkar | ec26985 | 2010-02-09 00:42:02 +0100 | [diff] [blame] | 914 | if (!found) |
Prarit Bhargava | 641912f | 2010-08-06 11:41:24 -0400 | [diff] [blame] | 915 | printk(KERN_INFO PFX "No device detected.\n"); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 916 | |
Naga Chumbalkar | ec26985 | 2010-02-09 00:42:02 +0100 | [diff] [blame] | 917 | return ret; |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 918 | } |
| 919 | |
Wim Van Sebroeck | 08113e3 | 2007-08-31 08:15:34 +0000 | [diff] [blame] | 920 | static int __devexit iTCO_wdt_remove(struct platform_device *dev) |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 921 | { |
| 922 | if (iTCO_wdt_private.ACPIBASE) |
| 923 | iTCO_wdt_cleanup(); |
| 924 | |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 925 | return 0; |
| 926 | } |
| 927 | |
| 928 | static void iTCO_wdt_shutdown(struct platform_device *dev) |
| 929 | { |
| 930 | iTCO_wdt_stop(); |
| 931 | } |
| 932 | |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 933 | static struct platform_driver iTCO_wdt_driver = { |
| 934 | .probe = iTCO_wdt_probe, |
Wim Van Sebroeck | 08113e3 | 2007-08-31 08:15:34 +0000 | [diff] [blame] | 935 | .remove = __devexit_p(iTCO_wdt_remove), |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 936 | .shutdown = iTCO_wdt_shutdown, |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 937 | .driver = { |
| 938 | .owner = THIS_MODULE, |
| 939 | .name = DRV_NAME, |
| 940 | }, |
| 941 | }; |
| 942 | |
| 943 | static int __init iTCO_wdt_init_module(void) |
| 944 | { |
| 945 | int err; |
| 946 | |
Wim Van Sebroeck | 7cd5b08 | 2008-11-19 19:39:58 +0000 | [diff] [blame] | 947 | printk(KERN_INFO PFX "Intel TCO WatchDog Timer Driver v%s\n", |
| 948 | DRV_VERSION); |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 949 | |
| 950 | err = platform_driver_register(&iTCO_wdt_driver); |
| 951 | if (err) |
| 952 | return err; |
| 953 | |
Alan Cox | 0e6fa3f | 2008-05-19 14:06:25 +0100 | [diff] [blame] | 954 | iTCO_wdt_platform_device = platform_device_register_simple(DRV_NAME, |
| 955 | -1, NULL, 0); |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 956 | if (IS_ERR(iTCO_wdt_platform_device)) { |
| 957 | err = PTR_ERR(iTCO_wdt_platform_device); |
| 958 | goto unreg_platform_driver; |
| 959 | } |
| 960 | |
| 961 | return 0; |
| 962 | |
| 963 | unreg_platform_driver: |
| 964 | platform_driver_unregister(&iTCO_wdt_driver); |
| 965 | return err; |
| 966 | } |
| 967 | |
| 968 | static void __exit iTCO_wdt_cleanup_module(void) |
| 969 | { |
| 970 | platform_device_unregister(iTCO_wdt_platform_device); |
| 971 | platform_driver_unregister(&iTCO_wdt_driver); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 972 | printk(KERN_INFO PFX "Watchdog Module Unloaded.\n"); |
| 973 | } |
| 974 | |
| 975 | module_init(iTCO_wdt_init_module); |
| 976 | module_exit(iTCO_wdt_cleanup_module); |
| 977 | |
| 978 | MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>"); |
| 979 | MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver"); |
Wim Van Sebroeck | 3836cc0 | 2006-06-30 08:44:53 +0200 | [diff] [blame] | 980 | MODULE_VERSION(DRV_VERSION); |
Wim Van Sebroeck | 9e0ea34 | 2006-05-21 14:37:44 +0200 | [diff] [blame] | 981 | MODULE_LICENSE("GPL"); |
| 982 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |