blob: 1eb7a4ae0c9c0382ac64b44040f02e3accc4d005 [file] [log] [blame]
Eddie Dong97222cc2007-09-12 10:58:04 +03001
2/*
3 * Local APIC virtualization
4 *
5 * Copyright (C) 2006 Qumranet, Inc.
6 * Copyright (C) 2007 Novell
7 * Copyright (C) 2007 Intel
8 *
9 * Authors:
10 * Dor Laor <dor.laor@qumranet.com>
11 * Gregory Haskins <ghaskins@novell.com>
12 * Yaozu (Eddie) Dong <eddie.dong@intel.com>
13 *
14 * Based on Xen 3.1 code, Copyright (c) 2004, Intel Corporation.
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 */
19
Avi Kivityedf88412007-12-16 11:02:48 +020020#include <linux/kvm_host.h>
Eddie Dong97222cc2007-09-12 10:58:04 +030021#include <linux/kvm.h>
22#include <linux/mm.h>
23#include <linux/highmem.h>
24#include <linux/smp.h>
25#include <linux/hrtimer.h>
26#include <linux/io.h>
27#include <linux/module.h>
Roman Zippel6f6d6a12008-05-01 04:34:28 -070028#include <linux/math64.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Eddie Dong97222cc2007-09-12 10:58:04 +030030#include <asm/processor.h>
31#include <asm/msr.h>
32#include <asm/page.h>
33#include <asm/current.h>
34#include <asm/apicdef.h>
35#include <asm/atomic.h>
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -030036#include "kvm_cache_regs.h"
Eddie Dong97222cc2007-09-12 10:58:04 +030037#include "irq.h"
Marcelo Tosatti229456f2009-06-17 09:22:14 -030038#include "trace.h"
Gleb Natapovfc61b802009-07-05 17:39:35 +030039#include "x86.h"
Eddie Dong97222cc2007-09-12 10:58:04 +030040
Marcelo Tosattib682b812009-02-10 20:41:41 -020041#ifndef CONFIG_X86_64
42#define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
43#else
44#define mod_64(x, y) ((x) % (y))
45#endif
46
Eddie Dong97222cc2007-09-12 10:58:04 +030047#define PRId64 "d"
48#define PRIx64 "llx"
49#define PRIu64 "u"
50#define PRIo64 "o"
51
52#define APIC_BUS_CYCLE_NS 1
53
54/* #define apic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg) */
55#define apic_debug(fmt, arg...)
56
57#define APIC_LVT_NUM 6
58/* 14 is the version for Xeon and Pentium 8.4.8*/
59#define APIC_VERSION (0x14UL | ((APIC_LVT_NUM - 1) << 16))
60#define LAPIC_MMIO_LENGTH (1 << 12)
61/* followed define is not in apicdef.h */
62#define APIC_SHORT_MASK 0xc0000
63#define APIC_DEST_NOSHORT 0x0
64#define APIC_DEST_MASK 0x800
65#define MAX_APIC_VECTOR 256
66
67#define VEC_POS(v) ((v) & (32 - 1))
68#define REG_POS(v) (((v) >> 5) << 4)
Zhang Xiantaoad312c72007-12-13 23:50:52 +080069
Eddie Dong97222cc2007-09-12 10:58:04 +030070static inline u32 apic_get_reg(struct kvm_lapic *apic, int reg_off)
71{
72 return *((u32 *) (apic->regs + reg_off));
73}
74
75static inline void apic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val)
76{
77 *((u32 *) (apic->regs + reg_off)) = val;
78}
79
80static inline int apic_test_and_set_vector(int vec, void *bitmap)
81{
82 return test_and_set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
83}
84
85static inline int apic_test_and_clear_vector(int vec, void *bitmap)
86{
87 return test_and_clear_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
88}
89
90static inline void apic_set_vector(int vec, void *bitmap)
91{
92 set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
93}
94
95static inline void apic_clear_vector(int vec, void *bitmap)
96{
97 clear_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
98}
99
100static inline int apic_hw_enabled(struct kvm_lapic *apic)
101{
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800102 return (apic)->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE;
Eddie Dong97222cc2007-09-12 10:58:04 +0300103}
104
105static inline int apic_sw_enabled(struct kvm_lapic *apic)
106{
107 return apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_APIC_ENABLED;
108}
109
110static inline int apic_enabled(struct kvm_lapic *apic)
111{
112 return apic_sw_enabled(apic) && apic_hw_enabled(apic);
113}
114
115#define LVT_MASK \
116 (APIC_LVT_MASKED | APIC_SEND_PENDING | APIC_VECTOR_MASK)
117
118#define LINT_MASK \
119 (LVT_MASK | APIC_MODE_MASK | APIC_INPUT_POLARITY | \
120 APIC_LVT_REMOTE_IRR | APIC_LVT_LEVEL_TRIGGER)
121
122static inline int kvm_apic_id(struct kvm_lapic *apic)
123{
124 return (apic_get_reg(apic, APIC_ID) >> 24) & 0xff;
125}
126
127static inline int apic_lvt_enabled(struct kvm_lapic *apic, int lvt_type)
128{
129 return !(apic_get_reg(apic, lvt_type) & APIC_LVT_MASKED);
130}
131
132static inline int apic_lvt_vector(struct kvm_lapic *apic, int lvt_type)
133{
134 return apic_get_reg(apic, lvt_type) & APIC_VECTOR_MASK;
135}
136
137static inline int apic_lvtt_period(struct kvm_lapic *apic)
138{
139 return apic_get_reg(apic, APIC_LVTT) & APIC_LVT_TIMER_PERIODIC;
140}
141
Jan Kiszkacc6e4622008-10-20 10:20:03 +0200142static inline int apic_lvt_nmi_mode(u32 lvt_val)
143{
144 return (lvt_val & (APIC_MODE_MASK | APIC_LVT_MASKED)) == APIC_DM_NMI;
145}
146
Gleb Natapovfc61b802009-07-05 17:39:35 +0300147void kvm_apic_set_version(struct kvm_vcpu *vcpu)
148{
149 struct kvm_lapic *apic = vcpu->arch.apic;
150 struct kvm_cpuid_entry2 *feat;
151 u32 v = APIC_VERSION;
152
153 if (!irqchip_in_kernel(vcpu->kvm))
154 return;
155
156 feat = kvm_find_cpuid_entry(apic->vcpu, 0x1, 0);
157 if (feat && (feat->ecx & (1 << (X86_FEATURE_X2APIC & 31))))
158 v |= APIC_LVR_DIRECTED_EOI;
159 apic_set_reg(apic, APIC_LVR, v);
160}
161
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300162static inline int apic_x2apic_mode(struct kvm_lapic *apic)
163{
164 return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
165}
166
Eddie Dong97222cc2007-09-12 10:58:04 +0300167static unsigned int apic_lvt_mask[APIC_LVT_NUM] = {
168 LVT_MASK | APIC_LVT_TIMER_PERIODIC, /* LVTT */
169 LVT_MASK | APIC_MODE_MASK, /* LVTTHMR */
170 LVT_MASK | APIC_MODE_MASK, /* LVTPC */
171 LINT_MASK, LINT_MASK, /* LVT0-1 */
172 LVT_MASK /* LVTERR */
173};
174
175static int find_highest_vector(void *bitmap)
176{
177 u32 *word = bitmap;
178 int word_offset = MAX_APIC_VECTOR >> 5;
179
180 while ((word_offset != 0) && (word[(--word_offset) << 2] == 0))
181 continue;
182
183 if (likely(!word_offset && !word[0]))
184 return -1;
185 else
186 return fls(word[word_offset << 2]) - 1 + (word_offset << 5);
187}
188
189static inline int apic_test_and_set_irr(int vec, struct kvm_lapic *apic)
190{
Gleb Natapov33e4c682009-06-11 11:06:51 +0300191 apic->irr_pending = true;
Eddie Dong97222cc2007-09-12 10:58:04 +0300192 return apic_test_and_set_vector(vec, apic->regs + APIC_IRR);
193}
194
Gleb Natapov33e4c682009-06-11 11:06:51 +0300195static inline int apic_search_irr(struct kvm_lapic *apic)
Eddie Dong97222cc2007-09-12 10:58:04 +0300196{
Gleb Natapov33e4c682009-06-11 11:06:51 +0300197 return find_highest_vector(apic->regs + APIC_IRR);
Eddie Dong97222cc2007-09-12 10:58:04 +0300198}
199
200static inline int apic_find_highest_irr(struct kvm_lapic *apic)
201{
202 int result;
203
Gleb Natapov33e4c682009-06-11 11:06:51 +0300204 if (!apic->irr_pending)
205 return -1;
206
207 result = apic_search_irr(apic);
Eddie Dong97222cc2007-09-12 10:58:04 +0300208 ASSERT(result == -1 || result >= 16);
209
210 return result;
211}
212
Gleb Natapov33e4c682009-06-11 11:06:51 +0300213static inline void apic_clear_irr(int vec, struct kvm_lapic *apic)
214{
215 apic->irr_pending = false;
216 apic_clear_vector(vec, apic->regs + APIC_IRR);
217 if (apic_search_irr(apic) != -1)
218 apic->irr_pending = true;
219}
220
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800221int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu)
222{
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800223 struct kvm_lapic *apic = vcpu->arch.apic;
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800224 int highest_irr;
225
Gleb Natapov33e4c682009-06-11 11:06:51 +0300226 /* This may race with setting of irr in __apic_accept_irq() and
227 * value returned may be wrong, but kvm_vcpu_kick() in __apic_accept_irq
228 * will cause vmexit immediately and the value will be recalculated
229 * on the next vmentry.
230 */
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800231 if (!apic)
232 return 0;
233 highest_irr = apic_find_highest_irr(apic);
234
235 return highest_irr;
236}
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800237
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200238static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
239 int vector, int level, int trig_mode);
240
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200241int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq)
Eddie Dong97222cc2007-09-12 10:58:04 +0300242{
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800243 struct kvm_lapic *apic = vcpu->arch.apic;
Zhang Xiantao8be54532007-12-02 22:35:57 +0800244
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200245 return __apic_accept_irq(apic, irq->delivery_mode, irq->vector,
246 irq->level, irq->trig_mode);
Eddie Dong97222cc2007-09-12 10:58:04 +0300247}
248
249static inline int apic_find_highest_isr(struct kvm_lapic *apic)
250{
251 int result;
252
253 result = find_highest_vector(apic->regs + APIC_ISR);
254 ASSERT(result == -1 || result >= 16);
255
256 return result;
257}
258
259static void apic_update_ppr(struct kvm_lapic *apic)
260{
261 u32 tpr, isrv, ppr;
262 int isr;
263
264 tpr = apic_get_reg(apic, APIC_TASKPRI);
265 isr = apic_find_highest_isr(apic);
266 isrv = (isr != -1) ? isr : 0;
267
268 if ((tpr & 0xf0) >= (isrv & 0xf0))
269 ppr = tpr & 0xff;
270 else
271 ppr = isrv & 0xf0;
272
273 apic_debug("vlapic %p, ppr 0x%x, isr 0x%x, isrv 0x%x",
274 apic, ppr, isr, isrv);
275
276 apic_set_reg(apic, APIC_PROCPRI, ppr);
277}
278
279static void apic_set_tpr(struct kvm_lapic *apic, u32 tpr)
280{
281 apic_set_reg(apic, APIC_TASKPRI, tpr);
282 apic_update_ppr(apic);
283}
284
285int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest)
286{
Gleb Natapov343f94f2009-03-05 16:34:54 +0200287 return dest == 0xff || kvm_apic_id(apic) == dest;
Eddie Dong97222cc2007-09-12 10:58:04 +0300288}
289
290int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda)
291{
292 int result = 0;
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300293 u32 logical_id;
294
295 if (apic_x2apic_mode(apic)) {
296 logical_id = apic_get_reg(apic, APIC_LDR);
297 return logical_id & mda;
298 }
Eddie Dong97222cc2007-09-12 10:58:04 +0300299
300 logical_id = GET_APIC_LOGICAL_ID(apic_get_reg(apic, APIC_LDR));
301
302 switch (apic_get_reg(apic, APIC_DFR)) {
303 case APIC_DFR_FLAT:
304 if (logical_id & mda)
305 result = 1;
306 break;
307 case APIC_DFR_CLUSTER:
308 if (((logical_id >> 4) == (mda >> 0x4))
309 && (logical_id & mda & 0xf))
310 result = 1;
311 break;
312 default:
313 printk(KERN_WARNING "Bad DFR vcpu %d: %08x\n",
314 apic->vcpu->vcpu_id, apic_get_reg(apic, APIC_DFR));
315 break;
316 }
317
318 return result;
319}
320
Gleb Natapov343f94f2009-03-05 16:34:54 +0200321int kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
Eddie Dong97222cc2007-09-12 10:58:04 +0300322 int short_hand, int dest, int dest_mode)
323{
324 int result = 0;
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800325 struct kvm_lapic *target = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +0300326
327 apic_debug("target %p, source %p, dest 0x%x, "
Gleb Natapov343f94f2009-03-05 16:34:54 +0200328 "dest_mode 0x%x, short_hand 0x%x\n",
Eddie Dong97222cc2007-09-12 10:58:04 +0300329 target, source, dest, dest_mode, short_hand);
330
331 ASSERT(!target);
332 switch (short_hand) {
333 case APIC_DEST_NOSHORT:
Gleb Natapov343f94f2009-03-05 16:34:54 +0200334 if (dest_mode == 0)
Eddie Dong97222cc2007-09-12 10:58:04 +0300335 /* Physical mode. */
Gleb Natapov343f94f2009-03-05 16:34:54 +0200336 result = kvm_apic_match_physical_addr(target, dest);
337 else
Eddie Dong97222cc2007-09-12 10:58:04 +0300338 /* Logical mode. */
339 result = kvm_apic_match_logical_addr(target, dest);
340 break;
341 case APIC_DEST_SELF:
Gleb Natapov343f94f2009-03-05 16:34:54 +0200342 result = (target == source);
Eddie Dong97222cc2007-09-12 10:58:04 +0300343 break;
344 case APIC_DEST_ALLINC:
345 result = 1;
346 break;
347 case APIC_DEST_ALLBUT:
Gleb Natapov343f94f2009-03-05 16:34:54 +0200348 result = (target != source);
Eddie Dong97222cc2007-09-12 10:58:04 +0300349 break;
350 default:
351 printk(KERN_WARNING "Bad dest shorthand value %x\n",
352 short_hand);
353 break;
354 }
355
356 return result;
357}
358
359/*
360 * Add a pending IRQ into lapic.
361 * Return 1 if successfully added and 0 if discarded.
362 */
363static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
364 int vector, int level, int trig_mode)
365{
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200366 int result = 0;
He, Qingc5ec1532007-09-03 17:07:41 +0300367 struct kvm_vcpu *vcpu = apic->vcpu;
Eddie Dong97222cc2007-09-12 10:58:04 +0300368
369 switch (delivery_mode) {
Eddie Dong97222cc2007-09-12 10:58:04 +0300370 case APIC_DM_LOWEST:
Gleb Natapove1035712009-03-05 16:34:59 +0200371 vcpu->arch.apic_arb_prio++;
372 case APIC_DM_FIXED:
Eddie Dong97222cc2007-09-12 10:58:04 +0300373 /* FIXME add logic for vcpu on reset */
374 if (unlikely(!apic_enabled(apic)))
375 break;
376
Avi Kivitya5d36f82009-12-29 12:42:16 +0200377 if (trig_mode) {
378 apic_debug("level trig mode for vector %d", vector);
379 apic_set_vector(vector, apic->regs + APIC_TMR);
380 } else
381 apic_clear_vector(vector, apic->regs + APIC_TMR);
382
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200383 result = !apic_test_and_set_irr(vector, apic);
Gleb Natapov1000ff82009-07-07 16:00:57 +0300384 trace_kvm_apic_accept_irq(vcpu->vcpu_id, delivery_mode,
Gleb Natapov4da74892009-08-27 16:25:04 +0300385 trig_mode, vector, !result);
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200386 if (!result) {
387 if (trig_mode)
388 apic_debug("level trig mode repeatedly for "
389 "vector %d", vector);
Eddie Dong97222cc2007-09-12 10:58:04 +0300390 break;
391 }
392
Marcelo Tosattid7690172008-09-08 15:23:48 -0300393 kvm_vcpu_kick(vcpu);
Eddie Dong97222cc2007-09-12 10:58:04 +0300394 break;
395
396 case APIC_DM_REMRD:
397 printk(KERN_DEBUG "Ignoring delivery mode 3\n");
398 break;
399
400 case APIC_DM_SMI:
401 printk(KERN_DEBUG "Ignoring guest SMI\n");
402 break;
Sheng Yang3419ffc2008-05-15 09:52:48 +0800403
Eddie Dong97222cc2007-09-12 10:58:04 +0300404 case APIC_DM_NMI:
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200405 result = 1;
Sheng Yang3419ffc2008-05-15 09:52:48 +0800406 kvm_inject_nmi(vcpu);
Jan Kiszka26df99c2008-09-26 09:30:54 +0200407 kvm_vcpu_kick(vcpu);
Eddie Dong97222cc2007-09-12 10:58:04 +0300408 break;
409
410 case APIC_DM_INIT:
He, Qingc5ec1532007-09-03 17:07:41 +0300411 if (level) {
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200412 result = 1;
Avi Kivitya4535292008-04-13 17:54:35 +0300413 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
He, Qingc5ec1532007-09-03 17:07:41 +0300414 printk(KERN_DEBUG
415 "INIT on a runnable vcpu %d\n",
416 vcpu->vcpu_id);
Avi Kivitya4535292008-04-13 17:54:35 +0300417 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
He, Qingc5ec1532007-09-03 17:07:41 +0300418 kvm_vcpu_kick(vcpu);
419 } else {
Jan Kiszka1b10bf32008-09-30 10:41:06 +0200420 apic_debug("Ignoring de-assert INIT to vcpu %d\n",
421 vcpu->vcpu_id);
He, Qingc5ec1532007-09-03 17:07:41 +0300422 }
Eddie Dong97222cc2007-09-12 10:58:04 +0300423 break;
424
425 case APIC_DM_STARTUP:
Jan Kiszka1b10bf32008-09-30 10:41:06 +0200426 apic_debug("SIPI to vcpu %d vector 0x%02x\n",
427 vcpu->vcpu_id, vector);
Avi Kivitya4535292008-04-13 17:54:35 +0300428 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200429 result = 1;
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800430 vcpu->arch.sipi_vector = vector;
Avi Kivitya4535292008-04-13 17:54:35 +0300431 vcpu->arch.mp_state = KVM_MP_STATE_SIPI_RECEIVED;
Marcelo Tosattid7690172008-09-08 15:23:48 -0300432 kvm_vcpu_kick(vcpu);
He, Qingc5ec1532007-09-03 17:07:41 +0300433 }
Eddie Dong97222cc2007-09-12 10:58:04 +0300434 break;
435
Jan Kiszka23930f92008-09-26 09:30:52 +0200436 case APIC_DM_EXTINT:
437 /*
438 * Should only be called by kvm_apic_local_deliver() with LVT0,
439 * before NMI watchdog was enabled. Already handled by
440 * kvm_apic_accept_pic_intr().
441 */
442 break;
443
Eddie Dong97222cc2007-09-12 10:58:04 +0300444 default:
445 printk(KERN_ERR "TODO: unsupported delivery mode %x\n",
446 delivery_mode);
447 break;
448 }
449 return result;
450}
451
Gleb Natapove1035712009-03-05 16:34:59 +0200452int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2)
Eddie Dong97222cc2007-09-12 10:58:04 +0300453{
Gleb Natapove1035712009-03-05 16:34:59 +0200454 return vcpu1->arch.apic_arb_prio - vcpu2->arch.apic_arb_prio;
Zhang Xiantao8be54532007-12-02 22:35:57 +0800455}
456
Eddie Dong97222cc2007-09-12 10:58:04 +0300457static void apic_set_eoi(struct kvm_lapic *apic)
458{
459 int vector = apic_find_highest_isr(apic);
Marcelo Tosattif5244722008-07-26 17:01:00 -0300460 int trigger_mode;
Eddie Dong97222cc2007-09-12 10:58:04 +0300461 /*
462 * Not every write EOI will has corresponding ISR,
463 * one example is when Kernel check timer on setup_IO_APIC
464 */
465 if (vector == -1)
466 return;
467
468 apic_clear_vector(vector, apic->regs + APIC_ISR);
469 apic_update_ppr(apic);
470
471 if (apic_test_and_clear_vector(vector, apic->regs + APIC_TMR))
Marcelo Tosattif5244722008-07-26 17:01:00 -0300472 trigger_mode = IOAPIC_LEVEL_TRIG;
473 else
474 trigger_mode = IOAPIC_EDGE_TRIG;
Gleb Natapoveba02262009-08-24 11:54:25 +0300475 if (!(apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI))
Gleb Natapovfc61b802009-07-05 17:39:35 +0300476 kvm_ioapic_update_eoi(apic->vcpu->kvm, vector, trigger_mode);
Eddie Dong97222cc2007-09-12 10:58:04 +0300477}
478
479static void apic_send_ipi(struct kvm_lapic *apic)
480{
481 u32 icr_low = apic_get_reg(apic, APIC_ICR);
482 u32 icr_high = apic_get_reg(apic, APIC_ICR2);
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200483 struct kvm_lapic_irq irq;
Eddie Dong97222cc2007-09-12 10:58:04 +0300484
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200485 irq.vector = icr_low & APIC_VECTOR_MASK;
486 irq.delivery_mode = icr_low & APIC_MODE_MASK;
487 irq.dest_mode = icr_low & APIC_DEST_MASK;
488 irq.level = icr_low & APIC_INT_ASSERT;
489 irq.trig_mode = icr_low & APIC_INT_LEVELTRIG;
490 irq.shorthand = icr_low & APIC_SHORT_MASK;
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300491 if (apic_x2apic_mode(apic))
492 irq.dest_id = icr_high;
493 else
494 irq.dest_id = GET_APIC_DEST_FIELD(icr_high);
Eddie Dong97222cc2007-09-12 10:58:04 +0300495
Gleb Natapov1000ff82009-07-07 16:00:57 +0300496 trace_kvm_apic_ipi(icr_low, irq.dest_id);
497
Eddie Dong97222cc2007-09-12 10:58:04 +0300498 apic_debug("icr_high 0x%x, icr_low 0x%x, "
499 "short_hand 0x%x, dest 0x%x, trig_mode 0x%x, level 0x%x, "
500 "dest_mode 0x%x, delivery_mode 0x%x, vector 0x%x\n",
Glauber Costa9b5843d2009-04-29 17:29:09 -0400501 icr_high, icr_low, irq.shorthand, irq.dest_id,
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200502 irq.trig_mode, irq.level, irq.dest_mode, irq.delivery_mode,
503 irq.vector);
Eddie Dong97222cc2007-09-12 10:58:04 +0300504
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200505 kvm_irq_delivery_to_apic(apic->vcpu->kvm, apic, &irq);
Eddie Dong97222cc2007-09-12 10:58:04 +0300506}
507
508static u32 apic_get_tmcct(struct kvm_lapic *apic)
509{
Marcelo Tosattib682b812009-02-10 20:41:41 -0200510 ktime_t remaining;
511 s64 ns;
Kevin Pedretti9da8f4e2007-10-21 08:55:50 +0200512 u32 tmcct;
Eddie Dong97222cc2007-09-12 10:58:04 +0300513
514 ASSERT(apic != NULL);
515
Kevin Pedretti9da8f4e2007-10-21 08:55:50 +0200516 /* if initial count is 0, current count should also be 0 */
Marcelo Tosattib682b812009-02-10 20:41:41 -0200517 if (apic_get_reg(apic, APIC_TMICT) == 0)
Kevin Pedretti9da8f4e2007-10-21 08:55:50 +0200518 return 0;
519
Marcelo Tosattiace15462009-10-08 10:55:03 -0300520 remaining = hrtimer_get_remaining(&apic->lapic_timer.timer);
Marcelo Tosattib682b812009-02-10 20:41:41 -0200521 if (ktime_to_ns(remaining) < 0)
522 remaining = ktime_set(0, 0);
Eddie Dong97222cc2007-09-12 10:58:04 +0300523
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300524 ns = mod_64(ktime_to_ns(remaining), apic->lapic_timer.period);
525 tmcct = div64_u64(ns,
526 (APIC_BUS_CYCLE_NS * apic->divide_count));
Eddie Dong97222cc2007-09-12 10:58:04 +0300527
528 return tmcct;
529}
530
Avi Kivityb209749f2007-10-22 16:50:39 +0200531static void __report_tpr_access(struct kvm_lapic *apic, bool write)
532{
533 struct kvm_vcpu *vcpu = apic->vcpu;
534 struct kvm_run *run = vcpu->run;
535
536 set_bit(KVM_REQ_REPORT_TPR_ACCESS, &vcpu->requests);
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -0300537 run->tpr_access.rip = kvm_rip_read(vcpu);
Avi Kivityb209749f2007-10-22 16:50:39 +0200538 run->tpr_access.is_write = write;
539}
540
541static inline void report_tpr_access(struct kvm_lapic *apic, bool write)
542{
543 if (apic->vcpu->arch.tpr_access_reporting)
544 __report_tpr_access(apic, write);
545}
546
Eddie Dong97222cc2007-09-12 10:58:04 +0300547static u32 __apic_read(struct kvm_lapic *apic, unsigned int offset)
548{
549 u32 val = 0;
550
551 if (offset >= LAPIC_MMIO_LENGTH)
552 return 0;
553
554 switch (offset) {
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300555 case APIC_ID:
556 if (apic_x2apic_mode(apic))
557 val = kvm_apic_id(apic);
558 else
559 val = kvm_apic_id(apic) << 24;
560 break;
Eddie Dong97222cc2007-09-12 10:58:04 +0300561 case APIC_ARBPRI:
562 printk(KERN_WARNING "Access APIC ARBPRI register "
563 "which is for P6\n");
564 break;
565
566 case APIC_TMCCT: /* Timer CCR */
567 val = apic_get_tmcct(apic);
568 break;
569
Avi Kivityb209749f2007-10-22 16:50:39 +0200570 case APIC_TASKPRI:
571 report_tpr_access(apic, false);
572 /* fall thru */
Eddie Dong97222cc2007-09-12 10:58:04 +0300573 default:
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800574 apic_update_ppr(apic);
Eddie Dong97222cc2007-09-12 10:58:04 +0300575 val = apic_get_reg(apic, offset);
576 break;
577 }
578
579 return val;
580}
581
Gregory Haskinsd76685c2009-06-01 12:54:50 -0400582static inline struct kvm_lapic *to_lapic(struct kvm_io_device *dev)
583{
584 return container_of(dev, struct kvm_lapic, dev);
585}
586
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300587static int apic_reg_read(struct kvm_lapic *apic, u32 offset, int len,
588 void *data)
Michael S. Tsirkinbda90202009-06-29 22:24:32 +0300589{
Eddie Dong97222cc2007-09-12 10:58:04 +0300590 unsigned char alignment = offset & 0xf;
591 u32 result;
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300592 /* this bitmask has a bit cleared for each reserver register */
593 static const u64 rmask = 0x43ff01ffffffe70cULL;
Eddie Dong97222cc2007-09-12 10:58:04 +0300594
595 if ((alignment + len) > 4) {
Gleb Natapov4088bb32009-07-08 11:26:54 +0300596 apic_debug("KVM_APIC_READ: alignment error %x %d\n",
597 offset, len);
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300598 return 1;
Eddie Dong97222cc2007-09-12 10:58:04 +0300599 }
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300600
601 if (offset > 0x3f0 || !(rmask & (1ULL << (offset >> 4)))) {
Gleb Natapov4088bb32009-07-08 11:26:54 +0300602 apic_debug("KVM_APIC_READ: read reserved register %x\n",
603 offset);
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300604 return 1;
605 }
606
Eddie Dong97222cc2007-09-12 10:58:04 +0300607 result = __apic_read(apic, offset & ~0xf);
608
Marcelo Tosatti229456f2009-06-17 09:22:14 -0300609 trace_kvm_apic_read(offset, result);
610
Eddie Dong97222cc2007-09-12 10:58:04 +0300611 switch (len) {
612 case 1:
613 case 2:
614 case 4:
615 memcpy(data, (char *)&result + alignment, len);
616 break;
617 default:
618 printk(KERN_ERR "Local APIC read with len = %x, "
619 "should be 1,2, or 4 instead\n", len);
620 break;
621 }
Michael S. Tsirkinbda90202009-06-29 22:24:32 +0300622 return 0;
Eddie Dong97222cc2007-09-12 10:58:04 +0300623}
624
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300625static int apic_mmio_in_range(struct kvm_lapic *apic, gpa_t addr)
626{
627 return apic_hw_enabled(apic) &&
628 addr >= apic->base_address &&
629 addr < apic->base_address + LAPIC_MMIO_LENGTH;
630}
631
632static int apic_mmio_read(struct kvm_io_device *this,
633 gpa_t address, int len, void *data)
634{
635 struct kvm_lapic *apic = to_lapic(this);
636 u32 offset = address - apic->base_address;
637
638 if (!apic_mmio_in_range(apic, address))
639 return -EOPNOTSUPP;
640
641 apic_reg_read(apic, offset, len, data);
642
643 return 0;
644}
645
Eddie Dong97222cc2007-09-12 10:58:04 +0300646static void update_divide_count(struct kvm_lapic *apic)
647{
648 u32 tmp1, tmp2, tdcr;
649
650 tdcr = apic_get_reg(apic, APIC_TDCR);
651 tmp1 = tdcr & 0xf;
652 tmp2 = ((tmp1 & 0x3) | ((tmp1 & 0x8) >> 1)) + 1;
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300653 apic->divide_count = 0x1 << (tmp2 & 0x7);
Eddie Dong97222cc2007-09-12 10:58:04 +0300654
655 apic_debug("timer divide count is 0x%x\n",
Glauber Costa9b5843d2009-04-29 17:29:09 -0400656 apic->divide_count);
Eddie Dong97222cc2007-09-12 10:58:04 +0300657}
658
659static void start_apic_timer(struct kvm_lapic *apic)
660{
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300661 ktime_t now = apic->lapic_timer.timer.base->get_time();
Eddie Dong97222cc2007-09-12 10:58:04 +0300662
Aurelien Jarnob2d83cf2009-09-25 11:09:37 +0200663 apic->lapic_timer.period = (u64)apic_get_reg(apic, APIC_TMICT) *
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300664 APIC_BUS_CYCLE_NS * apic->divide_count;
665 atomic_set(&apic->lapic_timer.pending, 0);
Avi Kivity0b975a32008-02-24 14:37:50 +0200666
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300667 if (!apic->lapic_timer.period)
Avi Kivity0b975a32008-02-24 14:37:50 +0200668 return;
Marcelo Tosatti14448852009-07-27 23:41:01 -0300669 /*
670 * Do not allow the guest to program periodic timers with small
671 * interval, since the hrtimers are not throttled by the host
672 * scheduler.
673 */
674 if (apic_lvtt_period(apic)) {
675 if (apic->lapic_timer.period < NSEC_PER_MSEC/2)
676 apic->lapic_timer.period = NSEC_PER_MSEC/2;
677 }
Avi Kivity0b975a32008-02-24 14:37:50 +0200678
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300679 hrtimer_start(&apic->lapic_timer.timer,
680 ktime_add_ns(now, apic->lapic_timer.period),
Eddie Dong97222cc2007-09-12 10:58:04 +0300681 HRTIMER_MODE_ABS);
682
683 apic_debug("%s: bus cycle is %" PRId64 "ns, now 0x%016"
684 PRIx64 ", "
685 "timer initial count 0x%x, period %lldns, "
Harvey Harrisonb8688d52008-03-03 12:59:56 -0800686 "expire @ 0x%016" PRIx64 ".\n", __func__,
Eddie Dong97222cc2007-09-12 10:58:04 +0300687 APIC_BUS_CYCLE_NS, ktime_to_ns(now),
688 apic_get_reg(apic, APIC_TMICT),
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300689 apic->lapic_timer.period,
Eddie Dong97222cc2007-09-12 10:58:04 +0300690 ktime_to_ns(ktime_add_ns(now,
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300691 apic->lapic_timer.period)));
Eddie Dong97222cc2007-09-12 10:58:04 +0300692}
693
Jan Kiszkacc6e4622008-10-20 10:20:03 +0200694static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val)
695{
696 int nmi_wd_enabled = apic_lvt_nmi_mode(apic_get_reg(apic, APIC_LVT0));
697
698 if (apic_lvt_nmi_mode(lvt0_val)) {
699 if (!nmi_wd_enabled) {
700 apic_debug("Receive NMI setting on APIC_LVT0 "
701 "for cpu %d\n", apic->vcpu->vcpu_id);
702 apic->vcpu->kvm->arch.vapics_in_nmi_mode++;
703 }
704 } else if (nmi_wd_enabled)
705 apic->vcpu->kvm->arch.vapics_in_nmi_mode--;
706}
707
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300708static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
Eddie Dong97222cc2007-09-12 10:58:04 +0300709{
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300710 int ret = 0;
Eddie Dong97222cc2007-09-12 10:58:04 +0300711
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300712 trace_kvm_apic_write(reg, val);
Eddie Dong97222cc2007-09-12 10:58:04 +0300713
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300714 switch (reg) {
Eddie Dong97222cc2007-09-12 10:58:04 +0300715 case APIC_ID: /* Local APIC ID */
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300716 if (!apic_x2apic_mode(apic))
717 apic_set_reg(apic, APIC_ID, val);
718 else
719 ret = 1;
Eddie Dong97222cc2007-09-12 10:58:04 +0300720 break;
721
722 case APIC_TASKPRI:
Avi Kivityb209749f2007-10-22 16:50:39 +0200723 report_tpr_access(apic, true);
Eddie Dong97222cc2007-09-12 10:58:04 +0300724 apic_set_tpr(apic, val & 0xff);
725 break;
726
727 case APIC_EOI:
728 apic_set_eoi(apic);
729 break;
730
731 case APIC_LDR:
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300732 if (!apic_x2apic_mode(apic))
733 apic_set_reg(apic, APIC_LDR, val & APIC_LDR_MASK);
734 else
735 ret = 1;
Eddie Dong97222cc2007-09-12 10:58:04 +0300736 break;
737
738 case APIC_DFR:
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300739 if (!apic_x2apic_mode(apic))
740 apic_set_reg(apic, APIC_DFR, val | 0x0FFFFFFF);
741 else
742 ret = 1;
Eddie Dong97222cc2007-09-12 10:58:04 +0300743 break;
744
Gleb Natapovfc61b802009-07-05 17:39:35 +0300745 case APIC_SPIV: {
746 u32 mask = 0x3ff;
747 if (apic_get_reg(apic, APIC_LVR) & APIC_LVR_DIRECTED_EOI)
748 mask |= APIC_SPIV_DIRECTED_EOI;
749 apic_set_reg(apic, APIC_SPIV, val & mask);
Eddie Dong97222cc2007-09-12 10:58:04 +0300750 if (!(val & APIC_SPIV_APIC_ENABLED)) {
751 int i;
752 u32 lvt_val;
753
754 for (i = 0; i < APIC_LVT_NUM; i++) {
755 lvt_val = apic_get_reg(apic,
756 APIC_LVTT + 0x10 * i);
757 apic_set_reg(apic, APIC_LVTT + 0x10 * i,
758 lvt_val | APIC_LVT_MASKED);
759 }
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300760 atomic_set(&apic->lapic_timer.pending, 0);
Eddie Dong97222cc2007-09-12 10:58:04 +0300761
762 }
763 break;
Gleb Natapovfc61b802009-07-05 17:39:35 +0300764 }
Eddie Dong97222cc2007-09-12 10:58:04 +0300765 case APIC_ICR:
766 /* No delay here, so we always clear the pending bit */
767 apic_set_reg(apic, APIC_ICR, val & ~(1 << 12));
768 apic_send_ipi(apic);
769 break;
770
771 case APIC_ICR2:
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300772 if (!apic_x2apic_mode(apic))
773 val &= 0xff000000;
774 apic_set_reg(apic, APIC_ICR2, val);
Eddie Dong97222cc2007-09-12 10:58:04 +0300775 break;
776
Jan Kiszka23930f92008-09-26 09:30:52 +0200777 case APIC_LVT0:
Jan Kiszkacc6e4622008-10-20 10:20:03 +0200778 apic_manage_nmi_watchdog(apic, val);
Eddie Dong97222cc2007-09-12 10:58:04 +0300779 case APIC_LVTT:
780 case APIC_LVTTHMR:
781 case APIC_LVTPC:
Eddie Dong97222cc2007-09-12 10:58:04 +0300782 case APIC_LVT1:
783 case APIC_LVTERR:
784 /* TODO: Check vector */
785 if (!apic_sw_enabled(apic))
786 val |= APIC_LVT_MASKED;
787
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300788 val &= apic_lvt_mask[(reg - APIC_LVTT) >> 4];
789 apic_set_reg(apic, reg, val);
Eddie Dong97222cc2007-09-12 10:58:04 +0300790
791 break;
792
793 case APIC_TMICT:
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300794 hrtimer_cancel(&apic->lapic_timer.timer);
Eddie Dong97222cc2007-09-12 10:58:04 +0300795 apic_set_reg(apic, APIC_TMICT, val);
796 start_apic_timer(apic);
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300797 break;
Eddie Dong97222cc2007-09-12 10:58:04 +0300798
799 case APIC_TDCR:
800 if (val & 4)
801 printk(KERN_ERR "KVM_WRITE:TDCR %x\n", val);
802 apic_set_reg(apic, APIC_TDCR, val);
803 update_divide_count(apic);
804 break;
805
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300806 case APIC_ESR:
807 if (apic_x2apic_mode(apic) && val != 0) {
808 printk(KERN_ERR "KVM_WRITE:ESR not zero %x\n", val);
809 ret = 1;
810 }
811 break;
812
813 case APIC_SELF_IPI:
814 if (apic_x2apic_mode(apic)) {
815 apic_reg_write(apic, APIC_ICR, 0x40000 | (val & 0xff));
816 } else
817 ret = 1;
818 break;
Eddie Dong97222cc2007-09-12 10:58:04 +0300819 default:
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300820 ret = 1;
Eddie Dong97222cc2007-09-12 10:58:04 +0300821 break;
822 }
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300823 if (ret)
824 apic_debug("Local APIC Write to read-only register %x\n", reg);
825 return ret;
826}
827
828static int apic_mmio_write(struct kvm_io_device *this,
829 gpa_t address, int len, const void *data)
830{
831 struct kvm_lapic *apic = to_lapic(this);
832 unsigned int offset = address - apic->base_address;
833 u32 val;
834
835 if (!apic_mmio_in_range(apic, address))
836 return -EOPNOTSUPP;
837
838 /*
839 * APIC register must be aligned on 128-bits boundary.
840 * 32/64/128 bits registers must be accessed thru 32 bits.
841 * Refer SDM 8.4.1
842 */
843 if (len != 4 || (offset & 0xf)) {
844 /* Don't shout loud, $infamous_os would cause only noise. */
845 apic_debug("apic write: bad size=%d %lx\n", len, (long)address);
Sheng Yang756975b2009-07-06 11:05:39 +0800846 return 0;
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300847 }
848
849 val = *(u32*)data;
850
851 /* too common printing */
852 if (offset != APIC_EOI)
853 apic_debug("%s: offset 0x%x with length 0x%x, and value is "
854 "0x%x\n", __func__, offset, len, val);
855
856 apic_reg_write(apic, offset & 0xff0, val);
857
Michael S. Tsirkinbda90202009-06-29 22:24:32 +0300858 return 0;
Eddie Dong97222cc2007-09-12 10:58:04 +0300859}
860
Rusty Russelld5894442007-10-08 10:48:30 +1000861void kvm_free_lapic(struct kvm_vcpu *vcpu)
Eddie Dong97222cc2007-09-12 10:58:04 +0300862{
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800863 if (!vcpu->arch.apic)
Eddie Dong97222cc2007-09-12 10:58:04 +0300864 return;
865
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300866 hrtimer_cancel(&vcpu->arch.apic->lapic_timer.timer);
Eddie Dong97222cc2007-09-12 10:58:04 +0300867
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800868 if (vcpu->arch.apic->regs_page)
869 __free_page(vcpu->arch.apic->regs_page);
Eddie Dong97222cc2007-09-12 10:58:04 +0300870
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800871 kfree(vcpu->arch.apic);
Eddie Dong97222cc2007-09-12 10:58:04 +0300872}
873
874/*
875 *----------------------------------------------------------------------
876 * LAPIC interface
877 *----------------------------------------------------------------------
878 */
879
880void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8)
881{
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800882 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +0300883
884 if (!apic)
885 return;
Avi Kivityb93463a2007-10-25 16:52:32 +0200886 apic_set_tpr(apic, ((cr8 & 0x0f) << 4)
887 | (apic_get_reg(apic, APIC_TASKPRI) & 4));
Eddie Dong97222cc2007-09-12 10:58:04 +0300888}
889
890u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu)
891{
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800892 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +0300893 u64 tpr;
894
895 if (!apic)
896 return 0;
897 tpr = (u64) apic_get_reg(apic, APIC_TASKPRI);
898
899 return (tpr & 0xf0) >> 4;
900}
901
902void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value)
903{
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800904 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +0300905
906 if (!apic) {
907 value |= MSR_IA32_APICBASE_BSP;
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800908 vcpu->arch.apic_base = value;
Eddie Dong97222cc2007-09-12 10:58:04 +0300909 return;
910 }
Gleb Natapovc5af89b2009-06-09 15:56:26 +0300911
912 if (!kvm_vcpu_is_bsp(apic->vcpu))
Eddie Dong97222cc2007-09-12 10:58:04 +0300913 value &= ~MSR_IA32_APICBASE_BSP;
914
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800915 vcpu->arch.apic_base = value;
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300916 if (apic_x2apic_mode(apic)) {
917 u32 id = kvm_apic_id(apic);
918 u32 ldr = ((id & ~0xf) << 16) | (1 << (id & 0xf));
919 apic_set_reg(apic, APIC_LDR, ldr);
920 }
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800921 apic->base_address = apic->vcpu->arch.apic_base &
Eddie Dong97222cc2007-09-12 10:58:04 +0300922 MSR_IA32_APICBASE_BASE;
923
924 /* with FSB delivery interrupt, we can restart APIC functionality */
925 apic_debug("apic base msr is 0x%016" PRIx64 ", and base address is "
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800926 "0x%lx.\n", apic->vcpu->arch.apic_base, apic->base_address);
Eddie Dong97222cc2007-09-12 10:58:04 +0300927
928}
929
He, Qingc5ec1532007-09-03 17:07:41 +0300930void kvm_lapic_reset(struct kvm_vcpu *vcpu)
Eddie Dong97222cc2007-09-12 10:58:04 +0300931{
932 struct kvm_lapic *apic;
933 int i;
934
Harvey Harrisonb8688d52008-03-03 12:59:56 -0800935 apic_debug("%s\n", __func__);
Eddie Dong97222cc2007-09-12 10:58:04 +0300936
937 ASSERT(vcpu);
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800938 apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +0300939 ASSERT(apic != NULL);
940
941 /* Stop the timer in case it's a reset to an active apic */
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300942 hrtimer_cancel(&apic->lapic_timer.timer);
Eddie Dong97222cc2007-09-12 10:58:04 +0300943
944 apic_set_reg(apic, APIC_ID, vcpu->vcpu_id << 24);
Gleb Natapovfc61b802009-07-05 17:39:35 +0300945 kvm_apic_set_version(apic->vcpu);
Eddie Dong97222cc2007-09-12 10:58:04 +0300946
947 for (i = 0; i < APIC_LVT_NUM; i++)
948 apic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED);
Qing He40487c62007-09-17 14:47:13 +0800949 apic_set_reg(apic, APIC_LVT0,
950 SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT));
Eddie Dong97222cc2007-09-12 10:58:04 +0300951
952 apic_set_reg(apic, APIC_DFR, 0xffffffffU);
953 apic_set_reg(apic, APIC_SPIV, 0xff);
954 apic_set_reg(apic, APIC_TASKPRI, 0);
955 apic_set_reg(apic, APIC_LDR, 0);
956 apic_set_reg(apic, APIC_ESR, 0);
957 apic_set_reg(apic, APIC_ICR, 0);
958 apic_set_reg(apic, APIC_ICR2, 0);
959 apic_set_reg(apic, APIC_TDCR, 0);
960 apic_set_reg(apic, APIC_TMICT, 0);
961 for (i = 0; i < 8; i++) {
962 apic_set_reg(apic, APIC_IRR + 0x10 * i, 0);
963 apic_set_reg(apic, APIC_ISR + 0x10 * i, 0);
964 apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);
965 }
Gleb Natapov33e4c682009-06-11 11:06:51 +0300966 apic->irr_pending = false;
Kevin Pedrettib33ac882007-10-21 08:54:53 +0200967 update_divide_count(apic);
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300968 atomic_set(&apic->lapic_timer.pending, 0);
Gleb Natapovc5af89b2009-06-09 15:56:26 +0300969 if (kvm_vcpu_is_bsp(vcpu))
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800970 vcpu->arch.apic_base |= MSR_IA32_APICBASE_BSP;
Eddie Dong97222cc2007-09-12 10:58:04 +0300971 apic_update_ppr(apic);
972
Gleb Natapove1035712009-03-05 16:34:59 +0200973 vcpu->arch.apic_arb_prio = 0;
974
Eddie Dong97222cc2007-09-12 10:58:04 +0300975 apic_debug(KERN_INFO "%s: vcpu=%p, id=%d, base_msr="
Harvey Harrisonb8688d52008-03-03 12:59:56 -0800976 "0x%016" PRIx64 ", base_address=0x%0lx.\n", __func__,
Eddie Dong97222cc2007-09-12 10:58:04 +0300977 vcpu, kvm_apic_id(apic),
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800978 vcpu->arch.apic_base, apic->base_address);
Eddie Dong97222cc2007-09-12 10:58:04 +0300979}
980
Gleb Natapov343f94f2009-03-05 16:34:54 +0200981bool kvm_apic_present(struct kvm_vcpu *vcpu)
982{
983 return vcpu->arch.apic && apic_hw_enabled(vcpu->arch.apic);
984}
985
Eddie Dong97222cc2007-09-12 10:58:04 +0300986int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
987{
Gleb Natapov343f94f2009-03-05 16:34:54 +0200988 return kvm_apic_present(vcpu) && apic_sw_enabled(vcpu->arch.apic);
Eddie Dong97222cc2007-09-12 10:58:04 +0300989}
990
991/*
992 *----------------------------------------------------------------------
993 * timer interface
994 *----------------------------------------------------------------------
995 */
Eddie Dong1b9778d2007-09-03 16:56:58 +0300996
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300997static bool lapic_is_periodic(struct kvm_timer *ktimer)
Eddie Dong97222cc2007-09-12 10:58:04 +0300998{
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300999 struct kvm_lapic *apic = container_of(ktimer, struct kvm_lapic,
1000 lapic_timer);
1001 return apic_lvtt_period(apic);
Eddie Dong97222cc2007-09-12 10:58:04 +03001002}
1003
Marcelo Tosatti3d808402008-04-11 14:53:26 -03001004int apic_has_pending_timer(struct kvm_vcpu *vcpu)
1005{
1006 struct kvm_lapic *lapic = vcpu->arch.apic;
1007
Marcelo Tosatti54aaace2008-05-14 02:29:06 -03001008 if (lapic && apic_enabled(lapic) && apic_lvt_enabled(lapic, APIC_LVTT))
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001009 return atomic_read(&lapic->lapic_timer.pending);
Marcelo Tosatti3d808402008-04-11 14:53:26 -03001010
1011 return 0;
1012}
1013
Jan Kiszka8fdb2352008-10-20 10:20:02 +02001014static int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type)
Eddie Dong1b9778d2007-09-03 16:56:58 +03001015{
Jan Kiszka8fdb2352008-10-20 10:20:02 +02001016 u32 reg = apic_get_reg(apic, lvt_type);
Jan Kiszka23930f92008-09-26 09:30:52 +02001017 int vector, mode, trig_mode;
Eddie Dong1b9778d2007-09-03 16:56:58 +03001018
Jan Kiszka8fdb2352008-10-20 10:20:02 +02001019 if (apic_hw_enabled(apic) && !(reg & APIC_LVT_MASKED)) {
Jan Kiszka23930f92008-09-26 09:30:52 +02001020 vector = reg & APIC_VECTOR_MASK;
1021 mode = reg & APIC_MODE_MASK;
1022 trig_mode = reg & APIC_LVT_LEVEL_TRIGGER;
1023 return __apic_accept_irq(apic, mode, vector, 1, trig_mode);
1024 }
1025 return 0;
1026}
1027
Jan Kiszka8fdb2352008-10-20 10:20:02 +02001028void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu)
Jan Kiszka23930f92008-09-26 09:30:52 +02001029{
Jan Kiszka8fdb2352008-10-20 10:20:02 +02001030 struct kvm_lapic *apic = vcpu->arch.apic;
1031
1032 if (apic)
1033 kvm_apic_local_deliver(apic, APIC_LVT0);
Eddie Dong1b9778d2007-09-03 16:56:58 +03001034}
1035
Hannes Eder386eb6e2009-03-10 22:51:09 +01001036static struct kvm_timer_ops lapic_timer_ops = {
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001037 .is_periodic = lapic_is_periodic,
1038};
Eddie Dong97222cc2007-09-12 10:58:04 +03001039
Gregory Haskinsd76685c2009-06-01 12:54:50 -04001040static const struct kvm_io_device_ops apic_mmio_ops = {
1041 .read = apic_mmio_read,
1042 .write = apic_mmio_write,
Gregory Haskinsd76685c2009-06-01 12:54:50 -04001043};
1044
Eddie Dong97222cc2007-09-12 10:58:04 +03001045int kvm_create_lapic(struct kvm_vcpu *vcpu)
1046{
1047 struct kvm_lapic *apic;
1048
1049 ASSERT(vcpu != NULL);
1050 apic_debug("apic_init %d\n", vcpu->vcpu_id);
1051
1052 apic = kzalloc(sizeof(*apic), GFP_KERNEL);
1053 if (!apic)
1054 goto nomem;
1055
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001056 vcpu->arch.apic = apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001057
1058 apic->regs_page = alloc_page(GFP_KERNEL);
1059 if (apic->regs_page == NULL) {
1060 printk(KERN_ERR "malloc apic regs error for vcpu %x\n",
1061 vcpu->vcpu_id);
Rusty Russelld5894442007-10-08 10:48:30 +10001062 goto nomem_free_apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001063 }
1064 apic->regs = page_address(apic->regs_page);
1065 memset(apic->regs, 0, PAGE_SIZE);
1066 apic->vcpu = vcpu;
1067
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001068 hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC,
1069 HRTIMER_MODE_ABS);
1070 apic->lapic_timer.timer.function = kvm_timer_fn;
1071 apic->lapic_timer.t_ops = &lapic_timer_ops;
1072 apic->lapic_timer.kvm = vcpu->kvm;
Gleb Natapov1ed0ce02009-06-09 15:56:27 +03001073 apic->lapic_timer.vcpu = vcpu;
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001074
Eddie Dong97222cc2007-09-12 10:58:04 +03001075 apic->base_address = APIC_DEFAULT_PHYS_BASE;
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001076 vcpu->arch.apic_base = APIC_DEFAULT_PHYS_BASE;
Eddie Dong97222cc2007-09-12 10:58:04 +03001077
He, Qingc5ec1532007-09-03 17:07:41 +03001078 kvm_lapic_reset(vcpu);
Gregory Haskinsd76685c2009-06-01 12:54:50 -04001079 kvm_iodevice_init(&apic->dev, &apic_mmio_ops);
Eddie Dong97222cc2007-09-12 10:58:04 +03001080
1081 return 0;
Rusty Russelld5894442007-10-08 10:48:30 +10001082nomem_free_apic:
1083 kfree(apic);
Eddie Dong97222cc2007-09-12 10:58:04 +03001084nomem:
Eddie Dong97222cc2007-09-12 10:58:04 +03001085 return -ENOMEM;
1086}
Eddie Dong97222cc2007-09-12 10:58:04 +03001087
1088int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu)
1089{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001090 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001091 int highest_irr;
1092
1093 if (!apic || !apic_enabled(apic))
1094 return -1;
1095
Yang, Sheng6e5d8652007-09-12 18:03:11 +08001096 apic_update_ppr(apic);
Eddie Dong97222cc2007-09-12 10:58:04 +03001097 highest_irr = apic_find_highest_irr(apic);
1098 if ((highest_irr == -1) ||
1099 ((highest_irr & 0xF0) <= apic_get_reg(apic, APIC_PROCPRI)))
1100 return -1;
1101 return highest_irr;
1102}
1103
Qing He40487c62007-09-17 14:47:13 +08001104int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu)
1105{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001106 u32 lvt0 = apic_get_reg(vcpu->arch.apic, APIC_LVT0);
Qing He40487c62007-09-17 14:47:13 +08001107 int r = 0;
1108
Gleb Natapovc5af89b2009-06-09 15:56:26 +03001109 if (kvm_vcpu_is_bsp(vcpu)) {
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001110 if (!apic_hw_enabled(vcpu->arch.apic))
Qing He40487c62007-09-17 14:47:13 +08001111 r = 1;
1112 if ((lvt0 & APIC_LVT_MASKED) == 0 &&
1113 GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT)
1114 r = 1;
1115 }
1116 return r;
1117}
1118
Eddie Dong1b9778d2007-09-03 16:56:58 +03001119void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu)
1120{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001121 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong1b9778d2007-09-03 16:56:58 +03001122
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001123 if (apic && atomic_read(&apic->lapic_timer.pending) > 0) {
Jan Kiszka8fdb2352008-10-20 10:20:02 +02001124 if (kvm_apic_local_deliver(apic, APIC_LVTT))
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001125 atomic_dec(&apic->lapic_timer.pending);
Eddie Dong1b9778d2007-09-03 16:56:58 +03001126 }
1127}
1128
Eddie Dong97222cc2007-09-12 10:58:04 +03001129int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu)
1130{
1131 int vector = kvm_apic_has_interrupt(vcpu);
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001132 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001133
1134 if (vector == -1)
1135 return -1;
1136
1137 apic_set_vector(vector, apic->regs + APIC_ISR);
1138 apic_update_ppr(apic);
1139 apic_clear_irr(vector, apic);
1140 return vector;
1141}
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001142
1143void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu)
1144{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001145 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001146
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001147 apic->base_address = vcpu->arch.apic_base &
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001148 MSR_IA32_APICBASE_BASE;
Gleb Natapovfc61b802009-07-05 17:39:35 +03001149 kvm_apic_set_version(vcpu);
1150
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001151 apic_update_ppr(apic);
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001152 hrtimer_cancel(&apic->lapic_timer.timer);
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001153 update_divide_count(apic);
1154 start_apic_timer(apic);
Marcelo Tosatti6e24a6e2009-12-14 17:37:35 -02001155 apic->irr_pending = true;
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001156}
Eddie Donga3d7f852007-09-03 16:15:12 +03001157
Avi Kivity2f52d582008-01-16 12:49:30 +02001158void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu)
Eddie Donga3d7f852007-09-03 16:15:12 +03001159{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001160 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Donga3d7f852007-09-03 16:15:12 +03001161 struct hrtimer *timer;
1162
1163 if (!apic)
1164 return;
1165
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001166 timer = &apic->lapic_timer.timer;
Eddie Donga3d7f852007-09-03 16:15:12 +03001167 if (hrtimer_cancel(timer))
Arjan van de Venbeb20d522008-09-01 14:55:57 -07001168 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
Eddie Donga3d7f852007-09-03 16:15:12 +03001169}
Avi Kivityb93463a2007-10-25 16:52:32 +02001170
1171void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu)
1172{
1173 u32 data;
1174 void *vapic;
1175
1176 if (!irqchip_in_kernel(vcpu->kvm) || !vcpu->arch.apic->vapic_addr)
1177 return;
1178
1179 vapic = kmap_atomic(vcpu->arch.apic->vapic_page, KM_USER0);
1180 data = *(u32 *)(vapic + offset_in_page(vcpu->arch.apic->vapic_addr));
1181 kunmap_atomic(vapic, KM_USER0);
1182
1183 apic_set_tpr(vcpu->arch.apic, data & 0xff);
1184}
1185
1186void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu)
1187{
1188 u32 data, tpr;
1189 int max_irr, max_isr;
1190 struct kvm_lapic *apic;
1191 void *vapic;
1192
1193 if (!irqchip_in_kernel(vcpu->kvm) || !vcpu->arch.apic->vapic_addr)
1194 return;
1195
1196 apic = vcpu->arch.apic;
1197 tpr = apic_get_reg(apic, APIC_TASKPRI) & 0xff;
1198 max_irr = apic_find_highest_irr(apic);
1199 if (max_irr < 0)
1200 max_irr = 0;
1201 max_isr = apic_find_highest_isr(apic);
1202 if (max_isr < 0)
1203 max_isr = 0;
1204 data = (tpr & 0xff) | ((max_isr & 0xf0) << 8) | (max_irr << 24);
1205
1206 vapic = kmap_atomic(vcpu->arch.apic->vapic_page, KM_USER0);
1207 *(u32 *)(vapic + offset_in_page(vcpu->arch.apic->vapic_addr)) = data;
1208 kunmap_atomic(vapic, KM_USER0);
1209}
1210
1211void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr)
1212{
1213 if (!irqchip_in_kernel(vcpu->kvm))
1214 return;
1215
1216 vcpu->arch.apic->vapic_addr = vapic_addr;
1217}
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001218
1219int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1220{
1221 struct kvm_lapic *apic = vcpu->arch.apic;
1222 u32 reg = (msr - APIC_BASE_MSR) << 4;
1223
1224 if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
1225 return 1;
1226
1227 /* if this is ICR write vector before command */
1228 if (msr == 0x830)
1229 apic_reg_write(apic, APIC_ICR2, (u32)(data >> 32));
1230 return apic_reg_write(apic, reg, (u32)data);
1231}
1232
1233int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)
1234{
1235 struct kvm_lapic *apic = vcpu->arch.apic;
1236 u32 reg = (msr - APIC_BASE_MSR) << 4, low, high = 0;
1237
1238 if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
1239 return 1;
1240
1241 if (apic_reg_read(apic, reg, 4, &low))
1242 return 1;
1243 if (msr == 0x830)
1244 apic_reg_read(apic, APIC_ICR2, 4, &high);
1245
1246 *data = (((u64)high) << 32) | low;
1247
1248 return 0;
1249}
Gleb Natapov10388a02010-01-17 15:51:23 +02001250
1251int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 reg, u64 data)
1252{
1253 struct kvm_lapic *apic = vcpu->arch.apic;
1254
1255 if (!irqchip_in_kernel(vcpu->kvm))
1256 return 1;
1257
1258 /* if this is ICR write vector before command */
1259 if (reg == APIC_ICR)
1260 apic_reg_write(apic, APIC_ICR2, (u32)(data >> 32));
1261 return apic_reg_write(apic, reg, (u32)data);
1262}
1263
1264int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 reg, u64 *data)
1265{
1266 struct kvm_lapic *apic = vcpu->arch.apic;
1267 u32 low, high = 0;
1268
1269 if (!irqchip_in_kernel(vcpu->kvm))
1270 return 1;
1271
1272 if (apic_reg_read(apic, reg, 4, &low))
1273 return 1;
1274 if (reg == APIC_ICR)
1275 apic_reg_read(apic, APIC_ICR2, 4, &high);
1276
1277 *data = (((u64)high) << 32) | low;
1278
1279 return 0;
1280}