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Jan Engelhardtb5114312007-07-15 23:39:36 -07001
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
Jan Engelhardt06bfb7e2007-08-18 12:56:21 +02005 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
Jan Engelhardtb5114312007-07-15 23:39:36 -070010
11if CRYPTO_HW
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
13config CRYPTO_DEV_PADLOCK
Herbert Xud1583252007-05-18 13:17:22 +100014 tristate "Support for VIA PadLock ACE"
Herbert Xu2f817412009-04-22 13:00:15 +080015 depends on X86 && !UML
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
Michal Ludvig1191f0a2006-08-06 22:46:20 +100019 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
Linus Torvalds1da177e2005-04-16 15:20:36 -070021
22 The instructions are used only when the CPU supports them.
Michal Ludvig5644bda2006-08-06 22:50:30 +100023 Otherwise software encryption is used.
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025config CRYPTO_DEV_PADLOCK_AES
Michal Ludvig1191f0a2006-08-06 22:46:20 +100026 tristate "PadLock driver for AES algorithm"
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 depends on CRYPTO_DEV_PADLOCK
Herbert Xu28ce7282006-08-21 21:38:42 +100028 select CRYPTO_BLKCIPHER
Sebastian Siewior7dc748e2008-04-01 21:24:50 +080029 select CRYPTO_AES
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 help
31 Use VIA PadLock for AES algorithm.
32
Michal Ludvig1191f0a2006-08-06 22:46:20 +100033 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020036 called padlock-aes.
Michal Ludvig1191f0a2006-08-06 22:46:20 +100037
Michal Ludvig6c833272006-07-12 12:29:38 +100038config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
Herbert Xubbbee462009-07-11 18:16:16 +080041 select CRYPTO_HASH
Michal Ludvig6c833272006-07-12 12:29:38 +100042 select CRYPTO_SHA1
43 select CRYPTO_SHA256
Michal Ludvig6c833272006-07-12 12:29:38 +100044 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020050 called padlock-sha.
Michal Ludvig6c833272006-07-12 12:29:38 +100051
Jordan Crouse9fe757b2006-10-04 18:48:57 +100052config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
Simon Arlottf6259de2007-05-02 22:08:26 +100054 depends on X86_32 && PCI
Jordan Crouse9fe757b2006-10-04 18:48:57 +100055 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
Jordan Crouse9fe757b2006-10-04 18:48:57 +100057 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
David Sterba3dde6ad2007-05-09 07:12:20 +020059 engine for the CryptoAPI AES algorithm.
Jordan Crouse9fe757b2006-10-04 18:48:57 +100060
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020064config ZCRYPT
65 tristate "Support for PCI-attached cryptographic adapters"
66 depends on S390
67 select ZCRYPT_MONOLITHIC if ZCRYPT="y"
Ralph Wuerthner2f7c8bd2008-04-17 07:46:15 +020068 select HW_RANDOM
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020069 help
70 Select this option if you want to use a PCI-attached cryptographic
71 adapter like:
72 + PCI Cryptographic Accelerator (PCICA)
73 + PCI Cryptographic Coprocessor (PCICC)
74 + PCI-X Cryptographic Coprocessor (PCIXCC)
75 + Crypto Express2 Coprocessor (CEX2C)
76 + Crypto Express2 Accelerator (CEX2A)
77
78config ZCRYPT_MONOLITHIC
79 bool "Monolithic zcrypt module"
Heiko Carstens57a49552010-08-13 10:06:40 +020080 depends on ZCRYPT
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020081 help
Pavel Machek4737f092009-06-05 00:44:53 +020082 Select this option if you want to have a single module z90crypt,
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020083 that contains all parts of the crypto device driver (ap bus,
84 request router and all the card drivers).
85
Jan Glauber3f5615e2008-01-26 14:11:07 +010086config CRYPTO_SHA1_S390
87 tristate "SHA1 digest algorithm"
88 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110089 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010090 help
91 This is the s390 hardware accelerated implementation of the
92 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
93
94config CRYPTO_SHA256_S390
95 tristate "SHA256 digest algorithm"
96 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110097 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010098 help
99 This is the s390 hardware accelerated implementation of the
100 SHA256 secure hash standard (DFIPS 180-2).
101
102 This version of SHA implements a 256 bit hash with 128 bits of
103 security against collision attacks.
104
Jan Glauber291dc7c2008-03-06 19:52:00 +0800105config CRYPTO_SHA512_S390
Jan Glauber4e2c6d72008-03-06 19:53:50 +0800106 tristate "SHA384 and SHA512 digest algorithm"
Jan Glauber291dc7c2008-03-06 19:52:00 +0800107 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +1100108 select CRYPTO_HASH
Jan Glauber291dc7c2008-03-06 19:52:00 +0800109 help
110 This is the s390 hardware accelerated implementation of the
111 SHA512 secure hash standard.
112
113 This version of SHA implements a 512 bit hash with 256 bits of
Jan Glauber4e2c6d72008-03-06 19:53:50 +0800114 security against collision attacks. The code also includes SHA-384,
115 a 384 bit hash with 192 bits of security against collision attacks.
116
Jan Glauber291dc7c2008-03-06 19:52:00 +0800117
Jan Glauber3f5615e2008-01-26 14:11:07 +0100118config CRYPTO_DES_S390
119 tristate "DES and Triple DES cipher algorithms"
120 depends on S390
121 select CRYPTO_ALGAPI
122 select CRYPTO_BLKCIPHER
123 help
124 This us the s390 hardware accelerated implementation of the
125 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
126
127config CRYPTO_AES_S390
128 tristate "AES cipher algorithms"
129 depends on S390
130 select CRYPTO_ALGAPI
131 select CRYPTO_BLKCIPHER
132 help
133 This is the s390 hardware accelerated implementation of the
Gerald Schaefer99d97222011-04-26 16:12:42 +1000134 AES cipher algorithms (FIPS-197).
Jan Glauber3f5615e2008-01-26 14:11:07 +0100135
Gerald Schaefer99d97222011-04-26 16:12:42 +1000136 As of z9 the ECB and CBC modes are hardware accelerated
137 for 128 bit keys.
138 As of z10 the ECB and CBC modes are hardware accelerated
139 for all AES key sizes.
140 As of z196 the XTS mode is hardware accelerated for 256 and
141 512 bit keys.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100142
143config S390_PRNG
144 tristate "Pseudo random number generator device driver"
145 depends on S390
146 default "m"
147 help
148 Select this option if you want to use the s390 pseudo random number
149 generator. The PRNG is part of the cryptographic processor functions
150 and uses triple-DES to generate secure random numbers like the
151 ANSI X9.17 standard. The PRNG is usable via the char device
152 /dev/prandom.
153
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000154config CRYPTO_DEV_MV_CESA
155 tristate "Marvell's Cryptographic Engine"
156 depends on PLAT_ORION
157 select CRYPTO_ALGAPI
158 select CRYPTO_AES
159 select CRYPTO_BLKCIPHER2
160 help
161 This driver allows you to utilize the Cryptographic Engines and
162 Security Accelerator (CESA) which can be found on the Marvell Orion
163 and Kirkwood SoCs, such as QNAP's TS-209.
164
165 Currently the driver supports AES in ECB and CBC mode without DMA.
166
David S. Miller0a625fd2010-05-19 14:14:04 +1000167config CRYPTO_DEV_NIAGARA2
168 tristate "Niagara2 Stream Processing Unit driver"
David S. Miller50e78162010-09-12 10:44:21 +0800169 select CRYPTO_DES
David S. Miller0a625fd2010-05-19 14:14:04 +1000170 select CRYPTO_ALGAPI
171 depends on SPARC64
172 help
173 Each core of a Niagara2 processor contains a Stream
174 Processing Unit, which itself contains several cryptographic
175 sub-units. One set provides the Modular Arithmetic Unit,
176 used for SSL offload. The other set provides the Cipher
177 Group, which can perform encryption, decryption, hashing,
178 checksumming, and raw copies.
179
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800180config CRYPTO_DEV_HIFN_795X
181 tristate "Driver HIFN 795x crypto accelerator chips"
Evgeniy Polyakovc3041f92007-10-11 19:58:16 +0800182 select CRYPTO_DES
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800183 select CRYPTO_ALGAPI
Herbert Xu653ebd92007-11-27 19:48:27 +0800184 select CRYPTO_BLKCIPHER
Herbert Xu946fef42008-01-26 09:48:44 +1100185 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
Jan Glauber2707b932007-11-12 21:56:38 +0800186 depends on PCI
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800187 help
188 This option allows you to have support for HIFN 795x crypto adapters.
189
Herbert Xu946fef42008-01-26 09:48:44 +1100190config CRYPTO_DEV_HIFN_795X_RNG
191 bool "HIFN 795x random number generator"
192 depends on CRYPTO_DEV_HIFN_795X
193 help
194 Select this option if you want to enable the random number generator
195 on the HIFN 795x crypto adapters.
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800196
Kim Phillips8e8ec592011-03-13 16:54:26 +0800197source drivers/crypto/caam/Kconfig
198
Kim Phillips9c4a7962008-06-23 19:50:15 +0800199config CRYPTO_DEV_TALITOS
200 tristate "Talitos Freescale Security Engine (SEC)"
201 select CRYPTO_ALGAPI
202 select CRYPTO_AUTHENC
203 select HW_RANDOM
204 depends on FSL_SOC
205 help
206 Say 'Y' here to use the Freescale Security Engine (SEC)
207 to offload cryptographic algorithm computation.
208
209 The Freescale SEC is present on PowerQUICC 'E' processors, such
210 as the MPC8349E and MPC8548E.
211
212 To compile this driver as a module, choose M here: the module
213 will be called talitos.
214
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800215config CRYPTO_DEV_IXP4XX
216 tristate "Driver for IXP4xx crypto hardware acceleration"
217 depends on ARCH_IXP4XX
218 select CRYPTO_DES
219 select CRYPTO_ALGAPI
Imre Kaloz090657e2008-07-13 20:12:11 +0800220 select CRYPTO_AUTHENC
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800221 select CRYPTO_BLKCIPHER
222 help
223 Driver for the IXP4xx NPE crypto engine.
224
James Hsiao049359d2009-02-05 16:18:13 +1100225config CRYPTO_DEV_PPC4XX
226 tristate "Driver AMCC PPC4xx crypto accelerator"
227 depends on PPC && 4xx
228 select CRYPTO_HASH
229 select CRYPTO_ALGAPI
230 select CRYPTO_BLKCIPHER
231 help
232 This option allows you to have support for AMCC crypto acceleration.
233
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800234config CRYPTO_DEV_OMAP_SHAM
235 tristate "Support for OMAP SHA1/MD5 hw accelerator"
236 depends on ARCH_OMAP2 || ARCH_OMAP3
237 select CRYPTO_SHA1
238 select CRYPTO_MD5
239 help
240 OMAP processors have SHA1/MD5 hw accelerator. Select this if you
241 want to use the OMAP module for SHA1/MD5 algorithms.
242
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800243config CRYPTO_DEV_OMAP_AES
244 tristate "Support for OMAP AES hw engine"
245 depends on ARCH_OMAP2 || ARCH_OMAP3
246 select CRYPTO_AES
247 help
248 OMAP processors have AES module accelerator. Select this if you
249 want to use the OMAP module for AES algorithms.
250
Jamie Ilesce921362011-02-21 16:43:21 +1100251config CRYPTO_DEV_PICOXCELL
252 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
253 depends on ARCH_PICOXCELL
254 select CRYPTO_AES
255 select CRYPTO_AUTHENC
256 select CRYPTO_ALGAPI
257 select CRYPTO_DES
258 select CRYPTO_CBC
259 select CRYPTO_ECB
260 select CRYPTO_SEQIV
261 help
262 This option enables support for the hardware offload engines in the
263 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
264 and for 3gpp Layer 2 ciphering support.
265
266 Saying m here will build a module named pipcoxcell_crypto.
267
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800268config CRYPTO_DEV_S5P
269 tristate "Support for Samsung S5PV210 crypto accelerator"
270 depends on ARCH_S5PV210
271 select CRYPTO_AES
272 select CRYPTO_ALGAPI
273 select CRYPTO_BLKCIPHER
274 help
275 This option allows you to have support for S5P crypto acceleration.
276 Select this to offload Samsung S5PV210 or S5PC110 from AES
277 algorithms execution.
278
Jan Engelhardtb5114312007-07-15 23:39:36 -0700279endif # CRYPTO_HW