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Santosh Shilimkar367cd312009-04-28 20:51:52 +05301/*
2 * Secondary CPU startup routine source file.
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc.
5 *
6 * Author:
7 * Santosh Shilimkar <santosh.shilimkar@ti.com>
8 *
9 * Interface functions needed for the SMP. This file is based on arm
10 * realview smp platform.
11 * Copyright (c) 2003 ARM Limited.
12 *
13 * This program is free software,you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18#include <linux/linkage.h>
19#include <linux/init.h>
20
21/* Physical address needed since MMU not enabled yet on secondary core */
22#define OMAP4_AUX_CORE_BOOT1_PA 0x48281804
23
24 __INIT
25
26/*
27 * OMAP4 specific entry point for secondary CPU to jump from ROM
28 * code. This routine also provides a holding flag into which
29 * secondary core is held until we're ready for it to initialise.
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080030 * The primary core will update this flag using a hardware
31 * register AuxCoreBoot0.
Santosh Shilimkar367cd312009-04-28 20:51:52 +053032 */
33ENTRY(omap_secondary_startup)
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080034hold: ldr r12,=0x103
35 dsb
Richard Woodruffdf571c4a2010-04-07 07:47:21 +000036 smc #0 @ read from AuxCoreBoot0
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080037 mov r0, r0, lsr #9
38 mrc p15, 0, r4, c0, c0, 5
39 and r4, r4, #0x0f
40 cmp r0, r4
Santosh Shilimkar367cd312009-04-28 20:51:52 +053041 bne hold
42
43 /*
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080044 * we've been released from the wait loop,secondary_stack
Santosh Shilimkar367cd312009-04-28 20:51:52 +053045 * should now contain the SVC stack for this core
46 */
47 b secondary_startup
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080048END(omap_secondary_startup)
Santosh Shilimkar367cd312009-04-28 20:51:52 +053049
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080050
51ENTRY(omap_modify_auxcoreboot0)
52 stmfd sp!, {r1-r12, lr}
53 ldr r12, =0x104
54 dsb
Richard Woodruffdf571c4a2010-04-07 07:47:21 +000055 smc #0
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080056 ldmfd sp!, {r1-r12, pc}
57END(omap_modify_auxcoreboot0)
58
59ENTRY(omap_auxcoreboot_addr)
60 stmfd sp!, {r2-r12, lr}
61 ldr r12, =0x105
62 dsb
Richard Woodruffdf571c4a2010-04-07 07:47:21 +000063 smc #0
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080064 ldmfd sp!, {r2-r12, pc}
65END(omap_auxcoreboot_addr)