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Nishanth Menonf5a64222010-12-09 09:13:47 -06001/*
2 * OMAP4 OPP table definitions.
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Nishanth Menon
6 * Kevin Hilman
7 * Thara Gopinath
Paul Walmsleyc0718df2011-03-10 22:17:45 -07008 * Copyright (C) 2010-2011 Nokia Corporation.
Nishanth Menonf5a64222010-12-09 09:13:47 -06009 * Eduardo Valentin
Paul Walmsleyc0718df2011-03-10 22:17:45 -070010 * Paul Walmsley
Nishanth Menonf5a64222010-12-09 09:13:47 -060011 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
17 * kind, whether express or implied; without even the implied warranty
18 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 */
21#include <linux/module.h>
22
Tony Lindgrendbc04162012-08-31 10:59:07 -070023#include "soc.h"
Paul Walmsleyc0718df2011-03-10 22:17:45 -070024#include "control.h"
Nishanth Menonf5a64222010-12-09 09:13:47 -060025#include "omap_opp_data.h"
Menon, Nishantheb05ead2011-01-05 20:49:35 +000026#include "pm.h"
Nishanth Menonf5a64222010-12-09 09:13:47 -060027
Paul Walmsleyc0718df2011-03-10 22:17:45 -070028/*
29 * Structures containing OMAP4430 voltage supported and various
30 * voltage dependent data for each VDD.
31 */
32
Shweta Gulatid9a20122011-03-10 10:23:49 +053033#define OMAP4430_VDD_MPU_OPP50_UV 1025000
34#define OMAP4430_VDD_MPU_OPP100_UV 1200000
35#define OMAP4430_VDD_MPU_OPPTURBO_UV 1313000
36#define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000
Paul Walmsleyc0718df2011-03-10 22:17:45 -070037
38struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
39 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
40 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
41 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
42 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
43 VOLT_DATA_DEFINE(0, 0, 0, 0),
44};
45
Shweta Gulatid9a20122011-03-10 10:23:49 +053046#define OMAP4430_VDD_IVA_OPP50_UV 1013000
47#define OMAP4430_VDD_IVA_OPP100_UV 1188000
48#define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000
Paul Walmsleyc0718df2011-03-10 22:17:45 -070049
50struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
51 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
52 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
53 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
54 VOLT_DATA_DEFINE(0, 0, 0, 0),
55};
56
Shweta Gulatid9a20122011-03-10 10:23:49 +053057#define OMAP4430_VDD_CORE_OPP50_UV 1025000
58#define OMAP4430_VDD_CORE_OPP100_UV 1200000
Paul Walmsleyc0718df2011-03-10 22:17:45 -070059
60struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
61 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
62 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
63 VOLT_DATA_DEFINE(0, 0, 0, 0),
64};
65
66
Nishanth Menonf5a64222010-12-09 09:13:47 -060067static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
68 /* MPU OPP1 - OPP50 */
Vishwanath BS15f13e22011-03-05 15:57:22 +053069 OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV),
Nishanth Menonf5a64222010-12-09 09:13:47 -060070 /* MPU OPP2 - OPP100 */
Vishwanath BS15f13e22011-03-05 15:57:22 +053071 OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV),
Nishanth Menonf5a64222010-12-09 09:13:47 -060072 /* MPU OPP3 - OPP-Turbo */
Shweta Gulati273032f2011-03-05 15:21:21 +053073 OPP_INITIALIZER("mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),
Nishanth Menonf5a64222010-12-09 09:13:47 -060074 /* MPU OPP4 - OPP-SB */
Shweta Gulati273032f2011-03-05 15:21:21 +053075 OPP_INITIALIZER("mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),
Nishanth Menonf5a64222010-12-09 09:13:47 -060076 /* L3 OPP1 - OPP50 */
Vishwanath BS15f13e22011-03-05 15:57:22 +053077 OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV),
Nishanth Menonf5a64222010-12-09 09:13:47 -060078 /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
Vishwanath BS15f13e22011-03-05 15:57:22 +053079 OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV),
Shweta Gulatia271e582011-03-05 15:22:26 +053080 /* IVA OPP1 - OPP50 */
81 OPP_INITIALIZER("iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV),
82 /* IVA OPP2 - OPP100 */
83 OPP_INITIALIZER("iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV),
84 /* IVA OPP3 - OPP-Turbo */
85 OPP_INITIALIZER("iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV),
86 /* TODO: add DSP, aess, fdif, gpu */
Nishanth Menonf5a64222010-12-09 09:13:47 -060087};
88
89/**
90 * omap4_opp_init() - initialize omap4 opp table
91 */
Menon, Nishantheb05ead2011-01-05 20:49:35 +000092int __init omap4_opp_init(void)
Nishanth Menonf5a64222010-12-09 09:13:47 -060093{
94 int r = -ENODEV;
95
Rajendra Nayak196449d2012-08-09 12:38:22 +053096 if (!cpu_is_omap443x())
Nishanth Menonf5a64222010-12-09 09:13:47 -060097 return r;
98
99 r = omap_init_opp_table(omap44xx_opp_def_list,
100 ARRAY_SIZE(omap44xx_opp_def_list));
101
102 return r;
103}
104device_initcall(omap4_opp_init);