Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 2 | * Machine check handler |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
Heiko Carstens | a53c8fa | 2012-07-20 11:15:04 +0200 | [diff] [blame] | 4 | * Copyright IBM Corp. 2000, 2009 |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 5 | * Author(s): Ingo Adlung <adlung@de.ibm.com>, |
| 6 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, |
| 7 | * Cornelia Huck <cornelia.huck@de.ibm.com>, |
| 8 | * Heiko Carstens <heiko.carstens@de.ibm.com>, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | */ |
| 10 | |
Heiko Carstens | 052ff46 | 2011-01-05 12:47:28 +0100 | [diff] [blame] | 11 | #include <linux/kernel_stat.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | #include <linux/init.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | #include <linux/errno.h> |
Heiko Carstens | 81f64b8 | 2009-04-14 15:36:18 +0200 | [diff] [blame] | 14 | #include <linux/hardirq.h> |
Heiko Carstens | 022e4fc | 2006-05-01 12:16:14 -0700 | [diff] [blame] | 15 | #include <linux/time.h> |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 16 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <asm/lowcore.h> |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 18 | #include <asm/smp.h> |
Martin Schwidefsky | fd5ada0 | 2016-05-31 15:06:51 +0200 | [diff] [blame] | 19 | #include <asm/stp.h> |
Martin Schwidefsky | 76d4e00 | 2009-06-12 10:26:21 +0200 | [diff] [blame] | 20 | #include <asm/cputime.h> |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 21 | #include <asm/nmi.h> |
| 22 | #include <asm/crw.h> |
Martin Schwidefsky | 8070361 | 2014-10-06 17:53:53 +0200 | [diff] [blame] | 23 | #include <asm/switch_to.h> |
Heiko Carstens | cad49cf | 2015-07-07 08:40:49 +0200 | [diff] [blame] | 24 | #include <asm/ctl_reg.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 26 | struct mcck_struct { |
Heiko Carstens | 3632496 | 2015-10-12 13:04:12 +0200 | [diff] [blame] | 27 | unsigned int kill_task : 1; |
| 28 | unsigned int channel_report : 1; |
| 29 | unsigned int warning : 1; |
Heiko Carstens | 29b0a82 | 2015-10-09 13:48:03 +0200 | [diff] [blame] | 30 | unsigned int stp_queue : 1; |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 31 | unsigned long mcck_code; |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 32 | }; |
| 33 | |
| 34 | static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); |
| 35 | |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 36 | static void s390_handle_damage(void) |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 37 | { |
| 38 | smp_send_stop(); |
| 39 | disabled_wait((unsigned long) __builtin_return_address(0)); |
| 40 | while (1); |
| 41 | } |
| 42 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | /* |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 44 | * Main machine check handler function. Will be called with interrupts enabled |
| 45 | * or disabled and machine checks enabled or disabled. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | */ |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 47 | void s390_handle_mcck(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 49 | unsigned long flags; |
| 50 | struct mcck_struct mcck; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 52 | /* |
| 53 | * Disable machine checks and get the current state of accumulated |
| 54 | * machine checks. Afterwards delete the old state and enable machine |
| 55 | * checks again. |
| 56 | */ |
| 57 | local_irq_save(flags); |
| 58 | local_mcck_disable(); |
Sebastian Ott | 2cb4a18 | 2014-11-28 15:40:57 +0100 | [diff] [blame] | 59 | mcck = *this_cpu_ptr(&cpu_mcck); |
| 60 | memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck)); |
Martin Schwidefsky | d3a73ac | 2014-04-15 12:55:07 +0200 | [diff] [blame] | 61 | clear_cpu_flag(CIF_MCCK_PENDING); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 62 | local_mcck_enable(); |
| 63 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 65 | if (mcck.channel_report) |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 66 | crw_handle_channel_report(); |
Heiko Carstens | 7b88641 | 2009-03-26 15:24:02 +0100 | [diff] [blame] | 67 | /* |
| 68 | * A warning may remain for a prolonged period on the bare iron. |
| 69 | * (actually until the machine is powered off, or the problem is gone) |
| 70 | * So we just stop listening for the WARNING MCH and avoid continuously |
| 71 | * being interrupted. One caveat is however, that we must do this per |
| 72 | * processor and cannot use the smp version of ctl_clear_bit(). |
| 73 | * On VM we only get one interrupt per virtally presented machinecheck. |
| 74 | * Though one suffices, we may get one interrupt per (virtual) cpu. |
| 75 | */ |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 76 | if (mcck.warning) { /* WARNING pending ? */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | static int mchchk_wng_posted = 0; |
Heiko Carstens | 7b88641 | 2009-03-26 15:24:02 +0100 | [diff] [blame] | 78 | |
| 79 | /* Use single cpu clear, as we cannot handle smp here. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ |
| 81 | if (xchg(&mchchk_wng_posted, 1) == 0) |
Cedric Le Goater | 9ec5209 | 2006-10-02 02:19:00 -0700 | [diff] [blame] | 82 | kill_cad_pid(SIGPWR, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | } |
Heiko Carstens | 29b0a82 | 2015-10-09 13:48:03 +0200 | [diff] [blame] | 84 | if (mcck.stp_queue) |
| 85 | stp_queue_work(); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 86 | if (mcck.kill_task) { |
| 87 | local_irq_enable(); |
| 88 | printk(KERN_EMERG "mcck: Terminating task because of machine " |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 89 | "malfunction (code 0x%016lx).\n", mcck.mcck_code); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 90 | printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", |
| 91 | current->comm, current->pid); |
| 92 | do_exit(SIGSEGV); |
| 93 | } |
| 94 | } |
Christian Borntraeger | 71cde58 | 2008-05-21 13:37:34 +0200 | [diff] [blame] | 95 | EXPORT_SYMBOL_GPL(s390_handle_mcck); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 96 | |
| 97 | /* |
| 98 | * returns 0 if all registers could be validated |
| 99 | * returns 1 otherwise |
| 100 | */ |
Heiko Carstens | 975be63 | 2015-10-12 13:03:05 +0200 | [diff] [blame] | 101 | static int notrace s390_validate_registers(union mci mci) |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 102 | { |
| 103 | int kill_task; |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 104 | u64 zero; |
| 105 | void *fpt_save_area, *fpt_creg_save_area; |
| 106 | |
| 107 | kill_task = 0; |
| 108 | zero = 0; |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 109 | |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 110 | if (!mci.gr) { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 111 | /* |
| 112 | * General purpose registers couldn't be restored and have |
| 113 | * unknown contents. Process needs to be terminated. |
| 114 | */ |
| 115 | kill_task = 1; |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 116 | } |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 117 | if (!mci.fp) { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 118 | /* |
| 119 | * Floating point registers can't be restored and |
| 120 | * therefore the process needs to be terminated. |
| 121 | */ |
| 122 | kill_task = 1; |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 123 | } |
Heiko Carstens | 5a79859 | 2015-02-12 13:08:27 +0100 | [diff] [blame] | 124 | fpt_save_area = &S390_lowcore.floating_pt_save_area; |
| 125 | fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area; |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 126 | if (!mci.fc) { |
Heiko Carstens | 5a79859 | 2015-02-12 13:08:27 +0100 | [diff] [blame] | 127 | /* |
| 128 | * Floating point control register can't be restored. |
| 129 | * Task will be terminated. |
| 130 | */ |
| 131 | asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); |
| 132 | kill_task = 1; |
| 133 | } else |
| 134 | asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area)); |
| 135 | |
Heiko Carstens | cad49cf | 2015-07-07 08:40:49 +0200 | [diff] [blame] | 136 | if (!MACHINE_HAS_VX) { |
Heiko Carstens | 975be63 | 2015-10-12 13:03:05 +0200 | [diff] [blame] | 137 | /* Validate floating point registers */ |
Heiko Carstens | cad49cf | 2015-07-07 08:40:49 +0200 | [diff] [blame] | 138 | asm volatile( |
| 139 | " ld 0,0(%0)\n" |
| 140 | " ld 1,8(%0)\n" |
| 141 | " ld 2,16(%0)\n" |
| 142 | " ld 3,24(%0)\n" |
| 143 | " ld 4,32(%0)\n" |
| 144 | " ld 5,40(%0)\n" |
| 145 | " ld 6,48(%0)\n" |
| 146 | " ld 7,56(%0)\n" |
| 147 | " ld 8,64(%0)\n" |
| 148 | " ld 9,72(%0)\n" |
| 149 | " ld 10,80(%0)\n" |
| 150 | " ld 11,88(%0)\n" |
| 151 | " ld 12,96(%0)\n" |
| 152 | " ld 13,104(%0)\n" |
| 153 | " ld 14,112(%0)\n" |
| 154 | " ld 15,120(%0)\n" |
| 155 | : : "a" (fpt_save_area)); |
| 156 | } else { |
Heiko Carstens | 975be63 | 2015-10-12 13:03:05 +0200 | [diff] [blame] | 157 | /* Validate vector registers */ |
Heiko Carstens | cad49cf | 2015-07-07 08:40:49 +0200 | [diff] [blame] | 158 | union ctlreg0 cr0; |
| 159 | |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 160 | if (!mci.vr) { |
Martin Schwidefsky | 8070361 | 2014-10-06 17:53:53 +0200 | [diff] [blame] | 161 | /* |
| 162 | * Vector registers can't be restored and therefore |
| 163 | * the process needs to be terminated. |
| 164 | */ |
| 165 | kill_task = 1; |
| 166 | } |
Heiko Carstens | cad49cf | 2015-07-07 08:40:49 +0200 | [diff] [blame] | 167 | cr0.val = S390_lowcore.cregs_save_area[0]; |
| 168 | cr0.afp = cr0.vx = 1; |
| 169 | __ctl_load(cr0.val, 0, 0); |
Hendrik Brueckner | 9977e88 | 2015-06-10 12:53:42 +0200 | [diff] [blame] | 170 | asm volatile( |
| 171 | " la 1,%0\n" |
| 172 | " .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */ |
| 173 | " .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */ |
| 174 | : : "Q" (*(struct vx_array *) |
| 175 | &S390_lowcore.vector_save_area) : "1"); |
Heiko Carstens | cad49cf | 2015-07-07 08:40:49 +0200 | [diff] [blame] | 176 | __ctl_load(S390_lowcore.cregs_save_area[0], 0, 0); |
Martin Schwidefsky | 8070361 | 2014-10-06 17:53:53 +0200 | [diff] [blame] | 177 | } |
Heiko Carstens | 975be63 | 2015-10-12 13:03:05 +0200 | [diff] [blame] | 178 | /* Validate access registers */ |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 179 | asm volatile( |
| 180 | " lam 0,15,0(%0)" |
| 181 | : : "a" (&S390_lowcore.access_regs_save_area)); |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 182 | if (!mci.ar) { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 183 | /* |
| 184 | * Access registers have unknown contents. |
| 185 | * Terminating task. |
| 186 | */ |
| 187 | kill_task = 1; |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 188 | } |
Heiko Carstens | 975be63 | 2015-10-12 13:03:05 +0200 | [diff] [blame] | 189 | /* Validate control registers */ |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 190 | if (!mci.cr) { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 191 | /* |
| 192 | * Control registers have unknown contents. |
| 193 | * Can't recover and therefore stopping machine. |
| 194 | */ |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 195 | s390_handle_damage(); |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 196 | } else { |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 197 | asm volatile( |
| 198 | " lctlg 0,15,0(%0)" |
| 199 | : : "a" (&S390_lowcore.cregs_save_area)); |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 200 | } |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 201 | /* |
Heiko Carstens | 975be63 | 2015-10-12 13:03:05 +0200 | [diff] [blame] | 202 | * We don't even try to validate the TOD register, since we simply |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 203 | * can't write something sensible into that register. |
| 204 | */ |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 205 | /* |
Heiko Carstens | 975be63 | 2015-10-12 13:03:05 +0200 | [diff] [blame] | 206 | * See if we can validate the TOD programmable register with its |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 207 | * old contents (should be zero) otherwise set it to zero. |
| 208 | */ |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 209 | if (!mci.pr) |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 210 | asm volatile( |
| 211 | " sr 0,0\n" |
| 212 | " sckpf" |
| 213 | : : : "0", "cc"); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 214 | else |
| 215 | asm volatile( |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 216 | " l 0,0(%0)\n" |
| 217 | " sckpf" |
| 218 | : : "a" (&S390_lowcore.tod_progreg_save_area) |
| 219 | : "0", "cc"); |
Heiko Carstens | 975be63 | 2015-10-12 13:03:05 +0200 | [diff] [blame] | 220 | /* Validate clock comparator register */ |
Martin Schwidefsky | b6bed09 | 2013-08-08 12:37:00 +0200 | [diff] [blame] | 221 | set_clock_comparator(S390_lowcore.clock_comparator); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 222 | /* Check if old PSW is valid */ |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 223 | if (!mci.wp) |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 224 | /* |
| 225 | * Can't tell if we come from user or kernel mode |
| 226 | * -> stopping machine. |
| 227 | */ |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 228 | s390_handle_damage(); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 229 | |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 230 | if (!mci.ms || !mci.pm || !mci.ia) |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 231 | kill_task = 1; |
| 232 | |
| 233 | return kill_task; |
| 234 | } |
| 235 | |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 236 | #define MAX_IPD_COUNT 29 |
Heiko Carstens | 022e4fc | 2006-05-01 12:16:14 -0700 | [diff] [blame] | 237 | #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */ |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 238 | |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 239 | #define ED_STP_ISLAND 6 /* External damage STP island check */ |
| 240 | #define ED_STP_SYNC 7 /* External damage STP sync check */ |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 241 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 242 | /* |
| 243 | * machine check handler. |
| 244 | */ |
Heiko Carstens | cc54c1e | 2009-03-26 15:23:59 +0100 | [diff] [blame] | 245 | void notrace s390_do_machine_check(struct pt_regs *regs) |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 246 | { |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 247 | static int ipd_count; |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 248 | static DEFINE_SPINLOCK(ipd_lock); |
| 249 | static unsigned long long last_ipd; |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 250 | struct mcck_struct *mcck; |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 251 | unsigned long long tmp; |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 252 | union mci mci; |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 253 | int umode; |
| 254 | |
Heiko Carstens | 81f64b8 | 2009-04-14 15:36:18 +0200 | [diff] [blame] | 255 | nmi_enter(); |
Heiko Carstens | 420f42e | 2013-01-02 15:18:18 +0100 | [diff] [blame] | 256 | inc_irq_stat(NMI_NMI); |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 257 | mci.val = S390_lowcore.mcck_interruption_code; |
Christoph Lameter | eb7e7d7 | 2014-08-17 12:30:45 -0500 | [diff] [blame] | 258 | mcck = this_cpu_ptr(&cpu_mcck); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 259 | umode = user_mode(regs); |
| 260 | |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 261 | if (mci.sd) { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 262 | /* System damage -> stopping machine */ |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 263 | s390_handle_damage(); |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 264 | } |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 265 | if (mci.pd) { |
| 266 | if (mci.b) { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 267 | /* Processing backup -> verify if we can survive this */ |
| 268 | u64 z_mcic, o_mcic, t_mcic; |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 269 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); |
| 270 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | |
| 271 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | |
| 272 | 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | |
| 273 | 1ULL<<16); |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 274 | t_mcic = mci.val; |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 275 | |
| 276 | if (((t_mcic & z_mcic) != 0) || |
| 277 | ((t_mcic & o_mcic) != o_mcic)) { |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 278 | s390_handle_damage(); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 279 | } |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 280 | |
| 281 | /* |
| 282 | * Nullifying exigent condition, therefore we might |
| 283 | * retry this instruction. |
| 284 | */ |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 285 | spin_lock(&ipd_lock); |
Heiko Carstens | 1aae056 | 2013-01-30 09:49:40 +0100 | [diff] [blame] | 286 | tmp = get_tod_clock(); |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 287 | if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME) |
| 288 | ipd_count++; |
| 289 | else |
| 290 | ipd_count = 1; |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 291 | last_ipd = tmp; |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 292 | if (ipd_count == MAX_IPD_COUNT) |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 293 | s390_handle_damage(); |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 294 | spin_unlock(&ipd_lock); |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 295 | } else { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 296 | /* Processing damage -> stopping machine */ |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 297 | s390_handle_damage(); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 298 | } |
| 299 | } |
Heiko Carstens | 975be63 | 2015-10-12 13:03:05 +0200 | [diff] [blame] | 300 | if (s390_validate_registers(mci)) { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 301 | if (umode) { |
| 302 | /* |
| 303 | * Couldn't restore all register contents while in |
| 304 | * user mode -> mark task for termination. |
| 305 | */ |
| 306 | mcck->kill_task = 1; |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 307 | mcck->mcck_code = mci.val; |
Martin Schwidefsky | d3a73ac | 2014-04-15 12:55:07 +0200 | [diff] [blame] | 308 | set_cpu_flag(CIF_MCCK_PENDING); |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 309 | } else { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 310 | /* |
| 311 | * Couldn't restore all register contents while in |
| 312 | * kernel mode -> stopping machine. |
| 313 | */ |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 314 | s390_handle_damage(); |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 315 | } |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 316 | } |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 317 | if (mci.cd) { |
Martin Schwidefsky | d54853e | 2007-02-05 21:18:19 +0100 | [diff] [blame] | 318 | /* Timing facility damage */ |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 319 | s390_handle_damage(); |
Martin Schwidefsky | d54853e | 2007-02-05 21:18:19 +0100 | [diff] [blame] | 320 | } |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 321 | if (mci.ed && mci.ec) { |
Martin Schwidefsky | d54853e | 2007-02-05 21:18:19 +0100 | [diff] [blame] | 322 | /* External damage */ |
Martin Schwidefsky | d2fec59 | 2008-07-14 09:58:56 +0200 | [diff] [blame] | 323 | if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC)) |
Heiko Carstens | 29b0a82 | 2015-10-09 13:48:03 +0200 | [diff] [blame] | 324 | mcck->stp_queue |= stp_sync_check(); |
Martin Schwidefsky | d2fec59 | 2008-07-14 09:58:56 +0200 | [diff] [blame] | 325 | if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND)) |
Heiko Carstens | 29b0a82 | 2015-10-09 13:48:03 +0200 | [diff] [blame] | 326 | mcck->stp_queue |= stp_island_check(); |
Martin Schwidefsky | fd5ada0 | 2016-05-31 15:06:51 +0200 | [diff] [blame] | 327 | if (mcck->stp_queue) |
Heiko Carstens | 29b0a82 | 2015-10-09 13:48:03 +0200 | [diff] [blame] | 328 | set_cpu_flag(CIF_MCCK_PENDING); |
Martin Schwidefsky | d54853e | 2007-02-05 21:18:19 +0100 | [diff] [blame] | 329 | } |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 330 | if (mci.se) |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 331 | /* Storage error uncorrected */ |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 332 | s390_handle_damage(); |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 333 | if (mci.ke) |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 334 | /* Storage key-error uncorrected */ |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 335 | s390_handle_damage(); |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 336 | if (mci.ds && mci.fa) |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 337 | /* Storage degradation */ |
Heiko Carstens | 3d68286 | 2015-10-12 12:39:09 +0200 | [diff] [blame] | 338 | s390_handle_damage(); |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 339 | if (mci.cp) { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 340 | /* Channel report word pending */ |
| 341 | mcck->channel_report = 1; |
Martin Schwidefsky | d3a73ac | 2014-04-15 12:55:07 +0200 | [diff] [blame] | 342 | set_cpu_flag(CIF_MCCK_PENDING); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 343 | } |
Heiko Carstens | dc6e155 | 2015-10-12 13:00:39 +0200 | [diff] [blame] | 344 | if (mci.w) { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 345 | /* Warning pending */ |
| 346 | mcck->warning = 1; |
Martin Schwidefsky | d3a73ac | 2014-04-15 12:55:07 +0200 | [diff] [blame] | 347 | set_cpu_flag(CIF_MCCK_PENDING); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 348 | } |
Heiko Carstens | 81f64b8 | 2009-04-14 15:36:18 +0200 | [diff] [blame] | 349 | nmi_exit(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | } |
| 351 | |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 352 | static int __init machine_check_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | { |
Martin Schwidefsky | d54853e | 2007-02-05 21:18:19 +0100 | [diff] [blame] | 354 | ctl_set_bit(14, 25); /* enable external damage MCH */ |
Heiko Carstens | f5daba1 | 2009-03-26 15:24:01 +0100 | [diff] [blame] | 355 | ctl_set_bit(14, 27); /* enable system recovery MCH */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | ctl_set_bit(14, 24); /* enable warning MCH */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 357 | return 0; |
| 358 | } |
Heiko Carstens | 24d05ff | 2015-08-17 08:09:17 +0200 | [diff] [blame] | 359 | early_initcall(machine_check_init); |