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Rob Herring30058672013-01-28 16:13:14 +00001menuconfig MAILBOX
2 bool "Mailbox Hardware Support"
3 help
4 Mailbox is a framework to control hardware communication between
5 on-chip processors through queued messages and interrupt driven
6 signals. Say Y if your platform supports hardware mailboxes.
7
8if MAILBOX
Jassi Braree23d662014-06-26 19:09:42 +05309
10config ARM_MHU
11 tristate "ARM MHU Mailbox"
12 depends on ARM_AMBA
13 help
14 Say Y here if you want to build the ARM MHU controller driver.
15 The controller has 3 mailbox channels, the last of which can be
16 used in Secure mode only.
17
Rob Herring30058672013-01-28 16:13:14 +000018config PL320_MBOX
19 bool "ARM PL320 Mailbox"
20 depends on ARM_AMBA
21 help
22 An implementation of the ARM PL320 Interprocessor Communication
23 Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
24 send short messages between Highbank's A9 cores and the EnergyCore
25 Management Engine, primarily for cpufreq. Say Y here if you want
26 to use the PL320 IPCM support.
27
Suman Annac869c752013-03-12 17:55:29 -050028config OMAP2PLUS_MBOX
29 tristate "OMAP2+ Mailbox framework support"
30 depends on ARCH_OMAP2PLUS
Suman Annac869c752013-03-12 17:55:29 -050031 help
32 Mailbox implementation for OMAP family chips with hardware for
33 interprocessor communication involving DSP, IVA1.0 and IVA2 in
34 OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
35 want to use OMAP2+ Mailbox framework support.
36
37config OMAP_MBOX_KFIFO_SIZE
38 int "Mailbox kfifo default buffer size (bytes)"
Suman Anna79859092014-06-24 19:43:38 -050039 depends on OMAP2PLUS_MBOX
Suman Annac869c752013-03-12 17:55:29 -050040 default 256
41 help
42 Specify the default size of mailbox's kfifo buffers (bytes).
43 This can also be changed at runtime (via the mbox_kfifo_size
44 module parameter).
Ashwin Chaugule86c22f82014-11-12 19:59:38 -050045
Caesar Wangf70ed3b2015-10-27 15:31:45 +080046config ROCKCHIP_MBOX
47 bool "Rockchip Soc Intergrated Mailbox Support"
48 depends on ARCH_ROCKCHIP || COMPILE_TEST
49 help
50 This driver provides support for inter-processor communication
51 between CPU cores and MCU processor on Some Rockchip SOCs.
52 Please check it that the Soc you use have Mailbox hardware.
53 Say Y here if you want to use the Rockchip Mailbox support.
54
Ashwin Chaugule86c22f82014-11-12 19:59:38 -050055config PCC
56 bool "Platform Communication Channel Driver"
57 depends on ACPI
Ashwin Chauguleb6fc6072015-08-05 09:40:31 -040058 default n
Ashwin Chaugule86c22f82014-11-12 19:59:38 -050059 help
60 ACPI 5.0+ spec defines a generic mode of communication
61 between the OS and a platform such as the BMC. This medium
62 (PCC) is typically used by CPPC (ACPI CPU Performance management),
63 RAS (ACPI reliability protocol) and MPST (ACPI Memory power
64 states). Select this driver if your platform implements the
65 PCC clients mentioned above.
66
Ley Foon Tanf62092f2015-02-04 16:32:18 +080067config ALTERA_MBOX
68 tristate "Altera Mailbox"
Richard Weinberger59dd3f02015-05-04 20:59:46 +020069 depends on HAS_IOMEM
Ley Foon Tanf62092f2015-02-04 16:32:18 +080070 help
71 An implementation of the Altera Mailbox soft core. It is used
72 to send message between processors. Say Y here if you want to use the
73 Altera mailbox support.
Lubomir Rintel0bae6af2015-05-05 13:27:45 -070074
75config BCM2835_MBOX
76 tristate "BCM2835 Mailbox"
77 depends on ARCH_BCM2835
78 help
79 An implementation of the BCM2385 Mailbox. It is used to invoke
80 the services of the Videocore. Say Y here if you want to use the
81 BCM2835 Mailbox.
82
Lee Jones9ef45462015-10-16 08:21:28 +010083config STI_MBOX
84 tristate "STI Mailbox framework support"
85 depends on ARCH_STI && OF
86 help
87 Mailbox implementation for STMicroelectonics family chips with
88 hardware for interprocessor communication.
89
Nishanth Menonaace66b2016-03-16 19:23:14 -050090config TI_MESSAGE_MANAGER
91 tristate "Texas Instruments Message Manager Driver"
92 depends on ARCH_KEYSTONE
93 help
94 An implementation of Message Manager slave driver for Keystone
95 architecture SoCs from Texas Instruments. Message Manager is a
96 communication entity found on few of Texas Instrument's keystone
97 architecture SoCs. These may be used for communication between
98 multiple processors within the SoC. Select this driver if your
99 platform has support for the hardware block.
100
Leo Yan9c384182016-02-15 21:50:24 +0800101config HI6220_MBOX
102 tristate "Hi6220 Mailbox"
103 depends on ARCH_HISI
104 help
105 An implementation of the hi6220 mailbox. It is used to send message
106 between application processors and MCU. Say Y here if you want to
107 build Hi6220 mailbox controller driver.
108
Lee Jones8ea44842015-10-16 08:21:30 +0100109config MAILBOX_TEST
110 tristate "Mailbox Test Client"
111 depends on OF
Richard Weinberger65d3b042016-01-25 23:24:09 +0100112 depends on HAS_IOMEM
Lee Jones8ea44842015-10-16 08:21:30 +0100113 help
114 Test client to help with testing new Controller driver
115 implementations.
116
Duc Dangf700e842016-02-12 19:39:26 -0800117config XGENE_SLIMPRO_MBOX
118 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
119 depends on ARCH_XGENE
120 help
121 An implementation of the APM X-Gene Interprocessor Communication
122 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
123 It is used to send short messages between ARM64-bit cores and
124 the SLIMpro Management Engine, primarily for PM. Say Y here if you
125 want to use the APM X-Gene SLIMpro IPCM support.
Rob Ricea24532f2016-06-30 15:59:23 -0400126
127config BCM_PDC_MBOX
128 tristate "Broadcom PDC Mailbox"
129 depends on ARM64 || COMPILE_TEST
Rob Ricee0c6fba2016-08-01 13:03:41 -0400130 depends on HAS_DMA
Rob Ricea24532f2016-06-30 15:59:23 -0400131 default ARCH_BCM_IPROC
132 help
133 Mailbox implementation for the Broadcom PDC ring manager,
134 which provides access to various offload engines on Broadcom
135 SoCs. Say Y here if you want to use the Broadcom PDC.
Rob Herring30058672013-01-28 16:13:14 +0000136endif