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Lee Jonesd1b8bfa2012-09-26 13:29:09 +01001/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
Linus Walleij90c40252013-05-29 19:15:39 +020012#include <dt-bindings/interrupt-controller/irq.h>
Linus Walleij2ce05a12013-08-07 15:37:52 +020013#include "ste-dbx5x0.dtsi"
Linus Walleij3bfdebb2013-11-13 10:32:20 +010014#include "ste-href-family-pinctrl.dtsi"
Lee Jonesd1b8bfa2012-09-26 13:29:09 +010015
16/ {
17 memory {
18 reg = <0x00000000 0x20000000>;
19 };
20
Gabriel Fernandezb1ba1432013-03-01 14:38:07 +010021 soc {
Linus Walleija12f7032013-11-13 15:59:40 +010022 usb_per5@a03e0000 {
23 pinctrl-names = "default", "sleep";
24 pinctrl-0 = <&musb_default_mode>;
25 pinctrl-1 = <&musb_sleep_mode>;
26 };
27
Lee Jonesd1b8bfa2012-09-26 13:29:09 +010028 uart@80120000 {
Linus Walleij3bfdebb2013-11-13 10:32:20 +010029 pinctrl-names = "default", "sleep";
30 pinctrl-0 = <&uart0_default_mode>;
31 pinctrl-1 = <&uart0_sleep_mode>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +010032 status = "okay";
33 };
34
35 uart@80121000 {
Linus Walleij3bfdebb2013-11-13 10:32:20 +010036 pinctrl-names = "default", "sleep";
37 pinctrl-0 = <&uart1_default_mode>;
38 pinctrl-1 = <&uart1_sleep_mode>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +010039 status = "okay";
40 };
41
42 uart@80007000 {
Linus Walleij3bfdebb2013-11-13 10:32:20 +010043 pinctrl-names = "default", "sleep";
44 pinctrl-0 = <&uart2_default_mode>;
45 pinctrl-1 = <&uart2_sleep_mode>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +010046 status = "okay";
47 };
48
Linus Walleij96fee132013-11-13 11:10:07 +010049 i2c@80004000 {
50 pinctrl-names = "default","sleep";
51 pinctrl-0 = <&i2c0_default_mode>;
52 pinctrl-1 = <&i2c0_sleep_mode>;
53 };
54
55 i2c@80122000 {
56 pinctrl-names = "default","sleep";
57 pinctrl-0 = <&i2c1_default_mode>;
58 pinctrl-1 = <&i2c1_sleep_mode>;
59 };
60
Lee Jonesd1b8bfa2012-09-26 13:29:09 +010061 i2c@80128000 {
Linus Walleij96fee132013-11-13 11:10:07 +010062 pinctrl-names = "default","sleep";
63 pinctrl-0 = <&i2c2_default_mode>;
64 pinctrl-1 = <&i2c2_sleep_mode>;
Linus Walleij2bd73782013-05-22 10:09:39 +020065 lp5521@33 {
66 compatible = "national,lp5521";
Lee Jonesd1b8bfa2012-09-26 13:29:09 +010067 reg = <0x33>;
Linus Walleij2bd73782013-05-22 10:09:39 +020068 label = "lp5521_pri";
69 clock-mode = /bits/ 8 <2>;
70 chan0 {
71 led-cur = /bits/ 8 <0x2f>;
72 max-cur = /bits/ 8 <0x5f>;
Linus Walleij385d61c2013-09-15 12:01:07 +020073 linux,default-trigger = "heartbeat";
Linus Walleij2bd73782013-05-22 10:09:39 +020074 };
75 chan1 {
76 led-cur = /bits/ 8 <0x2f>;
77 max-cur = /bits/ 8 <0x5f>;
78 };
79 chan2 {
80 led-cur = /bits/ 8 <0x2f>;
81 max-cur = /bits/ 8 <0x5f>;
82 };
Lee Jonesd1b8bfa2012-09-26 13:29:09 +010083 };
Linus Walleij2bd73782013-05-22 10:09:39 +020084 lp5521@34 {
85 compatible = "national,lp5521";
Lee Jonesd1b8bfa2012-09-26 13:29:09 +010086 reg = <0x34>;
Linus Walleij2bd73782013-05-22 10:09:39 +020087 label = "lp5521_sec";
88 clock-mode = /bits/ 8 <2>;
89 chan0 {
90 led-cur = /bits/ 8 <0x2f>;
91 max-cur = /bits/ 8 <0x5f>;
92 };
93 chan1 {
94 led-cur = /bits/ 8 <0x2f>;
95 max-cur = /bits/ 8 <0x5f>;
96 };
97 chan2 {
98 led-cur = /bits/ 8 <0x2f>;
99 max-cur = /bits/ 8 <0x5f>;
100 };
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100101 };
Linus Walleijd5942242013-06-04 11:50:32 +0200102 bh1780@29 {
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100103 compatible = "rohm,bh1780gli";
Linus Walleij7e9dee02013-10-02 13:40:09 +0200104 reg = <0x29>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100105 };
106 };
107
Linus Walleij96fee132013-11-13 11:10:07 +0100108 i2c@80110000 {
109 pinctrl-names = "default","sleep";
110 pinctrl-0 = <&i2c3_default_mode>;
111 pinctrl-1 = <&i2c3_sleep_mode>;
112 };
113
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100114 // External Micro SD slot
115 sdi0_per1@80126000 {
116 arm,primecell-periphid = <0x10480180>;
Linus Walleij90ccde42013-05-27 13:15:05 +0200117 max-frequency = <100000000>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100118 bus-width = <4>;
Ulf Hansson30cdd662014-03-18 20:34:04 +0100119 cap-sd-highspeed;
120 cap-mmc-highspeed;
Ulf Hansson09585ab2014-03-19 14:11:44 +0100121 sd-uhs-sdr12;
122 sd-uhs-sdr25;
123 full-pwr-cycle;
Ulf Hanssond63df632014-03-18 10:47:25 +0100124 st,sig-dir-dat0;
125 st,sig-dir-dat2;
126 st,sig-dir-cmd;
127 st,sig-pin-fbclk;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100128 vmmc-supply = <&ab8500_ldo_aux3_reg>;
Lee Jonesd05b0662012-12-06 15:08:45 +0000129 vqmmc-supply = <&vmmci>;
Linus Walleij1e662352013-11-13 13:46:57 +0100130 pinctrl-names = "default", "sleep";
131 pinctrl-0 = <&sdi0_default_mode>;
132 pinctrl-1 = <&sdi0_sleep_mode>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100133
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100134 status = "okay";
135 };
136
137 // WLAN SDIO channel
138 sdi1_per2@80118000 {
139 arm,primecell-periphid = <0x10480180>;
Linus Walleij90ccde42013-05-27 13:15:05 +0200140 max-frequency = <100000000>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100141 bus-width = <4>;
Ulf Hansson09585ab2014-03-19 14:11:44 +0100142 non-removable;
Linus Walleij1e662352013-11-13 13:46:57 +0100143 pinctrl-names = "default", "sleep";
144 pinctrl-0 = <&sdi1_default_mode>;
145 pinctrl-1 = <&sdi1_sleep_mode>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100146
147 status = "okay";
148 };
149
150 // PoP:ed eMMC
151 sdi2_per3@80005000 {
152 arm,primecell-periphid = <0x10480180>;
Linus Walleij90ccde42013-05-27 13:15:05 +0200153 max-frequency = <100000000>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100154 bus-width = <8>;
Ulf Hansson30cdd662014-03-18 20:34:04 +0100155 cap-mmc-highspeed;
Ulf Hansson09585ab2014-03-19 14:11:44 +0100156 non-removable;
Ulf Hanssone1a309a2014-03-20 14:07:34 +0100157 vmmc-supply = <&db8500_vsmps2_reg>;
Linus Walleij1e662352013-11-13 13:46:57 +0100158 pinctrl-names = "default", "sleep";
159 pinctrl-0 = <&sdi2_default_mode>;
160 pinctrl-1 = <&sdi2_sleep_mode>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100161
162 status = "okay";
163 };
164
165 // On-board eMMC
166 sdi4_per2@80114000 {
167 arm,primecell-periphid = <0x10480180>;
Linus Walleij90ccde42013-05-27 13:15:05 +0200168 max-frequency = <100000000>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100169 bus-width = <8>;
Ulf Hansson30cdd662014-03-18 20:34:04 +0100170 cap-mmc-highspeed;
Ulf Hansson09585ab2014-03-19 14:11:44 +0100171 non-removable;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100172 vmmc-supply = <&ab8500_ldo_aux2_reg>;
Linus Walleij1e662352013-11-13 13:46:57 +0100173 pinctrl-names = "default", "sleep";
174 pinctrl-0 = <&sdi4_default_mode>;
175 pinctrl-1 = <&sdi4_sleep_mode>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100176
177 status = "okay";
178 };
179
180 sound {
181 compatible = "stericsson,snd-soc-mop500";
182
183 stericsson,cpu-dai = <&msp1 &msp3>;
184 stericsson,audio-codec = <&codec>;
185 };
186
Linus Walleij70b41ab2013-11-13 14:45:06 +0100187 msp0: msp@80123000 {
188 pinctrl-names = "default";
189 pinctrl-0 = <&msp0_default_mode>;
190 status = "okay";
191 };
192
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100193 msp1: msp@80124000 {
Linus Walleij70b41ab2013-11-13 14:45:06 +0100194 pinctrl-names = "default";
195 pinctrl-0 = <&msp1_default_mode>;
196 status = "okay";
197 };
198
199 msp2: msp@80117000 {
200 pinctrl-names = "default";
201 pinctrl-0 = <&msp2_default_mode>;
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100202 };
203
204 msp3: msp@80125000 {
205 status = "okay";
206 };
207
208 prcmu@80157000 {
Arnd Bergmannd52701d32013-03-12 09:39:01 +0100209 ab8500 {
Linus Walleijc90c36e2013-09-26 15:09:14 +0200210 ab8500-gpio {
211 compatible = "stericsson,ab8500-gpio";
212 };
213
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100214 ab8500-regulators {
215 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
216 regulator-name = "V-DISPLAY";
217 };
218
219 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
220 regulator-name = "V-eMMC1";
221 };
222
223 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
224 regulator-name = "V-MMC-SD";
225 };
226
Fabio Baltieri99b38ee2013-04-09 11:16:56 +0200227 ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100228 regulator-name = "V-INTCORE";
229 };
230
231 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
232 regulator-name = "V-TVOUT";
233 };
234
235 ab8500_ldo_usb_reg: ab8500_ldo_usb {
236 regulator-name = "dummy";
237 };
238
239 ab8500_ldo_audio_reg: ab8500_ldo_audio {
240 regulator-name = "V-AUD";
241 };
242
243 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
244 regulator-name = "V-AMIC1";
245 };
246
Fabio Baltieri5510ed92013-05-30 15:27:42 +0200247 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100248 regulator-name = "V-AMIC2";
249 };
250
251 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
252 regulator-name = "V-DMIC";
253 };
254
255 ab8500_ldo_ana_reg: ab8500_ldo_ana {
256 regulator-name = "V-CSI/DSI";
257 };
258 };
259 };
260 };
Linus Walleij817a5b92013-11-14 15:23:20 +0100261
262 mcde@a0350000 {
263 pinctrl-names = "default", "sleep";
264 pinctrl-0 = <&lcd_default_mode>;
265 pinctrl-1 = <&lcd_sleep_mode>;
266 };
Lee Jonesd1b8bfa2012-09-26 13:29:09 +0100267 };
268};