blob: 0d47d6ffe68a4fc670119c1c0a047fab0f6cafb3 [file] [log] [blame]
Ben Hutchings8ceee662008-04-27 12:55:59 +01001/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#include <linux/module.h>
12#include <linux/pci.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/delay.h>
16#include <linux/notifier.h>
17#include <linux/ip.h>
18#include <linux/tcp.h>
19#include <linux/in.h>
20#include <linux/crc32.h>
21#include <linux/ethtool.h>
Ben Hutchingsaa6ef272008-07-18 19:03:10 +010022#include <linux/topology.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010023#include "net_driver.h"
24#include "gmii.h"
25#include "ethtool.h"
26#include "tx.h"
27#include "rx.h"
28#include "efx.h"
29#include "mdio_10g.h"
30#include "falcon.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010031#include "mac.h"
32
33#define EFX_MAX_MTU (9 * 1024)
34
35/* RX slow fill workqueue. If memory allocation fails in the fast path,
36 * a work item is pushed onto this work queue to retry the allocation later,
37 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
38 * workqueue, there is nothing to be gained in making it per NIC
39 */
40static struct workqueue_struct *refill_workqueue;
41
42/**************************************************************************
43 *
44 * Configurable values
45 *
46 *************************************************************************/
47
48/*
49 * Enable large receive offload (LRO) aka soft segment reassembly (SSR)
50 *
51 * This sets the default for new devices. It can be controlled later
52 * using ethtool.
53 */
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +010054static int lro = true;
Ben Hutchings8ceee662008-04-27 12:55:59 +010055module_param(lro, int, 0644);
56MODULE_PARM_DESC(lro, "Large receive offload acceleration");
57
58/*
59 * Use separate channels for TX and RX events
60 *
61 * Set this to 1 to use separate channels for TX and RX. It allows us to
62 * apply a higher level of interrupt moderation to TX events.
63 *
64 * This is forced to 0 for MSI interrupt mode as the interrupt vector
65 * is not written
66 */
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +010067static unsigned int separate_tx_and_rx_channels = true;
Ben Hutchings8ceee662008-04-27 12:55:59 +010068
69/* This is the weight assigned to each of the (per-channel) virtual
70 * NAPI devices.
71 */
72static int napi_weight = 64;
73
74/* This is the time (in jiffies) between invocations of the hardware
75 * monitor, which checks for known hardware bugs and resets the
76 * hardware and driver as necessary.
77 */
78unsigned int efx_monitor_interval = 1 * HZ;
79
80/* This controls whether or not the hardware monitor will trigger a
81 * reset when it detects an error condition.
82 */
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +010083static unsigned int monitor_reset = true;
Ben Hutchings8ceee662008-04-27 12:55:59 +010084
85/* This controls whether or not the driver will initialise devices
86 * with invalid MAC addresses stored in the EEPROM or flash. If true,
87 * such devices will be initialised with a random locally-generated
88 * MAC address. This allows for loading the sfc_mtd driver to
89 * reprogram the flash, even if the flash contents (including the MAC
90 * address) have previously been erased.
91 */
92static unsigned int allow_bad_hwaddr;
93
94/* Initial interrupt moderation settings. They can be modified after
95 * module load with ethtool.
96 *
97 * The default for RX should strike a balance between increasing the
98 * round-trip latency and reducing overhead.
99 */
100static unsigned int rx_irq_mod_usec = 60;
101
102/* Initial interrupt moderation settings. They can be modified after
103 * module load with ethtool.
104 *
105 * This default is chosen to ensure that a 10G link does not go idle
106 * while a TX queue is stopped after it has become full. A queue is
107 * restarted when it drops below half full. The time this takes (assuming
108 * worst case 3 descriptors per packet and 1024 descriptors) is
109 * 512 / 3 * 1.2 = 205 usec.
110 */
111static unsigned int tx_irq_mod_usec = 150;
112
113/* This is the first interrupt mode to try out of:
114 * 0 => MSI-X
115 * 1 => MSI
116 * 2 => legacy
117 */
118static unsigned int interrupt_mode;
119
120/* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
121 * i.e. the number of CPUs among which we may distribute simultaneous
122 * interrupt handling.
123 *
124 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
125 * The default (0) means to assign an interrupt to each package (level II cache)
126 */
127static unsigned int rss_cpus;
128module_param(rss_cpus, uint, 0444);
129MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
130
131/**************************************************************************
132 *
133 * Utility functions and prototypes
134 *
135 *************************************************************************/
136static void efx_remove_channel(struct efx_channel *channel);
137static void efx_remove_port(struct efx_nic *efx);
138static void efx_fini_napi(struct efx_nic *efx);
139static void efx_fini_channels(struct efx_nic *efx);
140
141#define EFX_ASSERT_RESET_SERIALISED(efx) \
142 do { \
Ben Hutchings3c787082008-09-01 12:49:08 +0100143 if (efx->state == STATE_RUNNING) \
Ben Hutchings8ceee662008-04-27 12:55:59 +0100144 ASSERT_RTNL(); \
145 } while (0)
146
147/**************************************************************************
148 *
149 * Event queue processing
150 *
151 *************************************************************************/
152
153/* Process channel's event queue
154 *
155 * This function is responsible for processing the event queue of a
156 * single channel. The caller must guarantee that this function will
157 * never be concurrently called more than once on the same channel,
158 * though different channels may be being processed concurrently.
159 */
Ben Hutchings4d566062008-09-01 12:47:12 +0100160static int efx_process_channel(struct efx_channel *channel, int rx_quota)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100161{
Ben Hutchings42cbe2d2008-09-01 12:48:08 +0100162 struct efx_nic *efx = channel->efx;
163 int rx_packets;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100164
Ben Hutchings42cbe2d2008-09-01 12:48:08 +0100165 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
Ben Hutchings8ceee662008-04-27 12:55:59 +0100166 !channel->enabled))
Ben Hutchings42cbe2d2008-09-01 12:48:08 +0100167 return 0;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100168
Ben Hutchings42cbe2d2008-09-01 12:48:08 +0100169 rx_packets = falcon_process_eventq(channel, rx_quota);
170 if (rx_packets == 0)
171 return 0;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100172
173 /* Deliver last RX packet. */
174 if (channel->rx_pkt) {
175 __efx_rx_packet(channel, channel->rx_pkt,
176 channel->rx_pkt_csummed);
177 channel->rx_pkt = NULL;
178 }
179
180 efx_flush_lro(channel);
181 efx_rx_strategy(channel);
182
Ben Hutchings42cbe2d2008-09-01 12:48:08 +0100183 efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100184
Ben Hutchings42cbe2d2008-09-01 12:48:08 +0100185 return rx_packets;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100186}
187
188/* Mark channel as finished processing
189 *
190 * Note that since we will not receive further interrupts for this
191 * channel before we finish processing and call the eventq_read_ack()
192 * method, there is no need to use the interrupt hold-off timers.
193 */
194static inline void efx_channel_processed(struct efx_channel *channel)
195{
Ben Hutchings5b9e2072008-05-16 21:18:14 +0100196 /* The interrupt handler for this channel may set work_pending
197 * as soon as we acknowledge the events we've seen. Make sure
198 * it's cleared before then. */
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100199 channel->work_pending = false;
Ben Hutchings5b9e2072008-05-16 21:18:14 +0100200 smp_wmb();
201
Ben Hutchings8ceee662008-04-27 12:55:59 +0100202 falcon_eventq_read_ack(channel);
203}
204
205/* NAPI poll handler
206 *
207 * NAPI guarantees serialisation of polls of the same device, which
208 * provides the guarantee required by efx_process_channel().
209 */
210static int efx_poll(struct napi_struct *napi, int budget)
211{
212 struct efx_channel *channel =
213 container_of(napi, struct efx_channel, napi_str);
214 struct net_device *napi_dev = channel->napi_dev;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100215 int rx_packets;
216
217 EFX_TRACE(channel->efx, "channel %d NAPI poll executing on CPU %d\n",
218 channel->channel, raw_smp_processor_id());
219
Ben Hutchings42cbe2d2008-09-01 12:48:08 +0100220 rx_packets = efx_process_channel(channel, budget);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100221
222 if (rx_packets < budget) {
223 /* There is no race here; although napi_disable() will
224 * only wait for netif_rx_complete(), this isn't a problem
225 * since efx_channel_processed() will have no effect if
226 * interrupts have already been disabled.
227 */
228 netif_rx_complete(napi_dev, napi);
229 efx_channel_processed(channel);
230 }
231
232 return rx_packets;
233}
234
235/* Process the eventq of the specified channel immediately on this CPU
236 *
237 * Disable hardware generated interrupts, wait for any existing
238 * processing to finish, then directly poll (and ack ) the eventq.
239 * Finally reenable NAPI and interrupts.
240 *
241 * Since we are touching interrupts the caller should hold the suspend lock
242 */
243void efx_process_channel_now(struct efx_channel *channel)
244{
245 struct efx_nic *efx = channel->efx;
246
247 BUG_ON(!channel->used_flags);
248 BUG_ON(!channel->enabled);
249
250 /* Disable interrupts and wait for ISRs to complete */
251 falcon_disable_interrupts(efx);
252 if (efx->legacy_irq)
253 synchronize_irq(efx->legacy_irq);
Ben Hutchings64ee3122008-09-01 12:47:38 +0100254 if (channel->irq)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100255 synchronize_irq(channel->irq);
256
257 /* Wait for any NAPI processing to complete */
258 napi_disable(&channel->napi_str);
259
260 /* Poll the channel */
Ben Hutchings91ad7572008-05-16 21:14:27 +0100261 efx_process_channel(channel, efx->type->evq_size);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100262
263 /* Ack the eventq. This may cause an interrupt to be generated
264 * when they are reenabled */
265 efx_channel_processed(channel);
266
267 napi_enable(&channel->napi_str);
268 falcon_enable_interrupts(efx);
269}
270
271/* Create event queue
272 * Event queue memory allocations are done only once. If the channel
273 * is reset, the memory buffer will be reused; this guards against
274 * errors during channel reset and also simplifies interrupt handling.
275 */
276static int efx_probe_eventq(struct efx_channel *channel)
277{
278 EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
279
280 return falcon_probe_eventq(channel);
281}
282
283/* Prepare channel's event queue */
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +0100284static void efx_init_eventq(struct efx_channel *channel)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100285{
286 EFX_LOG(channel->efx, "chan %d init event queue\n", channel->channel);
287
288 channel->eventq_read_ptr = 0;
289
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +0100290 falcon_init_eventq(channel);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100291}
292
293static void efx_fini_eventq(struct efx_channel *channel)
294{
295 EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
296
297 falcon_fini_eventq(channel);
298}
299
300static void efx_remove_eventq(struct efx_channel *channel)
301{
302 EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
303
304 falcon_remove_eventq(channel);
305}
306
307/**************************************************************************
308 *
309 * Channel handling
310 *
311 *************************************************************************/
312
Ben Hutchings8ceee662008-04-27 12:55:59 +0100313static int efx_probe_channel(struct efx_channel *channel)
314{
315 struct efx_tx_queue *tx_queue;
316 struct efx_rx_queue *rx_queue;
317 int rc;
318
319 EFX_LOG(channel->efx, "creating channel %d\n", channel->channel);
320
321 rc = efx_probe_eventq(channel);
322 if (rc)
323 goto fail1;
324
325 efx_for_each_channel_tx_queue(tx_queue, channel) {
326 rc = efx_probe_tx_queue(tx_queue);
327 if (rc)
328 goto fail2;
329 }
330
331 efx_for_each_channel_rx_queue(rx_queue, channel) {
332 rc = efx_probe_rx_queue(rx_queue);
333 if (rc)
334 goto fail3;
335 }
336
337 channel->n_rx_frm_trunc = 0;
338
339 return 0;
340
341 fail3:
342 efx_for_each_channel_rx_queue(rx_queue, channel)
343 efx_remove_rx_queue(rx_queue);
344 fail2:
345 efx_for_each_channel_tx_queue(tx_queue, channel)
346 efx_remove_tx_queue(tx_queue);
347 fail1:
348 return rc;
349}
350
351
352/* Channels are shutdown and reinitialised whilst the NIC is running
353 * to propagate configuration changes (mtu, checksum offload), or
354 * to clear hardware error conditions
355 */
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +0100356static void efx_init_channels(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100357{
358 struct efx_tx_queue *tx_queue;
359 struct efx_rx_queue *rx_queue;
360 struct efx_channel *channel;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100361
Ben Hutchingsf7f13b02008-05-16 21:15:06 +0100362 /* Calculate the rx buffer allocation parameters required to
363 * support the current MTU, including padding for header
364 * alignment and overruns.
365 */
366 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
367 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
368 efx->type->rx_buffer_padding);
369 efx->rx_buffer_order = get_order(efx->rx_buffer_len);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100370
371 /* Initialise the channels */
372 efx_for_each_channel(channel, efx) {
373 EFX_LOG(channel->efx, "init chan %d\n", channel->channel);
374
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +0100375 efx_init_eventq(channel);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100376
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +0100377 efx_for_each_channel_tx_queue(tx_queue, channel)
378 efx_init_tx_queue(tx_queue);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100379
380 /* The rx buffer allocation strategy is MTU dependent */
381 efx_rx_strategy(channel);
382
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +0100383 efx_for_each_channel_rx_queue(rx_queue, channel)
384 efx_init_rx_queue(rx_queue);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100385
386 WARN_ON(channel->rx_pkt != NULL);
387 efx_rx_strategy(channel);
388 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100389}
390
391/* This enables event queue processing and packet transmission.
392 *
393 * Note that this function is not allowed to fail, since that would
394 * introduce too much complexity into the suspend/resume path.
395 */
396static void efx_start_channel(struct efx_channel *channel)
397{
398 struct efx_rx_queue *rx_queue;
399
400 EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
401
402 if (!(channel->efx->net_dev->flags & IFF_UP))
403 netif_napi_add(channel->napi_dev, &channel->napi_str,
404 efx_poll, napi_weight);
405
Ben Hutchings5b9e2072008-05-16 21:18:14 +0100406 /* The interrupt handler for this channel may set work_pending
407 * as soon as we enable it. Make sure it's cleared before
408 * then. Similarly, make sure it sees the enabled flag set. */
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100409 channel->work_pending = false;
410 channel->enabled = true;
Ben Hutchings5b9e2072008-05-16 21:18:14 +0100411 smp_wmb();
Ben Hutchings8ceee662008-04-27 12:55:59 +0100412
413 napi_enable(&channel->napi_str);
414
415 /* Load up RX descriptors */
416 efx_for_each_channel_rx_queue(rx_queue, channel)
417 efx_fast_push_rx_descriptors(rx_queue);
418}
419
420/* This disables event queue processing and packet transmission.
421 * This function does not guarantee that all queue processing
422 * (e.g. RX refill) is complete.
423 */
424static void efx_stop_channel(struct efx_channel *channel)
425{
426 struct efx_rx_queue *rx_queue;
427
428 if (!channel->enabled)
429 return;
430
431 EFX_LOG(channel->efx, "stop chan %d\n", channel->channel);
432
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100433 channel->enabled = false;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100434 napi_disable(&channel->napi_str);
435
436 /* Ensure that any worker threads have exited or will be no-ops */
437 efx_for_each_channel_rx_queue(rx_queue, channel) {
438 spin_lock_bh(&rx_queue->add_lock);
439 spin_unlock_bh(&rx_queue->add_lock);
440 }
441}
442
443static void efx_fini_channels(struct efx_nic *efx)
444{
445 struct efx_channel *channel;
446 struct efx_tx_queue *tx_queue;
447 struct efx_rx_queue *rx_queue;
448
449 EFX_ASSERT_RESET_SERIALISED(efx);
450 BUG_ON(efx->port_enabled);
451
452 efx_for_each_channel(channel, efx) {
453 EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
454
455 efx_for_each_channel_rx_queue(rx_queue, channel)
456 efx_fini_rx_queue(rx_queue);
457 efx_for_each_channel_tx_queue(tx_queue, channel)
458 efx_fini_tx_queue(tx_queue);
459 }
460
461 /* Do the event queues last so that we can handle flush events
462 * for all DMA queues. */
463 efx_for_each_channel(channel, efx) {
464 EFX_LOG(channel->efx, "shut down evq %d\n", channel->channel);
465
466 efx_fini_eventq(channel);
467 }
468}
469
470static void efx_remove_channel(struct efx_channel *channel)
471{
472 struct efx_tx_queue *tx_queue;
473 struct efx_rx_queue *rx_queue;
474
475 EFX_LOG(channel->efx, "destroy chan %d\n", channel->channel);
476
477 efx_for_each_channel_rx_queue(rx_queue, channel)
478 efx_remove_rx_queue(rx_queue);
479 efx_for_each_channel_tx_queue(tx_queue, channel)
480 efx_remove_tx_queue(tx_queue);
481 efx_remove_eventq(channel);
482
483 channel->used_flags = 0;
484}
485
486void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay)
487{
488 queue_delayed_work(refill_workqueue, &rx_queue->work, delay);
489}
490
491/**************************************************************************
492 *
493 * Port handling
494 *
495 **************************************************************************/
496
497/* This ensures that the kernel is kept informed (via
498 * netif_carrier_on/off) of the link status, and also maintains the
499 * link status's stop on the port's TX queue.
500 */
501static void efx_link_status_changed(struct efx_nic *efx)
502{
Ben Hutchings8ceee662008-04-27 12:55:59 +0100503 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
504 * that no events are triggered between unregister_netdev() and the
505 * driver unloading. A more general condition is that NETDEV_CHANGE
506 * can only be generated between NETDEV_UP and NETDEV_DOWN */
507 if (!netif_running(efx->net_dev))
508 return;
509
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100510 if (efx->port_inhibited) {
511 netif_carrier_off(efx->net_dev);
512 return;
513 }
514
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100515 if (efx->link_up != netif_carrier_ok(efx->net_dev)) {
Ben Hutchings8ceee662008-04-27 12:55:59 +0100516 efx->n_link_state_changes++;
517
518 if (efx->link_up)
519 netif_carrier_on(efx->net_dev);
520 else
521 netif_carrier_off(efx->net_dev);
522 }
523
524 /* Status message for kernel log */
525 if (efx->link_up) {
526 struct mii_if_info *gmii = &efx->mii;
527 unsigned adv, lpa;
528 /* NONE here means direct XAUI from the controller, with no
529 * MDIO-attached device we can query. */
530 if (efx->phy_type != PHY_TYPE_NONE) {
531 adv = gmii_advertised(gmii);
532 lpa = gmii_lpa(gmii);
533 } else {
534 lpa = GM_LPA_10000 | LPA_DUPLEX;
535 adv = lpa;
536 }
537 EFX_INFO(efx, "link up at %dMbps %s-duplex "
538 "(adv %04x lpa %04x) (MTU %d)%s\n",
539 (efx->link_options & GM_LPA_10000 ? 10000 :
540 (efx->link_options & GM_LPA_1000 ? 1000 :
541 (efx->link_options & GM_LPA_100 ? 100 :
542 10))),
543 (efx->link_options & GM_LPA_DUPLEX ?
544 "full" : "half"),
545 adv, lpa,
546 efx->net_dev->mtu,
547 (efx->promiscuous ? " [PROMISC]" : ""));
548 } else {
549 EFX_INFO(efx, "link down\n");
550 }
551
552}
553
554/* This call reinitialises the MAC to pick up new PHY settings. The
555 * caller must hold the mac_lock */
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100556void __efx_reconfigure_port(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100557{
558 WARN_ON(!mutex_is_locked(&efx->mac_lock));
559
560 EFX_LOG(efx, "reconfiguring MAC from PHY settings on CPU %d\n",
561 raw_smp_processor_id());
562
Ben Hutchingsa816f752008-09-01 12:49:12 +0100563 /* Serialise the promiscuous flag with efx_set_multicast_list. */
564 if (efx_dev_registered(efx)) {
565 netif_addr_lock_bh(efx->net_dev);
566 netif_addr_unlock_bh(efx->net_dev);
567 }
568
Ben Hutchings8ceee662008-04-27 12:55:59 +0100569 falcon_reconfigure_xmac(efx);
570
571 /* Inform kernel of loss/gain of carrier */
572 efx_link_status_changed(efx);
573}
574
575/* Reinitialise the MAC to pick up new PHY settings, even if the port is
576 * disabled. */
577void efx_reconfigure_port(struct efx_nic *efx)
578{
579 EFX_ASSERT_RESET_SERIALISED(efx);
580
581 mutex_lock(&efx->mac_lock);
582 __efx_reconfigure_port(efx);
583 mutex_unlock(&efx->mac_lock);
584}
585
586/* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
587 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
588 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
589static void efx_reconfigure_work(struct work_struct *data)
590{
591 struct efx_nic *efx = container_of(data, struct efx_nic,
592 reconfigure_work);
593
594 mutex_lock(&efx->mac_lock);
595 if (efx->port_enabled)
596 __efx_reconfigure_port(efx);
597 mutex_unlock(&efx->mac_lock);
598}
599
600static int efx_probe_port(struct efx_nic *efx)
601{
602 int rc;
603
604 EFX_LOG(efx, "create port\n");
605
606 /* Connect up MAC/PHY operations table and read MAC address */
607 rc = falcon_probe_port(efx);
608 if (rc)
609 goto err;
610
611 /* Sanity check MAC address */
612 if (is_valid_ether_addr(efx->mac_address)) {
613 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
614 } else {
615 DECLARE_MAC_BUF(mac);
616
617 EFX_ERR(efx, "invalid MAC address %s\n",
618 print_mac(mac, efx->mac_address));
619 if (!allow_bad_hwaddr) {
620 rc = -EINVAL;
621 goto err;
622 }
623 random_ether_addr(efx->net_dev->dev_addr);
624 EFX_INFO(efx, "using locally-generated MAC %s\n",
625 print_mac(mac, efx->net_dev->dev_addr));
626 }
627
628 return 0;
629
630 err:
631 efx_remove_port(efx);
632 return rc;
633}
634
635static int efx_init_port(struct efx_nic *efx)
636{
637 int rc;
638
639 EFX_LOG(efx, "init port\n");
640
641 /* Initialise the MAC and PHY */
642 rc = falcon_init_xmac(efx);
643 if (rc)
644 return rc;
645
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100646 efx->port_initialized = true;
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100647 efx->stats_enabled = true;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100648
649 /* Reconfigure port to program MAC registers */
650 falcon_reconfigure_xmac(efx);
651
652 return 0;
653}
654
655/* Allow efx_reconfigure_port() to be scheduled, and close the window
656 * between efx_stop_port and efx_flush_all whereby a previously scheduled
657 * efx_reconfigure_port() may have been cancelled */
658static void efx_start_port(struct efx_nic *efx)
659{
660 EFX_LOG(efx, "start port\n");
661 BUG_ON(efx->port_enabled);
662
663 mutex_lock(&efx->mac_lock);
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100664 efx->port_enabled = true;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100665 __efx_reconfigure_port(efx);
666 mutex_unlock(&efx->mac_lock);
667}
668
669/* Prevent efx_reconfigure_work and efx_monitor() from executing, and
670 * efx_set_multicast_list() from scheduling efx_reconfigure_work.
671 * efx_reconfigure_work can still be scheduled via NAPI processing
672 * until efx_flush_all() is called */
673static void efx_stop_port(struct efx_nic *efx)
674{
675 EFX_LOG(efx, "stop port\n");
676
677 mutex_lock(&efx->mac_lock);
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100678 efx->port_enabled = false;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100679 mutex_unlock(&efx->mac_lock);
680
681 /* Serialise against efx_set_multicast_list() */
Ben Hutchings55668612008-05-16 21:16:10 +0100682 if (efx_dev_registered(efx)) {
David S. Millerb9e40852008-07-15 00:15:08 -0700683 netif_addr_lock_bh(efx->net_dev);
684 netif_addr_unlock_bh(efx->net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100685 }
686}
687
688static void efx_fini_port(struct efx_nic *efx)
689{
690 EFX_LOG(efx, "shut down port\n");
691
692 if (!efx->port_initialized)
693 return;
694
695 falcon_fini_xmac(efx);
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100696 efx->port_initialized = false;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100697
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100698 efx->link_up = false;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100699 efx_link_status_changed(efx);
700}
701
702static void efx_remove_port(struct efx_nic *efx)
703{
704 EFX_LOG(efx, "destroying port\n");
705
706 falcon_remove_port(efx);
707}
708
709/**************************************************************************
710 *
711 * NIC handling
712 *
713 **************************************************************************/
714
715/* This configures the PCI device to enable I/O and DMA. */
716static int efx_init_io(struct efx_nic *efx)
717{
718 struct pci_dev *pci_dev = efx->pci_dev;
719 dma_addr_t dma_mask = efx->type->max_dma_mask;
720 int rc;
721
722 EFX_LOG(efx, "initialising I/O\n");
723
724 rc = pci_enable_device(pci_dev);
725 if (rc) {
726 EFX_ERR(efx, "failed to enable PCI device\n");
727 goto fail1;
728 }
729
730 pci_set_master(pci_dev);
731
732 /* Set the PCI DMA mask. Try all possibilities from our
733 * genuine mask down to 32 bits, because some architectures
734 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
735 * masks event though they reject 46 bit masks.
736 */
737 while (dma_mask > 0x7fffffffUL) {
738 if (pci_dma_supported(pci_dev, dma_mask) &&
739 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
740 break;
741 dma_mask >>= 1;
742 }
743 if (rc) {
744 EFX_ERR(efx, "could not find a suitable DMA mask\n");
745 goto fail2;
746 }
747 EFX_LOG(efx, "using DMA mask %llx\n", (unsigned long long) dma_mask);
748 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
749 if (rc) {
750 /* pci_set_consistent_dma_mask() is not *allowed* to
751 * fail with a mask that pci_set_dma_mask() accepted,
752 * but just in case...
753 */
754 EFX_ERR(efx, "failed to set consistent DMA mask\n");
755 goto fail2;
756 }
757
758 efx->membase_phys = pci_resource_start(efx->pci_dev,
759 efx->type->mem_bar);
760 rc = pci_request_region(pci_dev, efx->type->mem_bar, "sfc");
761 if (rc) {
762 EFX_ERR(efx, "request for memory BAR failed\n");
763 rc = -EIO;
764 goto fail3;
765 }
766 efx->membase = ioremap_nocache(efx->membase_phys,
767 efx->type->mem_map_size);
768 if (!efx->membase) {
Ben Hutchings086ea352008-05-16 21:17:06 +0100769 EFX_ERR(efx, "could not map memory BAR %d at %llx+%x\n",
770 efx->type->mem_bar,
771 (unsigned long long)efx->membase_phys,
Ben Hutchings8ceee662008-04-27 12:55:59 +0100772 efx->type->mem_map_size);
773 rc = -ENOMEM;
774 goto fail4;
775 }
Ben Hutchings086ea352008-05-16 21:17:06 +0100776 EFX_LOG(efx, "memory BAR %u at %llx+%x (virtual %p)\n",
777 efx->type->mem_bar, (unsigned long long)efx->membase_phys,
778 efx->type->mem_map_size, efx->membase);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100779
780 return 0;
781
782 fail4:
783 release_mem_region(efx->membase_phys, efx->type->mem_map_size);
784 fail3:
Ben Hutchings2c118e02008-05-16 21:15:29 +0100785 efx->membase_phys = 0;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100786 fail2:
787 pci_disable_device(efx->pci_dev);
788 fail1:
789 return rc;
790}
791
792static void efx_fini_io(struct efx_nic *efx)
793{
794 EFX_LOG(efx, "shutting down I/O\n");
795
796 if (efx->membase) {
797 iounmap(efx->membase);
798 efx->membase = NULL;
799 }
800
801 if (efx->membase_phys) {
802 pci_release_region(efx->pci_dev, efx->type->mem_bar);
Ben Hutchings2c118e02008-05-16 21:15:29 +0100803 efx->membase_phys = 0;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100804 }
805
806 pci_disable_device(efx->pci_dev);
807}
808
Ben Hutchings46123d02008-09-01 12:47:33 +0100809/* Get number of RX queues wanted. Return number of online CPU
810 * packages in the expectation that an IRQ balancer will spread
811 * interrupts across them. */
812static int efx_wanted_rx_queues(void)
813{
814 cpumask_t core_mask;
815 int count;
816 int cpu;
817
818 cpus_clear(core_mask);
819 count = 0;
820 for_each_online_cpu(cpu) {
821 if (!cpu_isset(cpu, core_mask)) {
822 ++count;
823 cpus_or(core_mask, core_mask,
824 topology_core_siblings(cpu));
825 }
826 }
827
828 return count;
829}
830
831/* Probe the number and type of interrupts we are able to obtain, and
832 * the resulting numbers of channels and RX queues.
833 */
Ben Hutchings8ceee662008-04-27 12:55:59 +0100834static void efx_probe_interrupts(struct efx_nic *efx)
835{
Ben Hutchings46123d02008-09-01 12:47:33 +0100836 int max_channels =
837 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100838 int rc, i;
839
840 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
Ben Hutchings46123d02008-09-01 12:47:33 +0100841 struct msix_entry xentries[EFX_MAX_CHANNELS];
842 int wanted_ints;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100843
Ben Hutchings46123d02008-09-01 12:47:33 +0100844 /* We want one RX queue and interrupt per CPU package
845 * (or as specified by the rss_cpus module parameter).
846 * We will need one channel per interrupt.
847 */
848 wanted_ints = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
Ben Hutchings8831da72008-09-01 12:47:48 +0100849 efx->n_rx_queues = min(wanted_ints, max_channels);
Ben Hutchingsaa6ef272008-07-18 19:03:10 +0100850
Ben Hutchings8831da72008-09-01 12:47:48 +0100851 for (i = 0; i < efx->n_rx_queues; i++)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100852 xentries[i].entry = i;
Ben Hutchings8831da72008-09-01 12:47:48 +0100853 rc = pci_enable_msix(efx->pci_dev, xentries, efx->n_rx_queues);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100854 if (rc > 0) {
Ben Hutchings8831da72008-09-01 12:47:48 +0100855 EFX_BUG_ON_PARANOID(rc >= efx->n_rx_queues);
856 efx->n_rx_queues = rc;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100857 rc = pci_enable_msix(efx->pci_dev, xentries,
Ben Hutchings8831da72008-09-01 12:47:48 +0100858 efx->n_rx_queues);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100859 }
860
861 if (rc == 0) {
Ben Hutchings8831da72008-09-01 12:47:48 +0100862 for (i = 0; i < efx->n_rx_queues; i++)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100863 efx->channel[i].irq = xentries[i].vector;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100864 } else {
865 /* Fall back to single channel MSI */
866 efx->interrupt_mode = EFX_INT_MODE_MSI;
867 EFX_ERR(efx, "could not enable MSI-X\n");
868 }
869 }
870
871 /* Try single interrupt MSI */
872 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
Ben Hutchings8831da72008-09-01 12:47:48 +0100873 efx->n_rx_queues = 1;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100874 rc = pci_enable_msi(efx->pci_dev);
875 if (rc == 0) {
876 efx->channel[0].irq = efx->pci_dev->irq;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100877 } else {
878 EFX_ERR(efx, "could not enable MSI\n");
879 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
880 }
881 }
882
883 /* Assume legacy interrupts */
884 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
Ben Hutchings8831da72008-09-01 12:47:48 +0100885 efx->n_rx_queues = 1;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100886 efx->legacy_irq = efx->pci_dev->irq;
887 }
888}
889
890static void efx_remove_interrupts(struct efx_nic *efx)
891{
892 struct efx_channel *channel;
893
894 /* Remove MSI/MSI-X interrupts */
Ben Hutchings64ee3122008-09-01 12:47:38 +0100895 efx_for_each_channel(channel, efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100896 channel->irq = 0;
897 pci_disable_msi(efx->pci_dev);
898 pci_disable_msix(efx->pci_dev);
899
900 /* Remove legacy interrupt */
901 efx->legacy_irq = 0;
902}
903
Ben Hutchings8831da72008-09-01 12:47:48 +0100904static void efx_set_channels(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100905{
906 struct efx_tx_queue *tx_queue;
907 struct efx_rx_queue *rx_queue;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100908
Ben Hutchings60ac1062008-09-01 12:44:59 +0100909 efx_for_each_tx_queue(tx_queue, efx) {
910 if (!EFX_INT_MODE_USE_MSI(efx) && separate_tx_and_rx_channels)
911 tx_queue->channel = &efx->channel[1];
912 else
913 tx_queue->channel = &efx->channel[0];
914 tx_queue->channel->used_flags |= EFX_USED_BY_TX;
915 }
Ben Hutchings8ceee662008-04-27 12:55:59 +0100916
Ben Hutchings8831da72008-09-01 12:47:48 +0100917 efx_for_each_rx_queue(rx_queue, efx) {
918 rx_queue->channel = &efx->channel[rx_queue->queue];
919 rx_queue->channel->used_flags |= EFX_USED_BY_RX;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100920 }
921}
922
923static int efx_probe_nic(struct efx_nic *efx)
924{
925 int rc;
926
927 EFX_LOG(efx, "creating NIC\n");
928
929 /* Carry out hardware-type specific initialisation */
930 rc = falcon_probe_nic(efx);
931 if (rc)
932 return rc;
933
934 /* Determine the number of channels and RX queues by trying to hook
935 * in MSI-X interrupts. */
936 efx_probe_interrupts(efx);
937
Ben Hutchings8831da72008-09-01 12:47:48 +0100938 efx_set_channels(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100939
940 /* Initialise the interrupt moderation settings */
941 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec);
942
943 return 0;
944}
945
946static void efx_remove_nic(struct efx_nic *efx)
947{
948 EFX_LOG(efx, "destroying NIC\n");
949
950 efx_remove_interrupts(efx);
951 falcon_remove_nic(efx);
952}
953
954/**************************************************************************
955 *
956 * NIC startup/shutdown
957 *
958 *************************************************************************/
959
960static int efx_probe_all(struct efx_nic *efx)
961{
962 struct efx_channel *channel;
963 int rc;
964
965 /* Create NIC */
966 rc = efx_probe_nic(efx);
967 if (rc) {
968 EFX_ERR(efx, "failed to create NIC\n");
969 goto fail1;
970 }
971
972 /* Create port */
973 rc = efx_probe_port(efx);
974 if (rc) {
975 EFX_ERR(efx, "failed to create port\n");
976 goto fail2;
977 }
978
979 /* Create channels */
980 efx_for_each_channel(channel, efx) {
981 rc = efx_probe_channel(channel);
982 if (rc) {
983 EFX_ERR(efx, "failed to create channel %d\n",
984 channel->channel);
985 goto fail3;
986 }
987 }
988
989 return 0;
990
991 fail3:
992 efx_for_each_channel(channel, efx)
993 efx_remove_channel(channel);
994 efx_remove_port(efx);
995 fail2:
996 efx_remove_nic(efx);
997 fail1:
998 return rc;
999}
1000
1001/* Called after previous invocation(s) of efx_stop_all, restarts the
1002 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1003 * and ensures that the port is scheduled to be reconfigured.
1004 * This function is safe to call multiple times when the NIC is in any
1005 * state. */
1006static void efx_start_all(struct efx_nic *efx)
1007{
1008 struct efx_channel *channel;
1009
1010 EFX_ASSERT_RESET_SERIALISED(efx);
1011
1012 /* Check that it is appropriate to restart the interface. All
1013 * of these flags are safe to read under just the rtnl lock */
1014 if (efx->port_enabled)
1015 return;
1016 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1017 return;
Ben Hutchings55668612008-05-16 21:16:10 +01001018 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
Ben Hutchings8ceee662008-04-27 12:55:59 +01001019 return;
1020
1021 /* Mark the port as enabled so port reconfigurations can start, then
1022 * restart the transmit interface early so the watchdog timer stops */
1023 efx_start_port(efx);
Steve Hodgsondacccc72008-09-01 12:48:20 +01001024 if (efx_dev_registered(efx))
1025 efx_wake_queue(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001026
1027 efx_for_each_channel(channel, efx)
1028 efx_start_channel(channel);
1029
1030 falcon_enable_interrupts(efx);
1031
1032 /* Start hardware monitor if we're in RUNNING */
1033 if (efx->state == STATE_RUNNING)
1034 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1035 efx_monitor_interval);
1036}
1037
1038/* Flush all delayed work. Should only be called when no more delayed work
1039 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1040 * since we're holding the rtnl_lock at this point. */
1041static void efx_flush_all(struct efx_nic *efx)
1042{
1043 struct efx_rx_queue *rx_queue;
1044
1045 /* Make sure the hardware monitor is stopped */
1046 cancel_delayed_work_sync(&efx->monitor_work);
1047
1048 /* Ensure that all RX slow refills are complete. */
Ben Hutchingsb3475642008-05-16 21:15:49 +01001049 efx_for_each_rx_queue(rx_queue, efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001050 cancel_delayed_work_sync(&rx_queue->work);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001051
1052 /* Stop scheduled port reconfigurations */
1053 cancel_work_sync(&efx->reconfigure_work);
1054
1055}
1056
1057/* Quiesce hardware and software without bringing the link down.
1058 * Safe to call multiple times, when the nic and interface is in any
1059 * state. The caller is guaranteed to subsequently be in a position
1060 * to modify any hardware and software state they see fit without
1061 * taking locks. */
1062static void efx_stop_all(struct efx_nic *efx)
1063{
1064 struct efx_channel *channel;
1065
1066 EFX_ASSERT_RESET_SERIALISED(efx);
1067
1068 /* port_enabled can be read safely under the rtnl lock */
1069 if (!efx->port_enabled)
1070 return;
1071
1072 /* Disable interrupts and wait for ISR to complete */
1073 falcon_disable_interrupts(efx);
1074 if (efx->legacy_irq)
1075 synchronize_irq(efx->legacy_irq);
Ben Hutchings64ee3122008-09-01 12:47:38 +01001076 efx_for_each_channel(channel, efx) {
Ben Hutchings8ceee662008-04-27 12:55:59 +01001077 if (channel->irq)
1078 synchronize_irq(channel->irq);
Ben Hutchingsb3475642008-05-16 21:15:49 +01001079 }
Ben Hutchings8ceee662008-04-27 12:55:59 +01001080
1081 /* Stop all NAPI processing and synchronous rx refills */
1082 efx_for_each_channel(channel, efx)
1083 efx_stop_channel(channel);
1084
1085 /* Stop all asynchronous port reconfigurations. Since all
1086 * event processing has already been stopped, there is no
1087 * window to loose phy events */
1088 efx_stop_port(efx);
1089
1090 /* Flush reconfigure_work, refill_workqueue, monitor_work */
1091 efx_flush_all(efx);
1092
1093 /* Isolate the MAC from the TX and RX engines, so that queue
1094 * flushes will complete in a timely fashion. */
1095 falcon_deconfigure_mac_wrapper(efx);
1096 falcon_drain_tx_fifo(efx);
1097
1098 /* Stop the kernel transmit interface late, so the watchdog
1099 * timer isn't ticking over the flush */
Ben Hutchings55668612008-05-16 21:16:10 +01001100 if (efx_dev_registered(efx)) {
Steve Hodgsondacccc72008-09-01 12:48:20 +01001101 efx_stop_queue(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001102 netif_tx_lock_bh(efx->net_dev);
1103 netif_tx_unlock_bh(efx->net_dev);
1104 }
1105}
1106
1107static void efx_remove_all(struct efx_nic *efx)
1108{
1109 struct efx_channel *channel;
1110
1111 efx_for_each_channel(channel, efx)
1112 efx_remove_channel(channel);
1113 efx_remove_port(efx);
1114 efx_remove_nic(efx);
1115}
1116
1117/* A convinience function to safely flush all the queues */
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +01001118void efx_flush_queues(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001119{
Ben Hutchings8ceee662008-04-27 12:55:59 +01001120 EFX_ASSERT_RESET_SERIALISED(efx);
1121
1122 efx_stop_all(efx);
1123
1124 efx_fini_channels(efx);
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +01001125 efx_init_channels(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001126
1127 efx_start_all(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001128}
1129
1130/**************************************************************************
1131 *
1132 * Interrupt moderation
1133 *
1134 **************************************************************************/
1135
1136/* Set interrupt moderation parameters */
1137void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs)
1138{
1139 struct efx_tx_queue *tx_queue;
1140 struct efx_rx_queue *rx_queue;
1141
1142 EFX_ASSERT_RESET_SERIALISED(efx);
1143
1144 efx_for_each_tx_queue(tx_queue, efx)
1145 tx_queue->channel->irq_moderation = tx_usecs;
1146
1147 efx_for_each_rx_queue(rx_queue, efx)
1148 rx_queue->channel->irq_moderation = rx_usecs;
1149}
1150
1151/**************************************************************************
1152 *
1153 * Hardware monitor
1154 *
1155 **************************************************************************/
1156
1157/* Run periodically off the general workqueue. Serialised against
1158 * efx_reconfigure_port via the mac_lock */
1159static void efx_monitor(struct work_struct *data)
1160{
1161 struct efx_nic *efx = container_of(data, struct efx_nic,
1162 monitor_work.work);
1163 int rc = 0;
1164
1165 EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
1166 raw_smp_processor_id());
1167
1168
1169 /* If the mac_lock is already held then it is likely a port
1170 * reconfiguration is already in place, which will likely do
1171 * most of the work of check_hw() anyway. */
1172 if (!mutex_trylock(&efx->mac_lock)) {
1173 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1174 efx_monitor_interval);
1175 return;
1176 }
1177
1178 if (efx->port_enabled)
1179 rc = falcon_check_xmac(efx);
1180 mutex_unlock(&efx->mac_lock);
1181
1182 if (rc) {
1183 if (monitor_reset) {
1184 EFX_ERR(efx, "hardware monitor detected a fault: "
1185 "triggering reset\n");
1186 efx_schedule_reset(efx, RESET_TYPE_MONITOR);
1187 } else {
1188 EFX_ERR(efx, "hardware monitor detected a fault, "
1189 "skipping reset\n");
1190 }
1191 }
1192
1193 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1194 efx_monitor_interval);
1195}
1196
1197/**************************************************************************
1198 *
1199 * ioctls
1200 *
1201 *************************************************************************/
1202
1203/* Net device ioctl
1204 * Context: process, rtnl_lock() held.
1205 */
1206static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1207{
Ben Hutchings767e4682008-09-01 12:43:14 +01001208 struct efx_nic *efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001209
1210 EFX_ASSERT_RESET_SERIALISED(efx);
1211
1212 return generic_mii_ioctl(&efx->mii, if_mii(ifr), cmd, NULL);
1213}
1214
1215/**************************************************************************
1216 *
1217 * NAPI interface
1218 *
1219 **************************************************************************/
1220
1221static int efx_init_napi(struct efx_nic *efx)
1222{
1223 struct efx_channel *channel;
1224 int rc;
1225
1226 efx_for_each_channel(channel, efx) {
1227 channel->napi_dev = efx->net_dev;
1228 rc = efx_lro_init(&channel->lro_mgr, efx);
1229 if (rc)
1230 goto err;
1231 }
1232 return 0;
1233 err:
1234 efx_fini_napi(efx);
1235 return rc;
1236}
1237
1238static void efx_fini_napi(struct efx_nic *efx)
1239{
1240 struct efx_channel *channel;
1241
1242 efx_for_each_channel(channel, efx) {
1243 efx_lro_fini(&channel->lro_mgr);
1244 channel->napi_dev = NULL;
1245 }
1246}
1247
1248/**************************************************************************
1249 *
1250 * Kernel netpoll interface
1251 *
1252 *************************************************************************/
1253
1254#ifdef CONFIG_NET_POLL_CONTROLLER
1255
1256/* Although in the common case interrupts will be disabled, this is not
1257 * guaranteed. However, all our work happens inside the NAPI callback,
1258 * so no locking is required.
1259 */
1260static void efx_netpoll(struct net_device *net_dev)
1261{
Ben Hutchings767e4682008-09-01 12:43:14 +01001262 struct efx_nic *efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001263 struct efx_channel *channel;
1264
Ben Hutchings64ee3122008-09-01 12:47:38 +01001265 efx_for_each_channel(channel, efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001266 efx_schedule_channel(channel);
1267}
1268
1269#endif
1270
1271/**************************************************************************
1272 *
1273 * Kernel net device interface
1274 *
1275 *************************************************************************/
1276
1277/* Context: process, rtnl_lock() held. */
1278static int efx_net_open(struct net_device *net_dev)
1279{
Ben Hutchings767e4682008-09-01 12:43:14 +01001280 struct efx_nic *efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001281 EFX_ASSERT_RESET_SERIALISED(efx);
1282
1283 EFX_LOG(efx, "opening device %s on CPU %d\n", net_dev->name,
1284 raw_smp_processor_id());
1285
Ben Hutchingsf8b87c12008-09-01 12:48:17 +01001286 if (efx->phy_mode & PHY_MODE_SPECIAL)
1287 return -EBUSY;
1288
Ben Hutchings8ceee662008-04-27 12:55:59 +01001289 efx_start_all(efx);
1290 return 0;
1291}
1292
1293/* Context: process, rtnl_lock() held.
1294 * Note that the kernel will ignore our return code; this method
1295 * should really be a void.
1296 */
1297static int efx_net_stop(struct net_device *net_dev)
1298{
Ben Hutchings767e4682008-09-01 12:43:14 +01001299 struct efx_nic *efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001300
1301 EFX_LOG(efx, "closing %s on CPU %d\n", net_dev->name,
1302 raw_smp_processor_id());
1303
1304 /* Stop the device and flush all the channels */
1305 efx_stop_all(efx);
1306 efx_fini_channels(efx);
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +01001307 efx_init_channels(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001308
1309 return 0;
1310}
1311
Ben Hutchings5b9e2072008-05-16 21:18:14 +01001312/* Context: process, dev_base_lock or RTNL held, non-blocking. */
Ben Hutchings8ceee662008-04-27 12:55:59 +01001313static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
1314{
Ben Hutchings767e4682008-09-01 12:43:14 +01001315 struct efx_nic *efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001316 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1317 struct net_device_stats *stats = &net_dev->stats;
1318
Ben Hutchings5b9e2072008-05-16 21:18:14 +01001319 /* Update stats if possible, but do not wait if another thread
1320 * is updating them (or resetting the NIC); slightly stale
1321 * stats are acceptable.
1322 */
Ben Hutchings8ceee662008-04-27 12:55:59 +01001323 if (!spin_trylock(&efx->stats_lock))
1324 return stats;
Ben Hutchings8c8661e2008-09-01 12:49:02 +01001325 if (efx->stats_enabled) {
Ben Hutchings8ceee662008-04-27 12:55:59 +01001326 falcon_update_stats_xmac(efx);
1327 falcon_update_nic_stats(efx);
1328 }
1329 spin_unlock(&efx->stats_lock);
1330
1331 stats->rx_packets = mac_stats->rx_packets;
1332 stats->tx_packets = mac_stats->tx_packets;
1333 stats->rx_bytes = mac_stats->rx_bytes;
1334 stats->tx_bytes = mac_stats->tx_bytes;
1335 stats->multicast = mac_stats->rx_multicast;
1336 stats->collisions = mac_stats->tx_collision;
1337 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1338 mac_stats->rx_length_error);
1339 stats->rx_over_errors = efx->n_rx_nodesc_drop_cnt;
1340 stats->rx_crc_errors = mac_stats->rx_bad;
1341 stats->rx_frame_errors = mac_stats->rx_align_error;
1342 stats->rx_fifo_errors = mac_stats->rx_overflow;
1343 stats->rx_missed_errors = mac_stats->rx_missed;
1344 stats->tx_window_errors = mac_stats->tx_late_collision;
1345
1346 stats->rx_errors = (stats->rx_length_errors +
1347 stats->rx_over_errors +
1348 stats->rx_crc_errors +
1349 stats->rx_frame_errors +
1350 stats->rx_fifo_errors +
1351 stats->rx_missed_errors +
1352 mac_stats->rx_symbol_error);
1353 stats->tx_errors = (stats->tx_window_errors +
1354 mac_stats->tx_bad);
1355
1356 return stats;
1357}
1358
1359/* Context: netif_tx_lock held, BHs disabled. */
1360static void efx_watchdog(struct net_device *net_dev)
1361{
Ben Hutchings767e4682008-09-01 12:43:14 +01001362 struct efx_nic *efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001363
1364 EFX_ERR(efx, "TX stuck with stop_count=%d port_enabled=%d: %s\n",
1365 atomic_read(&efx->netif_stop_count), efx->port_enabled,
1366 monitor_reset ? "resetting channels" : "skipping reset");
1367
1368 if (monitor_reset)
1369 efx_schedule_reset(efx, RESET_TYPE_MONITOR);
1370}
1371
1372
1373/* Context: process, rtnl_lock() held. */
1374static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1375{
Ben Hutchings767e4682008-09-01 12:43:14 +01001376 struct efx_nic *efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001377 int rc = 0;
1378
1379 EFX_ASSERT_RESET_SERIALISED(efx);
1380
1381 if (new_mtu > EFX_MAX_MTU)
1382 return -EINVAL;
1383
1384 efx_stop_all(efx);
1385
1386 EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
1387
1388 efx_fini_channels(efx);
1389 net_dev->mtu = new_mtu;
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +01001390 efx_init_channels(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001391
1392 efx_start_all(efx);
1393 return rc;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001394}
1395
1396static int efx_set_mac_address(struct net_device *net_dev, void *data)
1397{
Ben Hutchings767e4682008-09-01 12:43:14 +01001398 struct efx_nic *efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001399 struct sockaddr *addr = data;
1400 char *new_addr = addr->sa_data;
1401
1402 EFX_ASSERT_RESET_SERIALISED(efx);
1403
1404 if (!is_valid_ether_addr(new_addr)) {
1405 DECLARE_MAC_BUF(mac);
1406 EFX_ERR(efx, "invalid ethernet MAC address requested: %s\n",
1407 print_mac(mac, new_addr));
1408 return -EINVAL;
1409 }
1410
1411 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1412
1413 /* Reconfigure the MAC */
1414 efx_reconfigure_port(efx);
1415
1416 return 0;
1417}
1418
Ben Hutchingsa816f752008-09-01 12:49:12 +01001419/* Context: netif_addr_lock held, BHs disabled. */
Ben Hutchings8ceee662008-04-27 12:55:59 +01001420static void efx_set_multicast_list(struct net_device *net_dev)
1421{
Ben Hutchings767e4682008-09-01 12:43:14 +01001422 struct efx_nic *efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001423 struct dev_mc_list *mc_list = net_dev->mc_list;
1424 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
Ben Hutchingsa816f752008-09-01 12:49:12 +01001425 bool promiscuous = !!(net_dev->flags & IFF_PROMISC);
1426 bool changed = (efx->promiscuous != promiscuous);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001427 u32 crc;
1428 int bit;
1429 int i;
1430
Ben Hutchingsa816f752008-09-01 12:49:12 +01001431 efx->promiscuous = promiscuous;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001432
1433 /* Build multicast hash table */
1434 if (promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1435 memset(mc_hash, 0xff, sizeof(*mc_hash));
1436 } else {
1437 memset(mc_hash, 0x00, sizeof(*mc_hash));
1438 for (i = 0; i < net_dev->mc_count; i++) {
1439 crc = ether_crc_le(ETH_ALEN, mc_list->dmi_addr);
1440 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1441 set_bit_le(bit, mc_hash->byte);
1442 mc_list = mc_list->next;
1443 }
1444 }
1445
Ben Hutchingsa816f752008-09-01 12:49:12 +01001446 if (!efx->port_enabled)
1447 /* Delay pushing settings until efx_start_port() */
1448 return;
1449
1450 if (changed)
1451 queue_work(efx->workqueue, &efx->reconfigure_work);
1452
Ben Hutchings8ceee662008-04-27 12:55:59 +01001453 /* Create and activate new global multicast hash table */
1454 falcon_set_multicast_hash(efx);
1455}
1456
1457static int efx_netdev_event(struct notifier_block *this,
1458 unsigned long event, void *ptr)
1459{
Ben Hutchingsd3208b52008-05-16 21:20:00 +01001460 struct net_device *net_dev = ptr;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001461
1462 if (net_dev->open == efx_net_open && event == NETDEV_CHANGENAME) {
Ben Hutchings767e4682008-09-01 12:43:14 +01001463 struct efx_nic *efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001464
1465 strcpy(efx->name, net_dev->name);
1466 }
1467
1468 return NOTIFY_DONE;
1469}
1470
1471static struct notifier_block efx_netdev_notifier = {
1472 .notifier_call = efx_netdev_event,
1473};
1474
1475static int efx_register_netdev(struct efx_nic *efx)
1476{
1477 struct net_device *net_dev = efx->net_dev;
1478 int rc;
1479
1480 net_dev->watchdog_timeo = 5 * HZ;
1481 net_dev->irq = efx->pci_dev->irq;
1482 net_dev->open = efx_net_open;
1483 net_dev->stop = efx_net_stop;
1484 net_dev->get_stats = efx_net_stats;
1485 net_dev->tx_timeout = &efx_watchdog;
1486 net_dev->hard_start_xmit = efx_hard_start_xmit;
1487 net_dev->do_ioctl = efx_ioctl;
1488 net_dev->change_mtu = efx_change_mtu;
1489 net_dev->set_mac_address = efx_set_mac_address;
1490 net_dev->set_multicast_list = efx_set_multicast_list;
1491#ifdef CONFIG_NET_POLL_CONTROLLER
1492 net_dev->poll_controller = efx_netpoll;
1493#endif
1494 SET_NETDEV_DEV(net_dev, &efx->pci_dev->dev);
1495 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1496
1497 /* Always start with carrier off; PHY events will detect the link */
1498 netif_carrier_off(efx->net_dev);
1499
1500 /* Clear MAC statistics */
1501 falcon_update_stats_xmac(efx);
1502 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1503
1504 rc = register_netdev(net_dev);
1505 if (rc) {
1506 EFX_ERR(efx, "could not register net dev\n");
1507 return rc;
1508 }
1509 strcpy(efx->name, net_dev->name);
1510
1511 return 0;
1512}
1513
1514static void efx_unregister_netdev(struct efx_nic *efx)
1515{
1516 struct efx_tx_queue *tx_queue;
1517
1518 if (!efx->net_dev)
1519 return;
1520
Ben Hutchings767e4682008-09-01 12:43:14 +01001521 BUG_ON(netdev_priv(efx->net_dev) != efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001522
1523 /* Free up any skbs still remaining. This has to happen before
1524 * we try to unregister the netdev as running their destructors
1525 * may be needed to get the device ref. count to 0. */
1526 efx_for_each_tx_queue(tx_queue, efx)
1527 efx_release_tx_buffers(tx_queue);
1528
Ben Hutchings55668612008-05-16 21:16:10 +01001529 if (efx_dev_registered(efx)) {
Ben Hutchings8ceee662008-04-27 12:55:59 +01001530 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1531 unregister_netdev(efx->net_dev);
1532 }
1533}
1534
1535/**************************************************************************
1536 *
1537 * Device reset and suspend
1538 *
1539 **************************************************************************/
1540
Ben Hutchings2467ca42008-09-01 12:48:50 +01001541/* Tears down the entire software state and most of the hardware state
1542 * before reset. */
Ben Hutchings8c8661e2008-09-01 12:49:02 +01001543void efx_reset_down(struct efx_nic *efx, struct ethtool_cmd *ecmd)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001544{
1545 int rc;
1546
1547 EFX_ASSERT_RESET_SERIALISED(efx);
1548
Ben Hutchings2467ca42008-09-01 12:48:50 +01001549 /* The net_dev->get_stats handler is quite slow, and will fail
1550 * if a fetch is pending over reset. Serialise against it. */
1551 spin_lock(&efx->stats_lock);
Ben Hutchings8c8661e2008-09-01 12:49:02 +01001552 efx->stats_enabled = false;
Ben Hutchings2467ca42008-09-01 12:48:50 +01001553 spin_unlock(&efx->stats_lock);
1554
1555 efx_stop_all(efx);
1556 mutex_lock(&efx->mac_lock);
1557
Ben Hutchings8ceee662008-04-27 12:55:59 +01001558 rc = falcon_xmac_get_settings(efx, ecmd);
Ben Hutchings2467ca42008-09-01 12:48:50 +01001559 if (rc)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001560 EFX_ERR(efx, "could not back up PHY settings\n");
Ben Hutchings8ceee662008-04-27 12:55:59 +01001561
1562 efx_fini_channels(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001563}
1564
Ben Hutchings2467ca42008-09-01 12:48:50 +01001565/* This function will always ensure that the locks acquired in
1566 * efx_reset_down() are released. A failure return code indicates
1567 * that we were unable to reinitialise the hardware, and the
1568 * driver should be disabled. If ok is false, then the rx and tx
1569 * engines are not restarted, pending a RESET_DISABLE. */
Ben Hutchings8c8661e2008-09-01 12:49:02 +01001570int efx_reset_up(struct efx_nic *efx, struct ethtool_cmd *ecmd, bool ok)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001571{
1572 int rc;
1573
Ben Hutchings2467ca42008-09-01 12:48:50 +01001574 EFX_ASSERT_RESET_SERIALISED(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001575
Ben Hutchings2467ca42008-09-01 12:48:50 +01001576 rc = falcon_init_nic(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001577 if (rc) {
Ben Hutchings2467ca42008-09-01 12:48:50 +01001578 EFX_ERR(efx, "failed to initialise NIC\n");
1579 ok = false;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001580 }
1581
Ben Hutchings2467ca42008-09-01 12:48:50 +01001582 if (ok) {
1583 efx_init_channels(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001584
Ben Hutchings2467ca42008-09-01 12:48:50 +01001585 if (falcon_xmac_set_settings(efx, ecmd))
1586 EFX_ERR(efx, "could not restore PHY settings\n");
1587 }
1588
1589 mutex_unlock(&efx->mac_lock);
1590
Ben Hutchings8c8661e2008-09-01 12:49:02 +01001591 if (ok) {
Ben Hutchings2467ca42008-09-01 12:48:50 +01001592 efx_start_all(efx);
Ben Hutchings8c8661e2008-09-01 12:49:02 +01001593 efx->stats_enabled = true;
1594 }
Ben Hutchings8ceee662008-04-27 12:55:59 +01001595 return rc;
1596}
1597
1598/* Reset the NIC as transparently as possible. Do not reset the PHY
1599 * Note that the reset may fail, in which case the card will be left
1600 * in a most-probably-unusable state.
1601 *
1602 * This function will sleep. You cannot reset from within an atomic
1603 * state; use efx_schedule_reset() instead.
1604 *
1605 * Grabs the rtnl_lock.
1606 */
1607static int efx_reset(struct efx_nic *efx)
1608{
1609 struct ethtool_cmd ecmd;
1610 enum reset_type method = efx->reset_pending;
1611 int rc;
1612
1613 /* Serialise with kernel interfaces */
1614 rtnl_lock();
1615
1616 /* If we're not RUNNING then don't reset. Leave the reset_pending
1617 * flag set so that efx_pci_probe_main will be retried */
1618 if (efx->state != STATE_RUNNING) {
1619 EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
1620 goto unlock_rtnl;
1621 }
1622
Ben Hutchings8ceee662008-04-27 12:55:59 +01001623 EFX_INFO(efx, "resetting (%d)\n", method);
1624
Ben Hutchings2467ca42008-09-01 12:48:50 +01001625 efx_reset_down(efx, &ecmd);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001626
1627 rc = falcon_reset_hw(efx, method);
1628 if (rc) {
1629 EFX_ERR(efx, "failed to reset hardware\n");
Ben Hutchings2467ca42008-09-01 12:48:50 +01001630 goto fail;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001631 }
1632
1633 /* Allow resets to be rescheduled. */
1634 efx->reset_pending = RESET_TYPE_NONE;
1635
1636 /* Reinitialise bus-mastering, which may have been turned off before
1637 * the reset was scheduled. This is still appropriate, even in the
1638 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1639 * can respond to requests. */
1640 pci_set_master(efx->pci_dev);
1641
Ben Hutchings8ceee662008-04-27 12:55:59 +01001642 /* Leave device stopped if necessary */
1643 if (method == RESET_TYPE_DISABLE) {
Ben Hutchings8ceee662008-04-27 12:55:59 +01001644 rc = -EIO;
Ben Hutchings2467ca42008-09-01 12:48:50 +01001645 goto fail;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001646 }
1647
Ben Hutchings2467ca42008-09-01 12:48:50 +01001648 rc = efx_reset_up(efx, &ecmd, true);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001649 if (rc)
Ben Hutchings2467ca42008-09-01 12:48:50 +01001650 goto disable;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001651
Ben Hutchings8ceee662008-04-27 12:55:59 +01001652 EFX_LOG(efx, "reset complete\n");
Ben Hutchings8ceee662008-04-27 12:55:59 +01001653 unlock_rtnl:
1654 rtnl_unlock();
1655 return 0;
1656
Ben Hutchings2467ca42008-09-01 12:48:50 +01001657 fail:
1658 efx_reset_up(efx, &ecmd, false);
1659 disable:
Ben Hutchings8ceee662008-04-27 12:55:59 +01001660 EFX_ERR(efx, "has been disabled\n");
1661 efx->state = STATE_DISABLED;
1662
Ben Hutchings8ceee662008-04-27 12:55:59 +01001663 rtnl_unlock();
1664 efx_unregister_netdev(efx);
1665 efx_fini_port(efx);
1666 return rc;
1667}
1668
1669/* The worker thread exists so that code that cannot sleep can
1670 * schedule a reset for later.
1671 */
1672static void efx_reset_work(struct work_struct *data)
1673{
1674 struct efx_nic *nic = container_of(data, struct efx_nic, reset_work);
1675
1676 efx_reset(nic);
1677}
1678
1679void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1680{
1681 enum reset_type method;
1682
1683 if (efx->reset_pending != RESET_TYPE_NONE) {
1684 EFX_INFO(efx, "quenching already scheduled reset\n");
1685 return;
1686 }
1687
1688 switch (type) {
1689 case RESET_TYPE_INVISIBLE:
1690 case RESET_TYPE_ALL:
1691 case RESET_TYPE_WORLD:
1692 case RESET_TYPE_DISABLE:
1693 method = type;
1694 break;
1695 case RESET_TYPE_RX_RECOVERY:
1696 case RESET_TYPE_RX_DESC_FETCH:
1697 case RESET_TYPE_TX_DESC_FETCH:
1698 case RESET_TYPE_TX_SKIP:
1699 method = RESET_TYPE_INVISIBLE;
1700 break;
1701 default:
1702 method = RESET_TYPE_ALL;
1703 break;
1704 }
1705
1706 if (method != type)
1707 EFX_LOG(efx, "scheduling reset (%d:%d)\n", type, method);
1708 else
1709 EFX_LOG(efx, "scheduling reset (%d)\n", method);
1710
1711 efx->reset_pending = method;
1712
Ben Hutchings8d9853d2008-07-18 19:01:20 +01001713 queue_work(efx->reset_workqueue, &efx->reset_work);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001714}
1715
1716/**************************************************************************
1717 *
1718 * List of NICs we support
1719 *
1720 **************************************************************************/
1721
1722/* PCI device ID table */
1723static struct pci_device_id efx_pci_table[] __devinitdata = {
1724 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1725 .driver_data = (unsigned long) &falcon_a_nic_type},
1726 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1727 .driver_data = (unsigned long) &falcon_b_nic_type},
1728 {0} /* end of list */
1729};
1730
1731/**************************************************************************
1732 *
1733 * Dummy PHY/MAC/Board operations
1734 *
Ben Hutchings01aad7b2008-09-01 12:48:36 +01001735 * Can be used for some unimplemented operations
Ben Hutchings8ceee662008-04-27 12:55:59 +01001736 * Needed so all function pointers are valid and do not have to be tested
1737 * before use
1738 *
1739 **************************************************************************/
1740int efx_port_dummy_op_int(struct efx_nic *efx)
1741{
1742 return 0;
1743}
1744void efx_port_dummy_op_void(struct efx_nic *efx) {}
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +01001745void efx_port_dummy_op_blink(struct efx_nic *efx, bool blink) {}
Ben Hutchings8ceee662008-04-27 12:55:59 +01001746
1747static struct efx_phy_operations efx_dummy_phy_operations = {
1748 .init = efx_port_dummy_op_int,
1749 .reconfigure = efx_port_dummy_op_void,
1750 .check_hw = efx_port_dummy_op_int,
1751 .fini = efx_port_dummy_op_void,
1752 .clear_interrupt = efx_port_dummy_op_void,
1753 .reset_xaui = efx_port_dummy_op_void,
1754};
1755
Ben Hutchings8ceee662008-04-27 12:55:59 +01001756static struct efx_board efx_dummy_board_info = {
Ben Hutchings01aad7b2008-09-01 12:48:36 +01001757 .init = efx_port_dummy_op_int,
1758 .init_leds = efx_port_dummy_op_int,
1759 .set_fault_led = efx_port_dummy_op_blink,
1760 .blink = efx_port_dummy_op_blink,
1761 .fini = efx_port_dummy_op_void,
Ben Hutchings8ceee662008-04-27 12:55:59 +01001762};
1763
1764/**************************************************************************
1765 *
1766 * Data housekeeping
1767 *
1768 **************************************************************************/
1769
1770/* This zeroes out and then fills in the invariants in a struct
1771 * efx_nic (including all sub-structures).
1772 */
1773static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1774 struct pci_dev *pci_dev, struct net_device *net_dev)
1775{
1776 struct efx_channel *channel;
1777 struct efx_tx_queue *tx_queue;
1778 struct efx_rx_queue *rx_queue;
1779 int i, rc;
1780
1781 /* Initialise common structures */
1782 memset(efx, 0, sizeof(*efx));
1783 spin_lock_init(&efx->biu_lock);
1784 spin_lock_init(&efx->phy_lock);
1785 INIT_WORK(&efx->reset_work, efx_reset_work);
1786 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1787 efx->pci_dev = pci_dev;
1788 efx->state = STATE_INIT;
1789 efx->reset_pending = RESET_TYPE_NONE;
1790 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1791 efx->board_info = efx_dummy_board_info;
1792
1793 efx->net_dev = net_dev;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +01001794 efx->rx_checksum_enabled = true;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001795 spin_lock_init(&efx->netif_stop_lock);
1796 spin_lock_init(&efx->stats_lock);
1797 mutex_init(&efx->mac_lock);
1798 efx->phy_op = &efx_dummy_phy_operations;
1799 efx->mii.dev = net_dev;
1800 INIT_WORK(&efx->reconfigure_work, efx_reconfigure_work);
1801 atomic_set(&efx->netif_stop_count, 1);
1802
1803 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
1804 channel = &efx->channel[i];
1805 channel->efx = efx;
1806 channel->channel = i;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +01001807 channel->work_pending = false;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001808 }
Ben Hutchings60ac1062008-09-01 12:44:59 +01001809 for (i = 0; i < EFX_TX_QUEUE_COUNT; i++) {
Ben Hutchings8ceee662008-04-27 12:55:59 +01001810 tx_queue = &efx->tx_queue[i];
1811 tx_queue->efx = efx;
1812 tx_queue->queue = i;
1813 tx_queue->buffer = NULL;
1814 tx_queue->channel = &efx->channel[0]; /* for safety */
Ben Hutchingsb9b39b62008-05-07 12:51:12 +01001815 tx_queue->tso_headers_free = NULL;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001816 }
1817 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
1818 rx_queue = &efx->rx_queue[i];
1819 rx_queue->efx = efx;
1820 rx_queue->queue = i;
1821 rx_queue->channel = &efx->channel[0]; /* for safety */
1822 rx_queue->buffer = NULL;
1823 spin_lock_init(&rx_queue->add_lock);
1824 INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work);
1825 }
1826
1827 efx->type = type;
1828
1829 /* Sanity-check NIC type */
1830 EFX_BUG_ON_PARANOID(efx->type->txd_ring_mask &
1831 (efx->type->txd_ring_mask + 1));
1832 EFX_BUG_ON_PARANOID(efx->type->rxd_ring_mask &
1833 (efx->type->rxd_ring_mask + 1));
1834 EFX_BUG_ON_PARANOID(efx->type->evq_size &
1835 (efx->type->evq_size - 1));
1836 /* As close as we can get to guaranteeing that we don't overflow */
1837 EFX_BUG_ON_PARANOID(efx->type->evq_size <
1838 (efx->type->txd_ring_mask + 1 +
1839 efx->type->rxd_ring_mask + 1));
1840 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
1841
1842 /* Higher numbered interrupt modes are less capable! */
1843 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
1844 interrupt_mode);
1845
1846 efx->workqueue = create_singlethread_workqueue("sfc_work");
1847 if (!efx->workqueue) {
1848 rc = -ENOMEM;
1849 goto fail1;
1850 }
1851
Ben Hutchings8d9853d2008-07-18 19:01:20 +01001852 efx->reset_workqueue = create_singlethread_workqueue("sfc_reset");
1853 if (!efx->reset_workqueue) {
1854 rc = -ENOMEM;
1855 goto fail2;
1856 }
1857
Ben Hutchings8ceee662008-04-27 12:55:59 +01001858 return 0;
1859
Ben Hutchings8d9853d2008-07-18 19:01:20 +01001860 fail2:
1861 destroy_workqueue(efx->workqueue);
1862 efx->workqueue = NULL;
1863
Ben Hutchings8ceee662008-04-27 12:55:59 +01001864 fail1:
1865 return rc;
1866}
1867
1868static void efx_fini_struct(struct efx_nic *efx)
1869{
Ben Hutchings8d9853d2008-07-18 19:01:20 +01001870 if (efx->reset_workqueue) {
1871 destroy_workqueue(efx->reset_workqueue);
1872 efx->reset_workqueue = NULL;
1873 }
Ben Hutchings8ceee662008-04-27 12:55:59 +01001874 if (efx->workqueue) {
1875 destroy_workqueue(efx->workqueue);
1876 efx->workqueue = NULL;
1877 }
1878}
1879
1880/**************************************************************************
1881 *
1882 * PCI interface
1883 *
1884 **************************************************************************/
1885
1886/* Main body of final NIC shutdown code
1887 * This is called only at module unload (or hotplug removal).
1888 */
1889static void efx_pci_remove_main(struct efx_nic *efx)
1890{
1891 EFX_ASSERT_RESET_SERIALISED(efx);
1892
1893 /* Skip everything if we never obtained a valid membase */
1894 if (!efx->membase)
1895 return;
1896
1897 efx_fini_channels(efx);
1898 efx_fini_port(efx);
1899
1900 /* Shutdown the board, then the NIC and board state */
Ben Hutchings37b5a602008-05-30 22:27:04 +01001901 efx->board_info.fini(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001902 falcon_fini_interrupt(efx);
1903
1904 efx_fini_napi(efx);
1905 efx_remove_all(efx);
1906}
1907
1908/* Final NIC shutdown
1909 * This is called only at module unload (or hotplug removal).
1910 */
1911static void efx_pci_remove(struct pci_dev *pci_dev)
1912{
1913 struct efx_nic *efx;
1914
1915 efx = pci_get_drvdata(pci_dev);
1916 if (!efx)
1917 return;
1918
1919 /* Mark the NIC as fini, then stop the interface */
1920 rtnl_lock();
1921 efx->state = STATE_FINI;
1922 dev_close(efx->net_dev);
1923
1924 /* Allow any queued efx_resets() to complete */
1925 rtnl_unlock();
1926
1927 if (efx->membase == NULL)
1928 goto out;
1929
1930 efx_unregister_netdev(efx);
1931
1932 /* Wait for any scheduled resets to complete. No more will be
1933 * scheduled from this point because efx_stop_all() has been
1934 * called, we are no longer registered with driverlink, and
1935 * the net_device's have been removed. */
Ben Hutchings8d9853d2008-07-18 19:01:20 +01001936 flush_workqueue(efx->reset_workqueue);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001937
1938 efx_pci_remove_main(efx);
1939
1940out:
1941 efx_fini_io(efx);
1942 EFX_LOG(efx, "shutdown successful\n");
1943
1944 pci_set_drvdata(pci_dev, NULL);
1945 efx_fini_struct(efx);
1946 free_netdev(efx->net_dev);
1947};
1948
1949/* Main body of NIC initialisation
1950 * This is called at module load (or hotplug insertion, theoretically).
1951 */
1952static int efx_pci_probe_main(struct efx_nic *efx)
1953{
1954 int rc;
1955
1956 /* Do start-of-day initialisation */
1957 rc = efx_probe_all(efx);
1958 if (rc)
1959 goto fail1;
1960
1961 rc = efx_init_napi(efx);
1962 if (rc)
1963 goto fail2;
1964
1965 /* Initialise the board */
1966 rc = efx->board_info.init(efx);
1967 if (rc) {
1968 EFX_ERR(efx, "failed to initialise board\n");
1969 goto fail3;
1970 }
1971
1972 rc = falcon_init_nic(efx);
1973 if (rc) {
1974 EFX_ERR(efx, "failed to initialise NIC\n");
1975 goto fail4;
1976 }
1977
1978 rc = efx_init_port(efx);
1979 if (rc) {
1980 EFX_ERR(efx, "failed to initialise port\n");
1981 goto fail5;
1982 }
1983
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +01001984 efx_init_channels(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001985
1986 rc = falcon_init_interrupt(efx);
1987 if (rc)
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +01001988 goto fail6;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001989
1990 return 0;
1991
Ben Hutchings8ceee662008-04-27 12:55:59 +01001992 fail6:
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +01001993 efx_fini_channels(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +01001994 efx_fini_port(efx);
1995 fail5:
1996 fail4:
1997 fail3:
1998 efx_fini_napi(efx);
1999 fail2:
2000 efx_remove_all(efx);
2001 fail1:
2002 return rc;
2003}
2004
2005/* NIC initialisation
2006 *
2007 * This is called at module load (or hotplug insertion,
2008 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2009 * sets up and registers the network devices with the kernel and hooks
2010 * the interrupt service routine. It does not prepare the device for
2011 * transmission; this is left to the first time one of the network
2012 * interfaces is brought up (i.e. efx_net_open).
2013 */
2014static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2015 const struct pci_device_id *entry)
2016{
2017 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2018 struct net_device *net_dev;
2019 struct efx_nic *efx;
2020 int i, rc;
2021
2022 /* Allocate and initialise a struct net_device and struct efx_nic */
2023 net_dev = alloc_etherdev(sizeof(*efx));
2024 if (!net_dev)
2025 return -ENOMEM;
Ben Hutchingsb9b39b62008-05-07 12:51:12 +01002026 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2027 NETIF_F_HIGHDMA | NETIF_F_TSO);
Ben Hutchings8ceee662008-04-27 12:55:59 +01002028 if (lro)
2029 net_dev->features |= NETIF_F_LRO;
Ben Hutchings285065632008-09-01 12:46:54 +01002030 /* Mask for features that also apply to VLAN devices */
2031 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
Ben Hutchings740847d2008-09-01 12:48:23 +01002032 NETIF_F_HIGHDMA | NETIF_F_TSO);
Ben Hutchings767e4682008-09-01 12:43:14 +01002033 efx = netdev_priv(net_dev);
Ben Hutchings8ceee662008-04-27 12:55:59 +01002034 pci_set_drvdata(pci_dev, efx);
2035 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2036 if (rc)
2037 goto fail1;
2038
2039 EFX_INFO(efx, "Solarflare Communications NIC detected\n");
2040
2041 /* Set up basic I/O (BAR mappings etc) */
2042 rc = efx_init_io(efx);
2043 if (rc)
2044 goto fail2;
2045
2046 /* No serialisation is required with the reset path because
2047 * we're in STATE_INIT. */
2048 for (i = 0; i < 5; i++) {
2049 rc = efx_pci_probe_main(efx);
2050 if (rc == 0)
2051 break;
2052
2053 /* Serialise against efx_reset(). No more resets will be
2054 * scheduled since efx_stop_all() has been called, and we
2055 * have not and never have been registered with either
2056 * the rtnetlink or driverlink layers. */
Ben Hutchings8d9853d2008-07-18 19:01:20 +01002057 flush_workqueue(efx->reset_workqueue);
Ben Hutchings8ceee662008-04-27 12:55:59 +01002058
2059 /* Retry if a recoverably reset event has been scheduled */
2060 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2061 (efx->reset_pending != RESET_TYPE_ALL))
2062 goto fail3;
2063
2064 efx->reset_pending = RESET_TYPE_NONE;
2065 }
2066
2067 if (rc) {
2068 EFX_ERR(efx, "Could not reset NIC\n");
2069 goto fail4;
2070 }
2071
2072 /* Switch to the running state before we expose the device to
2073 * the OS. This is to ensure that the initial gathering of
2074 * MAC stats succeeds. */
2075 rtnl_lock();
2076 efx->state = STATE_RUNNING;
2077 rtnl_unlock();
2078
2079 rc = efx_register_netdev(efx);
2080 if (rc)
2081 goto fail5;
2082
2083 EFX_LOG(efx, "initialisation successful\n");
2084
2085 return 0;
2086
2087 fail5:
2088 efx_pci_remove_main(efx);
2089 fail4:
2090 fail3:
2091 efx_fini_io(efx);
2092 fail2:
2093 efx_fini_struct(efx);
2094 fail1:
2095 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2096 free_netdev(net_dev);
2097 return rc;
2098}
2099
2100static struct pci_driver efx_pci_driver = {
2101 .name = EFX_DRIVER_NAME,
2102 .id_table = efx_pci_table,
2103 .probe = efx_pci_probe,
2104 .remove = efx_pci_remove,
2105};
2106
2107/**************************************************************************
2108 *
2109 * Kernel module interface
2110 *
2111 *************************************************************************/
2112
2113module_param(interrupt_mode, uint, 0444);
2114MODULE_PARM_DESC(interrupt_mode,
2115 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2116
2117static int __init efx_init_module(void)
2118{
2119 int rc;
2120
2121 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2122
2123 rc = register_netdevice_notifier(&efx_netdev_notifier);
2124 if (rc)
2125 goto err_notifier;
2126
2127 refill_workqueue = create_workqueue("sfc_refill");
2128 if (!refill_workqueue) {
2129 rc = -ENOMEM;
2130 goto err_refill;
2131 }
2132
2133 rc = pci_register_driver(&efx_pci_driver);
2134 if (rc < 0)
2135 goto err_pci;
2136
2137 return 0;
2138
2139 err_pci:
2140 destroy_workqueue(refill_workqueue);
2141 err_refill:
2142 unregister_netdevice_notifier(&efx_netdev_notifier);
2143 err_notifier:
2144 return rc;
2145}
2146
2147static void __exit efx_exit_module(void)
2148{
2149 printk(KERN_INFO "Solarflare NET driver unloading\n");
2150
2151 pci_unregister_driver(&efx_pci_driver);
2152 destroy_workqueue(refill_workqueue);
2153 unregister_netdevice_notifier(&efx_netdev_notifier);
2154
2155}
2156
2157module_init(efx_init_module);
2158module_exit(efx_exit_module);
2159
2160MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2161 "Solarflare Communications");
2162MODULE_DESCRIPTION("Solarflare Communications network driver");
2163MODULE_LICENSE("GPL");
2164MODULE_DEVICE_TABLE(pci, efx_pci_table);