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Joerg Roedelb6c02712008-06-26 21:27:53 +02001/*
Joerg Roedel5d0d7152010-10-13 11:13:21 +02002 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
Joerg Roedelb6c02712008-06-26 21:27:53 +02003 * Author: Joerg Roedel <joerg.roedel@amd.com>
4 * Leo Duran <leo.duran@amd.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
Joerg Roedel72e1dcc2011-11-10 19:13:51 +010020#include <linux/ratelimit.h>
Joerg Roedelb6c02712008-06-26 21:27:53 +020021#include <linux/pci.h>
Joerg Roedelcb41ed82011-04-05 11:00:53 +020022#include <linux/pci-ats.h>
Akinobu Mitaa66022c2009-12-15 16:48:28 -080023#include <linux/bitmap.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090024#include <linux/slab.h>
Joerg Roedel7f265082008-12-12 13:50:21 +010025#include <linux/debugfs.h>
Joerg Roedelb6c02712008-06-26 21:27:53 +020026#include <linux/scatterlist.h>
FUJITA Tomonori51491362009-01-05 23:47:25 +090027#include <linux/dma-mapping.h>
Joerg Roedelb6c02712008-06-26 21:27:53 +020028#include <linux/iommu-helper.h>
Joerg Roedelc156e342008-12-02 18:13:27 +010029#include <linux/iommu.h>
Joerg Roedel815b33f2011-04-06 17:26:49 +020030#include <linux/delay.h>
Joerg Roedel403f81d2011-06-14 16:44:25 +020031#include <linux/amd-iommu.h>
Joerg Roedel72e1dcc2011-11-10 19:13:51 +010032#include <linux/notifier.h>
33#include <linux/export.h>
Joerg Roedel17f5b562011-07-06 17:14:44 +020034#include <asm/msidef.h>
Joerg Roedelb6c02712008-06-26 21:27:53 +020035#include <asm/proto.h>
FUJITA Tomonori46a7fa22008-07-11 10:23:42 +090036#include <asm/iommu.h>
Joerg Roedel1d9b16d2008-11-27 18:39:15 +010037#include <asm/gart.h>
Joerg Roedel27c21272011-05-30 15:56:24 +020038#include <asm/dma.h>
Joerg Roedel403f81d2011-06-14 16:44:25 +020039
40#include "amd_iommu_proto.h"
41#include "amd_iommu_types.h"
Joerg Roedelb6c02712008-06-26 21:27:53 +020042
43#define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28))
44
Joerg Roedel815b33f2011-04-06 17:26:49 +020045#define LOOP_TIMEOUT 100000
Joerg Roedel136f78a2008-07-11 17:14:27 +020046
Ohad Ben-Cohenaa3de9c2011-11-10 11:32:29 +020047/*
48 * This bitmap is used to advertise the page sizes our hardware support
49 * to the IOMMU core, which will then use this information to split
50 * physically contiguous memory regions it is mapping into page sizes
51 * that we support.
52 *
53 * Traditionally the IOMMU core just handed us the mappings directly,
54 * after making sure the size is an order of a 4KiB page and that the
55 * mapping has natural alignment.
56 *
57 * To retain this behavior, we currently advertise that we support
58 * all page sizes that are an order of 4KiB.
59 *
60 * If at some point we'd like to utilize the IOMMU core's new behavior,
61 * we could change this to advertise the real page sizes we support.
62 */
63#define AMD_IOMMU_PGSIZES (~0xFFFUL)
64
Joerg Roedelb6c02712008-06-26 21:27:53 +020065static DEFINE_RWLOCK(amd_iommu_devtable_lock);
66
Joerg Roedelbd60b732008-09-11 10:24:48 +020067/* A list of preallocated protection domains */
68static LIST_HEAD(iommu_pd_list);
69static DEFINE_SPINLOCK(iommu_pd_list_lock);
70
Joerg Roedel8fa5f802011-06-09 12:24:45 +020071/* List of all available dev_data structures */
72static LIST_HEAD(dev_data_list);
73static DEFINE_SPINLOCK(dev_data_list_lock);
74
Joerg Roedel0feae532009-08-26 15:26:30 +020075/*
76 * Domain for untranslated devices - only allocated
77 * if iommu=pt passed on kernel cmd line.
78 */
79static struct protection_domain *pt_domain;
80
Joerg Roedel26961ef2008-12-03 17:00:17 +010081static struct iommu_ops amd_iommu_ops;
Joerg Roedel26961ef2008-12-03 17:00:17 +010082
Joerg Roedel72e1dcc2011-11-10 19:13:51 +010083static ATOMIC_NOTIFIER_HEAD(ppr_notifier);
Joerg Roedel52815b72011-11-17 17:24:28 +010084int amd_iommu_max_glx_val = -1;
Joerg Roedel72e1dcc2011-11-10 19:13:51 +010085
Joerg Roedelac1534a2012-06-21 14:52:40 +020086static struct dma_map_ops amd_iommu_dma_ops;
87
Joerg Roedel431b2a22008-07-11 17:14:22 +020088/*
89 * general struct to manage commands send to an IOMMU
90 */
Joerg Roedeld6449532008-07-11 17:14:28 +020091struct iommu_cmd {
Joerg Roedelb6c02712008-06-26 21:27:53 +020092 u32 data[4];
93};
94
Joerg Roedel04bfdd82009-09-02 16:00:23 +020095static void update_domain(struct protection_domain *domain);
Joerg Roedel5abcdba2011-12-01 15:49:45 +010096static int __init alloc_passthrough_domain(void);
Chris Wrightc1eee672009-05-21 00:56:58 -070097
Joerg Roedel15898bb2009-11-24 15:39:42 +010098/****************************************************************************
99 *
100 * Helper functions
101 *
102 ****************************************************************************/
103
Joerg Roedelf62dda62011-06-09 12:55:35 +0200104static struct iommu_dev_data *alloc_dev_data(u16 devid)
Joerg Roedel8fa5f802011-06-09 12:24:45 +0200105{
106 struct iommu_dev_data *dev_data;
107 unsigned long flags;
108
109 dev_data = kzalloc(sizeof(*dev_data), GFP_KERNEL);
110 if (!dev_data)
111 return NULL;
112
Joerg Roedelf62dda62011-06-09 12:55:35 +0200113 dev_data->devid = devid;
Joerg Roedel8fa5f802011-06-09 12:24:45 +0200114 atomic_set(&dev_data->bind, 0);
115
116 spin_lock_irqsave(&dev_data_list_lock, flags);
117 list_add_tail(&dev_data->dev_data_list, &dev_data_list);
118 spin_unlock_irqrestore(&dev_data_list_lock, flags);
119
120 return dev_data;
121}
122
123static void free_dev_data(struct iommu_dev_data *dev_data)
124{
125 unsigned long flags;
126
127 spin_lock_irqsave(&dev_data_list_lock, flags);
128 list_del(&dev_data->dev_data_list);
129 spin_unlock_irqrestore(&dev_data_list_lock, flags);
130
131 kfree(dev_data);
132}
133
Joerg Roedel3b03bb72011-06-09 18:53:25 +0200134static struct iommu_dev_data *search_dev_data(u16 devid)
135{
136 struct iommu_dev_data *dev_data;
137 unsigned long flags;
138
139 spin_lock_irqsave(&dev_data_list_lock, flags);
140 list_for_each_entry(dev_data, &dev_data_list, dev_data_list) {
141 if (dev_data->devid == devid)
142 goto out_unlock;
143 }
144
145 dev_data = NULL;
146
147out_unlock:
148 spin_unlock_irqrestore(&dev_data_list_lock, flags);
149
150 return dev_data;
151}
152
153static struct iommu_dev_data *find_dev_data(u16 devid)
154{
155 struct iommu_dev_data *dev_data;
156
157 dev_data = search_dev_data(devid);
158
159 if (dev_data == NULL)
160 dev_data = alloc_dev_data(devid);
161
162 return dev_data;
163}
164
Joerg Roedel15898bb2009-11-24 15:39:42 +0100165static inline u16 get_device_id(struct device *dev)
166{
167 struct pci_dev *pdev = to_pci_dev(dev);
168
169 return calc_devid(pdev->bus->number, pdev->devfn);
170}
171
Joerg Roedel657cbb62009-11-23 15:26:46 +0100172static struct iommu_dev_data *get_dev_data(struct device *dev)
173{
174 return dev->archdata.iommu;
175}
176
Joerg Roedel5abcdba2011-12-01 15:49:45 +0100177static bool pci_iommuv2_capable(struct pci_dev *pdev)
178{
179 static const int caps[] = {
180 PCI_EXT_CAP_ID_ATS,
Joerg Roedel46277b72011-12-07 14:34:02 +0100181 PCI_EXT_CAP_ID_PRI,
182 PCI_EXT_CAP_ID_PASID,
Joerg Roedel5abcdba2011-12-01 15:49:45 +0100183 };
184 int i, pos;
185
186 for (i = 0; i < 3; ++i) {
187 pos = pci_find_ext_capability(pdev, caps[i]);
188 if (pos == 0)
189 return false;
190 }
191
192 return true;
193}
194
Joerg Roedel6a113dd2011-12-01 12:04:58 +0100195static bool pdev_pri_erratum(struct pci_dev *pdev, u32 erratum)
196{
197 struct iommu_dev_data *dev_data;
198
199 dev_data = get_dev_data(&pdev->dev);
200
201 return dev_data->errata & (1 << erratum) ? true : false;
202}
203
Joerg Roedel71c70982009-11-24 16:43:06 +0100204/*
205 * In this function the list of preallocated protection domains is traversed to
206 * find the domain for a specific device
207 */
208static struct dma_ops_domain *find_protection_domain(u16 devid)
209{
210 struct dma_ops_domain *entry, *ret = NULL;
211 unsigned long flags;
212 u16 alias = amd_iommu_alias_table[devid];
213
214 if (list_empty(&iommu_pd_list))
215 return NULL;
216
217 spin_lock_irqsave(&iommu_pd_list_lock, flags);
218
219 list_for_each_entry(entry, &iommu_pd_list, list) {
220 if (entry->target_dev == devid ||
221 entry->target_dev == alias) {
222 ret = entry;
223 break;
224 }
225 }
226
227 spin_unlock_irqrestore(&iommu_pd_list_lock, flags);
228
229 return ret;
230}
231
Joerg Roedel98fc5a62009-11-24 17:19:23 +0100232/*
233 * This function checks if the driver got a valid device from the caller to
234 * avoid dereferencing invalid pointers.
235 */
236static bool check_device(struct device *dev)
237{
238 u16 devid;
239
240 if (!dev || !dev->dma_mask)
241 return false;
242
243 /* No device or no PCI device */
Julia Lawall339d3262010-02-06 09:42:39 +0100244 if (dev->bus != &pci_bus_type)
Joerg Roedel98fc5a62009-11-24 17:19:23 +0100245 return false;
246
247 devid = get_device_id(dev);
248
249 /* Out of our scope? */
250 if (devid > amd_iommu_last_bdf)
251 return false;
252
253 if (amd_iommu_rlookup_table[devid] == NULL)
254 return false;
255
256 return true;
257}
258
Alex Williamson664b6002012-05-30 14:19:31 -0600259static void swap_pci_ref(struct pci_dev **from, struct pci_dev *to)
260{
261 pci_dev_put(*from);
262 *from = to;
263}
264
265#define REQ_ACS_FLAGS (PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF)
266
Joerg Roedel657cbb62009-11-23 15:26:46 +0100267static int iommu_init_device(struct device *dev)
268{
Alex Williamson9dcd6132012-05-30 14:19:07 -0600269 struct pci_dev *dma_pdev, *pdev = to_pci_dev(dev);
Joerg Roedel657cbb62009-11-23 15:26:46 +0100270 struct iommu_dev_data *dev_data;
Alex Williamson9dcd6132012-05-30 14:19:07 -0600271 struct iommu_group *group;
Joerg Roedel8fa5f802011-06-09 12:24:45 +0200272 u16 alias;
Alex Williamson9dcd6132012-05-30 14:19:07 -0600273 int ret;
Joerg Roedel657cbb62009-11-23 15:26:46 +0100274
275 if (dev->archdata.iommu)
276 return 0;
277
Joerg Roedel3b03bb72011-06-09 18:53:25 +0200278 dev_data = find_dev_data(get_device_id(dev));
Joerg Roedel657cbb62009-11-23 15:26:46 +0100279 if (!dev_data)
280 return -ENOMEM;
281
Joerg Roedelf62dda62011-06-09 12:55:35 +0200282 alias = amd_iommu_alias_table[dev_data->devid];
Joerg Roedel2b02b092011-06-09 17:48:39 +0200283 if (alias != dev_data->devid) {
Joerg Roedel71f77582011-06-09 19:03:15 +0200284 struct iommu_dev_data *alias_data;
Joerg Roedelb00d3bc2009-11-26 15:35:33 +0100285
Joerg Roedel71f77582011-06-09 19:03:15 +0200286 alias_data = find_dev_data(alias);
287 if (alias_data == NULL) {
288 pr_err("AMD-Vi: Warning: Unhandled device %s\n",
289 dev_name(dev));
Joerg Roedel2b02b092011-06-09 17:48:39 +0200290 free_dev_data(dev_data);
291 return -ENOTSUPP;
292 }
Joerg Roedel71f77582011-06-09 19:03:15 +0200293 dev_data->alias_data = alias_data;
Alex Williamson9dcd6132012-05-30 14:19:07 -0600294
295 dma_pdev = pci_get_bus_and_slot(alias >> 8, alias & 0xff);
296 } else
297 dma_pdev = pci_dev_get(pdev);
298
Alex Williamson31fe9432012-08-04 12:09:03 -0600299 /* Account for quirked devices */
Alex Williamson664b6002012-05-30 14:19:31 -0600300 swap_pci_ref(&dma_pdev, pci_get_dma_source(dma_pdev));
301
Alex Williamson31fe9432012-08-04 12:09:03 -0600302 /*
303 * If it's a multifunction device that does not support our
304 * required ACS flags, add to the same group as function 0.
305 */
Alex Williamson664b6002012-05-30 14:19:31 -0600306 if (dma_pdev->multifunction &&
307 !pci_acs_enabled(dma_pdev, REQ_ACS_FLAGS))
308 swap_pci_ref(&dma_pdev,
309 pci_get_slot(dma_pdev->bus,
310 PCI_DEVFN(PCI_SLOT(dma_pdev->devfn),
311 0)));
312
Alex Williamson31fe9432012-08-04 12:09:03 -0600313 /*
314 * Devices on the root bus go through the iommu. If that's not us,
315 * find the next upstream device and test ACS up to the root bus.
316 * Finding the next device may require skipping virtual buses.
317 */
Alex Williamson664b6002012-05-30 14:19:31 -0600318 while (!pci_is_root_bus(dma_pdev->bus)) {
Alex Williamson31fe9432012-08-04 12:09:03 -0600319 struct pci_bus *bus = dma_pdev->bus;
320
321 while (!bus->self) {
322 if (!pci_is_root_bus(bus))
323 bus = bus->parent;
324 else
325 goto root_bus;
326 }
327
328 if (pci_acs_path_enabled(bus->self, NULL, REQ_ACS_FLAGS))
Alex Williamson664b6002012-05-30 14:19:31 -0600329 break;
330
Alex Williamson31fe9432012-08-04 12:09:03 -0600331 swap_pci_ref(&dma_pdev, pci_dev_get(bus->self));
Joerg Roedel26018872011-06-06 16:50:14 +0200332 }
Joerg Roedel657cbb62009-11-23 15:26:46 +0100333
Alex Williamson31fe9432012-08-04 12:09:03 -0600334root_bus:
Alex Williamson9dcd6132012-05-30 14:19:07 -0600335 group = iommu_group_get(&dma_pdev->dev);
336 pci_dev_put(dma_pdev);
337 if (!group) {
338 group = iommu_group_alloc();
339 if (IS_ERR(group))
340 return PTR_ERR(group);
Joerg Roedel657cbb62009-11-23 15:26:46 +0100341 }
342
Alex Williamson9dcd6132012-05-30 14:19:07 -0600343 ret = iommu_group_add_device(group, dev);
344
345 iommu_group_put(group);
346
347 if (ret)
348 return ret;
349
Joerg Roedel5abcdba2011-12-01 15:49:45 +0100350 if (pci_iommuv2_capable(pdev)) {
351 struct amd_iommu *iommu;
352
353 iommu = amd_iommu_rlookup_table[dev_data->devid];
354 dev_data->iommu_v2 = iommu->is_iommu_v2;
355 }
356
Joerg Roedel657cbb62009-11-23 15:26:46 +0100357 dev->archdata.iommu = dev_data;
358
Joerg Roedel657cbb62009-11-23 15:26:46 +0100359 return 0;
360}
361
Joerg Roedel26018872011-06-06 16:50:14 +0200362static void iommu_ignore_device(struct device *dev)
363{
364 u16 devid, alias;
365
366 devid = get_device_id(dev);
367 alias = amd_iommu_alias_table[devid];
368
369 memset(&amd_iommu_dev_table[devid], 0, sizeof(struct dev_table_entry));
370 memset(&amd_iommu_dev_table[alias], 0, sizeof(struct dev_table_entry));
371
372 amd_iommu_rlookup_table[devid] = NULL;
373 amd_iommu_rlookup_table[alias] = NULL;
374}
375
Joerg Roedel657cbb62009-11-23 15:26:46 +0100376static void iommu_uninit_device(struct device *dev)
377{
Alex Williamson9dcd6132012-05-30 14:19:07 -0600378 iommu_group_remove_device(dev);
379
Joerg Roedel8fa5f802011-06-09 12:24:45 +0200380 /*
381 * Nothing to do here - we keep dev_data around for unplugged devices
382 * and reuse it when the device is re-plugged - not doing so would
383 * introduce a ton of races.
384 */
Joerg Roedel657cbb62009-11-23 15:26:46 +0100385}
Joerg Roedelb7cc9552009-12-10 11:03:39 +0100386
387void __init amd_iommu_uninit_devices(void)
388{
Joerg Roedel8fa5f802011-06-09 12:24:45 +0200389 struct iommu_dev_data *dev_data, *n;
Joerg Roedelb7cc9552009-12-10 11:03:39 +0100390 struct pci_dev *pdev = NULL;
391
392 for_each_pci_dev(pdev) {
393
394 if (!check_device(&pdev->dev))
395 continue;
396
397 iommu_uninit_device(&pdev->dev);
398 }
Joerg Roedel8fa5f802011-06-09 12:24:45 +0200399
400 /* Free all of our dev_data structures */
401 list_for_each_entry_safe(dev_data, n, &dev_data_list, dev_data_list)
402 free_dev_data(dev_data);
Joerg Roedelb7cc9552009-12-10 11:03:39 +0100403}
404
405int __init amd_iommu_init_devices(void)
406{
407 struct pci_dev *pdev = NULL;
408 int ret = 0;
409
410 for_each_pci_dev(pdev) {
411
412 if (!check_device(&pdev->dev))
413 continue;
414
415 ret = iommu_init_device(&pdev->dev);
Joerg Roedel26018872011-06-06 16:50:14 +0200416 if (ret == -ENOTSUPP)
417 iommu_ignore_device(&pdev->dev);
418 else if (ret)
Joerg Roedelb7cc9552009-12-10 11:03:39 +0100419 goto out_free;
420 }
421
422 return 0;
423
424out_free:
425
426 amd_iommu_uninit_devices();
427
428 return ret;
429}
Joerg Roedel7f265082008-12-12 13:50:21 +0100430#ifdef CONFIG_AMD_IOMMU_STATS
431
432/*
433 * Initialization code for statistics collection
434 */
435
Joerg Roedelda49f6d2008-12-12 14:59:58 +0100436DECLARE_STATS_COUNTER(compl_wait);
Joerg Roedel0f2a86f2008-12-12 15:05:16 +0100437DECLARE_STATS_COUNTER(cnt_map_single);
Joerg Roedel146a6912008-12-12 15:07:12 +0100438DECLARE_STATS_COUNTER(cnt_unmap_single);
Joerg Roedeld03f067a2008-12-12 15:09:48 +0100439DECLARE_STATS_COUNTER(cnt_map_sg);
Joerg Roedel55877a62008-12-12 15:12:14 +0100440DECLARE_STATS_COUNTER(cnt_unmap_sg);
Joerg Roedelc8f0fb32008-12-12 15:14:21 +0100441DECLARE_STATS_COUNTER(cnt_alloc_coherent);
Joerg Roedel5d31ee72008-12-12 15:16:38 +0100442DECLARE_STATS_COUNTER(cnt_free_coherent);
Joerg Roedelc1858972008-12-12 15:42:39 +0100443DECLARE_STATS_COUNTER(cross_page);
Joerg Roedelf57d98a2008-12-12 15:46:29 +0100444DECLARE_STATS_COUNTER(domain_flush_single);
Joerg Roedel18811f52008-12-12 15:48:28 +0100445DECLARE_STATS_COUNTER(domain_flush_all);
Joerg Roedel5774f7c2008-12-12 15:57:30 +0100446DECLARE_STATS_COUNTER(alloced_io_mem);
Joerg Roedel8ecaf8f2008-12-12 16:13:04 +0100447DECLARE_STATS_COUNTER(total_map_requests);
Joerg Roedel399be2f2011-12-01 16:53:47 +0100448DECLARE_STATS_COUNTER(complete_ppr);
449DECLARE_STATS_COUNTER(invalidate_iotlb);
450DECLARE_STATS_COUNTER(invalidate_iotlb_all);
451DECLARE_STATS_COUNTER(pri_requests);
452
Joerg Roedel7f265082008-12-12 13:50:21 +0100453static struct dentry *stats_dir;
Joerg Roedel7f265082008-12-12 13:50:21 +0100454static struct dentry *de_fflush;
455
456static void amd_iommu_stats_add(struct __iommu_counter *cnt)
457{
458 if (stats_dir == NULL)
459 return;
460
461 cnt->dent = debugfs_create_u64(cnt->name, 0444, stats_dir,
462 &cnt->value);
463}
464
465static void amd_iommu_stats_init(void)
466{
467 stats_dir = debugfs_create_dir("amd-iommu", NULL);
468 if (stats_dir == NULL)
469 return;
470
Joerg Roedel7f265082008-12-12 13:50:21 +0100471 de_fflush = debugfs_create_bool("fullflush", 0444, stats_dir,
Dan Carpenter3775d482012-06-27 12:09:18 +0300472 &amd_iommu_unmap_flush);
Joerg Roedelda49f6d2008-12-12 14:59:58 +0100473
474 amd_iommu_stats_add(&compl_wait);
Joerg Roedel0f2a86f2008-12-12 15:05:16 +0100475 amd_iommu_stats_add(&cnt_map_single);
Joerg Roedel146a6912008-12-12 15:07:12 +0100476 amd_iommu_stats_add(&cnt_unmap_single);
Joerg Roedeld03f067a2008-12-12 15:09:48 +0100477 amd_iommu_stats_add(&cnt_map_sg);
Joerg Roedel55877a62008-12-12 15:12:14 +0100478 amd_iommu_stats_add(&cnt_unmap_sg);
Joerg Roedelc8f0fb32008-12-12 15:14:21 +0100479 amd_iommu_stats_add(&cnt_alloc_coherent);
Joerg Roedel5d31ee72008-12-12 15:16:38 +0100480 amd_iommu_stats_add(&cnt_free_coherent);
Joerg Roedelc1858972008-12-12 15:42:39 +0100481 amd_iommu_stats_add(&cross_page);
Joerg Roedelf57d98a2008-12-12 15:46:29 +0100482 amd_iommu_stats_add(&domain_flush_single);
Joerg Roedel18811f52008-12-12 15:48:28 +0100483 amd_iommu_stats_add(&domain_flush_all);
Joerg Roedel5774f7c2008-12-12 15:57:30 +0100484 amd_iommu_stats_add(&alloced_io_mem);
Joerg Roedel8ecaf8f2008-12-12 16:13:04 +0100485 amd_iommu_stats_add(&total_map_requests);
Joerg Roedel399be2f2011-12-01 16:53:47 +0100486 amd_iommu_stats_add(&complete_ppr);
487 amd_iommu_stats_add(&invalidate_iotlb);
488 amd_iommu_stats_add(&invalidate_iotlb_all);
489 amd_iommu_stats_add(&pri_requests);
Joerg Roedel7f265082008-12-12 13:50:21 +0100490}
491
492#endif
493
Joerg Roedel431b2a22008-07-11 17:14:22 +0200494/****************************************************************************
495 *
Joerg Roedela80dc3e2008-09-11 16:51:41 +0200496 * Interrupt handling functions
497 *
498 ****************************************************************************/
499
Joerg Roedele3e59872009-09-03 14:02:10 +0200500static void dump_dte_entry(u16 devid)
501{
502 int i;
503
Joerg Roedelee6c2862011-11-09 12:06:03 +0100504 for (i = 0; i < 4; ++i)
505 pr_err("AMD-Vi: DTE[%d]: %016llx\n", i,
Joerg Roedele3e59872009-09-03 14:02:10 +0200506 amd_iommu_dev_table[devid].data[i]);
507}
508
Joerg Roedel945b4ac2009-09-03 14:25:02 +0200509static void dump_command(unsigned long phys_addr)
510{
511 struct iommu_cmd *cmd = phys_to_virt(phys_addr);
512 int i;
513
514 for (i = 0; i < 4; ++i)
515 pr_err("AMD-Vi: CMD[%d]: %08x\n", i, cmd->data[i]);
516}
517
Joerg Roedela345b232009-09-03 15:01:43 +0200518static void iommu_print_event(struct amd_iommu *iommu, void *__evt)
Joerg Roedel90008ee2008-09-09 16:41:05 +0200519{
Joerg Roedel3d06fca2012-04-12 14:12:00 +0200520 int type, devid, domid, flags;
521 volatile u32 *event = __evt;
522 int count = 0;
523 u64 address;
524
525retry:
526 type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK;
527 devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK;
528 domid = (event[1] >> EVENT_DOMID_SHIFT) & EVENT_DOMID_MASK;
529 flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK;
530 address = (u64)(((u64)event[3]) << 32) | event[2];
531
532 if (type == 0) {
533 /* Did we hit the erratum? */
534 if (++count == LOOP_TIMEOUT) {
535 pr_err("AMD-Vi: No event written to event log\n");
536 return;
537 }
538 udelay(1);
539 goto retry;
540 }
Joerg Roedel90008ee2008-09-09 16:41:05 +0200541
Joerg Roedel4c6f40d2009-09-01 16:43:58 +0200542 printk(KERN_ERR "AMD-Vi: Event logged [");
Joerg Roedel90008ee2008-09-09 16:41:05 +0200543
544 switch (type) {
545 case EVENT_TYPE_ILL_DEV:
546 printk("ILLEGAL_DEV_TABLE_ENTRY device=%02x:%02x.%x "
547 "address=0x%016llx flags=0x%04x]\n",
548 PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid),
549 address, flags);
Joerg Roedele3e59872009-09-03 14:02:10 +0200550 dump_dte_entry(devid);
Joerg Roedel90008ee2008-09-09 16:41:05 +0200551 break;
552 case EVENT_TYPE_IO_FAULT:
553 printk("IO_PAGE_FAULT device=%02x:%02x.%x "
554 "domain=0x%04x address=0x%016llx flags=0x%04x]\n",
555 PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid),
556 domid, address, flags);
557 break;
558 case EVENT_TYPE_DEV_TAB_ERR:
559 printk("DEV_TAB_HARDWARE_ERROR device=%02x:%02x.%x "
560 "address=0x%016llx flags=0x%04x]\n",
561 PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid),
562 address, flags);
563 break;
564 case EVENT_TYPE_PAGE_TAB_ERR:
565 printk("PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x "
566 "domain=0x%04x address=0x%016llx flags=0x%04x]\n",
567 PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid),
568 domid, address, flags);
569 break;
570 case EVENT_TYPE_ILL_CMD:
571 printk("ILLEGAL_COMMAND_ERROR address=0x%016llx]\n", address);
Joerg Roedel945b4ac2009-09-03 14:25:02 +0200572 dump_command(address);
Joerg Roedel90008ee2008-09-09 16:41:05 +0200573 break;
574 case EVENT_TYPE_CMD_HARD_ERR:
575 printk("COMMAND_HARDWARE_ERROR address=0x%016llx "
576 "flags=0x%04x]\n", address, flags);
577 break;
578 case EVENT_TYPE_IOTLB_INV_TO:
579 printk("IOTLB_INV_TIMEOUT device=%02x:%02x.%x "
580 "address=0x%016llx]\n",
581 PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid),
582 address);
583 break;
584 case EVENT_TYPE_INV_DEV_REQ:
585 printk("INVALID_DEVICE_REQUEST device=%02x:%02x.%x "
586 "address=0x%016llx flags=0x%04x]\n",
587 PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid),
588 address, flags);
589 break;
590 default:
591 printk(KERN_ERR "UNKNOWN type=0x%02x]\n", type);
592 }
Joerg Roedel3d06fca2012-04-12 14:12:00 +0200593
594 memset(__evt, 0, 4 * sizeof(u32));
Joerg Roedel90008ee2008-09-09 16:41:05 +0200595}
596
597static void iommu_poll_events(struct amd_iommu *iommu)
598{
599 u32 head, tail;
600 unsigned long flags;
601
602 spin_lock_irqsave(&iommu->lock, flags);
603
604 head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET);
605 tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET);
606
607 while (head != tail) {
Joerg Roedela345b232009-09-03 15:01:43 +0200608 iommu_print_event(iommu, iommu->evt_buf + head);
Joerg Roedel90008ee2008-09-09 16:41:05 +0200609 head = (head + EVENT_ENTRY_SIZE) % iommu->evt_buf_size;
610 }
611
612 writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET);
613
614 spin_unlock_irqrestore(&iommu->lock, flags);
615}
616
Joerg Roedeleee53532012-06-01 15:20:23 +0200617static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u64 *raw)
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100618{
619 struct amd_iommu_fault fault;
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100620
Joerg Roedel399be2f2011-12-01 16:53:47 +0100621 INC_STATS_COUNTER(pri_requests);
622
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100623 if (PPR_REQ_TYPE(raw[0]) != PPR_REQ_FAULT) {
624 pr_err_ratelimited("AMD-Vi: Unknown PPR request received\n");
625 return;
626 }
627
628 fault.address = raw[1];
629 fault.pasid = PPR_PASID(raw[0]);
630 fault.device_id = PPR_DEVID(raw[0]);
631 fault.tag = PPR_TAG(raw[0]);
632 fault.flags = PPR_FLAGS(raw[0]);
633
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100634 atomic_notifier_call_chain(&ppr_notifier, 0, &fault);
635}
636
637static void iommu_poll_ppr_log(struct amd_iommu *iommu)
638{
639 unsigned long flags;
640 u32 head, tail;
641
642 if (iommu->ppr_log == NULL)
643 return;
644
Joerg Roedeleee53532012-06-01 15:20:23 +0200645 /* enable ppr interrupts again */
646 writel(MMIO_STATUS_PPR_INT_MASK, iommu->mmio_base + MMIO_STATUS_OFFSET);
647
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100648 spin_lock_irqsave(&iommu->lock, flags);
649
650 head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);
651 tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET);
652
653 while (head != tail) {
Joerg Roedeleee53532012-06-01 15:20:23 +0200654 volatile u64 *raw;
655 u64 entry[2];
656 int i;
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100657
Joerg Roedeleee53532012-06-01 15:20:23 +0200658 raw = (u64 *)(iommu->ppr_log + head);
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100659
Joerg Roedeleee53532012-06-01 15:20:23 +0200660 /*
661 * Hardware bug: Interrupt may arrive before the entry is
662 * written to memory. If this happens we need to wait for the
663 * entry to arrive.
664 */
665 for (i = 0; i < LOOP_TIMEOUT; ++i) {
666 if (PPR_REQ_TYPE(raw[0]) != 0)
667 break;
668 udelay(1);
669 }
670
671 /* Avoid memcpy function-call overhead */
672 entry[0] = raw[0];
673 entry[1] = raw[1];
674
675 /*
676 * To detect the hardware bug we need to clear the entry
677 * back to zero.
678 */
679 raw[0] = raw[1] = 0UL;
680
681 /* Update head pointer of hardware ring-buffer */
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100682 head = (head + PPR_ENTRY_SIZE) % PPR_LOG_SIZE;
683 writel(head, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);
Joerg Roedeleee53532012-06-01 15:20:23 +0200684
685 /*
686 * Release iommu->lock because ppr-handling might need to
687 * re-aquire it
688 */
689 spin_unlock_irqrestore(&iommu->lock, flags);
690
691 /* Handle PPR entry */
692 iommu_handle_ppr_entry(iommu, entry);
693
694 spin_lock_irqsave(&iommu->lock, flags);
695
696 /* Refresh ring-buffer information */
697 head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100698 tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET);
699 }
700
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100701 spin_unlock_irqrestore(&iommu->lock, flags);
702}
703
Joerg Roedel72fe00f2011-05-10 10:50:42 +0200704irqreturn_t amd_iommu_int_thread(int irq, void *data)
Joerg Roedela80dc3e2008-09-11 16:51:41 +0200705{
Joerg Roedel90008ee2008-09-09 16:41:05 +0200706 struct amd_iommu *iommu;
707
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100708 for_each_iommu(iommu) {
Joerg Roedel90008ee2008-09-09 16:41:05 +0200709 iommu_poll_events(iommu);
Joerg Roedel72e1dcc2011-11-10 19:13:51 +0100710 iommu_poll_ppr_log(iommu);
711 }
Joerg Roedel90008ee2008-09-09 16:41:05 +0200712
713 return IRQ_HANDLED;
Joerg Roedela80dc3e2008-09-11 16:51:41 +0200714}
715
Joerg Roedel72fe00f2011-05-10 10:50:42 +0200716irqreturn_t amd_iommu_int_handler(int irq, void *data)
717{
718 return IRQ_WAKE_THREAD;
719}
720
Joerg Roedela80dc3e2008-09-11 16:51:41 +0200721/****************************************************************************
722 *
Joerg Roedel431b2a22008-07-11 17:14:22 +0200723 * IOMMU command queuing functions
724 *
725 ****************************************************************************/
726
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200727static int wait_on_sem(volatile u64 *sem)
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200728{
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200729 int i = 0;
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200730
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200731 while (*sem == 0 && i < LOOP_TIMEOUT) {
732 udelay(1);
733 i += 1;
734 }
735
736 if (i == LOOP_TIMEOUT) {
737 pr_alert("AMD-Vi: Completion-Wait loop timed out\n");
738 return -EIO;
739 }
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200740
741 return 0;
742}
743
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200744static void copy_cmd_to_buffer(struct amd_iommu *iommu,
745 struct iommu_cmd *cmd,
746 u32 tail)
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200747{
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200748 u8 *target;
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200749
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200750 target = iommu->cmd_buf + tail;
751 tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200752
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200753 /* Copy command to buffer */
754 memcpy(target, cmd, sizeof(*cmd));
755
756 /* Tell the IOMMU about it */
757 writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
758}
759
Joerg Roedel815b33f2011-04-06 17:26:49 +0200760static void build_completion_wait(struct iommu_cmd *cmd, u64 address)
Joerg Roedelded46732011-04-06 10:53:48 +0200761{
Joerg Roedel815b33f2011-04-06 17:26:49 +0200762 WARN_ON(address & 0x7ULL);
763
Joerg Roedelded46732011-04-06 10:53:48 +0200764 memset(cmd, 0, sizeof(*cmd));
Joerg Roedel815b33f2011-04-06 17:26:49 +0200765 cmd->data[0] = lower_32_bits(__pa(address)) | CMD_COMPL_WAIT_STORE_MASK;
766 cmd->data[1] = upper_32_bits(__pa(address));
767 cmd->data[2] = 1;
Joerg Roedelded46732011-04-06 10:53:48 +0200768 CMD_SET_TYPE(cmd, CMD_COMPL_WAIT);
769}
770
Joerg Roedel94fe79e2011-04-06 11:07:21 +0200771static void build_inv_dte(struct iommu_cmd *cmd, u16 devid)
772{
773 memset(cmd, 0, sizeof(*cmd));
774 cmd->data[0] = devid;
775 CMD_SET_TYPE(cmd, CMD_INV_DEV_ENTRY);
776}
777
Joerg Roedel11b64022011-04-06 11:49:28 +0200778static void build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address,
779 size_t size, u16 domid, int pde)
780{
781 u64 pages;
782 int s;
783
784 pages = iommu_num_pages(address, size, PAGE_SIZE);
785 s = 0;
786
787 if (pages > 1) {
788 /*
789 * If we have to flush more than one page, flush all
790 * TLB entries for this domain
791 */
792 address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS;
793 s = 1;
794 }
795
796 address &= PAGE_MASK;
797
798 memset(cmd, 0, sizeof(*cmd));
799 cmd->data[1] |= domid;
800 cmd->data[2] = lower_32_bits(address);
801 cmd->data[3] = upper_32_bits(address);
802 CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES);
803 if (s) /* size bit - we flush more than one 4kb page */
804 cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
805 if (pde) /* PDE bit - we wan't flush everything not only the PTEs */
806 cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
807}
808
Joerg Roedelcb41ed82011-04-05 11:00:53 +0200809static void build_inv_iotlb_pages(struct iommu_cmd *cmd, u16 devid, int qdep,
810 u64 address, size_t size)
811{
812 u64 pages;
813 int s;
814
815 pages = iommu_num_pages(address, size, PAGE_SIZE);
816 s = 0;
817
818 if (pages > 1) {
819 /*
820 * If we have to flush more than one page, flush all
821 * TLB entries for this domain
822 */
823 address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS;
824 s = 1;
825 }
826
827 address &= PAGE_MASK;
828
829 memset(cmd, 0, sizeof(*cmd));
830 cmd->data[0] = devid;
831 cmd->data[0] |= (qdep & 0xff) << 24;
832 cmd->data[1] = devid;
833 cmd->data[2] = lower_32_bits(address);
834 cmd->data[3] = upper_32_bits(address);
835 CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES);
836 if (s)
837 cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
838}
839
Joerg Roedel22e266c2011-11-21 15:59:08 +0100840static void build_inv_iommu_pasid(struct iommu_cmd *cmd, u16 domid, int pasid,
841 u64 address, bool size)
842{
843 memset(cmd, 0, sizeof(*cmd));
844
845 address &= ~(0xfffULL);
846
847 cmd->data[0] = pasid & PASID_MASK;
848 cmd->data[1] = domid;
849 cmd->data[2] = lower_32_bits(address);
850 cmd->data[3] = upper_32_bits(address);
851 cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
852 cmd->data[2] |= CMD_INV_IOMMU_PAGES_GN_MASK;
853 if (size)
854 cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
855 CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES);
856}
857
858static void build_inv_iotlb_pasid(struct iommu_cmd *cmd, u16 devid, int pasid,
859 int qdep, u64 address, bool size)
860{
861 memset(cmd, 0, sizeof(*cmd));
862
863 address &= ~(0xfffULL);
864
865 cmd->data[0] = devid;
866 cmd->data[0] |= (pasid & 0xff) << 16;
867 cmd->data[0] |= (qdep & 0xff) << 24;
868 cmd->data[1] = devid;
869 cmd->data[1] |= ((pasid >> 8) & 0xfff) << 16;
870 cmd->data[2] = lower_32_bits(address);
871 cmd->data[2] |= CMD_INV_IOMMU_PAGES_GN_MASK;
872 cmd->data[3] = upper_32_bits(address);
873 if (size)
874 cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
875 CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES);
876}
877
Joerg Roedelc99afa22011-11-21 18:19:25 +0100878static void build_complete_ppr(struct iommu_cmd *cmd, u16 devid, int pasid,
879 int status, int tag, bool gn)
880{
881 memset(cmd, 0, sizeof(*cmd));
882
883 cmd->data[0] = devid;
884 if (gn) {
885 cmd->data[1] = pasid & PASID_MASK;
886 cmd->data[2] = CMD_INV_IOMMU_PAGES_GN_MASK;
887 }
888 cmd->data[3] = tag & 0x1ff;
889 cmd->data[3] |= (status & PPR_STATUS_MASK) << PPR_STATUS_SHIFT;
890
891 CMD_SET_TYPE(cmd, CMD_COMPLETE_PPR);
892}
893
Joerg Roedel58fc7f12011-04-11 11:13:24 +0200894static void build_inv_all(struct iommu_cmd *cmd)
895{
896 memset(cmd, 0, sizeof(*cmd));
897 CMD_SET_TYPE(cmd, CMD_INV_ALL);
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200898}
899
Joerg Roedel431b2a22008-07-11 17:14:22 +0200900/*
Joerg Roedelb6c02712008-06-26 21:27:53 +0200901 * Writes the command to the IOMMUs command buffer and informs the
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200902 * hardware about the new command.
Joerg Roedel431b2a22008-07-11 17:14:22 +0200903 */
Joerg Roedelf1ca1512011-09-02 14:10:32 +0200904static int iommu_queue_command_sync(struct amd_iommu *iommu,
905 struct iommu_cmd *cmd,
906 bool sync)
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200907{
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200908 u32 left, tail, head, next_tail;
Joerg Roedel815b33f2011-04-06 17:26:49 +0200909 unsigned long flags;
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200910
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200911 WARN_ON(iommu->cmd_buf_size & CMD_BUFFER_UNINITIALIZED);
Joerg Roedelda49f6d2008-12-12 14:59:58 +0100912
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200913again:
Joerg Roedel815b33f2011-04-06 17:26:49 +0200914 spin_lock_irqsave(&iommu->lock, flags);
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200915
916 head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
917 tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
918 next_tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;
919 left = (head - next_tail) % iommu->cmd_buf_size;
920
921 if (left <= 2) {
922 struct iommu_cmd sync_cmd;
923 volatile u64 sem = 0;
924 int ret;
925
926 build_completion_wait(&sync_cmd, (u64)&sem);
927 copy_cmd_to_buffer(iommu, &sync_cmd, tail);
928
929 spin_unlock_irqrestore(&iommu->lock, flags);
930
931 if ((ret = wait_on_sem(&sem)) != 0)
932 return ret;
933
934 goto again;
Joerg Roedel136f78a2008-07-11 17:14:27 +0200935 }
936
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200937 copy_cmd_to_buffer(iommu, cmd, tail);
Joerg Roedel519c31b2008-08-14 19:55:15 +0200938
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200939 /* We need to sync now to make sure all commands are processed */
Joerg Roedelf1ca1512011-09-02 14:10:32 +0200940 iommu->need_sync = sync;
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200941
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200942 spin_unlock_irqrestore(&iommu->lock, flags);
943
Joerg Roedel815b33f2011-04-06 17:26:49 +0200944 return 0;
Joerg Roedel8d201962008-12-02 20:34:41 +0100945}
946
Joerg Roedelf1ca1512011-09-02 14:10:32 +0200947static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
948{
949 return iommu_queue_command_sync(iommu, cmd, true);
950}
951
Joerg Roedel8d201962008-12-02 20:34:41 +0100952/*
953 * This function queues a completion wait command into the command
954 * buffer of an IOMMU
955 */
Joerg Roedel8d201962008-12-02 20:34:41 +0100956static int iommu_completion_wait(struct amd_iommu *iommu)
957{
Joerg Roedel815b33f2011-04-06 17:26:49 +0200958 struct iommu_cmd cmd;
959 volatile u64 sem = 0;
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200960 int ret;
Joerg Roedel8d201962008-12-02 20:34:41 +0100961
962 if (!iommu->need_sync)
Joerg Roedel815b33f2011-04-06 17:26:49 +0200963 return 0;
Joerg Roedel8d201962008-12-02 20:34:41 +0100964
Joerg Roedel815b33f2011-04-06 17:26:49 +0200965 build_completion_wait(&cmd, (u64)&sem);
Joerg Roedel8d201962008-12-02 20:34:41 +0100966
Joerg Roedelf1ca1512011-09-02 14:10:32 +0200967 ret = iommu_queue_command_sync(iommu, &cmd, false);
Joerg Roedel8d201962008-12-02 20:34:41 +0100968 if (ret)
Joerg Roedel815b33f2011-04-06 17:26:49 +0200969 return ret;
Joerg Roedel8d201962008-12-02 20:34:41 +0100970
Joerg Roedelac0ea6e2011-04-06 18:38:20 +0200971 return wait_on_sem(&sem);
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200972}
973
Joerg Roedeld8c13082011-04-06 18:51:26 +0200974static int iommu_flush_dte(struct amd_iommu *iommu, u16 devid)
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200975{
976 struct iommu_cmd cmd;
977
Joerg Roedeld8c13082011-04-06 18:51:26 +0200978 build_inv_dte(&cmd, devid);
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200979
Joerg Roedeld8c13082011-04-06 18:51:26 +0200980 return iommu_queue_command(iommu, &cmd);
981}
982
Joerg Roedel7d0c5cc2011-04-07 08:16:10 +0200983static void iommu_flush_dte_all(struct amd_iommu *iommu)
984{
985 u32 devid;
986
987 for (devid = 0; devid <= 0xffff; ++devid)
988 iommu_flush_dte(iommu, devid);
989
990 iommu_completion_wait(iommu);
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200991}
992
993/*
Joerg Roedel7d0c5cc2011-04-07 08:16:10 +0200994 * This function uses heavy locking and may disable irqs for some time. But
995 * this is no issue because it is only called during resume.
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200996 */
Joerg Roedel7d0c5cc2011-04-07 08:16:10 +0200997static void iommu_flush_tlb_all(struct amd_iommu *iommu)
Joerg Roedela19ae1e2008-06-26 21:27:55 +0200998{
Joerg Roedel7d0c5cc2011-04-07 08:16:10 +0200999 u32 dom_id;
Joerg Roedela19ae1e2008-06-26 21:27:55 +02001000
Joerg Roedel7d0c5cc2011-04-07 08:16:10 +02001001 for (dom_id = 0; dom_id <= 0xffff; ++dom_id) {
1002 struct iommu_cmd cmd;
1003 build_inv_iommu_pages(&cmd, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS,
1004 dom_id, 1);
1005 iommu_queue_command(iommu, &cmd);
1006 }
Joerg Roedel431b2a22008-07-11 17:14:22 +02001007
Joerg Roedel7d0c5cc2011-04-07 08:16:10 +02001008 iommu_completion_wait(iommu);
Joerg Roedela19ae1e2008-06-26 21:27:55 +02001009}
1010
Joerg Roedel58fc7f12011-04-11 11:13:24 +02001011static void iommu_flush_all(struct amd_iommu *iommu)
1012{
1013 struct iommu_cmd cmd;
1014
1015 build_inv_all(&cmd);
1016
1017 iommu_queue_command(iommu, &cmd);
1018 iommu_completion_wait(iommu);
1019}
1020
Joerg Roedel7d0c5cc2011-04-07 08:16:10 +02001021void iommu_flush_all_caches(struct amd_iommu *iommu)
1022{
Joerg Roedel58fc7f12011-04-11 11:13:24 +02001023 if (iommu_feature(iommu, FEATURE_IA)) {
1024 iommu_flush_all(iommu);
1025 } else {
1026 iommu_flush_dte_all(iommu);
1027 iommu_flush_tlb_all(iommu);
1028 }
Joerg Roedel7d0c5cc2011-04-07 08:16:10 +02001029}
1030
Joerg Roedel431b2a22008-07-11 17:14:22 +02001031/*
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001032 * Command send function for flushing on-device TLB
1033 */
Joerg Roedel6c542042011-06-09 17:07:31 +02001034static int device_flush_iotlb(struct iommu_dev_data *dev_data,
1035 u64 address, size_t size)
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001036{
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001037 struct amd_iommu *iommu;
1038 struct iommu_cmd cmd;
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001039 int qdep;
1040
Joerg Roedelea61cdd2011-06-09 12:56:30 +02001041 qdep = dev_data->ats.qdep;
1042 iommu = amd_iommu_rlookup_table[dev_data->devid];
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001043
Joerg Roedelea61cdd2011-06-09 12:56:30 +02001044 build_inv_iotlb_pages(&cmd, dev_data->devid, qdep, address, size);
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001045
1046 return iommu_queue_command(iommu, &cmd);
1047}
1048
1049/*
Joerg Roedel431b2a22008-07-11 17:14:22 +02001050 * Command send function for invalidating a device table entry
1051 */
Joerg Roedel6c542042011-06-09 17:07:31 +02001052static int device_flush_dte(struct iommu_dev_data *dev_data)
Joerg Roedel3fa43652009-11-26 15:04:38 +01001053{
1054 struct amd_iommu *iommu;
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001055 int ret;
Joerg Roedel3fa43652009-11-26 15:04:38 +01001056
Joerg Roedel6c542042011-06-09 17:07:31 +02001057 iommu = amd_iommu_rlookup_table[dev_data->devid];
Joerg Roedel3fa43652009-11-26 15:04:38 +01001058
Joerg Roedelf62dda62011-06-09 12:55:35 +02001059 ret = iommu_flush_dte(iommu, dev_data->devid);
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001060 if (ret)
1061 return ret;
1062
Joerg Roedelea61cdd2011-06-09 12:56:30 +02001063 if (dev_data->ats.enabled)
Joerg Roedel6c542042011-06-09 17:07:31 +02001064 ret = device_flush_iotlb(dev_data, 0, ~0UL);
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001065
1066 return ret;
Joerg Roedel3fa43652009-11-26 15:04:38 +01001067}
1068
Joerg Roedel431b2a22008-07-11 17:14:22 +02001069/*
1070 * TLB invalidation function which is called from the mapping functions.
1071 * It invalidates a single PTE if the range to flush is within a single
1072 * page. Otherwise it flushes the whole TLB of the IOMMU.
1073 */
Joerg Roedel17b124b2011-04-06 18:01:35 +02001074static void __domain_flush_pages(struct protection_domain *domain,
1075 u64 address, size_t size, int pde)
Joerg Roedela19ae1e2008-06-26 21:27:55 +02001076{
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001077 struct iommu_dev_data *dev_data;
Joerg Roedel11b64022011-04-06 11:49:28 +02001078 struct iommu_cmd cmd;
1079 int ret = 0, i;
Joerg Roedela19ae1e2008-06-26 21:27:55 +02001080
Joerg Roedel11b64022011-04-06 11:49:28 +02001081 build_inv_iommu_pages(&cmd, address, size, domain->id, pde);
Joerg Roedel999ba412008-07-03 19:35:08 +02001082
Joerg Roedel6de8ad92009-11-23 18:30:32 +01001083 for (i = 0; i < amd_iommus_present; ++i) {
1084 if (!domain->dev_iommu[i])
1085 continue;
1086
1087 /*
1088 * Devices of this domain are behind this IOMMU
1089 * We need a TLB flush
1090 */
Joerg Roedel11b64022011-04-06 11:49:28 +02001091 ret |= iommu_queue_command(amd_iommus[i], &cmd);
Joerg Roedel6de8ad92009-11-23 18:30:32 +01001092 }
1093
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001094 list_for_each_entry(dev_data, &domain->dev_list, list) {
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001095
Joerg Roedelea61cdd2011-06-09 12:56:30 +02001096 if (!dev_data->ats.enabled)
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001097 continue;
1098
Joerg Roedel6c542042011-06-09 17:07:31 +02001099 ret |= device_flush_iotlb(dev_data, address, size);
Joerg Roedelcb41ed82011-04-05 11:00:53 +02001100 }
1101
Joerg Roedel11b64022011-04-06 11:49:28 +02001102 WARN_ON(ret);
Joerg Roedel6de8ad92009-11-23 18:30:32 +01001103}
1104
Joerg Roedel17b124b2011-04-06 18:01:35 +02001105static void domain_flush_pages(struct protection_domain *domain,
1106 u64 address, size_t size)
Joerg Roedel6de8ad92009-11-23 18:30:32 +01001107{
Joerg Roedel17b124b2011-04-06 18:01:35 +02001108 __domain_flush_pages(domain, address, size, 0);
Joerg Roedela19ae1e2008-06-26 21:27:55 +02001109}
Joerg Roedelb6c02712008-06-26 21:27:53 +02001110
Joerg Roedel1c655772008-09-04 18:40:05 +02001111/* Flush the whole IO/TLB for a given protection domain */
Joerg Roedel17b124b2011-04-06 18:01:35 +02001112static void domain_flush_tlb(struct protection_domain *domain)
Joerg Roedel1c655772008-09-04 18:40:05 +02001113{
Joerg Roedel17b124b2011-04-06 18:01:35 +02001114 __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 0);
Joerg Roedel1c655772008-09-04 18:40:05 +02001115}
1116
Chris Wright42a49f92009-06-15 15:42:00 +02001117/* Flush the whole IO/TLB for a given protection domain - including PDE */
Joerg Roedel17b124b2011-04-06 18:01:35 +02001118static void domain_flush_tlb_pde(struct protection_domain *domain)
Chris Wright42a49f92009-06-15 15:42:00 +02001119{
Joerg Roedel17b124b2011-04-06 18:01:35 +02001120 __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 1);
1121}
1122
1123static void domain_flush_complete(struct protection_domain *domain)
Joerg Roedelb6c02712008-06-26 21:27:53 +02001124{
1125 int i;
1126
1127 for (i = 0; i < amd_iommus_present; ++i) {
1128 if (!domain->dev_iommu[i])
1129 continue;
1130
1131 /*
1132 * Devices of this domain are behind this IOMMU
1133 * We need to wait for completion of all commands.
1134 */
1135 iommu_completion_wait(amd_iommus[i]);
1136 }
1137}
1138
Joerg Roedelb00d3bc2009-11-26 15:35:33 +01001139
Joerg Roedel43f49602008-12-02 21:01:12 +01001140/*
Joerg Roedelb00d3bc2009-11-26 15:35:33 +01001141 * This function flushes the DTEs for all devices in domain
Joerg Roedel43f49602008-12-02 21:01:12 +01001142 */
Joerg Roedel17b124b2011-04-06 18:01:35 +02001143static void domain_flush_devices(struct protection_domain *domain)
Joerg Roedelbfd1be12009-05-05 15:33:57 +02001144{
Joerg Roedelb00d3bc2009-11-26 15:35:33 +01001145 struct iommu_dev_data *dev_data;
Joerg Roedelb00d3bc2009-11-26 15:35:33 +01001146
1147 list_for_each_entry(dev_data, &domain->dev_list, list)
Joerg Roedel6c542042011-06-09 17:07:31 +02001148 device_flush_dte(dev_data);
Joerg Roedelb00d3bc2009-11-26 15:35:33 +01001149}
1150
Joerg Roedel431b2a22008-07-11 17:14:22 +02001151/****************************************************************************
1152 *
1153 * The functions below are used the create the page table mappings for
1154 * unity mapped regions.
1155 *
1156 ****************************************************************************/
1157
1158/*
Joerg Roedel308973d2009-11-24 17:43:32 +01001159 * This function is used to add another level to an IO page table. Adding
1160 * another level increases the size of the address space by 9 bits to a size up
1161 * to 64 bits.
1162 */
1163static bool increase_address_space(struct protection_domain *domain,
1164 gfp_t gfp)
1165{
1166 u64 *pte;
1167
1168 if (domain->mode == PAGE_MODE_6_LEVEL)
1169 /* address space already 64 bit large */
1170 return false;
1171
1172 pte = (void *)get_zeroed_page(gfp);
1173 if (!pte)
1174 return false;
1175
1176 *pte = PM_LEVEL_PDE(domain->mode,
1177 virt_to_phys(domain->pt_root));
1178 domain->pt_root = pte;
1179 domain->mode += 1;
1180 domain->updated = true;
1181
1182 return true;
1183}
1184
1185static u64 *alloc_pte(struct protection_domain *domain,
1186 unsigned long address,
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001187 unsigned long page_size,
Joerg Roedel308973d2009-11-24 17:43:32 +01001188 u64 **pte_page,
1189 gfp_t gfp)
1190{
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001191 int level, end_lvl;
Joerg Roedel308973d2009-11-24 17:43:32 +01001192 u64 *pte, *page;
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001193
1194 BUG_ON(!is_power_of_2(page_size));
Joerg Roedel308973d2009-11-24 17:43:32 +01001195
1196 while (address > PM_LEVEL_SIZE(domain->mode))
1197 increase_address_space(domain, gfp);
1198
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001199 level = domain->mode - 1;
1200 pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
1201 address = PAGE_SIZE_ALIGN(address, page_size);
1202 end_lvl = PAGE_SIZE_LEVEL(page_size);
Joerg Roedel308973d2009-11-24 17:43:32 +01001203
1204 while (level > end_lvl) {
1205 if (!IOMMU_PTE_PRESENT(*pte)) {
1206 page = (u64 *)get_zeroed_page(gfp);
1207 if (!page)
1208 return NULL;
1209 *pte = PM_LEVEL_PDE(level, virt_to_phys(page));
1210 }
1211
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001212 /* No level skipping support yet */
1213 if (PM_PTE_LEVEL(*pte) != level)
1214 return NULL;
1215
Joerg Roedel308973d2009-11-24 17:43:32 +01001216 level -= 1;
1217
1218 pte = IOMMU_PTE_PAGE(*pte);
1219
1220 if (pte_page && level == end_lvl)
1221 *pte_page = pte;
1222
1223 pte = &pte[PM_LEVEL_INDEX(level, address)];
1224 }
1225
1226 return pte;
1227}
1228
1229/*
1230 * This function checks if there is a PTE for a given dma address. If
1231 * there is one, it returns the pointer to it.
1232 */
Joerg Roedel24cd7722010-01-19 17:27:39 +01001233static u64 *fetch_pte(struct protection_domain *domain, unsigned long address)
Joerg Roedel308973d2009-11-24 17:43:32 +01001234{
1235 int level;
1236 u64 *pte;
1237
Joerg Roedel24cd7722010-01-19 17:27:39 +01001238 if (address > PM_LEVEL_SIZE(domain->mode))
1239 return NULL;
Joerg Roedel308973d2009-11-24 17:43:32 +01001240
Joerg Roedel24cd7722010-01-19 17:27:39 +01001241 level = domain->mode - 1;
1242 pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
1243
1244 while (level > 0) {
1245
1246 /* Not Present */
Joerg Roedel308973d2009-11-24 17:43:32 +01001247 if (!IOMMU_PTE_PRESENT(*pte))
1248 return NULL;
1249
Joerg Roedel24cd7722010-01-19 17:27:39 +01001250 /* Large PTE */
1251 if (PM_PTE_LEVEL(*pte) == 0x07) {
1252 unsigned long pte_mask, __pte;
1253
1254 /*
1255 * If we have a series of large PTEs, make
1256 * sure to return a pointer to the first one.
1257 */
1258 pte_mask = PTE_PAGE_SIZE(*pte);
1259 pte_mask = ~((PAGE_SIZE_PTE_COUNT(pte_mask) << 3) - 1);
1260 __pte = ((unsigned long)pte) & pte_mask;
1261
1262 return (u64 *)__pte;
1263 }
1264
1265 /* No level skipping support yet */
1266 if (PM_PTE_LEVEL(*pte) != level)
1267 return NULL;
1268
Joerg Roedel308973d2009-11-24 17:43:32 +01001269 level -= 1;
1270
Joerg Roedel24cd7722010-01-19 17:27:39 +01001271 /* Walk to the next level */
Joerg Roedel308973d2009-11-24 17:43:32 +01001272 pte = IOMMU_PTE_PAGE(*pte);
1273 pte = &pte[PM_LEVEL_INDEX(level, address)];
Joerg Roedel308973d2009-11-24 17:43:32 +01001274 }
1275
1276 return pte;
1277}
1278
1279/*
Joerg Roedel431b2a22008-07-11 17:14:22 +02001280 * Generic mapping functions. It maps a physical address into a DMA
1281 * address space. It allocates the page table pages if necessary.
1282 * In the future it can be extended to a generic mapping function
1283 * supporting all features of AMD IOMMU page tables like level skipping
1284 * and full 64 bit address spaces.
1285 */
Joerg Roedel38e817f2008-12-02 17:27:52 +01001286static int iommu_map_page(struct protection_domain *dom,
1287 unsigned long bus_addr,
1288 unsigned long phys_addr,
Joerg Roedelabdc5eb2009-09-03 11:33:51 +02001289 int prot,
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001290 unsigned long page_size)
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001291{
Joerg Roedel8bda3092009-05-12 12:02:46 +02001292 u64 __pte, *pte;
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001293 int i, count;
Joerg Roedelabdc5eb2009-09-03 11:33:51 +02001294
Joerg Roedelbad1cac2009-09-02 16:52:23 +02001295 if (!(prot & IOMMU_PROT_MASK))
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001296 return -EINVAL;
1297
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001298 bus_addr = PAGE_ALIGN(bus_addr);
1299 phys_addr = PAGE_ALIGN(phys_addr);
1300 count = PAGE_SIZE_PTE_COUNT(page_size);
1301 pte = alloc_pte(dom, bus_addr, page_size, NULL, GFP_KERNEL);
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001302
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001303 for (i = 0; i < count; ++i)
1304 if (IOMMU_PTE_PRESENT(pte[i]))
1305 return -EBUSY;
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001306
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001307 if (page_size > PAGE_SIZE) {
1308 __pte = PAGE_SIZE_PTE(phys_addr, page_size);
1309 __pte |= PM_LEVEL_ENC(7) | IOMMU_PTE_P | IOMMU_PTE_FC;
1310 } else
1311 __pte = phys_addr | IOMMU_PTE_P | IOMMU_PTE_FC;
1312
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001313 if (prot & IOMMU_PROT_IR)
1314 __pte |= IOMMU_PTE_IR;
1315 if (prot & IOMMU_PROT_IW)
1316 __pte |= IOMMU_PTE_IW;
1317
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001318 for (i = 0; i < count; ++i)
1319 pte[i] = __pte;
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001320
Joerg Roedel04bfdd82009-09-02 16:00:23 +02001321 update_domain(dom);
1322
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001323 return 0;
1324}
1325
Joerg Roedel24cd7722010-01-19 17:27:39 +01001326static unsigned long iommu_unmap_page(struct protection_domain *dom,
1327 unsigned long bus_addr,
1328 unsigned long page_size)
Joerg Roedeleb74ff62008-12-02 19:59:10 +01001329{
Joerg Roedel24cd7722010-01-19 17:27:39 +01001330 unsigned long long unmap_size, unmapped;
1331 u64 *pte;
Joerg Roedeleb74ff62008-12-02 19:59:10 +01001332
Joerg Roedel24cd7722010-01-19 17:27:39 +01001333 BUG_ON(!is_power_of_2(page_size));
1334
1335 unmapped = 0;
1336
1337 while (unmapped < page_size) {
1338
1339 pte = fetch_pte(dom, bus_addr);
1340
1341 if (!pte) {
1342 /*
1343 * No PTE for this address
1344 * move forward in 4kb steps
1345 */
1346 unmap_size = PAGE_SIZE;
1347 } else if (PM_PTE_LEVEL(*pte) == 0) {
1348 /* 4kb PTE found for this address */
1349 unmap_size = PAGE_SIZE;
1350 *pte = 0ULL;
1351 } else {
1352 int count, i;
1353
1354 /* Large PTE found which maps this address */
1355 unmap_size = PTE_PAGE_SIZE(*pte);
1356 count = PAGE_SIZE_PTE_COUNT(unmap_size);
1357 for (i = 0; i < count; i++)
1358 pte[i] = 0ULL;
1359 }
1360
1361 bus_addr = (bus_addr & ~(unmap_size - 1)) + unmap_size;
1362 unmapped += unmap_size;
1363 }
1364
1365 BUG_ON(!is_power_of_2(unmapped));
1366
1367 return unmapped;
Joerg Roedeleb74ff62008-12-02 19:59:10 +01001368}
Joerg Roedeleb74ff62008-12-02 19:59:10 +01001369
Joerg Roedel431b2a22008-07-11 17:14:22 +02001370/*
1371 * This function checks if a specific unity mapping entry is needed for
1372 * this specific IOMMU.
1373 */
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001374static int iommu_for_unity_map(struct amd_iommu *iommu,
1375 struct unity_map_entry *entry)
1376{
1377 u16 bdf, i;
1378
1379 for (i = entry->devid_start; i <= entry->devid_end; ++i) {
1380 bdf = amd_iommu_alias_table[i];
1381 if (amd_iommu_rlookup_table[bdf] == iommu)
1382 return 1;
1383 }
1384
1385 return 0;
1386}
1387
Joerg Roedel431b2a22008-07-11 17:14:22 +02001388/*
Joerg Roedel431b2a22008-07-11 17:14:22 +02001389 * This function actually applies the mapping to the page table of the
1390 * dma_ops domain.
1391 */
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001392static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
1393 struct unity_map_entry *e)
1394{
1395 u64 addr;
1396 int ret;
1397
1398 for (addr = e->address_start; addr < e->address_end;
1399 addr += PAGE_SIZE) {
Joerg Roedelabdc5eb2009-09-03 11:33:51 +02001400 ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot,
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001401 PAGE_SIZE);
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001402 if (ret)
1403 return ret;
1404 /*
1405 * if unity mapping is in aperture range mark the page
1406 * as allocated in the aperture
1407 */
1408 if (addr < dma_dom->aperture_size)
Joerg Roedelc3239562009-05-12 10:56:44 +02001409 __set_bit(addr >> PAGE_SHIFT,
Joerg Roedel384de722009-05-15 12:30:05 +02001410 dma_dom->aperture[0]->bitmap);
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001411 }
1412
1413 return 0;
1414}
1415
Joerg Roedel431b2a22008-07-11 17:14:22 +02001416/*
Joerg Roedel171e7b32009-11-24 17:47:56 +01001417 * Init the unity mappings for a specific IOMMU in the system
1418 *
1419 * Basically iterates over all unity mapping entries and applies them to
1420 * the default domain DMA of that IOMMU if necessary.
1421 */
1422static int iommu_init_unity_mappings(struct amd_iommu *iommu)
1423{
1424 struct unity_map_entry *entry;
1425 int ret;
1426
1427 list_for_each_entry(entry, &amd_iommu_unity_map, list) {
1428 if (!iommu_for_unity_map(iommu, entry))
1429 continue;
1430 ret = dma_ops_unity_map(iommu->default_dom, entry);
1431 if (ret)
1432 return ret;
1433 }
1434
1435 return 0;
1436}
1437
1438/*
Joerg Roedel431b2a22008-07-11 17:14:22 +02001439 * Inits the unity mappings required for a specific device
1440 */
Joerg Roedelbd0e5212008-06-26 21:27:56 +02001441static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom,
1442 u16 devid)
1443{
1444 struct unity_map_entry *e;
1445 int ret;
1446
1447 list_for_each_entry(e, &amd_iommu_unity_map, list) {
1448 if (!(devid >= e->devid_start && devid <= e->devid_end))
1449 continue;
1450 ret = dma_ops_unity_map(dma_dom, e);
1451 if (ret)
1452 return ret;
1453 }
1454
1455 return 0;
1456}
1457
Joerg Roedel431b2a22008-07-11 17:14:22 +02001458/****************************************************************************
1459 *
1460 * The next functions belong to the address allocator for the dma_ops
1461 * interface functions. They work like the allocators in the other IOMMU
1462 * drivers. Its basically a bitmap which marks the allocated pages in
1463 * the aperture. Maybe it could be enhanced in the future to a more
1464 * efficient allocator.
1465 *
1466 ****************************************************************************/
Joerg Roedeld3086442008-06-26 21:27:57 +02001467
Joerg Roedel431b2a22008-07-11 17:14:22 +02001468/*
Joerg Roedel384de722009-05-15 12:30:05 +02001469 * The address allocator core functions.
Joerg Roedel431b2a22008-07-11 17:14:22 +02001470 *
1471 * called with domain->lock held
1472 */
Joerg Roedel384de722009-05-15 12:30:05 +02001473
Joerg Roedel9cabe892009-05-18 16:38:55 +02001474/*
Joerg Roedel171e7b32009-11-24 17:47:56 +01001475 * Used to reserve address ranges in the aperture (e.g. for exclusion
1476 * ranges.
1477 */
1478static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
1479 unsigned long start_page,
1480 unsigned int pages)
1481{
1482 unsigned int i, last_page = dom->aperture_size >> PAGE_SHIFT;
1483
1484 if (start_page + pages > last_page)
1485 pages = last_page - start_page;
1486
1487 for (i = start_page; i < start_page + pages; ++i) {
1488 int index = i / APERTURE_RANGE_PAGES;
1489 int page = i % APERTURE_RANGE_PAGES;
1490 __set_bit(page, dom->aperture[index]->bitmap);
1491 }
1492}
1493
1494/*
Joerg Roedel9cabe892009-05-18 16:38:55 +02001495 * This function is used to add a new aperture range to an existing
1496 * aperture in case of dma_ops domain allocation or address allocation
1497 * failure.
1498 */
Joerg Roedel576175c2009-11-23 19:08:46 +01001499static int alloc_new_range(struct dma_ops_domain *dma_dom,
Joerg Roedel9cabe892009-05-18 16:38:55 +02001500 bool populate, gfp_t gfp)
1501{
1502 int index = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT;
Joerg Roedel576175c2009-11-23 19:08:46 +01001503 struct amd_iommu *iommu;
Joerg Roedel17f5b562011-07-06 17:14:44 +02001504 unsigned long i, old_size;
Joerg Roedel9cabe892009-05-18 16:38:55 +02001505
Joerg Roedelf5e97052009-05-22 12:31:53 +02001506#ifdef CONFIG_IOMMU_STRESS
1507 populate = false;
1508#endif
1509
Joerg Roedel9cabe892009-05-18 16:38:55 +02001510 if (index >= APERTURE_MAX_RANGES)
1511 return -ENOMEM;
1512
1513 dma_dom->aperture[index] = kzalloc(sizeof(struct aperture_range), gfp);
1514 if (!dma_dom->aperture[index])
1515 return -ENOMEM;
1516
1517 dma_dom->aperture[index]->bitmap = (void *)get_zeroed_page(gfp);
1518 if (!dma_dom->aperture[index]->bitmap)
1519 goto out_free;
1520
1521 dma_dom->aperture[index]->offset = dma_dom->aperture_size;
1522
1523 if (populate) {
1524 unsigned long address = dma_dom->aperture_size;
1525 int i, num_ptes = APERTURE_RANGE_PAGES / 512;
1526 u64 *pte, *pte_page;
1527
1528 for (i = 0; i < num_ptes; ++i) {
Joerg Roedelcbb9d722010-01-15 14:41:15 +01001529 pte = alloc_pte(&dma_dom->domain, address, PAGE_SIZE,
Joerg Roedel9cabe892009-05-18 16:38:55 +02001530 &pte_page, gfp);
1531 if (!pte)
1532 goto out_free;
1533
1534 dma_dom->aperture[index]->pte_pages[i] = pte_page;
1535
1536 address += APERTURE_RANGE_SIZE / 64;
1537 }
1538 }
1539
Joerg Roedel17f5b562011-07-06 17:14:44 +02001540 old_size = dma_dom->aperture_size;
Joerg Roedel9cabe892009-05-18 16:38:55 +02001541 dma_dom->aperture_size += APERTURE_RANGE_SIZE;
1542
Joerg Roedel17f5b562011-07-06 17:14:44 +02001543 /* Reserve address range used for MSI messages */
1544 if (old_size < MSI_ADDR_BASE_LO &&
1545 dma_dom->aperture_size > MSI_ADDR_BASE_LO) {
1546 unsigned long spage;
1547 int pages;
1548
1549 pages = iommu_num_pages(MSI_ADDR_BASE_LO, 0x10000, PAGE_SIZE);
1550 spage = MSI_ADDR_BASE_LO >> PAGE_SHIFT;
1551
1552 dma_ops_reserve_addresses(dma_dom, spage, pages);
1553 }
1554
Uwe Kleine-Königb5950762010-11-01 15:38:34 -04001555 /* Initialize the exclusion range if necessary */
Joerg Roedel576175c2009-11-23 19:08:46 +01001556 for_each_iommu(iommu) {
1557 if (iommu->exclusion_start &&
1558 iommu->exclusion_start >= dma_dom->aperture[index]->offset
1559 && iommu->exclusion_start < dma_dom->aperture_size) {
1560 unsigned long startpage;
1561 int pages = iommu_num_pages(iommu->exclusion_start,
1562 iommu->exclusion_length,
1563 PAGE_SIZE);
1564 startpage = iommu->exclusion_start >> PAGE_SHIFT;
1565 dma_ops_reserve_addresses(dma_dom, startpage, pages);
1566 }
Joerg Roedel00cd1222009-05-19 09:52:40 +02001567 }
1568
1569 /*
1570 * Check for areas already mapped as present in the new aperture
1571 * range and mark those pages as reserved in the allocator. Such
1572 * mappings may already exist as a result of requested unity
1573 * mappings for devices.
1574 */
1575 for (i = dma_dom->aperture[index]->offset;
1576 i < dma_dom->aperture_size;
1577 i += PAGE_SIZE) {
Joerg Roedel24cd7722010-01-19 17:27:39 +01001578 u64 *pte = fetch_pte(&dma_dom->domain, i);
Joerg Roedel00cd1222009-05-19 09:52:40 +02001579 if (!pte || !IOMMU_PTE_PRESENT(*pte))
1580 continue;
1581
Joerg Roedelfcd08612011-10-11 17:41:32 +02001582 dma_ops_reserve_addresses(dma_dom, i >> PAGE_SHIFT, 1);
Joerg Roedel00cd1222009-05-19 09:52:40 +02001583 }
1584
Joerg Roedel04bfdd82009-09-02 16:00:23 +02001585 update_domain(&dma_dom->domain);
1586
Joerg Roedel9cabe892009-05-18 16:38:55 +02001587 return 0;
1588
1589out_free:
Joerg Roedel04bfdd82009-09-02 16:00:23 +02001590 update_domain(&dma_dom->domain);
1591
Joerg Roedel9cabe892009-05-18 16:38:55 +02001592 free_page((unsigned long)dma_dom->aperture[index]->bitmap);
1593
1594 kfree(dma_dom->aperture[index]);
1595 dma_dom->aperture[index] = NULL;
1596
1597 return -ENOMEM;
1598}
1599
Joerg Roedel384de722009-05-15 12:30:05 +02001600static unsigned long dma_ops_area_alloc(struct device *dev,
1601 struct dma_ops_domain *dom,
1602 unsigned int pages,
1603 unsigned long align_mask,
1604 u64 dma_mask,
1605 unsigned long start)
1606{
Joerg Roedel803b8cb2009-05-18 15:32:48 +02001607 unsigned long next_bit = dom->next_address % APERTURE_RANGE_SIZE;
Joerg Roedel384de722009-05-15 12:30:05 +02001608 int max_index = dom->aperture_size >> APERTURE_RANGE_SHIFT;
1609 int i = start >> APERTURE_RANGE_SHIFT;
1610 unsigned long boundary_size;
1611 unsigned long address = -1;
1612 unsigned long limit;
1613
Joerg Roedel803b8cb2009-05-18 15:32:48 +02001614 next_bit >>= PAGE_SHIFT;
1615
Joerg Roedel384de722009-05-15 12:30:05 +02001616 boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
1617 PAGE_SIZE) >> PAGE_SHIFT;
1618
1619 for (;i < max_index; ++i) {
1620 unsigned long offset = dom->aperture[i]->offset >> PAGE_SHIFT;
1621
1622 if (dom->aperture[i]->offset >= dma_mask)
1623 break;
1624
1625 limit = iommu_device_max_index(APERTURE_RANGE_PAGES, offset,
1626 dma_mask >> PAGE_SHIFT);
1627
1628 address = iommu_area_alloc(dom->aperture[i]->bitmap,
1629 limit, next_bit, pages, 0,
1630 boundary_size, align_mask);
1631 if (address != -1) {
1632 address = dom->aperture[i]->offset +
1633 (address << PAGE_SHIFT);
Joerg Roedel803b8cb2009-05-18 15:32:48 +02001634 dom->next_address = address + (pages << PAGE_SHIFT);
Joerg Roedel384de722009-05-15 12:30:05 +02001635 break;
1636 }
1637
1638 next_bit = 0;
1639 }
1640
1641 return address;
1642}
1643
Joerg Roedeld3086442008-06-26 21:27:57 +02001644static unsigned long dma_ops_alloc_addresses(struct device *dev,
1645 struct dma_ops_domain *dom,
Joerg Roedel6d4f3432008-09-04 19:18:02 +02001646 unsigned int pages,
Joerg Roedel832a90c2008-09-18 15:54:23 +02001647 unsigned long align_mask,
1648 u64 dma_mask)
Joerg Roedeld3086442008-06-26 21:27:57 +02001649{
Joerg Roedeld3086442008-06-26 21:27:57 +02001650 unsigned long address;
Joerg Roedeld3086442008-06-26 21:27:57 +02001651
Joerg Roedelfe16f082009-05-22 12:27:53 +02001652#ifdef CONFIG_IOMMU_STRESS
1653 dom->next_address = 0;
1654 dom->need_flush = true;
1655#endif
Joerg Roedeld3086442008-06-26 21:27:57 +02001656
Joerg Roedel384de722009-05-15 12:30:05 +02001657 address = dma_ops_area_alloc(dev, dom, pages, align_mask,
Joerg Roedel803b8cb2009-05-18 15:32:48 +02001658 dma_mask, dom->next_address);
Joerg Roedeld3086442008-06-26 21:27:57 +02001659
Joerg Roedel1c655772008-09-04 18:40:05 +02001660 if (address == -1) {
Joerg Roedel803b8cb2009-05-18 15:32:48 +02001661 dom->next_address = 0;
Joerg Roedel384de722009-05-15 12:30:05 +02001662 address = dma_ops_area_alloc(dev, dom, pages, align_mask,
1663 dma_mask, 0);
Joerg Roedel1c655772008-09-04 18:40:05 +02001664 dom->need_flush = true;
1665 }
Joerg Roedeld3086442008-06-26 21:27:57 +02001666
Joerg Roedel384de722009-05-15 12:30:05 +02001667 if (unlikely(address == -1))
FUJITA Tomonori8fd524b2009-11-15 21:19:53 +09001668 address = DMA_ERROR_CODE;
Joerg Roedeld3086442008-06-26 21:27:57 +02001669
1670 WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size);
1671
1672 return address;
1673}
1674
Joerg Roedel431b2a22008-07-11 17:14:22 +02001675/*
1676 * The address free function.
1677 *
1678 * called with domain->lock held
1679 */
Joerg Roedeld3086442008-06-26 21:27:57 +02001680static void dma_ops_free_addresses(struct dma_ops_domain *dom,
1681 unsigned long address,
1682 unsigned int pages)
1683{
Joerg Roedel384de722009-05-15 12:30:05 +02001684 unsigned i = address >> APERTURE_RANGE_SHIFT;
1685 struct aperture_range *range = dom->aperture[i];
Joerg Roedel80be3082008-11-06 14:59:05 +01001686
Joerg Roedel384de722009-05-15 12:30:05 +02001687 BUG_ON(i >= APERTURE_MAX_RANGES || range == NULL);
1688
Joerg Roedel47bccd62009-05-22 12:40:54 +02001689#ifdef CONFIG_IOMMU_STRESS
1690 if (i < 4)
1691 return;
1692#endif
1693
Joerg Roedel803b8cb2009-05-18 15:32:48 +02001694 if (address >= dom->next_address)
Joerg Roedel80be3082008-11-06 14:59:05 +01001695 dom->need_flush = true;
Joerg Roedel384de722009-05-15 12:30:05 +02001696
1697 address = (address % APERTURE_RANGE_SIZE) >> PAGE_SHIFT;
Joerg Roedel803b8cb2009-05-18 15:32:48 +02001698
Akinobu Mitaa66022c2009-12-15 16:48:28 -08001699 bitmap_clear(range->bitmap, address, pages);
Joerg Roedel384de722009-05-15 12:30:05 +02001700
Joerg Roedeld3086442008-06-26 21:27:57 +02001701}
1702
Joerg Roedel431b2a22008-07-11 17:14:22 +02001703/****************************************************************************
1704 *
1705 * The next functions belong to the domain allocation. A domain is
1706 * allocated for every IOMMU as the default domain. If device isolation
1707 * is enabled, every device get its own domain. The most important thing
1708 * about domains is the page table mapping the DMA address space they
1709 * contain.
1710 *
1711 ****************************************************************************/
1712
Joerg Roedelaeb26f52009-11-20 16:44:01 +01001713/*
1714 * This function adds a protection domain to the global protection domain list
1715 */
1716static void add_domain_to_list(struct protection_domain *domain)
1717{
1718 unsigned long flags;
1719
1720 spin_lock_irqsave(&amd_iommu_pd_lock, flags);
1721 list_add(&domain->list, &amd_iommu_pd_list);
1722 spin_unlock_irqrestore(&amd_iommu_pd_lock, flags);
1723}
1724
1725/*
1726 * This function removes a protection domain to the global
1727 * protection domain list
1728 */
1729static void del_domain_from_list(struct protection_domain *domain)
1730{
1731 unsigned long flags;
1732
1733 spin_lock_irqsave(&amd_iommu_pd_lock, flags);
1734 list_del(&domain->list);
1735 spin_unlock_irqrestore(&amd_iommu_pd_lock, flags);
1736}
1737
Joerg Roedelec487d12008-06-26 21:27:58 +02001738static u16 domain_id_alloc(void)
1739{
1740 unsigned long flags;
1741 int id;
1742
1743 write_lock_irqsave(&amd_iommu_devtable_lock, flags);
1744 id = find_first_zero_bit(amd_iommu_pd_alloc_bitmap, MAX_DOMAIN_ID);
1745 BUG_ON(id == 0);
1746 if (id > 0 && id < MAX_DOMAIN_ID)
1747 __set_bit(id, amd_iommu_pd_alloc_bitmap);
1748 else
1749 id = 0;
1750 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
1751
1752 return id;
1753}
1754
Joerg Roedela2acfb72008-12-02 18:28:53 +01001755static void domain_id_free(int id)
1756{
1757 unsigned long flags;
1758
1759 write_lock_irqsave(&amd_iommu_devtable_lock, flags);
1760 if (id > 0 && id < MAX_DOMAIN_ID)
1761 __clear_bit(id, amd_iommu_pd_alloc_bitmap);
1762 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
1763}
Joerg Roedela2acfb72008-12-02 18:28:53 +01001764
Joerg Roedel86db2e52008-12-02 18:20:21 +01001765static void free_pagetable(struct protection_domain *domain)
Joerg Roedelec487d12008-06-26 21:27:58 +02001766{
1767 int i, j;
1768 u64 *p1, *p2, *p3;
1769
Joerg Roedel86db2e52008-12-02 18:20:21 +01001770 p1 = domain->pt_root;
Joerg Roedelec487d12008-06-26 21:27:58 +02001771
1772 if (!p1)
1773 return;
1774
1775 for (i = 0; i < 512; ++i) {
1776 if (!IOMMU_PTE_PRESENT(p1[i]))
1777 continue;
1778
1779 p2 = IOMMU_PTE_PAGE(p1[i]);
Joerg Roedel3cc3d842008-12-04 16:44:31 +01001780 for (j = 0; j < 512; ++j) {
Joerg Roedelec487d12008-06-26 21:27:58 +02001781 if (!IOMMU_PTE_PRESENT(p2[j]))
1782 continue;
1783 p3 = IOMMU_PTE_PAGE(p2[j]);
1784 free_page((unsigned long)p3);
1785 }
1786
1787 free_page((unsigned long)p2);
1788 }
1789
1790 free_page((unsigned long)p1);
Joerg Roedel86db2e52008-12-02 18:20:21 +01001791
1792 domain->pt_root = NULL;
Joerg Roedelec487d12008-06-26 21:27:58 +02001793}
1794
Joerg Roedelb16137b2011-11-21 16:50:23 +01001795static void free_gcr3_tbl_level1(u64 *tbl)
1796{
1797 u64 *ptr;
1798 int i;
1799
1800 for (i = 0; i < 512; ++i) {
1801 if (!(tbl[i] & GCR3_VALID))
1802 continue;
1803
1804 ptr = __va(tbl[i] & PAGE_MASK);
1805
1806 free_page((unsigned long)ptr);
1807 }
1808}
1809
1810static void free_gcr3_tbl_level2(u64 *tbl)
1811{
1812 u64 *ptr;
1813 int i;
1814
1815 for (i = 0; i < 512; ++i) {
1816 if (!(tbl[i] & GCR3_VALID))
1817 continue;
1818
1819 ptr = __va(tbl[i] & PAGE_MASK);
1820
1821 free_gcr3_tbl_level1(ptr);
1822 }
1823}
1824
Joerg Roedel52815b72011-11-17 17:24:28 +01001825static void free_gcr3_table(struct protection_domain *domain)
1826{
Joerg Roedelb16137b2011-11-21 16:50:23 +01001827 if (domain->glx == 2)
1828 free_gcr3_tbl_level2(domain->gcr3_tbl);
1829 else if (domain->glx == 1)
1830 free_gcr3_tbl_level1(domain->gcr3_tbl);
1831 else if (domain->glx != 0)
1832 BUG();
1833
Joerg Roedel52815b72011-11-17 17:24:28 +01001834 free_page((unsigned long)domain->gcr3_tbl);
1835}
1836
Joerg Roedel431b2a22008-07-11 17:14:22 +02001837/*
1838 * Free a domain, only used if something went wrong in the
1839 * allocation path and we need to free an already allocated page table
1840 */
Joerg Roedelec487d12008-06-26 21:27:58 +02001841static void dma_ops_domain_free(struct dma_ops_domain *dom)
1842{
Joerg Roedel384de722009-05-15 12:30:05 +02001843 int i;
1844
Joerg Roedelec487d12008-06-26 21:27:58 +02001845 if (!dom)
1846 return;
1847
Joerg Roedelaeb26f52009-11-20 16:44:01 +01001848 del_domain_from_list(&dom->domain);
1849
Joerg Roedel86db2e52008-12-02 18:20:21 +01001850 free_pagetable(&dom->domain);
Joerg Roedelec487d12008-06-26 21:27:58 +02001851
Joerg Roedel384de722009-05-15 12:30:05 +02001852 for (i = 0; i < APERTURE_MAX_RANGES; ++i) {
1853 if (!dom->aperture[i])
1854 continue;
1855 free_page((unsigned long)dom->aperture[i]->bitmap);
1856 kfree(dom->aperture[i]);
1857 }
Joerg Roedelec487d12008-06-26 21:27:58 +02001858
1859 kfree(dom);
1860}
1861
Joerg Roedel431b2a22008-07-11 17:14:22 +02001862/*
1863 * Allocates a new protection domain usable for the dma_ops functions.
Uwe Kleine-Königb5950762010-11-01 15:38:34 -04001864 * It also initializes the page table and the address allocator data
Joerg Roedel431b2a22008-07-11 17:14:22 +02001865 * structures required for the dma_ops interface
1866 */
Joerg Roedel87a64d52009-11-24 17:26:43 +01001867static struct dma_ops_domain *dma_ops_domain_alloc(void)
Joerg Roedelec487d12008-06-26 21:27:58 +02001868{
1869 struct dma_ops_domain *dma_dom;
Joerg Roedelec487d12008-06-26 21:27:58 +02001870
1871 dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL);
1872 if (!dma_dom)
1873 return NULL;
1874
1875 spin_lock_init(&dma_dom->domain.lock);
1876
1877 dma_dom->domain.id = domain_id_alloc();
1878 if (dma_dom->domain.id == 0)
1879 goto free_dma_dom;
Joerg Roedel7c392cb2009-11-26 11:13:32 +01001880 INIT_LIST_HEAD(&dma_dom->domain.dev_list);
Joerg Roedel8f7a0172009-09-02 16:55:24 +02001881 dma_dom->domain.mode = PAGE_MODE_2_LEVEL;
Joerg Roedelec487d12008-06-26 21:27:58 +02001882 dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL);
Joerg Roedel9fdb19d2008-12-02 17:46:25 +01001883 dma_dom->domain.flags = PD_DMA_OPS_MASK;
Joerg Roedelec487d12008-06-26 21:27:58 +02001884 dma_dom->domain.priv = dma_dom;
1885 if (!dma_dom->domain.pt_root)
1886 goto free_dma_dom;
Joerg Roedelec487d12008-06-26 21:27:58 +02001887
Joerg Roedel1c655772008-09-04 18:40:05 +02001888 dma_dom->need_flush = false;
Joerg Roedelbd60b732008-09-11 10:24:48 +02001889 dma_dom->target_dev = 0xffff;
Joerg Roedel1c655772008-09-04 18:40:05 +02001890
Joerg Roedelaeb26f52009-11-20 16:44:01 +01001891 add_domain_to_list(&dma_dom->domain);
1892
Joerg Roedel576175c2009-11-23 19:08:46 +01001893 if (alloc_new_range(dma_dom, true, GFP_KERNEL))
Joerg Roedelec487d12008-06-26 21:27:58 +02001894 goto free_dma_dom;
Joerg Roedelec487d12008-06-26 21:27:58 +02001895
Joerg Roedel431b2a22008-07-11 17:14:22 +02001896 /*
Joerg Roedelec487d12008-06-26 21:27:58 +02001897 * mark the first page as allocated so we never return 0 as
1898 * a valid dma-address. So we can use 0 as error value
Joerg Roedel431b2a22008-07-11 17:14:22 +02001899 */
Joerg Roedel384de722009-05-15 12:30:05 +02001900 dma_dom->aperture[0]->bitmap[0] = 1;
Joerg Roedel803b8cb2009-05-18 15:32:48 +02001901 dma_dom->next_address = 0;
Joerg Roedelec487d12008-06-26 21:27:58 +02001902
Joerg Roedelec487d12008-06-26 21:27:58 +02001903
1904 return dma_dom;
1905
1906free_dma_dom:
1907 dma_ops_domain_free(dma_dom);
1908
1909 return NULL;
1910}
1911
Joerg Roedel431b2a22008-07-11 17:14:22 +02001912/*
Joerg Roedel5b28df62008-12-02 17:49:42 +01001913 * little helper function to check whether a given protection domain is a
1914 * dma_ops domain
1915 */
1916static bool dma_ops_domain(struct protection_domain *domain)
1917{
1918 return domain->flags & PD_DMA_OPS_MASK;
1919}
1920
Joerg Roedelfd7b5532011-04-05 15:31:08 +02001921static void set_dte_entry(u16 devid, struct protection_domain *domain, bool ats)
Joerg Roedelb20ac0d2008-06-26 21:27:59 +02001922{
Joerg Roedel132bd682011-11-17 14:18:46 +01001923 u64 pte_root = 0;
Joerg Roedelee6c2862011-11-09 12:06:03 +01001924 u64 flags = 0;
Joerg Roedel863c74e2008-12-02 17:56:36 +01001925
Joerg Roedel132bd682011-11-17 14:18:46 +01001926 if (domain->mode != PAGE_MODE_NONE)
1927 pte_root = virt_to_phys(domain->pt_root);
1928
Joerg Roedel38ddf412008-09-11 10:38:32 +02001929 pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK)
1930 << DEV_ENTRY_MODE_SHIFT;
1931 pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV;
Joerg Roedelb20ac0d2008-06-26 21:27:59 +02001932
Joerg Roedelee6c2862011-11-09 12:06:03 +01001933 flags = amd_iommu_dev_table[devid].data[1];
1934
Joerg Roedelfd7b5532011-04-05 15:31:08 +02001935 if (ats)
1936 flags |= DTE_FLAG_IOTLB;
1937
Joerg Roedel52815b72011-11-17 17:24:28 +01001938 if (domain->flags & PD_IOMMUV2_MASK) {
1939 u64 gcr3 = __pa(domain->gcr3_tbl);
1940 u64 glx = domain->glx;
1941 u64 tmp;
1942
1943 pte_root |= DTE_FLAG_GV;
1944 pte_root |= (glx & DTE_GLX_MASK) << DTE_GLX_SHIFT;
1945
1946 /* First mask out possible old values for GCR3 table */
1947 tmp = DTE_GCR3_VAL_B(~0ULL) << DTE_GCR3_SHIFT_B;
1948 flags &= ~tmp;
1949
1950 tmp = DTE_GCR3_VAL_C(~0ULL) << DTE_GCR3_SHIFT_C;
1951 flags &= ~tmp;
1952
1953 /* Encode GCR3 table into DTE */
1954 tmp = DTE_GCR3_VAL_A(gcr3) << DTE_GCR3_SHIFT_A;
1955 pte_root |= tmp;
1956
1957 tmp = DTE_GCR3_VAL_B(gcr3) << DTE_GCR3_SHIFT_B;
1958 flags |= tmp;
1959
1960 tmp = DTE_GCR3_VAL_C(gcr3) << DTE_GCR3_SHIFT_C;
1961 flags |= tmp;
1962 }
1963
Joerg Roedelee6c2862011-11-09 12:06:03 +01001964 flags &= ~(0xffffUL);
1965 flags |= domain->id;
1966
1967 amd_iommu_dev_table[devid].data[1] = flags;
1968 amd_iommu_dev_table[devid].data[0] = pte_root;
Joerg Roedelb20ac0d2008-06-26 21:27:59 +02001969}
1970
Joerg Roedel15898bb2009-11-24 15:39:42 +01001971static void clear_dte_entry(u16 devid)
Joerg Roedel355bf552008-12-08 12:02:41 +01001972{
Joerg Roedel355bf552008-12-08 12:02:41 +01001973 /* remove entry from the device table seen by the hardware */
1974 amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV;
1975 amd_iommu_dev_table[devid].data[1] = 0;
Joerg Roedel355bf552008-12-08 12:02:41 +01001976
Joerg Roedelc5cca142009-10-09 18:31:20 +02001977 amd_iommu_apply_erratum_63(devid);
Joerg Roedel7f760dd2009-11-26 14:49:59 +01001978}
1979
Joerg Roedelec9e79e2011-06-09 17:25:50 +02001980static void do_attach(struct iommu_dev_data *dev_data,
1981 struct protection_domain *domain)
Joerg Roedel7f760dd2009-11-26 14:49:59 +01001982{
Joerg Roedel7f760dd2009-11-26 14:49:59 +01001983 struct amd_iommu *iommu;
Joerg Roedelec9e79e2011-06-09 17:25:50 +02001984 bool ats;
Joerg Roedel7f760dd2009-11-26 14:49:59 +01001985
Joerg Roedelec9e79e2011-06-09 17:25:50 +02001986 iommu = amd_iommu_rlookup_table[dev_data->devid];
1987 ats = dev_data->ats.enabled;
Joerg Roedel7f760dd2009-11-26 14:49:59 +01001988
1989 /* Update data structures */
1990 dev_data->domain = domain;
1991 list_add(&dev_data->list, &domain->dev_list);
Joerg Roedelf62dda62011-06-09 12:55:35 +02001992 set_dte_entry(dev_data->devid, domain, ats);
Joerg Roedel7f760dd2009-11-26 14:49:59 +01001993
1994 /* Do reference counting */
1995 domain->dev_iommu[iommu->index] += 1;
1996 domain->dev_cnt += 1;
1997
1998 /* Flush the DTE entry */
Joerg Roedel6c542042011-06-09 17:07:31 +02001999 device_flush_dte(dev_data);
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002000}
2001
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002002static void do_detach(struct iommu_dev_data *dev_data)
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002003{
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002004 struct amd_iommu *iommu;
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002005
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002006 iommu = amd_iommu_rlookup_table[dev_data->devid];
Joerg Roedelc5cca142009-10-09 18:31:20 +02002007
Joerg Roedelc4596112009-11-20 14:57:32 +01002008 /* decrease reference counters */
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002009 dev_data->domain->dev_iommu[iommu->index] -= 1;
2010 dev_data->domain->dev_cnt -= 1;
Joerg Roedel355bf552008-12-08 12:02:41 +01002011
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002012 /* Update data structures */
2013 dev_data->domain = NULL;
2014 list_del(&dev_data->list);
Joerg Roedelf62dda62011-06-09 12:55:35 +02002015 clear_dte_entry(dev_data->devid);
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002016
2017 /* Flush the DTE entry */
Joerg Roedel6c542042011-06-09 17:07:31 +02002018 device_flush_dte(dev_data);
Joerg Roedel15898bb2009-11-24 15:39:42 +01002019}
2020
2021/*
2022 * If a device is not yet associated with a domain, this function does
2023 * assigns it visible for the hardware
2024 */
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002025static int __attach_device(struct iommu_dev_data *dev_data,
Joerg Roedel15898bb2009-11-24 15:39:42 +01002026 struct protection_domain *domain)
2027{
Julia Lawall84fe6c12010-05-27 12:31:51 +02002028 int ret;
Joerg Roedel657cbb62009-11-23 15:26:46 +01002029
Joerg Roedel15898bb2009-11-24 15:39:42 +01002030 /* lock domain */
2031 spin_lock(&domain->lock);
2032
Joerg Roedel71f77582011-06-09 19:03:15 +02002033 if (dev_data->alias_data != NULL) {
2034 struct iommu_dev_data *alias_data = dev_data->alias_data;
Joerg Roedel15898bb2009-11-24 15:39:42 +01002035
Joerg Roedel2b02b092011-06-09 17:48:39 +02002036 /* Some sanity checks */
2037 ret = -EBUSY;
2038 if (alias_data->domain != NULL &&
2039 alias_data->domain != domain)
2040 goto out_unlock;
Joerg Roedel15898bb2009-11-24 15:39:42 +01002041
Joerg Roedel2b02b092011-06-09 17:48:39 +02002042 if (dev_data->domain != NULL &&
2043 dev_data->domain != domain)
2044 goto out_unlock;
2045
2046 /* Do real assignment */
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002047 if (alias_data->domain == NULL)
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002048 do_attach(alias_data, domain);
Joerg Roedel24100052009-11-25 15:59:57 +01002049
2050 atomic_inc(&alias_data->bind);
Joerg Roedel657cbb62009-11-23 15:26:46 +01002051 }
Joerg Roedel15898bb2009-11-24 15:39:42 +01002052
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002053 if (dev_data->domain == NULL)
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002054 do_attach(dev_data, domain);
Joerg Roedel15898bb2009-11-24 15:39:42 +01002055
Joerg Roedel24100052009-11-25 15:59:57 +01002056 atomic_inc(&dev_data->bind);
2057
Julia Lawall84fe6c12010-05-27 12:31:51 +02002058 ret = 0;
2059
2060out_unlock:
2061
Joerg Roedel355bf552008-12-08 12:02:41 +01002062 /* ready */
2063 spin_unlock(&domain->lock);
Joerg Roedel21129f72009-09-01 11:59:42 +02002064
Julia Lawall84fe6c12010-05-27 12:31:51 +02002065 return ret;
Joerg Roedel15898bb2009-11-24 15:39:42 +01002066}
2067
Joerg Roedel52815b72011-11-17 17:24:28 +01002068
2069static void pdev_iommuv2_disable(struct pci_dev *pdev)
2070{
2071 pci_disable_ats(pdev);
2072 pci_disable_pri(pdev);
2073 pci_disable_pasid(pdev);
2074}
2075
Joerg Roedel6a113dd2011-12-01 12:04:58 +01002076/* FIXME: Change generic reset-function to do the same */
2077static int pri_reset_while_enabled(struct pci_dev *pdev)
2078{
2079 u16 control;
2080 int pos;
2081
Joerg Roedel46277b72011-12-07 14:34:02 +01002082 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
Joerg Roedel6a113dd2011-12-01 12:04:58 +01002083 if (!pos)
2084 return -EINVAL;
2085
Joerg Roedel46277b72011-12-07 14:34:02 +01002086 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
2087 control |= PCI_PRI_CTRL_RESET;
2088 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
Joerg Roedel6a113dd2011-12-01 12:04:58 +01002089
2090 return 0;
2091}
2092
Joerg Roedel52815b72011-11-17 17:24:28 +01002093static int pdev_iommuv2_enable(struct pci_dev *pdev)
2094{
Joerg Roedel6a113dd2011-12-01 12:04:58 +01002095 bool reset_enable;
2096 int reqs, ret;
2097
2098 /* FIXME: Hardcode number of outstanding requests for now */
2099 reqs = 32;
2100 if (pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE))
2101 reqs = 1;
2102 reset_enable = pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_ENABLE_RESET);
Joerg Roedel52815b72011-11-17 17:24:28 +01002103
2104 /* Only allow access to user-accessible pages */
2105 ret = pci_enable_pasid(pdev, 0);
2106 if (ret)
2107 goto out_err;
2108
2109 /* First reset the PRI state of the device */
2110 ret = pci_reset_pri(pdev);
2111 if (ret)
2112 goto out_err;
2113
Joerg Roedel6a113dd2011-12-01 12:04:58 +01002114 /* Enable PRI */
2115 ret = pci_enable_pri(pdev, reqs);
Joerg Roedel52815b72011-11-17 17:24:28 +01002116 if (ret)
2117 goto out_err;
2118
Joerg Roedel6a113dd2011-12-01 12:04:58 +01002119 if (reset_enable) {
2120 ret = pri_reset_while_enabled(pdev);
2121 if (ret)
2122 goto out_err;
2123 }
2124
Joerg Roedel52815b72011-11-17 17:24:28 +01002125 ret = pci_enable_ats(pdev, PAGE_SHIFT);
2126 if (ret)
2127 goto out_err;
2128
2129 return 0;
2130
2131out_err:
2132 pci_disable_pri(pdev);
2133 pci_disable_pasid(pdev);
2134
2135 return ret;
2136}
2137
Joerg Roedelc99afa22011-11-21 18:19:25 +01002138/* FIXME: Move this to PCI code */
Joerg Roedela3b93122012-04-12 12:49:26 +02002139#define PCI_PRI_TLP_OFF (1 << 15)
Joerg Roedelc99afa22011-11-21 18:19:25 +01002140
Joerg Roedel98f1ad22012-07-06 13:28:37 +02002141static bool pci_pri_tlp_required(struct pci_dev *pdev)
Joerg Roedelc99afa22011-11-21 18:19:25 +01002142{
Joerg Roedela3b93122012-04-12 12:49:26 +02002143 u16 status;
Joerg Roedelc99afa22011-11-21 18:19:25 +01002144 int pos;
2145
Joerg Roedel46277b72011-12-07 14:34:02 +01002146 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
Joerg Roedelc99afa22011-11-21 18:19:25 +01002147 if (!pos)
2148 return false;
2149
Joerg Roedela3b93122012-04-12 12:49:26 +02002150 pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
Joerg Roedelc99afa22011-11-21 18:19:25 +01002151
Joerg Roedela3b93122012-04-12 12:49:26 +02002152 return (status & PCI_PRI_TLP_OFF) ? true : false;
Joerg Roedelc99afa22011-11-21 18:19:25 +01002153}
2154
Joerg Roedel15898bb2009-11-24 15:39:42 +01002155/*
2156 * If a device is not yet associated with a domain, this function does
2157 * assigns it visible for the hardware
2158 */
2159static int attach_device(struct device *dev,
2160 struct protection_domain *domain)
2161{
Joerg Roedelfd7b5532011-04-05 15:31:08 +02002162 struct pci_dev *pdev = to_pci_dev(dev);
Joerg Roedelea61cdd2011-06-09 12:56:30 +02002163 struct iommu_dev_data *dev_data;
Joerg Roedel15898bb2009-11-24 15:39:42 +01002164 unsigned long flags;
2165 int ret;
2166
Joerg Roedelea61cdd2011-06-09 12:56:30 +02002167 dev_data = get_dev_data(dev);
2168
Joerg Roedel52815b72011-11-17 17:24:28 +01002169 if (domain->flags & PD_IOMMUV2_MASK) {
2170 if (!dev_data->iommu_v2 || !dev_data->passthrough)
2171 return -EINVAL;
2172
2173 if (pdev_iommuv2_enable(pdev) != 0)
2174 return -EINVAL;
2175
2176 dev_data->ats.enabled = true;
2177 dev_data->ats.qdep = pci_ats_queue_depth(pdev);
Joerg Roedelc99afa22011-11-21 18:19:25 +01002178 dev_data->pri_tlp = pci_pri_tlp_required(pdev);
Joerg Roedel52815b72011-11-17 17:24:28 +01002179 } else if (amd_iommu_iotlb_sup &&
2180 pci_enable_ats(pdev, PAGE_SHIFT) == 0) {
Joerg Roedelea61cdd2011-06-09 12:56:30 +02002181 dev_data->ats.enabled = true;
2182 dev_data->ats.qdep = pci_ats_queue_depth(pdev);
2183 }
Joerg Roedelfd7b5532011-04-05 15:31:08 +02002184
Joerg Roedel15898bb2009-11-24 15:39:42 +01002185 write_lock_irqsave(&amd_iommu_devtable_lock, flags);
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002186 ret = __attach_device(dev_data, domain);
Joerg Roedel15898bb2009-11-24 15:39:42 +01002187 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
2188
2189 /*
2190 * We might boot into a crash-kernel here. The crashed kernel
2191 * left the caches in the IOMMU dirty. So we have to flush
2192 * here to evict all dirty stuff.
2193 */
Joerg Roedel17b124b2011-04-06 18:01:35 +02002194 domain_flush_tlb_pde(domain);
Joerg Roedel15898bb2009-11-24 15:39:42 +01002195
2196 return ret;
2197}
2198
2199/*
2200 * Removes a device from a protection domain (unlocked)
2201 */
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002202static void __detach_device(struct iommu_dev_data *dev_data)
Joerg Roedel15898bb2009-11-24 15:39:42 +01002203{
Joerg Roedel2ca76272010-01-22 16:45:31 +01002204 struct protection_domain *domain;
Joerg Roedel7c392cb2009-11-26 11:13:32 +01002205 unsigned long flags;
Joerg Roedel15898bb2009-11-24 15:39:42 +01002206
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002207 BUG_ON(!dev_data->domain);
Joerg Roedel15898bb2009-11-24 15:39:42 +01002208
Joerg Roedel2ca76272010-01-22 16:45:31 +01002209 domain = dev_data->domain;
2210
2211 spin_lock_irqsave(&domain->lock, flags);
Joerg Roedel24100052009-11-25 15:59:57 +01002212
Joerg Roedel71f77582011-06-09 19:03:15 +02002213 if (dev_data->alias_data != NULL) {
2214 struct iommu_dev_data *alias_data = dev_data->alias_data;
2215
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002216 if (atomic_dec_and_test(&alias_data->bind))
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002217 do_detach(alias_data);
Joerg Roedel24100052009-11-25 15:59:57 +01002218 }
2219
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002220 if (atomic_dec_and_test(&dev_data->bind))
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002221 do_detach(dev_data);
Joerg Roedel7f760dd2009-11-26 14:49:59 +01002222
Joerg Roedel2ca76272010-01-22 16:45:31 +01002223 spin_unlock_irqrestore(&domain->lock, flags);
Joerg Roedel15898bb2009-11-24 15:39:42 +01002224
Joerg Roedel21129f72009-09-01 11:59:42 +02002225 /*
2226 * If we run in passthrough mode the device must be assigned to the
Joerg Roedeld3ad9372010-01-22 17:55:27 +01002227 * passthrough domain if it is detached from any other domain.
2228 * Make sure we can deassign from the pt_domain itself.
Joerg Roedel21129f72009-09-01 11:59:42 +02002229 */
Joerg Roedel5abcdba2011-12-01 15:49:45 +01002230 if (dev_data->passthrough &&
Joerg Roedeld3ad9372010-01-22 17:55:27 +01002231 (dev_data->domain == NULL && domain != pt_domain))
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002232 __attach_device(dev_data, pt_domain);
Joerg Roedel355bf552008-12-08 12:02:41 +01002233}
2234
2235/*
2236 * Removes a device from a protection domain (with devtable_lock held)
2237 */
Joerg Roedel15898bb2009-11-24 15:39:42 +01002238static void detach_device(struct device *dev)
Joerg Roedel355bf552008-12-08 12:02:41 +01002239{
Joerg Roedel52815b72011-11-17 17:24:28 +01002240 struct protection_domain *domain;
Joerg Roedelea61cdd2011-06-09 12:56:30 +02002241 struct iommu_dev_data *dev_data;
Joerg Roedel355bf552008-12-08 12:02:41 +01002242 unsigned long flags;
2243
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002244 dev_data = get_dev_data(dev);
Joerg Roedel52815b72011-11-17 17:24:28 +01002245 domain = dev_data->domain;
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002246
Joerg Roedel355bf552008-12-08 12:02:41 +01002247 /* lock device table */
2248 write_lock_irqsave(&amd_iommu_devtable_lock, flags);
Joerg Roedelec9e79e2011-06-09 17:25:50 +02002249 __detach_device(dev_data);
Joerg Roedel355bf552008-12-08 12:02:41 +01002250 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
Joerg Roedelfd7b5532011-04-05 15:31:08 +02002251
Joerg Roedel52815b72011-11-17 17:24:28 +01002252 if (domain->flags & PD_IOMMUV2_MASK)
2253 pdev_iommuv2_disable(to_pci_dev(dev));
2254 else if (dev_data->ats.enabled)
Joerg Roedelea61cdd2011-06-09 12:56:30 +02002255 pci_disable_ats(to_pci_dev(dev));
Joerg Roedel52815b72011-11-17 17:24:28 +01002256
2257 dev_data->ats.enabled = false;
Joerg Roedel355bf552008-12-08 12:02:41 +01002258}
Joerg Roedele275a2a2008-12-10 18:27:25 +01002259
Joerg Roedel15898bb2009-11-24 15:39:42 +01002260/*
2261 * Find out the protection domain structure for a given PCI device. This
2262 * will give us the pointer to the page table root for example.
2263 */
2264static struct protection_domain *domain_for_device(struct device *dev)
2265{
Joerg Roedel71f77582011-06-09 19:03:15 +02002266 struct iommu_dev_data *dev_data;
Joerg Roedel2b02b092011-06-09 17:48:39 +02002267 struct protection_domain *dom = NULL;
Joerg Roedel15898bb2009-11-24 15:39:42 +01002268 unsigned long flags;
Joerg Roedel15898bb2009-11-24 15:39:42 +01002269
Joerg Roedel657cbb62009-11-23 15:26:46 +01002270 dev_data = get_dev_data(dev);
Joerg Roedel15898bb2009-11-24 15:39:42 +01002271
Joerg Roedel2b02b092011-06-09 17:48:39 +02002272 if (dev_data->domain)
2273 return dev_data->domain;
2274
Joerg Roedel71f77582011-06-09 19:03:15 +02002275 if (dev_data->alias_data != NULL) {
2276 struct iommu_dev_data *alias_data = dev_data->alias_data;
Joerg Roedel2b02b092011-06-09 17:48:39 +02002277
2278 read_lock_irqsave(&amd_iommu_devtable_lock, flags);
2279 if (alias_data->domain != NULL) {
2280 __attach_device(dev_data, alias_data->domain);
2281 dom = alias_data->domain;
2282 }
2283 read_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
Joerg Roedel15898bb2009-11-24 15:39:42 +01002284 }
2285
Joerg Roedel15898bb2009-11-24 15:39:42 +01002286 return dom;
2287}
2288
Joerg Roedele275a2a2008-12-10 18:27:25 +01002289static int device_change_notifier(struct notifier_block *nb,
2290 unsigned long action, void *data)
2291{
Joerg Roedele275a2a2008-12-10 18:27:25 +01002292 struct dma_ops_domain *dma_domain;
Joerg Roedel5abcdba2011-12-01 15:49:45 +01002293 struct protection_domain *domain;
2294 struct iommu_dev_data *dev_data;
2295 struct device *dev = data;
Joerg Roedele275a2a2008-12-10 18:27:25 +01002296 struct amd_iommu *iommu;
Joerg Roedel1ac4cbb2008-12-10 19:33:26 +01002297 unsigned long flags;
Joerg Roedel5abcdba2011-12-01 15:49:45 +01002298 u16 devid;
Joerg Roedele275a2a2008-12-10 18:27:25 +01002299
Joerg Roedel98fc5a62009-11-24 17:19:23 +01002300 if (!check_device(dev))
2301 return 0;
Joerg Roedele275a2a2008-12-10 18:27:25 +01002302
Joerg Roedel5abcdba2011-12-01 15:49:45 +01002303 devid = get_device_id(dev);
2304 iommu = amd_iommu_rlookup_table[devid];
2305 dev_data = get_dev_data(dev);
Joerg Roedele275a2a2008-12-10 18:27:25 +01002306
2307 switch (action) {
Chris Wrightc1eee672009-05-21 00:56:58 -07002308 case BUS_NOTIFY_UNBOUND_DRIVER:
Joerg Roedel657cbb62009-11-23 15:26:46 +01002309
2310 domain = domain_for_device(dev);
2311
Joerg Roedele275a2a2008-12-10 18:27:25 +01002312 if (!domain)
2313 goto out;
Joerg Roedel5abcdba2011-12-01 15:49:45 +01002314 if (dev_data->passthrough)
Joerg Roedela1ca3312009-09-01 12:22:22 +02002315 break;
Joerg Roedel15898bb2009-11-24 15:39:42 +01002316 detach_device(dev);
Joerg Roedele275a2a2008-12-10 18:27:25 +01002317 break;
Joerg Roedel1ac4cbb2008-12-10 19:33:26 +01002318 case BUS_NOTIFY_ADD_DEVICE:
Joerg Roedel657cbb62009-11-23 15:26:46 +01002319
2320 iommu_init_device(dev);
2321
Joerg Roedel2c9195e2012-07-19 13:42:54 +02002322 /*
2323 * dev_data is still NULL and
2324 * got initialized in iommu_init_device
2325 */
2326 dev_data = get_dev_data(dev);
2327
2328 if (iommu_pass_through || dev_data->iommu_v2) {
2329 dev_data->passthrough = true;
2330 attach_device(dev, pt_domain);
2331 break;
2332 }
2333
Joerg Roedel657cbb62009-11-23 15:26:46 +01002334 domain = domain_for_device(dev);
2335
Joerg Roedel1ac4cbb2008-12-10 19:33:26 +01002336 /* allocate a protection domain if a device is added */
2337 dma_domain = find_protection_domain(devid);
2338 if (dma_domain)
2339 goto out;
Joerg Roedel87a64d52009-11-24 17:26:43 +01002340 dma_domain = dma_ops_domain_alloc();
Joerg Roedel1ac4cbb2008-12-10 19:33:26 +01002341 if (!dma_domain)
2342 goto out;
2343 dma_domain->target_dev = devid;
2344
2345 spin_lock_irqsave(&iommu_pd_list_lock, flags);
2346 list_add_tail(&dma_domain->list, &iommu_pd_list);
2347 spin_unlock_irqrestore(&iommu_pd_list_lock, flags);
2348
Joerg Roedelac1534a2012-06-21 14:52:40 +02002349 dev_data = get_dev_data(dev);
2350
Joerg Roedel2c9195e2012-07-19 13:42:54 +02002351 dev->archdata.dma_ops = &amd_iommu_dma_ops;
Joerg Roedelac1534a2012-06-21 14:52:40 +02002352
Joerg Roedel1ac4cbb2008-12-10 19:33:26 +01002353 break;
Joerg Roedel657cbb62009-11-23 15:26:46 +01002354 case BUS_NOTIFY_DEL_DEVICE:
2355
2356 iommu_uninit_device(dev);
2357
Joerg Roedele275a2a2008-12-10 18:27:25 +01002358 default:
2359 goto out;
2360 }
2361
Joerg Roedele275a2a2008-12-10 18:27:25 +01002362 iommu_completion_wait(iommu);
2363
2364out:
2365 return 0;
2366}
2367
Jaswinder Singh Rajputb25ae672009-07-01 19:53:14 +05302368static struct notifier_block device_nb = {
Joerg Roedele275a2a2008-12-10 18:27:25 +01002369 .notifier_call = device_change_notifier,
2370};
Joerg Roedel355bf552008-12-08 12:02:41 +01002371
Joerg Roedel8638c492009-12-10 11:12:25 +01002372void amd_iommu_init_notifier(void)
2373{
2374 bus_register_notifier(&pci_bus_type, &device_nb);
2375}
2376
Joerg Roedel431b2a22008-07-11 17:14:22 +02002377/*****************************************************************************
2378 *
2379 * The next functions belong to the dma_ops mapping/unmapping code.
2380 *
2381 *****************************************************************************/
2382
2383/*
2384 * In the dma_ops path we only have the struct device. This function
2385 * finds the corresponding IOMMU, the protection domain and the
2386 * requestor id for a given device.
2387 * If the device is not yet associated with a domain this is also done
2388 * in this function.
2389 */
Joerg Roedel94f6d192009-11-24 16:40:02 +01002390static struct protection_domain *get_domain(struct device *dev)
Joerg Roedelb20ac0d2008-06-26 21:27:59 +02002391{
Joerg Roedel94f6d192009-11-24 16:40:02 +01002392 struct protection_domain *domain;
Joerg Roedelb20ac0d2008-06-26 21:27:59 +02002393 struct dma_ops_domain *dma_dom;
Joerg Roedel94f6d192009-11-24 16:40:02 +01002394 u16 devid = get_device_id(dev);
Joerg Roedelb20ac0d2008-06-26 21:27:59 +02002395
Joerg Roedelf99c0f12009-11-23 16:52:56 +01002396 if (!check_device(dev))
Joerg Roedel94f6d192009-11-24 16:40:02 +01002397 return ERR_PTR(-EINVAL);
Joerg Roedeldbcc1122008-09-04 15:04:26 +02002398
Joerg Roedel94f6d192009-11-24 16:40:02 +01002399 domain = domain_for_device(dev);
2400 if (domain != NULL && !dma_ops_domain(domain))
2401 return ERR_PTR(-EBUSY);
Joerg Roedelf99c0f12009-11-23 16:52:56 +01002402
Joerg Roedel94f6d192009-11-24 16:40:02 +01002403 if (domain != NULL)
2404 return domain;
Joerg Roedelb20ac0d2008-06-26 21:27:59 +02002405
Joerg Roedel15898bb2009-11-24 15:39:42 +01002406 /* Device not bount yet - bind it */
Joerg Roedel94f6d192009-11-24 16:40:02 +01002407 dma_dom = find_protection_domain(devid);
Joerg Roedel15898bb2009-11-24 15:39:42 +01002408 if (!dma_dom)
Joerg Roedel94f6d192009-11-24 16:40:02 +01002409 dma_dom = amd_iommu_rlookup_table[devid]->default_dom;
2410 attach_device(dev, &dma_dom->domain);
Joerg Roedel15898bb2009-11-24 15:39:42 +01002411 DUMP_printk("Using protection domain %d for device %s\n",
Joerg Roedel94f6d192009-11-24 16:40:02 +01002412 dma_dom->domain.id, dev_name(dev));
Joerg Roedelf91ba192008-11-25 12:56:12 +01002413
Joerg Roedel94f6d192009-11-24 16:40:02 +01002414 return &dma_dom->domain;
Joerg Roedelb20ac0d2008-06-26 21:27:59 +02002415}
2416
Joerg Roedel04bfdd82009-09-02 16:00:23 +02002417static void update_device_table(struct protection_domain *domain)
2418{
Joerg Roedel492667d2009-11-27 13:25:47 +01002419 struct iommu_dev_data *dev_data;
Joerg Roedel04bfdd82009-09-02 16:00:23 +02002420
Joerg Roedelea61cdd2011-06-09 12:56:30 +02002421 list_for_each_entry(dev_data, &domain->dev_list, list)
2422 set_dte_entry(dev_data->devid, domain, dev_data->ats.enabled);
Joerg Roedel04bfdd82009-09-02 16:00:23 +02002423}
2424
2425static void update_domain(struct protection_domain *domain)
2426{
2427 if (!domain->updated)
2428 return;
2429
2430 update_device_table(domain);
Joerg Roedel17b124b2011-04-06 18:01:35 +02002431
2432 domain_flush_devices(domain);
2433 domain_flush_tlb_pde(domain);
Joerg Roedel04bfdd82009-09-02 16:00:23 +02002434
2435 domain->updated = false;
2436}
2437
Joerg Roedel431b2a22008-07-11 17:14:22 +02002438/*
Joerg Roedel8bda3092009-05-12 12:02:46 +02002439 * This function fetches the PTE for a given address in the aperture
2440 */
2441static u64* dma_ops_get_pte(struct dma_ops_domain *dom,
2442 unsigned long address)
2443{
Joerg Roedel384de722009-05-15 12:30:05 +02002444 struct aperture_range *aperture;
Joerg Roedel8bda3092009-05-12 12:02:46 +02002445 u64 *pte, *pte_page;
2446
Joerg Roedel384de722009-05-15 12:30:05 +02002447 aperture = dom->aperture[APERTURE_RANGE_INDEX(address)];
2448 if (!aperture)
2449 return NULL;
2450
2451 pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)];
Joerg Roedel8bda3092009-05-12 12:02:46 +02002452 if (!pte) {
Joerg Roedelcbb9d722010-01-15 14:41:15 +01002453 pte = alloc_pte(&dom->domain, address, PAGE_SIZE, &pte_page,
Joerg Roedelabdc5eb2009-09-03 11:33:51 +02002454 GFP_ATOMIC);
Joerg Roedel384de722009-05-15 12:30:05 +02002455 aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page;
2456 } else
Joerg Roedel8c8c1432009-09-02 17:30:00 +02002457 pte += PM_LEVEL_INDEX(0, address);
Joerg Roedel8bda3092009-05-12 12:02:46 +02002458
Joerg Roedel04bfdd82009-09-02 16:00:23 +02002459 update_domain(&dom->domain);
Joerg Roedel8bda3092009-05-12 12:02:46 +02002460
2461 return pte;
2462}
2463
2464/*
Joerg Roedel431b2a22008-07-11 17:14:22 +02002465 * This is the generic map function. It maps one 4kb page at paddr to
2466 * the given address in the DMA address space for the domain.
2467 */
Joerg Roedel680525e2009-11-23 18:44:42 +01002468static dma_addr_t dma_ops_domain_map(struct dma_ops_domain *dom,
Joerg Roedelcb76c322008-06-26 21:28:00 +02002469 unsigned long address,
2470 phys_addr_t paddr,
2471 int direction)
2472{
2473 u64 *pte, __pte;
2474
2475 WARN_ON(address > dom->aperture_size);
2476
2477 paddr &= PAGE_MASK;
2478
Joerg Roedel8bda3092009-05-12 12:02:46 +02002479 pte = dma_ops_get_pte(dom, address);
Joerg Roedel53812c12009-05-12 12:17:38 +02002480 if (!pte)
FUJITA Tomonori8fd524b2009-11-15 21:19:53 +09002481 return DMA_ERROR_CODE;
Joerg Roedelcb76c322008-06-26 21:28:00 +02002482
2483 __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC;
2484
2485 if (direction == DMA_TO_DEVICE)
2486 __pte |= IOMMU_PTE_IR;
2487 else if (direction == DMA_FROM_DEVICE)
2488 __pte |= IOMMU_PTE_IW;
2489 else if (direction == DMA_BIDIRECTIONAL)
2490 __pte |= IOMMU_PTE_IR | IOMMU_PTE_IW;
2491
2492 WARN_ON(*pte);
2493
2494 *pte = __pte;
2495
2496 return (dma_addr_t)address;
2497}
2498
Joerg Roedel431b2a22008-07-11 17:14:22 +02002499/*
2500 * The generic unmapping function for on page in the DMA address space.
2501 */
Joerg Roedel680525e2009-11-23 18:44:42 +01002502static void dma_ops_domain_unmap(struct dma_ops_domain *dom,
Joerg Roedelcb76c322008-06-26 21:28:00 +02002503 unsigned long address)
2504{
Joerg Roedel384de722009-05-15 12:30:05 +02002505 struct aperture_range *aperture;
Joerg Roedelcb76c322008-06-26 21:28:00 +02002506 u64 *pte;
2507
2508 if (address >= dom->aperture_size)
2509 return;
2510
Joerg Roedel384de722009-05-15 12:30:05 +02002511 aperture = dom->aperture[APERTURE_RANGE_INDEX(address)];
2512 if (!aperture)
2513 return;
Joerg Roedelcb76c322008-06-26 21:28:00 +02002514
Joerg Roedel384de722009-05-15 12:30:05 +02002515 pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)];
2516 if (!pte)
2517 return;
2518
Joerg Roedel8c8c1432009-09-02 17:30:00 +02002519 pte += PM_LEVEL_INDEX(0, address);
Joerg Roedelcb76c322008-06-26 21:28:00 +02002520
2521 WARN_ON(!*pte);
2522
2523 *pte = 0ULL;
2524}
2525
Joerg Roedel431b2a22008-07-11 17:14:22 +02002526/*
2527 * This function contains common code for mapping of a physically
Joerg Roedel24f81162008-12-08 14:25:39 +01002528 * contiguous memory region into DMA address space. It is used by all
2529 * mapping functions provided with this IOMMU driver.
Joerg Roedel431b2a22008-07-11 17:14:22 +02002530 * Must be called with the domain lock held.
2531 */
Joerg Roedelcb76c322008-06-26 21:28:00 +02002532static dma_addr_t __map_single(struct device *dev,
Joerg Roedelcb76c322008-06-26 21:28:00 +02002533 struct dma_ops_domain *dma_dom,
2534 phys_addr_t paddr,
2535 size_t size,
Joerg Roedel6d4f3432008-09-04 19:18:02 +02002536 int dir,
Joerg Roedel832a90c2008-09-18 15:54:23 +02002537 bool align,
2538 u64 dma_mask)
Joerg Roedelcb76c322008-06-26 21:28:00 +02002539{
2540 dma_addr_t offset = paddr & ~PAGE_MASK;
Joerg Roedel53812c12009-05-12 12:17:38 +02002541 dma_addr_t address, start, ret;
Joerg Roedelcb76c322008-06-26 21:28:00 +02002542 unsigned int pages;
Joerg Roedel6d4f3432008-09-04 19:18:02 +02002543 unsigned long align_mask = 0;
Joerg Roedelcb76c322008-06-26 21:28:00 +02002544 int i;
2545
Joerg Roedele3c449f2008-10-15 22:02:11 -07002546 pages = iommu_num_pages(paddr, size, PAGE_SIZE);
Joerg Roedelcb76c322008-06-26 21:28:00 +02002547 paddr &= PAGE_MASK;
2548
Joerg Roedel8ecaf8f2008-12-12 16:13:04 +01002549 INC_STATS_COUNTER(total_map_requests);
2550
Joerg Roedelc1858972008-12-12 15:42:39 +01002551 if (pages > 1)
2552 INC_STATS_COUNTER(cross_page);
2553
Joerg Roedel6d4f3432008-09-04 19:18:02 +02002554 if (align)
2555 align_mask = (1UL << get_order(size)) - 1;
2556
Joerg Roedel11b83882009-05-19 10:23:15 +02002557retry:
Joerg Roedel832a90c2008-09-18 15:54:23 +02002558 address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask,
2559 dma_mask);
FUJITA Tomonori8fd524b2009-11-15 21:19:53 +09002560 if (unlikely(address == DMA_ERROR_CODE)) {
Joerg Roedel11b83882009-05-19 10:23:15 +02002561 /*
2562 * setting next_address here will let the address
2563 * allocator only scan the new allocated range in the
2564 * first run. This is a small optimization.
2565 */
2566 dma_dom->next_address = dma_dom->aperture_size;
2567
Joerg Roedel576175c2009-11-23 19:08:46 +01002568 if (alloc_new_range(dma_dom, false, GFP_ATOMIC))
Joerg Roedel11b83882009-05-19 10:23:15 +02002569 goto out;
2570
2571 /*
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002572 * aperture was successfully enlarged by 128 MB, try
Joerg Roedel11b83882009-05-19 10:23:15 +02002573 * allocation again
2574 */
2575 goto retry;
2576 }
Joerg Roedelcb76c322008-06-26 21:28:00 +02002577
2578 start = address;
2579 for (i = 0; i < pages; ++i) {
Joerg Roedel680525e2009-11-23 18:44:42 +01002580 ret = dma_ops_domain_map(dma_dom, start, paddr, dir);
FUJITA Tomonori8fd524b2009-11-15 21:19:53 +09002581 if (ret == DMA_ERROR_CODE)
Joerg Roedel53812c12009-05-12 12:17:38 +02002582 goto out_unmap;
2583
Joerg Roedelcb76c322008-06-26 21:28:00 +02002584 paddr += PAGE_SIZE;
2585 start += PAGE_SIZE;
2586 }
2587 address += offset;
2588
Joerg Roedel5774f7c2008-12-12 15:57:30 +01002589 ADD_STATS_COUNTER(alloced_io_mem, size);
2590
FUJITA Tomonoriafa9fdc2008-09-20 01:23:30 +09002591 if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) {
Joerg Roedel17b124b2011-04-06 18:01:35 +02002592 domain_flush_tlb(&dma_dom->domain);
Joerg Roedel1c655772008-09-04 18:40:05 +02002593 dma_dom->need_flush = false;
Joerg Roedel318afd42009-11-23 18:32:38 +01002594 } else if (unlikely(amd_iommu_np_cache))
Joerg Roedel17b124b2011-04-06 18:01:35 +02002595 domain_flush_pages(&dma_dom->domain, address, size);
Joerg Roedel270cab242008-09-04 15:49:46 +02002596
Joerg Roedelcb76c322008-06-26 21:28:00 +02002597out:
2598 return address;
Joerg Roedel53812c12009-05-12 12:17:38 +02002599
2600out_unmap:
2601
2602 for (--i; i >= 0; --i) {
2603 start -= PAGE_SIZE;
Joerg Roedel680525e2009-11-23 18:44:42 +01002604 dma_ops_domain_unmap(dma_dom, start);
Joerg Roedel53812c12009-05-12 12:17:38 +02002605 }
2606
2607 dma_ops_free_addresses(dma_dom, address, pages);
2608
FUJITA Tomonori8fd524b2009-11-15 21:19:53 +09002609 return DMA_ERROR_CODE;
Joerg Roedelcb76c322008-06-26 21:28:00 +02002610}
2611
Joerg Roedel431b2a22008-07-11 17:14:22 +02002612/*
2613 * Does the reverse of the __map_single function. Must be called with
2614 * the domain lock held too
2615 */
Joerg Roedelcd8c82e2009-11-23 19:33:56 +01002616static void __unmap_single(struct dma_ops_domain *dma_dom,
Joerg Roedelcb76c322008-06-26 21:28:00 +02002617 dma_addr_t dma_addr,
2618 size_t size,
2619 int dir)
2620{
Joerg Roedel04e04632010-09-23 16:12:48 +02002621 dma_addr_t flush_addr;
Joerg Roedelcb76c322008-06-26 21:28:00 +02002622 dma_addr_t i, start;
2623 unsigned int pages;
2624
FUJITA Tomonori8fd524b2009-11-15 21:19:53 +09002625 if ((dma_addr == DMA_ERROR_CODE) ||
Joerg Roedelb8d99052008-12-08 14:40:26 +01002626 (dma_addr + size > dma_dom->aperture_size))
Joerg Roedelcb76c322008-06-26 21:28:00 +02002627 return;
2628
Joerg Roedel04e04632010-09-23 16:12:48 +02002629 flush_addr = dma_addr;
Joerg Roedele3c449f2008-10-15 22:02:11 -07002630 pages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
Joerg Roedelcb76c322008-06-26 21:28:00 +02002631 dma_addr &= PAGE_MASK;
2632 start = dma_addr;
2633
2634 for (i = 0; i < pages; ++i) {
Joerg Roedel680525e2009-11-23 18:44:42 +01002635 dma_ops_domain_unmap(dma_dom, start);
Joerg Roedelcb76c322008-06-26 21:28:00 +02002636 start += PAGE_SIZE;
2637 }
2638
Joerg Roedel5774f7c2008-12-12 15:57:30 +01002639 SUB_STATS_COUNTER(alloced_io_mem, size);
2640
Joerg Roedelcb76c322008-06-26 21:28:00 +02002641 dma_ops_free_addresses(dma_dom, dma_addr, pages);
Joerg Roedel270cab242008-09-04 15:49:46 +02002642
Joerg Roedel80be3082008-11-06 14:59:05 +01002643 if (amd_iommu_unmap_flush || dma_dom->need_flush) {
Joerg Roedel17b124b2011-04-06 18:01:35 +02002644 domain_flush_pages(&dma_dom->domain, flush_addr, size);
Joerg Roedel80be3082008-11-06 14:59:05 +01002645 dma_dom->need_flush = false;
2646 }
Joerg Roedelcb76c322008-06-26 21:28:00 +02002647}
2648
Joerg Roedel431b2a22008-07-11 17:14:22 +02002649/*
2650 * The exported map_single function for dma_ops.
2651 */
FUJITA Tomonori51491362009-01-05 23:47:25 +09002652static dma_addr_t map_page(struct device *dev, struct page *page,
2653 unsigned long offset, size_t size,
2654 enum dma_data_direction dir,
2655 struct dma_attrs *attrs)
Joerg Roedel4da70b92008-06-26 21:28:01 +02002656{
2657 unsigned long flags;
Joerg Roedel4da70b92008-06-26 21:28:01 +02002658 struct protection_domain *domain;
Joerg Roedel4da70b92008-06-26 21:28:01 +02002659 dma_addr_t addr;
Joerg Roedel832a90c2008-09-18 15:54:23 +02002660 u64 dma_mask;
FUJITA Tomonori51491362009-01-05 23:47:25 +09002661 phys_addr_t paddr = page_to_phys(page) + offset;
Joerg Roedel4da70b92008-06-26 21:28:01 +02002662
Joerg Roedel0f2a86f2008-12-12 15:05:16 +01002663 INC_STATS_COUNTER(cnt_map_single);
2664
Joerg Roedel94f6d192009-11-24 16:40:02 +01002665 domain = get_domain(dev);
2666 if (PTR_ERR(domain) == -EINVAL)
Joerg Roedel4da70b92008-06-26 21:28:01 +02002667 return (dma_addr_t)paddr;
Joerg Roedel94f6d192009-11-24 16:40:02 +01002668 else if (IS_ERR(domain))
2669 return DMA_ERROR_CODE;
Joerg Roedel4da70b92008-06-26 21:28:01 +02002670
Joerg Roedelf99c0f12009-11-23 16:52:56 +01002671 dma_mask = *dev->dma_mask;
2672
Joerg Roedel4da70b92008-06-26 21:28:01 +02002673 spin_lock_irqsave(&domain->lock, flags);
Joerg Roedel94f6d192009-11-24 16:40:02 +01002674
Joerg Roedelcd8c82e2009-11-23 19:33:56 +01002675 addr = __map_single(dev, domain->priv, paddr, size, dir, false,
Joerg Roedel832a90c2008-09-18 15:54:23 +02002676 dma_mask);
FUJITA Tomonori8fd524b2009-11-15 21:19:53 +09002677 if (addr == DMA_ERROR_CODE)
Joerg Roedel4da70b92008-06-26 21:28:01 +02002678 goto out;
2679
Joerg Roedel17b124b2011-04-06 18:01:35 +02002680 domain_flush_complete(domain);
Joerg Roedel4da70b92008-06-26 21:28:01 +02002681
2682out:
2683 spin_unlock_irqrestore(&domain->lock, flags);
2684
2685 return addr;
2686}
2687
Joerg Roedel431b2a22008-07-11 17:14:22 +02002688/*
2689 * The exported unmap_single function for dma_ops.
2690 */
FUJITA Tomonori51491362009-01-05 23:47:25 +09002691static void unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
2692 enum dma_data_direction dir, struct dma_attrs *attrs)
Joerg Roedel4da70b92008-06-26 21:28:01 +02002693{
2694 unsigned long flags;
Joerg Roedel4da70b92008-06-26 21:28:01 +02002695 struct protection_domain *domain;
Joerg Roedel4da70b92008-06-26 21:28:01 +02002696
Joerg Roedel146a6912008-12-12 15:07:12 +01002697 INC_STATS_COUNTER(cnt_unmap_single);
2698
Joerg Roedel94f6d192009-11-24 16:40:02 +01002699 domain = get_domain(dev);
2700 if (IS_ERR(domain))
Joerg Roedel5b28df62008-12-02 17:49:42 +01002701 return;
2702
Joerg Roedel4da70b92008-06-26 21:28:01 +02002703 spin_lock_irqsave(&domain->lock, flags);
2704
Joerg Roedelcd8c82e2009-11-23 19:33:56 +01002705 __unmap_single(domain->priv, dma_addr, size, dir);
Joerg Roedel4da70b92008-06-26 21:28:01 +02002706
Joerg Roedel17b124b2011-04-06 18:01:35 +02002707 domain_flush_complete(domain);
Joerg Roedel4da70b92008-06-26 21:28:01 +02002708
2709 spin_unlock_irqrestore(&domain->lock, flags);
2710}
2711
Joerg Roedel431b2a22008-07-11 17:14:22 +02002712/*
2713 * This is a special map_sg function which is used if we should map a
2714 * device which is not handled by an AMD IOMMU in the system.
2715 */
Joerg Roedel65b050a2008-06-26 21:28:02 +02002716static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist,
2717 int nelems, int dir)
2718{
2719 struct scatterlist *s;
2720 int i;
2721
2722 for_each_sg(sglist, s, nelems, i) {
2723 s->dma_address = (dma_addr_t)sg_phys(s);
2724 s->dma_length = s->length;
2725 }
2726
2727 return nelems;
2728}
2729
Joerg Roedel431b2a22008-07-11 17:14:22 +02002730/*
2731 * The exported map_sg function for dma_ops (handles scatter-gather
2732 * lists).
2733 */
Joerg Roedel65b050a2008-06-26 21:28:02 +02002734static int map_sg(struct device *dev, struct scatterlist *sglist,
FUJITA Tomonori160c1d82009-01-05 23:59:02 +09002735 int nelems, enum dma_data_direction dir,
2736 struct dma_attrs *attrs)
Joerg Roedel65b050a2008-06-26 21:28:02 +02002737{
2738 unsigned long flags;
Joerg Roedel65b050a2008-06-26 21:28:02 +02002739 struct protection_domain *domain;
Joerg Roedel65b050a2008-06-26 21:28:02 +02002740 int i;
2741 struct scatterlist *s;
2742 phys_addr_t paddr;
2743 int mapped_elems = 0;
Joerg Roedel832a90c2008-09-18 15:54:23 +02002744 u64 dma_mask;
Joerg Roedel65b050a2008-06-26 21:28:02 +02002745
Joerg Roedeld03f067a2008-12-12 15:09:48 +01002746 INC_STATS_COUNTER(cnt_map_sg);
2747
Joerg Roedel94f6d192009-11-24 16:40:02 +01002748 domain = get_domain(dev);
2749 if (PTR_ERR(domain) == -EINVAL)
Joerg Roedelf99c0f12009-11-23 16:52:56 +01002750 return map_sg_no_iommu(dev, sglist, nelems, dir);
Joerg Roedel94f6d192009-11-24 16:40:02 +01002751 else if (IS_ERR(domain))
2752 return 0;
Joerg Roedeldbcc1122008-09-04 15:04:26 +02002753
Joerg Roedel832a90c2008-09-18 15:54:23 +02002754 dma_mask = *dev->dma_mask;
Joerg Roedel65b050a2008-06-26 21:28:02 +02002755
Joerg Roedel65b050a2008-06-26 21:28:02 +02002756 spin_lock_irqsave(&domain->lock, flags);
2757
2758 for_each_sg(sglist, s, nelems, i) {
2759 paddr = sg_phys(s);
2760
Joerg Roedelcd8c82e2009-11-23 19:33:56 +01002761 s->dma_address = __map_single(dev, domain->priv,
Joerg Roedel832a90c2008-09-18 15:54:23 +02002762 paddr, s->length, dir, false,
2763 dma_mask);
Joerg Roedel65b050a2008-06-26 21:28:02 +02002764
2765 if (s->dma_address) {
2766 s->dma_length = s->length;
2767 mapped_elems++;
2768 } else
2769 goto unmap;
Joerg Roedel65b050a2008-06-26 21:28:02 +02002770 }
2771
Joerg Roedel17b124b2011-04-06 18:01:35 +02002772 domain_flush_complete(domain);
Joerg Roedel65b050a2008-06-26 21:28:02 +02002773
2774out:
2775 spin_unlock_irqrestore(&domain->lock, flags);
2776
2777 return mapped_elems;
2778unmap:
2779 for_each_sg(sglist, s, mapped_elems, i) {
2780 if (s->dma_address)
Joerg Roedelcd8c82e2009-11-23 19:33:56 +01002781 __unmap_single(domain->priv, s->dma_address,
Joerg Roedel65b050a2008-06-26 21:28:02 +02002782 s->dma_length, dir);
2783 s->dma_address = s->dma_length = 0;
2784 }
2785
2786 mapped_elems = 0;
2787
2788 goto out;
2789}
2790
Joerg Roedel431b2a22008-07-11 17:14:22 +02002791/*
2792 * The exported map_sg function for dma_ops (handles scatter-gather
2793 * lists).
2794 */
Joerg Roedel65b050a2008-06-26 21:28:02 +02002795static void unmap_sg(struct device *dev, struct scatterlist *sglist,
FUJITA Tomonori160c1d82009-01-05 23:59:02 +09002796 int nelems, enum dma_data_direction dir,
2797 struct dma_attrs *attrs)
Joerg Roedel65b050a2008-06-26 21:28:02 +02002798{
2799 unsigned long flags;
Joerg Roedel65b050a2008-06-26 21:28:02 +02002800 struct protection_domain *domain;
2801 struct scatterlist *s;
Joerg Roedel65b050a2008-06-26 21:28:02 +02002802 int i;
2803
Joerg Roedel55877a62008-12-12 15:12:14 +01002804 INC_STATS_COUNTER(cnt_unmap_sg);
2805
Joerg Roedel94f6d192009-11-24 16:40:02 +01002806 domain = get_domain(dev);
2807 if (IS_ERR(domain))
Joerg Roedel5b28df62008-12-02 17:49:42 +01002808 return;
2809
Joerg Roedel65b050a2008-06-26 21:28:02 +02002810 spin_lock_irqsave(&domain->lock, flags);
2811
2812 for_each_sg(sglist, s, nelems, i) {
Joerg Roedelcd8c82e2009-11-23 19:33:56 +01002813 __unmap_single(domain->priv, s->dma_address,
Joerg Roedel65b050a2008-06-26 21:28:02 +02002814 s->dma_length, dir);
Joerg Roedel65b050a2008-06-26 21:28:02 +02002815 s->dma_address = s->dma_length = 0;
2816 }
2817
Joerg Roedel17b124b2011-04-06 18:01:35 +02002818 domain_flush_complete(domain);
Joerg Roedel65b050a2008-06-26 21:28:02 +02002819
2820 spin_unlock_irqrestore(&domain->lock, flags);
2821}
2822
Joerg Roedel431b2a22008-07-11 17:14:22 +02002823/*
2824 * The exported alloc_coherent function for dma_ops.
2825 */
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002826static void *alloc_coherent(struct device *dev, size_t size,
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +02002827 dma_addr_t *dma_addr, gfp_t flag,
2828 struct dma_attrs *attrs)
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002829{
2830 unsigned long flags;
2831 void *virt_addr;
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002832 struct protection_domain *domain;
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002833 phys_addr_t paddr;
Joerg Roedel832a90c2008-09-18 15:54:23 +02002834 u64 dma_mask = dev->coherent_dma_mask;
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002835
Joerg Roedelc8f0fb32008-12-12 15:14:21 +01002836 INC_STATS_COUNTER(cnt_alloc_coherent);
2837
Joerg Roedel94f6d192009-11-24 16:40:02 +01002838 domain = get_domain(dev);
2839 if (PTR_ERR(domain) == -EINVAL) {
Joerg Roedelf99c0f12009-11-23 16:52:56 +01002840 virt_addr = (void *)__get_free_pages(flag, get_order(size));
2841 *dma_addr = __pa(virt_addr);
2842 return virt_addr;
Joerg Roedel94f6d192009-11-24 16:40:02 +01002843 } else if (IS_ERR(domain))
2844 return NULL;
Joerg Roedeldbcc1122008-09-04 15:04:26 +02002845
Joerg Roedelf99c0f12009-11-23 16:52:56 +01002846 dma_mask = dev->coherent_dma_mask;
2847 flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
2848 flag |= __GFP_ZERO;
FUJITA Tomonori13d9fea2008-09-10 20:19:40 +09002849
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002850 virt_addr = (void *)__get_free_pages(flag, get_order(size));
2851 if (!virt_addr)
Jaswinder Singh Rajputb25ae672009-07-01 19:53:14 +05302852 return NULL;
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002853
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002854 paddr = virt_to_phys(virt_addr);
2855
Joerg Roedel832a90c2008-09-18 15:54:23 +02002856 if (!dma_mask)
2857 dma_mask = *dev->dma_mask;
2858
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002859 spin_lock_irqsave(&domain->lock, flags);
2860
Joerg Roedelcd8c82e2009-11-23 19:33:56 +01002861 *dma_addr = __map_single(dev, domain->priv, paddr,
Joerg Roedel832a90c2008-09-18 15:54:23 +02002862 size, DMA_BIDIRECTIONAL, true, dma_mask);
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002863
FUJITA Tomonori8fd524b2009-11-15 21:19:53 +09002864 if (*dma_addr == DMA_ERROR_CODE) {
Jiri Slaby367d04c2009-05-28 09:54:48 +02002865 spin_unlock_irqrestore(&domain->lock, flags);
Joerg Roedel5b28df62008-12-02 17:49:42 +01002866 goto out_free;
Jiri Slaby367d04c2009-05-28 09:54:48 +02002867 }
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002868
Joerg Roedel17b124b2011-04-06 18:01:35 +02002869 domain_flush_complete(domain);
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002870
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002871 spin_unlock_irqrestore(&domain->lock, flags);
2872
2873 return virt_addr;
Joerg Roedel5b28df62008-12-02 17:49:42 +01002874
2875out_free:
2876
2877 free_pages((unsigned long)virt_addr, get_order(size));
2878
2879 return NULL;
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002880}
2881
Joerg Roedel431b2a22008-07-11 17:14:22 +02002882/*
2883 * The exported free_coherent function for dma_ops.
Joerg Roedel431b2a22008-07-11 17:14:22 +02002884 */
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002885static void free_coherent(struct device *dev, size_t size,
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +02002886 void *virt_addr, dma_addr_t dma_addr,
2887 struct dma_attrs *attrs)
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002888{
2889 unsigned long flags;
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002890 struct protection_domain *domain;
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002891
Joerg Roedel5d31ee72008-12-12 15:16:38 +01002892 INC_STATS_COUNTER(cnt_free_coherent);
2893
Joerg Roedel94f6d192009-11-24 16:40:02 +01002894 domain = get_domain(dev);
2895 if (IS_ERR(domain))
Joerg Roedel5b28df62008-12-02 17:49:42 +01002896 goto free_mem;
2897
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002898 spin_lock_irqsave(&domain->lock, flags);
2899
Joerg Roedelcd8c82e2009-11-23 19:33:56 +01002900 __unmap_single(domain->priv, dma_addr, size, DMA_BIDIRECTIONAL);
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002901
Joerg Roedel17b124b2011-04-06 18:01:35 +02002902 domain_flush_complete(domain);
Joerg Roedel5d8b53c2008-06-26 21:28:03 +02002903
2904 spin_unlock_irqrestore(&domain->lock, flags);
2905
2906free_mem:
2907 free_pages((unsigned long)virt_addr, get_order(size));
2908}
2909
Joerg Roedelc432f3d2008-06-26 21:28:04 +02002910/*
Joerg Roedelb39ba6a2008-09-09 18:40:46 +02002911 * This function is called by the DMA layer to find out if we can handle a
2912 * particular device. It is part of the dma_ops.
2913 */
2914static int amd_iommu_dma_supported(struct device *dev, u64 mask)
2915{
Joerg Roedel420aef82009-11-23 16:14:57 +01002916 return check_device(dev);
Joerg Roedelb39ba6a2008-09-09 18:40:46 +02002917}
2918
2919/*
Joerg Roedel431b2a22008-07-11 17:14:22 +02002920 * The function for pre-allocating protection domains.
2921 *
Joerg Roedelc432f3d2008-06-26 21:28:04 +02002922 * If the driver core informs the DMA layer if a driver grabs a device
2923 * we don't need to preallocate the protection domains anymore.
2924 * For now we have to.
2925 */
Steffen Persvold943bc7e2012-03-15 12:16:28 +01002926static void __init prealloc_protection_domains(void)
Joerg Roedelc432f3d2008-06-26 21:28:04 +02002927{
Joerg Roedel5abcdba2011-12-01 15:49:45 +01002928 struct iommu_dev_data *dev_data;
Joerg Roedelc432f3d2008-06-26 21:28:04 +02002929 struct dma_ops_domain *dma_dom;
Joerg Roedel5abcdba2011-12-01 15:49:45 +01002930 struct pci_dev *dev = NULL;
Joerg Roedel98fc5a62009-11-24 17:19:23 +01002931 u16 devid;
Joerg Roedelc432f3d2008-06-26 21:28:04 +02002932
Chris Wrightd18c69d2010-04-02 18:27:55 -07002933 for_each_pci_dev(dev) {
Joerg Roedel98fc5a62009-11-24 17:19:23 +01002934
2935 /* Do we handle this device? */
2936 if (!check_device(&dev->dev))
Joerg Roedelc432f3d2008-06-26 21:28:04 +02002937 continue;
Joerg Roedel98fc5a62009-11-24 17:19:23 +01002938
Joerg Roedel5abcdba2011-12-01 15:49:45 +01002939 dev_data = get_dev_data(&dev->dev);
2940 if (!amd_iommu_force_isolation && dev_data->iommu_v2) {
2941 /* Make sure passthrough domain is allocated */
2942 alloc_passthrough_domain();
2943 dev_data->passthrough = true;
2944 attach_device(&dev->dev, pt_domain);
2945 pr_info("AMD-Vi: Using passthough domain for device %s\n",
2946 dev_name(&dev->dev));
2947 }
2948
Joerg Roedel98fc5a62009-11-24 17:19:23 +01002949 /* Is there already any domain for it? */
Joerg Roedel15898bb2009-11-24 15:39:42 +01002950 if (domain_for_device(&dev->dev))
Joerg Roedelc432f3d2008-06-26 21:28:04 +02002951 continue;
Joerg Roedel98fc5a62009-11-24 17:19:23 +01002952
2953 devid = get_device_id(&dev->dev);
2954
Joerg Roedel87a64d52009-11-24 17:26:43 +01002955 dma_dom = dma_ops_domain_alloc();
Joerg Roedelc432f3d2008-06-26 21:28:04 +02002956 if (!dma_dom)
2957 continue;
2958 init_unity_mappings_for_device(dma_dom, devid);
Joerg Roedelbd60b732008-09-11 10:24:48 +02002959 dma_dom->target_dev = devid;
2960
Joerg Roedel15898bb2009-11-24 15:39:42 +01002961 attach_device(&dev->dev, &dma_dom->domain);
Joerg Roedelbe831292009-11-23 12:50:00 +01002962
Joerg Roedelbd60b732008-09-11 10:24:48 +02002963 list_add_tail(&dma_dom->list, &iommu_pd_list);
Joerg Roedelc432f3d2008-06-26 21:28:04 +02002964 }
2965}
2966
FUJITA Tomonori160c1d82009-01-05 23:59:02 +09002967static struct dma_map_ops amd_iommu_dma_ops = {
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +02002968 .alloc = alloc_coherent,
2969 .free = free_coherent,
FUJITA Tomonori51491362009-01-05 23:47:25 +09002970 .map_page = map_page,
2971 .unmap_page = unmap_page,
Joerg Roedel6631ee92008-06-26 21:28:05 +02002972 .map_sg = map_sg,
2973 .unmap_sg = unmap_sg,
Joerg Roedelb39ba6a2008-09-09 18:40:46 +02002974 .dma_supported = amd_iommu_dma_supported,
Joerg Roedel6631ee92008-06-26 21:28:05 +02002975};
2976
Joerg Roedel27c21272011-05-30 15:56:24 +02002977static unsigned device_dma_ops_init(void)
2978{
Joerg Roedel5abcdba2011-12-01 15:49:45 +01002979 struct iommu_dev_data *dev_data;
Joerg Roedel27c21272011-05-30 15:56:24 +02002980 struct pci_dev *pdev = NULL;
2981 unsigned unhandled = 0;
2982
2983 for_each_pci_dev(pdev) {
2984 if (!check_device(&pdev->dev)) {
Joerg Roedelaf1be042012-01-18 14:03:11 +01002985
2986 iommu_ignore_device(&pdev->dev);
2987
Joerg Roedel27c21272011-05-30 15:56:24 +02002988 unhandled += 1;
2989 continue;
2990 }
2991
Joerg Roedel5abcdba2011-12-01 15:49:45 +01002992 dev_data = get_dev_data(&pdev->dev);
2993
2994 if (!dev_data->passthrough)
2995 pdev->dev.archdata.dma_ops = &amd_iommu_dma_ops;
2996 else
2997 pdev->dev.archdata.dma_ops = &nommu_dma_ops;
Joerg Roedel27c21272011-05-30 15:56:24 +02002998 }
2999
3000 return unhandled;
3001}
3002
Joerg Roedel431b2a22008-07-11 17:14:22 +02003003/*
3004 * The function which clues the AMD IOMMU driver into dma_ops.
3005 */
Joerg Roedelf5325092010-01-22 17:44:35 +01003006
3007void __init amd_iommu_init_api(void)
3008{
Joerg Roedel2cc21c42011-09-06 17:56:07 +02003009 bus_set_iommu(&pci_bus_type, &amd_iommu_ops);
Joerg Roedelf5325092010-01-22 17:44:35 +01003010}
3011
Joerg Roedel6631ee92008-06-26 21:28:05 +02003012int __init amd_iommu_init_dma_ops(void)
3013{
3014 struct amd_iommu *iommu;
Joerg Roedel27c21272011-05-30 15:56:24 +02003015 int ret, unhandled;
Joerg Roedel6631ee92008-06-26 21:28:05 +02003016
Joerg Roedel431b2a22008-07-11 17:14:22 +02003017 /*
3018 * first allocate a default protection domain for every IOMMU we
3019 * found in the system. Devices not assigned to any other
3020 * protection domain will be assigned to the default one.
3021 */
Joerg Roedel3bd22172009-05-04 15:06:20 +02003022 for_each_iommu(iommu) {
Joerg Roedel87a64d52009-11-24 17:26:43 +01003023 iommu->default_dom = dma_ops_domain_alloc();
Joerg Roedel6631ee92008-06-26 21:28:05 +02003024 if (iommu->default_dom == NULL)
3025 return -ENOMEM;
Joerg Roedele2dc14a2008-12-10 18:48:59 +01003026 iommu->default_dom->domain.flags |= PD_DEFAULT_MASK;
Joerg Roedel6631ee92008-06-26 21:28:05 +02003027 ret = iommu_init_unity_mappings(iommu);
3028 if (ret)
3029 goto free_domains;
3030 }
3031
Joerg Roedel431b2a22008-07-11 17:14:22 +02003032 /*
Joerg Roedel8793abe2009-11-27 11:40:33 +01003033 * Pre-allocate the protection domains for each device.
Joerg Roedel431b2a22008-07-11 17:14:22 +02003034 */
Joerg Roedel8793abe2009-11-27 11:40:33 +01003035 prealloc_protection_domains();
Joerg Roedel6631ee92008-06-26 21:28:05 +02003036
3037 iommu_detected = 1;
FUJITA Tomonori75f1cdf2009-11-10 19:46:20 +09003038 swiotlb = 0;
Joerg Roedel6631ee92008-06-26 21:28:05 +02003039
Joerg Roedel431b2a22008-07-11 17:14:22 +02003040 /* Make the driver finally visible to the drivers */
Joerg Roedel27c21272011-05-30 15:56:24 +02003041 unhandled = device_dma_ops_init();
3042 if (unhandled && max_pfn > MAX_DMA32_PFN) {
3043 /* There are unhandled devices - initialize swiotlb for them */
3044 swiotlb = 1;
3045 }
Joerg Roedel6631ee92008-06-26 21:28:05 +02003046
Joerg Roedel7f265082008-12-12 13:50:21 +01003047 amd_iommu_stats_init();
3048
Joerg Roedel62410ee2012-06-12 16:42:43 +02003049 if (amd_iommu_unmap_flush)
3050 pr_info("AMD-Vi: IO/TLB flush on unmap enabled\n");
3051 else
3052 pr_info("AMD-Vi: Lazy IO/TLB flushing enabled\n");
3053
Joerg Roedel6631ee92008-06-26 21:28:05 +02003054 return 0;
3055
3056free_domains:
3057
Joerg Roedel3bd22172009-05-04 15:06:20 +02003058 for_each_iommu(iommu) {
Joerg Roedel6631ee92008-06-26 21:28:05 +02003059 if (iommu->default_dom)
3060 dma_ops_domain_free(iommu->default_dom);
3061 }
3062
3063 return ret;
3064}
Joerg Roedel6d98cd82008-12-08 12:05:55 +01003065
3066/*****************************************************************************
3067 *
3068 * The following functions belong to the exported interface of AMD IOMMU
3069 *
3070 * This interface allows access to lower level functions of the IOMMU
3071 * like protection domain handling and assignement of devices to domains
3072 * which is not possible with the dma_ops interface.
3073 *
3074 *****************************************************************************/
3075
Joerg Roedel6d98cd82008-12-08 12:05:55 +01003076static void cleanup_domain(struct protection_domain *domain)
3077{
Joerg Roedel492667d2009-11-27 13:25:47 +01003078 struct iommu_dev_data *dev_data, *next;
Joerg Roedel6d98cd82008-12-08 12:05:55 +01003079 unsigned long flags;
Joerg Roedel6d98cd82008-12-08 12:05:55 +01003080
3081 write_lock_irqsave(&amd_iommu_devtable_lock, flags);
3082
Joerg Roedel492667d2009-11-27 13:25:47 +01003083 list_for_each_entry_safe(dev_data, next, &domain->dev_list, list) {
Joerg Roedelec9e79e2011-06-09 17:25:50 +02003084 __detach_device(dev_data);
Joerg Roedel492667d2009-11-27 13:25:47 +01003085 atomic_set(&dev_data->bind, 0);
3086 }
Joerg Roedel6d98cd82008-12-08 12:05:55 +01003087
3088 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
3089}
3090
Joerg Roedel26508152009-08-26 16:52:40 +02003091static void protection_domain_free(struct protection_domain *domain)
3092{
3093 if (!domain)
3094 return;
3095
Joerg Roedelaeb26f52009-11-20 16:44:01 +01003096 del_domain_from_list(domain);
3097
Joerg Roedel26508152009-08-26 16:52:40 +02003098 if (domain->id)
3099 domain_id_free(domain->id);
3100
3101 kfree(domain);
3102}
3103
3104static struct protection_domain *protection_domain_alloc(void)
Joerg Roedelc156e342008-12-02 18:13:27 +01003105{
3106 struct protection_domain *domain;
3107
3108 domain = kzalloc(sizeof(*domain), GFP_KERNEL);
3109 if (!domain)
Joerg Roedel26508152009-08-26 16:52:40 +02003110 return NULL;
Joerg Roedelc156e342008-12-02 18:13:27 +01003111
3112 spin_lock_init(&domain->lock);
Joerg Roedel5d214fe2010-02-08 14:44:49 +01003113 mutex_init(&domain->api_lock);
Joerg Roedelc156e342008-12-02 18:13:27 +01003114 domain->id = domain_id_alloc();
3115 if (!domain->id)
Joerg Roedel26508152009-08-26 16:52:40 +02003116 goto out_err;
Joerg Roedel7c392cb2009-11-26 11:13:32 +01003117 INIT_LIST_HEAD(&domain->dev_list);
Joerg Roedel26508152009-08-26 16:52:40 +02003118
Joerg Roedelaeb26f52009-11-20 16:44:01 +01003119 add_domain_to_list(domain);
3120
Joerg Roedel26508152009-08-26 16:52:40 +02003121 return domain;
3122
3123out_err:
3124 kfree(domain);
3125
3126 return NULL;
3127}
3128
Joerg Roedel5abcdba2011-12-01 15:49:45 +01003129static int __init alloc_passthrough_domain(void)
3130{
3131 if (pt_domain != NULL)
3132 return 0;
3133
3134 /* allocate passthrough domain */
3135 pt_domain = protection_domain_alloc();
3136 if (!pt_domain)
3137 return -ENOMEM;
3138
3139 pt_domain->mode = PAGE_MODE_NONE;
3140
3141 return 0;
3142}
Joerg Roedel26508152009-08-26 16:52:40 +02003143static int amd_iommu_domain_init(struct iommu_domain *dom)
3144{
3145 struct protection_domain *domain;
3146
3147 domain = protection_domain_alloc();
3148 if (!domain)
Joerg Roedelc156e342008-12-02 18:13:27 +01003149 goto out_free;
Joerg Roedel26508152009-08-26 16:52:40 +02003150
3151 domain->mode = PAGE_MODE_3_LEVEL;
Joerg Roedelc156e342008-12-02 18:13:27 +01003152 domain->pt_root = (void *)get_zeroed_page(GFP_KERNEL);
3153 if (!domain->pt_root)
3154 goto out_free;
3155
Joerg Roedelf3572db2011-11-23 12:36:25 +01003156 domain->iommu_domain = dom;
3157
Joerg Roedelc156e342008-12-02 18:13:27 +01003158 dom->priv = domain;
3159
Joerg Roedel0ff64f82012-01-26 19:40:53 +01003160 dom->geometry.aperture_start = 0;
3161 dom->geometry.aperture_end = ~0ULL;
3162 dom->geometry.force_aperture = true;
3163
Joerg Roedelc156e342008-12-02 18:13:27 +01003164 return 0;
3165
3166out_free:
Joerg Roedel26508152009-08-26 16:52:40 +02003167 protection_domain_free(domain);
Joerg Roedelc156e342008-12-02 18:13:27 +01003168
3169 return -ENOMEM;
3170}
3171
Joerg Roedel98383fc2008-12-02 18:34:12 +01003172static void amd_iommu_domain_destroy(struct iommu_domain *dom)
3173{
3174 struct protection_domain *domain = dom->priv;
3175
3176 if (!domain)
3177 return;
3178
3179 if (domain->dev_cnt > 0)
3180 cleanup_domain(domain);
3181
3182 BUG_ON(domain->dev_cnt != 0);
3183
Joerg Roedel132bd682011-11-17 14:18:46 +01003184 if (domain->mode != PAGE_MODE_NONE)
3185 free_pagetable(domain);
Joerg Roedel98383fc2008-12-02 18:34:12 +01003186
Joerg Roedel52815b72011-11-17 17:24:28 +01003187 if (domain->flags & PD_IOMMUV2_MASK)
3188 free_gcr3_table(domain);
3189
Joerg Roedel8b408fe2010-03-08 14:20:07 +01003190 protection_domain_free(domain);
Joerg Roedel98383fc2008-12-02 18:34:12 +01003191
3192 dom->priv = NULL;
3193}
3194
Joerg Roedel684f2882008-12-08 12:07:44 +01003195static void amd_iommu_detach_device(struct iommu_domain *dom,
3196 struct device *dev)
3197{
Joerg Roedel657cbb62009-11-23 15:26:46 +01003198 struct iommu_dev_data *dev_data = dev->archdata.iommu;
Joerg Roedel684f2882008-12-08 12:07:44 +01003199 struct amd_iommu *iommu;
Joerg Roedel684f2882008-12-08 12:07:44 +01003200 u16 devid;
3201
Joerg Roedel98fc5a62009-11-24 17:19:23 +01003202 if (!check_device(dev))
Joerg Roedel684f2882008-12-08 12:07:44 +01003203 return;
3204
Joerg Roedel98fc5a62009-11-24 17:19:23 +01003205 devid = get_device_id(dev);
Joerg Roedel684f2882008-12-08 12:07:44 +01003206
Joerg Roedel657cbb62009-11-23 15:26:46 +01003207 if (dev_data->domain != NULL)
Joerg Roedel15898bb2009-11-24 15:39:42 +01003208 detach_device(dev);
Joerg Roedel684f2882008-12-08 12:07:44 +01003209
3210 iommu = amd_iommu_rlookup_table[devid];
3211 if (!iommu)
3212 return;
3213
Joerg Roedel684f2882008-12-08 12:07:44 +01003214 iommu_completion_wait(iommu);
3215}
3216
Joerg Roedel01106062008-12-02 19:34:11 +01003217static int amd_iommu_attach_device(struct iommu_domain *dom,
3218 struct device *dev)
3219{
3220 struct protection_domain *domain = dom->priv;
Joerg Roedel657cbb62009-11-23 15:26:46 +01003221 struct iommu_dev_data *dev_data;
Joerg Roedel01106062008-12-02 19:34:11 +01003222 struct amd_iommu *iommu;
Joerg Roedel15898bb2009-11-24 15:39:42 +01003223 int ret;
Joerg Roedel01106062008-12-02 19:34:11 +01003224
Joerg Roedel98fc5a62009-11-24 17:19:23 +01003225 if (!check_device(dev))
Joerg Roedel01106062008-12-02 19:34:11 +01003226 return -EINVAL;
3227
Joerg Roedel657cbb62009-11-23 15:26:46 +01003228 dev_data = dev->archdata.iommu;
3229
Joerg Roedelf62dda62011-06-09 12:55:35 +02003230 iommu = amd_iommu_rlookup_table[dev_data->devid];
Joerg Roedel01106062008-12-02 19:34:11 +01003231 if (!iommu)
3232 return -EINVAL;
3233
Joerg Roedel657cbb62009-11-23 15:26:46 +01003234 if (dev_data->domain)
Joerg Roedel15898bb2009-11-24 15:39:42 +01003235 detach_device(dev);
Joerg Roedel01106062008-12-02 19:34:11 +01003236
Joerg Roedel15898bb2009-11-24 15:39:42 +01003237 ret = attach_device(dev, domain);
Joerg Roedel01106062008-12-02 19:34:11 +01003238
3239 iommu_completion_wait(iommu);
3240
Joerg Roedel15898bb2009-11-24 15:39:42 +01003241 return ret;
Joerg Roedel01106062008-12-02 19:34:11 +01003242}
3243
Joerg Roedel468e2362010-01-21 16:37:36 +01003244static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova,
Ohad Ben-Cohen50090652011-11-10 11:32:25 +02003245 phys_addr_t paddr, size_t page_size, int iommu_prot)
Joerg Roedelc6229ca2008-12-02 19:48:43 +01003246{
3247 struct protection_domain *domain = dom->priv;
Joerg Roedelc6229ca2008-12-02 19:48:43 +01003248 int prot = 0;
3249 int ret;
3250
Joerg Roedel132bd682011-11-17 14:18:46 +01003251 if (domain->mode == PAGE_MODE_NONE)
3252 return -EINVAL;
3253
Joerg Roedelc6229ca2008-12-02 19:48:43 +01003254 if (iommu_prot & IOMMU_READ)
3255 prot |= IOMMU_PROT_IR;
3256 if (iommu_prot & IOMMU_WRITE)
3257 prot |= IOMMU_PROT_IW;
3258
Joerg Roedel5d214fe2010-02-08 14:44:49 +01003259 mutex_lock(&domain->api_lock);
Joerg Roedel795e74f2010-05-11 17:40:57 +02003260 ret = iommu_map_page(domain, iova, paddr, prot, page_size);
Joerg Roedel5d214fe2010-02-08 14:44:49 +01003261 mutex_unlock(&domain->api_lock);
3262
Joerg Roedel795e74f2010-05-11 17:40:57 +02003263 return ret;
Joerg Roedelc6229ca2008-12-02 19:48:43 +01003264}
3265
Ohad Ben-Cohen50090652011-11-10 11:32:25 +02003266static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova,
3267 size_t page_size)
Joerg Roedeleb74ff62008-12-02 19:59:10 +01003268{
Joerg Roedeleb74ff62008-12-02 19:59:10 +01003269 struct protection_domain *domain = dom->priv;
Ohad Ben-Cohen50090652011-11-10 11:32:25 +02003270 size_t unmap_size;
Joerg Roedeleb74ff62008-12-02 19:59:10 +01003271
Joerg Roedel132bd682011-11-17 14:18:46 +01003272 if (domain->mode == PAGE_MODE_NONE)
3273 return -EINVAL;
3274
Joerg Roedel5d214fe2010-02-08 14:44:49 +01003275 mutex_lock(&domain->api_lock);
Joerg Roedel468e2362010-01-21 16:37:36 +01003276 unmap_size = iommu_unmap_page(domain, iova, page_size);
Joerg Roedel795e74f2010-05-11 17:40:57 +02003277 mutex_unlock(&domain->api_lock);
Joerg Roedeleb74ff62008-12-02 19:59:10 +01003278
Joerg Roedel17b124b2011-04-06 18:01:35 +02003279 domain_flush_tlb_pde(domain);
Joerg Roedel5d214fe2010-02-08 14:44:49 +01003280
Ohad Ben-Cohen50090652011-11-10 11:32:25 +02003281 return unmap_size;
Joerg Roedeleb74ff62008-12-02 19:59:10 +01003282}
3283
Joerg Roedel645c4c82008-12-02 20:05:50 +01003284static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
3285 unsigned long iova)
3286{
3287 struct protection_domain *domain = dom->priv;
Joerg Roedelf03152b2010-01-21 16:15:24 +01003288 unsigned long offset_mask;
Joerg Roedel645c4c82008-12-02 20:05:50 +01003289 phys_addr_t paddr;
Joerg Roedelf03152b2010-01-21 16:15:24 +01003290 u64 *pte, __pte;
Joerg Roedel645c4c82008-12-02 20:05:50 +01003291
Joerg Roedel132bd682011-11-17 14:18:46 +01003292 if (domain->mode == PAGE_MODE_NONE)
3293 return iova;
3294
Joerg Roedel24cd7722010-01-19 17:27:39 +01003295 pte = fetch_pte(domain, iova);
Joerg Roedel645c4c82008-12-02 20:05:50 +01003296
Joerg Roedela6d41a42009-09-02 17:08:55 +02003297 if (!pte || !IOMMU_PTE_PRESENT(*pte))
Joerg Roedel645c4c82008-12-02 20:05:50 +01003298 return 0;
3299
Joerg Roedelf03152b2010-01-21 16:15:24 +01003300 if (PM_PTE_LEVEL(*pte) == 0)
3301 offset_mask = PAGE_SIZE - 1;
3302 else
3303 offset_mask = PTE_PAGE_SIZE(*pte) - 1;
3304
3305 __pte = *pte & PM_ADDR_MASK;
3306 paddr = (__pte & ~offset_mask) | (iova & offset_mask);
Joerg Roedel645c4c82008-12-02 20:05:50 +01003307
3308 return paddr;
3309}
3310
Sheng Yangdbb9fd82009-03-18 15:33:06 +08003311static int amd_iommu_domain_has_cap(struct iommu_domain *domain,
3312 unsigned long cap)
3313{
Joerg Roedel80a506b2010-07-27 17:14:24 +02003314 switch (cap) {
3315 case IOMMU_CAP_CACHE_COHERENCY:
3316 return 1;
3317 }
3318
Sheng Yangdbb9fd82009-03-18 15:33:06 +08003319 return 0;
3320}
3321
Joerg Roedel26961ef2008-12-03 17:00:17 +01003322static struct iommu_ops amd_iommu_ops = {
3323 .domain_init = amd_iommu_domain_init,
3324 .domain_destroy = amd_iommu_domain_destroy,
3325 .attach_dev = amd_iommu_attach_device,
3326 .detach_dev = amd_iommu_detach_device,
Joerg Roedel468e2362010-01-21 16:37:36 +01003327 .map = amd_iommu_map,
3328 .unmap = amd_iommu_unmap,
Joerg Roedel26961ef2008-12-03 17:00:17 +01003329 .iova_to_phys = amd_iommu_iova_to_phys,
Sheng Yangdbb9fd82009-03-18 15:33:06 +08003330 .domain_has_cap = amd_iommu_domain_has_cap,
Ohad Ben-Cohenaa3de9c2011-11-10 11:32:29 +02003331 .pgsize_bitmap = AMD_IOMMU_PGSIZES,
Joerg Roedel26961ef2008-12-03 17:00:17 +01003332};
3333
Joerg Roedel0feae532009-08-26 15:26:30 +02003334/*****************************************************************************
3335 *
3336 * The next functions do a basic initialization of IOMMU for pass through
3337 * mode
3338 *
3339 * In passthrough mode the IOMMU is initialized and enabled but not used for
3340 * DMA-API translation.
3341 *
3342 *****************************************************************************/
3343
3344int __init amd_iommu_init_passthrough(void)
3345{
Joerg Roedel5abcdba2011-12-01 15:49:45 +01003346 struct iommu_dev_data *dev_data;
Joerg Roedel0feae532009-08-26 15:26:30 +02003347 struct pci_dev *dev = NULL;
Joerg Roedel5abcdba2011-12-01 15:49:45 +01003348 struct amd_iommu *iommu;
Joerg Roedel15898bb2009-11-24 15:39:42 +01003349 u16 devid;
Joerg Roedel5abcdba2011-12-01 15:49:45 +01003350 int ret;
Joerg Roedel0feae532009-08-26 15:26:30 +02003351
Joerg Roedel5abcdba2011-12-01 15:49:45 +01003352 ret = alloc_passthrough_domain();
3353 if (ret)
3354 return ret;
Joerg Roedel0feae532009-08-26 15:26:30 +02003355
Kulikov Vasiliy6c54aab2010-07-03 12:03:51 -04003356 for_each_pci_dev(dev) {
Joerg Roedel98fc5a62009-11-24 17:19:23 +01003357 if (!check_device(&dev->dev))
Joerg Roedel0feae532009-08-26 15:26:30 +02003358 continue;
3359
Joerg Roedel5abcdba2011-12-01 15:49:45 +01003360 dev_data = get_dev_data(&dev->dev);
3361 dev_data->passthrough = true;
3362
Joerg Roedel98fc5a62009-11-24 17:19:23 +01003363 devid = get_device_id(&dev->dev);
3364
Joerg Roedel15898bb2009-11-24 15:39:42 +01003365 iommu = amd_iommu_rlookup_table[devid];
Joerg Roedel0feae532009-08-26 15:26:30 +02003366 if (!iommu)
3367 continue;
3368
Joerg Roedel15898bb2009-11-24 15:39:42 +01003369 attach_device(&dev->dev, pt_domain);
Joerg Roedel0feae532009-08-26 15:26:30 +02003370 }
3371
Joerg Roedel2655d7a2011-12-22 12:35:38 +01003372 amd_iommu_stats_init();
3373
Joerg Roedel0feae532009-08-26 15:26:30 +02003374 pr_info("AMD-Vi: Initialized for Passthrough Mode\n");
3375
3376 return 0;
3377}
Joerg Roedel72e1dcc2011-11-10 19:13:51 +01003378
3379/* IOMMUv2 specific functions */
3380int amd_iommu_register_ppr_notifier(struct notifier_block *nb)
3381{
3382 return atomic_notifier_chain_register(&ppr_notifier, nb);
3383}
3384EXPORT_SYMBOL(amd_iommu_register_ppr_notifier);
3385
3386int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb)
3387{
3388 return atomic_notifier_chain_unregister(&ppr_notifier, nb);
3389}
3390EXPORT_SYMBOL(amd_iommu_unregister_ppr_notifier);
Joerg Roedel132bd682011-11-17 14:18:46 +01003391
3392void amd_iommu_domain_direct_map(struct iommu_domain *dom)
3393{
3394 struct protection_domain *domain = dom->priv;
3395 unsigned long flags;
3396
3397 spin_lock_irqsave(&domain->lock, flags);
3398
3399 /* Update data structure */
3400 domain->mode = PAGE_MODE_NONE;
3401 domain->updated = true;
3402
3403 /* Make changes visible to IOMMUs */
3404 update_domain(domain);
3405
3406 /* Page-table is not visible to IOMMU anymore, so free it */
3407 free_pagetable(domain);
3408
3409 spin_unlock_irqrestore(&domain->lock, flags);
3410}
3411EXPORT_SYMBOL(amd_iommu_domain_direct_map);
Joerg Roedel52815b72011-11-17 17:24:28 +01003412
3413int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids)
3414{
3415 struct protection_domain *domain = dom->priv;
3416 unsigned long flags;
3417 int levels, ret;
3418
3419 if (pasids <= 0 || pasids > (PASID_MASK + 1))
3420 return -EINVAL;
3421
3422 /* Number of GCR3 table levels required */
3423 for (levels = 0; (pasids - 1) & ~0x1ff; pasids >>= 9)
3424 levels += 1;
3425
3426 if (levels > amd_iommu_max_glx_val)
3427 return -EINVAL;
3428
3429 spin_lock_irqsave(&domain->lock, flags);
3430
3431 /*
3432 * Save us all sanity checks whether devices already in the
3433 * domain support IOMMUv2. Just force that the domain has no
3434 * devices attached when it is switched into IOMMUv2 mode.
3435 */
3436 ret = -EBUSY;
3437 if (domain->dev_cnt > 0 || domain->flags & PD_IOMMUV2_MASK)
3438 goto out;
3439
3440 ret = -ENOMEM;
3441 domain->gcr3_tbl = (void *)get_zeroed_page(GFP_ATOMIC);
3442 if (domain->gcr3_tbl == NULL)
3443 goto out;
3444
3445 domain->glx = levels;
3446 domain->flags |= PD_IOMMUV2_MASK;
3447 domain->updated = true;
3448
3449 update_domain(domain);
3450
3451 ret = 0;
3452
3453out:
3454 spin_unlock_irqrestore(&domain->lock, flags);
3455
3456 return ret;
3457}
3458EXPORT_SYMBOL(amd_iommu_domain_enable_v2);
Joerg Roedel22e266c2011-11-21 15:59:08 +01003459
3460static int __flush_pasid(struct protection_domain *domain, int pasid,
3461 u64 address, bool size)
3462{
3463 struct iommu_dev_data *dev_data;
3464 struct iommu_cmd cmd;
3465 int i, ret;
3466
3467 if (!(domain->flags & PD_IOMMUV2_MASK))
3468 return -EINVAL;
3469
3470 build_inv_iommu_pasid(&cmd, domain->id, pasid, address, size);
3471
3472 /*
3473 * IOMMU TLB needs to be flushed before Device TLB to
3474 * prevent device TLB refill from IOMMU TLB
3475 */
3476 for (i = 0; i < amd_iommus_present; ++i) {
3477 if (domain->dev_iommu[i] == 0)
3478 continue;
3479
3480 ret = iommu_queue_command(amd_iommus[i], &cmd);
3481 if (ret != 0)
3482 goto out;
3483 }
3484
3485 /* Wait until IOMMU TLB flushes are complete */
3486 domain_flush_complete(domain);
3487
3488 /* Now flush device TLBs */
3489 list_for_each_entry(dev_data, &domain->dev_list, list) {
3490 struct amd_iommu *iommu;
3491 int qdep;
3492
3493 BUG_ON(!dev_data->ats.enabled);
3494
3495 qdep = dev_data->ats.qdep;
3496 iommu = amd_iommu_rlookup_table[dev_data->devid];
3497
3498 build_inv_iotlb_pasid(&cmd, dev_data->devid, pasid,
3499 qdep, address, size);
3500
3501 ret = iommu_queue_command(iommu, &cmd);
3502 if (ret != 0)
3503 goto out;
3504 }
3505
3506 /* Wait until all device TLBs are flushed */
3507 domain_flush_complete(domain);
3508
3509 ret = 0;
3510
3511out:
3512
3513 return ret;
3514}
3515
3516static int __amd_iommu_flush_page(struct protection_domain *domain, int pasid,
3517 u64 address)
3518{
Joerg Roedel399be2f2011-12-01 16:53:47 +01003519 INC_STATS_COUNTER(invalidate_iotlb);
3520
Joerg Roedel22e266c2011-11-21 15:59:08 +01003521 return __flush_pasid(domain, pasid, address, false);
3522}
3523
3524int amd_iommu_flush_page(struct iommu_domain *dom, int pasid,
3525 u64 address)
3526{
3527 struct protection_domain *domain = dom->priv;
3528 unsigned long flags;
3529 int ret;
3530
3531 spin_lock_irqsave(&domain->lock, flags);
3532 ret = __amd_iommu_flush_page(domain, pasid, address);
3533 spin_unlock_irqrestore(&domain->lock, flags);
3534
3535 return ret;
3536}
3537EXPORT_SYMBOL(amd_iommu_flush_page);
3538
3539static int __amd_iommu_flush_tlb(struct protection_domain *domain, int pasid)
3540{
Joerg Roedel399be2f2011-12-01 16:53:47 +01003541 INC_STATS_COUNTER(invalidate_iotlb_all);
3542
Joerg Roedel22e266c2011-11-21 15:59:08 +01003543 return __flush_pasid(domain, pasid, CMD_INV_IOMMU_ALL_PAGES_ADDRESS,
3544 true);
3545}
3546
3547int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid)
3548{
3549 struct protection_domain *domain = dom->priv;
3550 unsigned long flags;
3551 int ret;
3552
3553 spin_lock_irqsave(&domain->lock, flags);
3554 ret = __amd_iommu_flush_tlb(domain, pasid);
3555 spin_unlock_irqrestore(&domain->lock, flags);
3556
3557 return ret;
3558}
3559EXPORT_SYMBOL(amd_iommu_flush_tlb);
3560
Joerg Roedelb16137b2011-11-21 16:50:23 +01003561static u64 *__get_gcr3_pte(u64 *root, int level, int pasid, bool alloc)
3562{
3563 int index;
3564 u64 *pte;
3565
3566 while (true) {
3567
3568 index = (pasid >> (9 * level)) & 0x1ff;
3569 pte = &root[index];
3570
3571 if (level == 0)
3572 break;
3573
3574 if (!(*pte & GCR3_VALID)) {
3575 if (!alloc)
3576 return NULL;
3577
3578 root = (void *)get_zeroed_page(GFP_ATOMIC);
3579 if (root == NULL)
3580 return NULL;
3581
3582 *pte = __pa(root) | GCR3_VALID;
3583 }
3584
3585 root = __va(*pte & PAGE_MASK);
3586
3587 level -= 1;
3588 }
3589
3590 return pte;
3591}
3592
3593static int __set_gcr3(struct protection_domain *domain, int pasid,
3594 unsigned long cr3)
3595{
3596 u64 *pte;
3597
3598 if (domain->mode != PAGE_MODE_NONE)
3599 return -EINVAL;
3600
3601 pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, true);
3602 if (pte == NULL)
3603 return -ENOMEM;
3604
3605 *pte = (cr3 & PAGE_MASK) | GCR3_VALID;
3606
3607 return __amd_iommu_flush_tlb(domain, pasid);
3608}
3609
3610static int __clear_gcr3(struct protection_domain *domain, int pasid)
3611{
3612 u64 *pte;
3613
3614 if (domain->mode != PAGE_MODE_NONE)
3615 return -EINVAL;
3616
3617 pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, false);
3618 if (pte == NULL)
3619 return 0;
3620
3621 *pte = 0;
3622
3623 return __amd_iommu_flush_tlb(domain, pasid);
3624}
3625
3626int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid,
3627 unsigned long cr3)
3628{
3629 struct protection_domain *domain = dom->priv;
3630 unsigned long flags;
3631 int ret;
3632
3633 spin_lock_irqsave(&domain->lock, flags);
3634 ret = __set_gcr3(domain, pasid, cr3);
3635 spin_unlock_irqrestore(&domain->lock, flags);
3636
3637 return ret;
3638}
3639EXPORT_SYMBOL(amd_iommu_domain_set_gcr3);
3640
3641int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid)
3642{
3643 struct protection_domain *domain = dom->priv;
3644 unsigned long flags;
3645 int ret;
3646
3647 spin_lock_irqsave(&domain->lock, flags);
3648 ret = __clear_gcr3(domain, pasid);
3649 spin_unlock_irqrestore(&domain->lock, flags);
3650
3651 return ret;
3652}
3653EXPORT_SYMBOL(amd_iommu_domain_clear_gcr3);
Joerg Roedelc99afa22011-11-21 18:19:25 +01003654
3655int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid,
3656 int status, int tag)
3657{
3658 struct iommu_dev_data *dev_data;
3659 struct amd_iommu *iommu;
3660 struct iommu_cmd cmd;
3661
Joerg Roedel399be2f2011-12-01 16:53:47 +01003662 INC_STATS_COUNTER(complete_ppr);
3663
Joerg Roedelc99afa22011-11-21 18:19:25 +01003664 dev_data = get_dev_data(&pdev->dev);
3665 iommu = amd_iommu_rlookup_table[dev_data->devid];
3666
3667 build_complete_ppr(&cmd, dev_data->devid, pasid, status,
3668 tag, dev_data->pri_tlp);
3669
3670 return iommu_queue_command(iommu, &cmd);
3671}
3672EXPORT_SYMBOL(amd_iommu_complete_ppr);
Joerg Roedelf3572db2011-11-23 12:36:25 +01003673
3674struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev)
3675{
3676 struct protection_domain *domain;
3677
3678 domain = get_domain(&pdev->dev);
3679 if (IS_ERR(domain))
3680 return NULL;
3681
3682 /* Only return IOMMUv2 domains */
3683 if (!(domain->flags & PD_IOMMUV2_MASK))
3684 return NULL;
3685
3686 return domain->iommu_domain;
3687}
3688EXPORT_SYMBOL(amd_iommu_get_v2_domain);
Joerg Roedel6a113dd2011-12-01 12:04:58 +01003689
3690void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum)
3691{
3692 struct iommu_dev_data *dev_data;
3693
3694 if (!amd_iommu_v2_supported())
3695 return;
3696
3697 dev_data = get_dev_data(&pdev->dev);
3698 dev_data->errata |= (1 << erratum);
3699}
3700EXPORT_SYMBOL(amd_iommu_enable_device_erratum);
Joerg Roedel52efdb82011-12-07 12:01:36 +01003701
3702int amd_iommu_device_info(struct pci_dev *pdev,
3703 struct amd_iommu_device_info *info)
3704{
3705 int max_pasids;
3706 int pos;
3707
3708 if (pdev == NULL || info == NULL)
3709 return -EINVAL;
3710
3711 if (!amd_iommu_v2_supported())
3712 return -EINVAL;
3713
3714 memset(info, 0, sizeof(*info));
3715
3716 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ATS);
3717 if (pos)
3718 info->flags |= AMD_IOMMU_DEVICE_FLAG_ATS_SUP;
3719
3720 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
3721 if (pos)
3722 info->flags |= AMD_IOMMU_DEVICE_FLAG_PRI_SUP;
3723
3724 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
3725 if (pos) {
3726 int features;
3727
3728 max_pasids = 1 << (9 * (amd_iommu_max_glx_val + 1));
3729 max_pasids = min(max_pasids, (1 << 20));
3730
3731 info->flags |= AMD_IOMMU_DEVICE_FLAG_PASID_SUP;
3732 info->max_pasids = min(pci_max_pasids(pdev), max_pasids);
3733
3734 features = pci_pasid_features(pdev);
3735 if (features & PCI_PASID_CAP_EXEC)
3736 info->flags |= AMD_IOMMU_DEVICE_FLAG_EXEC_SUP;
3737 if (features & PCI_PASID_CAP_PRIV)
3738 info->flags |= AMD_IOMMU_DEVICE_FLAG_PRIV_SUP;
3739 }
3740
3741 return 0;
3742}
3743EXPORT_SYMBOL(amd_iommu_device_info);