blob: 186d75acb326de60322f728d983744a0b9cdb113 [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
21
22#define ATH_PCI_VERSION "0.1"
23
24#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070025
26static char *dev_info = "ath9k";
27
28MODULE_AUTHOR("Atheros Communications");
29MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31MODULE_LICENSE("Dual BSD/GPL");
32
33static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
38 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
39 { 0 }
40};
41
42static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
44{
45 int i;
46
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
49 return i;
50 }
51
52 return -1;
53}
54
55static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
57{
58 u32 chanmode = 0;
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
61
62 switch (chan->band) {
63 case IEEE80211_BAND_2GHZ:
64 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
65 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
67 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
68 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
70 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
71 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
73 break;
74 case IEEE80211_BAND_5GHZ:
75 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
76 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
78 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
79 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
81 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
82 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
84 break;
85 default:
86 break;
87 }
88
89 return chanmode;
90}
91
92
93static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
96 const u8 *addr)
97{
98 u8 *key_rxmic = NULL;
99 u8 *key_txmic = NULL;
100
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
103
104 if (addr == NULL) {
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
108 }
109 if (!sc->sc_splitmic) {
110 /*
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
113 */
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
117 }
118 /*
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
121 */
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
127 return 0;
128 }
129
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
133}
134
135static int ath_key_config(struct ath_softc *sc,
136 const u8 *addr,
137 struct ieee80211_key_conf *key)
138{
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
142 int ret = 0;
Johannes Berg05c914f2008-09-11 00:01:58 +0200143 enum nl80211_iftype opmode;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700144
145 memset(&hk, 0, sizeof(hk));
146
147 switch (key->alg) {
148 case ALG_WEP:
149 hk.kv_type = ATH9K_CIPHER_WEP;
150 break;
151 case ALG_TKIP:
152 hk.kv_type = ATH9K_CIPHER_TKIP;
153 break;
154 case ALG_CCMP:
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
156 break;
157 default:
158 return -EINVAL;
159 }
160
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
163
164 if (!sc->sc_vaps[0])
165 return -EIO;
166
167 vif = sc->sc_vaps[0]->av_if_data;
168 opmode = vif->type;
169
170 /*
171 * Strategy:
172 * For _M_STA mc tx, we will not setup a key at all since we never
173 * tx mc.
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
179 */
180 if (is_broadcast_ether_addr(addr)) {
181 switch (opmode) {
Johannes Berg05c914f2008-09-11 00:01:58 +0200182 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700183 /* default key: could be group WPA key
184 * or could be static WEP key */
185 mac = NULL;
186 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200187 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700188 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200189 case NL80211_IFTYPE_AP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700190 break;
191 default:
192 ASSERT(0);
193 break;
194 }
195 } else {
196 mac = addr;
197 }
198
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
201 else
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
203
204 if (!ret)
205 return -EIO;
206
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700207 return 0;
208}
209
210static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
211{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700212 int freeslot;
213
Sujithff9b6622008-08-14 13:27:16 +0530214 freeslot = (key->keyidx >= 4) ? 1 : 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700215 ath_key_reset(sc, key->keyidx, freeslot);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700216}
217
218static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
219{
Sujith60653672008-08-14 13:28:02 +0530220#define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
221#define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700222
223 ht_info->ht_supported = 1;
224 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
Tomas Winkler00c5ae22008-09-03 11:26:42 +0800225 |(u16)IEEE80211_HT_CAP_SM_PS
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700226 |(u16)IEEE80211_HT_CAP_SGI_40
227 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
228
Sujith60653672008-08-14 13:28:02 +0530229 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
230 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700231 /* setup supported mcs set */
232 memset(ht_info->supp_mcs_set, 0, 16);
233 ht_info->supp_mcs_set[0] = 0xff;
234 ht_info->supp_mcs_set[1] = 0xff;
235 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
236}
237
238static int ath_rate2idx(struct ath_softc *sc, int rate)
239{
240 int i = 0, cur_band, n_rates;
241 struct ieee80211_hw *hw = sc->hw;
242
243 cur_band = hw->conf.channel->band;
244 n_rates = sc->sbands[cur_band].n_bitrates;
245
246 for (i = 0; i < n_rates; i++) {
247 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
248 break;
249 }
250
251 /*
252 * NB:mac80211 validates rx rate index against the supported legacy rate
253 * index only (should be done against ht rates also), return the highest
254 * legacy rate index for rx rate which does not match any one of the
255 * supported basic and extended rates to make mac80211 happy.
256 * The following hack will be cleaned up once the issue with
257 * the rx rate index validation in mac80211 is fixed.
258 */
259 if (i == n_rates)
260 return n_rates - 1;
261 return i;
262}
263
264static void ath9k_rx_prepare(struct ath_softc *sc,
265 struct sk_buff *skb,
266 struct ath_recv_status *status,
267 struct ieee80211_rx_status *rx_status)
268{
269 struct ieee80211_hw *hw = sc->hw;
270 struct ieee80211_channel *curchan = hw->conf.channel;
271
272 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
273
274 rx_status->mactime = status->tsf;
275 rx_status->band = curchan->band;
276 rx_status->freq = curchan->center_freq;
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700277 rx_status->noise = sc->sc_ani.sc_noise_floor;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700278 rx_status->signal = rx_status->noise + status->rssi;
279 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
280 rx_status->antenna = status->antenna;
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700281
282 /* XXX Fix me, 64 cannot be the max rssi value, rigure it out */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700283 rx_status->qual = status->rssi * 100 / 64;
284
285 if (status->flags & ATH_RX_MIC_ERROR)
286 rx_status->flag |= RX_FLAG_MMIC_ERROR;
287 if (status->flags & ATH_RX_FCS_ERROR)
288 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
289
290 rx_status->flag |= RX_FLAG_TSFT;
291}
292
293static u8 parse_mpdudensity(u8 mpdudensity)
294{
295 /*
296 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
297 * 0 for no restriction
298 * 1 for 1/4 us
299 * 2 for 1/2 us
300 * 3 for 1 us
301 * 4 for 2 us
302 * 5 for 4 us
303 * 6 for 8 us
304 * 7 for 16 us
305 */
306 switch (mpdudensity) {
307 case 0:
308 return 0;
309 case 1:
310 case 2:
311 case 3:
312 /* Our lower layer calculations limit our precision to
313 1 microsecond */
314 return 1;
315 case 4:
316 return 2;
317 case 5:
318 return 4;
319 case 6:
320 return 8;
321 case 7:
322 return 16;
323 default:
324 return 0;
325 }
326}
327
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530328static void ath9k_ht_conf(struct ath_softc *sc,
329 struct ieee80211_bss_conf *bss_conf)
330{
331#define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
332 struct ath_ht_info *ht_info = &sc->sc_ht_info;
333
334 if (bss_conf->assoc_ht) {
335 ht_info->ext_chan_offset =
336 bss_conf->ht_bss_conf->bss_cap &
337 IEEE80211_HT_IE_CHA_SEC_OFFSET;
338
339 if (!(bss_conf->ht_conf->cap &
340 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
341 (bss_conf->ht_bss_conf->bss_cap &
342 IEEE80211_HT_IE_CHA_WIDTH))
343 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
344 else
345 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
346
347 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
348 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
349 bss_conf->ht_conf->ampdu_factor);
350 ht_info->mpdudensity =
351 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
352
353 }
354
355#undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
356}
357
358static void ath9k_bss_assoc_info(struct ath_softc *sc,
359 struct ieee80211_bss_conf *bss_conf)
360{
361 struct ieee80211_hw *hw = sc->hw;
362 struct ieee80211_channel *curchan = hw->conf.channel;
363 struct ath_vap *avp;
364 int pos;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530365
366 if (bss_conf->assoc) {
367 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
368 __func__,
369 bss_conf->aid);
370
371 avp = sc->sc_vaps[0];
372 if (avp == NULL) {
373 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
374 __func__);
375 return;
376 }
377
378 /* New association, store aid */
379 if (avp->av_opmode == ATH9K_M_STA) {
380 sc->sc_curaid = bss_conf->aid;
381 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
382 sc->sc_curaid);
383 }
384
385 /* Configure the beacon */
386 ath_beacon_config(sc, 0);
387 sc->sc_flags |= SC_OP_BEACONS;
388
389 /* Reset rssi stats */
390 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
391 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
392 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
393 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
394
395 /* Update chainmask */
396 ath_update_chainmask(sc, bss_conf->assoc_ht);
397
398 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -0700399 "%s: bssid %pM aid 0x%x\n",
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530400 __func__,
Johannes Berge1749612008-10-27 15:59:26 -0700401 sc->sc_curbssid, sc->sc_curaid);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530402
403 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
404 __func__,
405 curchan->center_freq);
406
407 pos = ath_get_channel(sc, curchan);
408 if (pos == -1) {
409 DPRINTF(sc, ATH_DBG_FATAL,
410 "%s: Invalid channel\n", __func__);
411 return;
412 }
413
414 if (hw->conf.ht_conf.ht_supported)
415 sc->sc_ah->ah_channels[pos].chanmode =
416 ath_get_extchanmode(sc, curchan);
417 else
418 sc->sc_ah->ah_channels[pos].chanmode =
419 (curchan->band == IEEE80211_BAND_2GHZ) ?
420 CHANNEL_G : CHANNEL_A;
421
422 /* set h/w channel */
423 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
424 DPRINTF(sc, ATH_DBG_FATAL,
425 "%s: Unable to set channel\n",
426 __func__);
427
428 ath_rate_newstate(sc, avp);
429 /* Update ratectrl about the new state */
430 ath_rc_node_update(hw, avp->rc_node);
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700431
432 /* Start ANI */
433 mod_timer(&sc->sc_ani.timer,
434 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
435
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530436 } else {
437 DPRINTF(sc, ATH_DBG_CONFIG,
438 "%s: Bss Info DISSOC\n", __func__);
439 sc->sc_curaid = 0;
440 }
441}
442
443void ath_get_beaconconfig(struct ath_softc *sc,
444 int if_id,
445 struct ath_beacon_config *conf)
446{
447 struct ieee80211_hw *hw = sc->hw;
448
449 /* fill in beacon config data */
450
451 conf->beacon_interval = hw->conf.beacon_int;
452 conf->listen_interval = 100;
453 conf->dtim_count = 1;
454 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
455}
456
457void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
458 struct ath_xmit_status *tx_status, struct ath_node *an)
459{
460 struct ieee80211_hw *hw = sc->hw;
461 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
462
463 DPRINTF(sc, ATH_DBG_XMIT,
464 "%s: TX complete: skb: %p\n", __func__, skb);
465
466 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
467 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
468 /* free driver's private data area of tx_info */
469 if (tx_info->driver_data[0] != NULL)
470 kfree(tx_info->driver_data[0]);
471 tx_info->driver_data[0] = NULL;
472 }
473
474 if (tx_status->flags & ATH_TX_BAR) {
475 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
476 tx_status->flags &= ~ATH_TX_BAR;
477 }
478
479 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
480 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
481 /* Frame was not ACKed, but an ACK was expected */
482 tx_info->status.excessive_retries = 1;
483 }
484 } else {
485 /* Frame was ACKed */
486 tx_info->flags |= IEEE80211_TX_STAT_ACK;
487 }
488
489 tx_info->status.retry_count = tx_status->retries;
490
491 ieee80211_tx_status(hw, skb);
492 if (an)
493 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
494}
495
496int _ath_rx_indicate(struct ath_softc *sc,
497 struct sk_buff *skb,
498 struct ath_recv_status *status,
499 u16 keyix)
500{
501 struct ieee80211_hw *hw = sc->hw;
502 struct ath_node *an = NULL;
503 struct ieee80211_rx_status rx_status;
504 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
505 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
506 int padsize;
507 enum ATH_RX_TYPE st;
508
509 /* see if any padding is done by the hw and remove it */
510 if (hdrlen & 3) {
511 padsize = hdrlen % 4;
512 memmove(skb->data + padsize, skb->data, hdrlen);
513 skb_pull(skb, padsize);
514 }
515
516 /* Prepare rx status */
517 ath9k_rx_prepare(sc, skb, status, &rx_status);
518
519 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
520 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
521 rx_status.flag |= RX_FLAG_DECRYPTED;
522 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
523 && !(status->flags & ATH_RX_DECRYPT_ERROR)
524 && skb->len >= hdrlen + 4) {
525 keyix = skb->data[hdrlen + 3] >> 6;
526
527 if (test_bit(keyix, sc->sc_keymap))
528 rx_status.flag |= RX_FLAG_DECRYPTED;
529 }
530
531 spin_lock_bh(&sc->node_lock);
532 an = ath_node_find(sc, hdr->addr2);
533 spin_unlock_bh(&sc->node_lock);
534
535 if (an) {
536 ath_rx_input(sc, an,
537 hw->conf.ht_conf.ht_supported,
538 skb, status, &st);
539 }
540 if (!an || (st != ATH_RX_CONSUMED))
541 __ieee80211_rx(hw, skb, &rx_status);
542
543 return 0;
544}
545
546int ath_rx_subframe(struct ath_node *an,
547 struct sk_buff *skb,
548 struct ath_recv_status *status)
549{
550 struct ath_softc *sc = an->an_sc;
551 struct ieee80211_hw *hw = sc->hw;
552 struct ieee80211_rx_status rx_status;
553
554 /* Prepare rx status */
555 ath9k_rx_prepare(sc, skb, status, &rx_status);
556 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
557 rx_status.flag |= RX_FLAG_DECRYPTED;
558
559 __ieee80211_rx(hw, skb, &rx_status);
560
561 return 0;
562}
563
564/********************************/
565/* LED functions */
566/********************************/
567
568static void ath_led_brightness(struct led_classdev *led_cdev,
569 enum led_brightness brightness)
570{
571 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
572 struct ath_softc *sc = led->sc;
573
574 switch (brightness) {
575 case LED_OFF:
576 if (led->led_type == ATH_LED_ASSOC ||
577 led->led_type == ATH_LED_RADIO)
578 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
579 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
580 (led->led_type == ATH_LED_RADIO) ? 1 :
581 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
582 break;
583 case LED_FULL:
584 if (led->led_type == ATH_LED_ASSOC)
585 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
586 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
587 break;
588 default:
589 break;
590 }
591}
592
593static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
594 char *trigger)
595{
596 int ret;
597
598 led->sc = sc;
599 led->led_cdev.name = led->name;
600 led->led_cdev.default_trigger = trigger;
601 led->led_cdev.brightness_set = ath_led_brightness;
602
603 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
604 if (ret)
605 DPRINTF(sc, ATH_DBG_FATAL,
606 "Failed to register led:%s", led->name);
607 else
608 led->registered = 1;
609 return ret;
610}
611
612static void ath_unregister_led(struct ath_led *led)
613{
614 if (led->registered) {
615 led_classdev_unregister(&led->led_cdev);
616 led->registered = 0;
617 }
618}
619
620static void ath_deinit_leds(struct ath_softc *sc)
621{
622 ath_unregister_led(&sc->assoc_led);
623 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
624 ath_unregister_led(&sc->tx_led);
625 ath_unregister_led(&sc->rx_led);
626 ath_unregister_led(&sc->radio_led);
627 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
628}
629
630static void ath_init_leds(struct ath_softc *sc)
631{
632 char *trigger;
633 int ret;
634
635 /* Configure gpio 1 for output */
636 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
637 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
638 /* LED off, active low */
639 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
640
641 trigger = ieee80211_get_radio_led_name(sc->hw);
642 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
643 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
644 ret = ath_register_led(sc, &sc->radio_led, trigger);
645 sc->radio_led.led_type = ATH_LED_RADIO;
646 if (ret)
647 goto fail;
648
649 trigger = ieee80211_get_assoc_led_name(sc->hw);
650 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
651 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
652 ret = ath_register_led(sc, &sc->assoc_led, trigger);
653 sc->assoc_led.led_type = ATH_LED_ASSOC;
654 if (ret)
655 goto fail;
656
657 trigger = ieee80211_get_tx_led_name(sc->hw);
658 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
659 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
660 ret = ath_register_led(sc, &sc->tx_led, trigger);
661 sc->tx_led.led_type = ATH_LED_TX;
662 if (ret)
663 goto fail;
664
665 trigger = ieee80211_get_rx_led_name(sc->hw);
666 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
667 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
668 ret = ath_register_led(sc, &sc->rx_led, trigger);
669 sc->rx_led.led_type = ATH_LED_RX;
670 if (ret)
671 goto fail;
672
673 return;
674
675fail:
676 ath_deinit_leds(sc);
677}
678
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530679#ifdef CONFIG_RFKILL
680/*******************/
681/* Rfkill */
682/*******************/
683
684static void ath_radio_enable(struct ath_softc *sc)
685{
686 struct ath_hal *ah = sc->sc_ah;
687 int status;
688
689 spin_lock_bh(&sc->sc_resetlock);
690 if (!ath9k_hw_reset(ah, ah->ah_curchan,
691 sc->sc_ht_info.tx_chan_width,
692 sc->sc_tx_chainmask,
693 sc->sc_rx_chainmask,
694 sc->sc_ht_extprotspacing,
695 false, &status)) {
696 DPRINTF(sc, ATH_DBG_FATAL,
697 "%s: unable to reset channel %u (%uMhz) "
698 "flags 0x%x hal status %u\n", __func__,
699 ath9k_hw_mhz2ieee(ah,
700 ah->ah_curchan->channel,
701 ah->ah_curchan->channelFlags),
702 ah->ah_curchan->channel,
703 ah->ah_curchan->channelFlags, status);
704 }
705 spin_unlock_bh(&sc->sc_resetlock);
706
707 ath_update_txpow(sc);
708 if (ath_startrecv(sc) != 0) {
709 DPRINTF(sc, ATH_DBG_FATAL,
710 "%s: unable to restart recv logic\n", __func__);
711 return;
712 }
713
714 if (sc->sc_flags & SC_OP_BEACONS)
715 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
716
717 /* Re-Enable interrupts */
718 ath9k_hw_set_interrupts(ah, sc->sc_imask);
719
720 /* Enable LED */
721 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
722 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
723 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
724
725 ieee80211_wake_queues(sc->hw);
726}
727
728static void ath_radio_disable(struct ath_softc *sc)
729{
730 struct ath_hal *ah = sc->sc_ah;
731 int status;
732
733
734 ieee80211_stop_queues(sc->hw);
735
736 /* Disable LED */
737 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
738 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
739
740 /* Disable interrupts */
741 ath9k_hw_set_interrupts(ah, 0);
742
743 ath_draintxq(sc, false); /* clear pending tx frames */
744 ath_stoprecv(sc); /* turn off frame recv */
745 ath_flushrecv(sc); /* flush recv queue */
746
747 spin_lock_bh(&sc->sc_resetlock);
748 if (!ath9k_hw_reset(ah, ah->ah_curchan,
749 sc->sc_ht_info.tx_chan_width,
750 sc->sc_tx_chainmask,
751 sc->sc_rx_chainmask,
752 sc->sc_ht_extprotspacing,
753 false, &status)) {
754 DPRINTF(sc, ATH_DBG_FATAL,
755 "%s: unable to reset channel %u (%uMhz) "
756 "flags 0x%x hal status %u\n", __func__,
757 ath9k_hw_mhz2ieee(ah,
758 ah->ah_curchan->channel,
759 ah->ah_curchan->channelFlags),
760 ah->ah_curchan->channel,
761 ah->ah_curchan->channelFlags, status);
762 }
763 spin_unlock_bh(&sc->sc_resetlock);
764
765 ath9k_hw_phy_disable(ah);
766 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
767}
768
769static bool ath_is_rfkill_set(struct ath_softc *sc)
770{
771 struct ath_hal *ah = sc->sc_ah;
772
773 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
774 ah->ah_rfkill_polarity;
775}
776
777/* h/w rfkill poll function */
778static void ath_rfkill_poll(struct work_struct *work)
779{
780 struct ath_softc *sc = container_of(work, struct ath_softc,
781 rf_kill.rfkill_poll.work);
782 bool radio_on;
783
784 if (sc->sc_flags & SC_OP_INVALID)
785 return;
786
787 radio_on = !ath_is_rfkill_set(sc);
788
789 /*
790 * enable/disable radio only when there is a
791 * state change in RF switch
792 */
793 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
794 enum rfkill_state state;
795
796 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
797 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
798 : RFKILL_STATE_HARD_BLOCKED;
799 } else if (radio_on) {
800 ath_radio_enable(sc);
801 state = RFKILL_STATE_UNBLOCKED;
802 } else {
803 ath_radio_disable(sc);
804 state = RFKILL_STATE_HARD_BLOCKED;
805 }
806
807 if (state == RFKILL_STATE_HARD_BLOCKED)
808 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
809 else
810 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
811
812 rfkill_force_state(sc->rf_kill.rfkill, state);
813 }
814
815 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
816 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
817}
818
819/* s/w rfkill handler */
820static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
821{
822 struct ath_softc *sc = data;
823
824 switch (state) {
825 case RFKILL_STATE_SOFT_BLOCKED:
826 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
827 SC_OP_RFKILL_SW_BLOCKED)))
828 ath_radio_disable(sc);
829 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
830 return 0;
831 case RFKILL_STATE_UNBLOCKED:
832 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
833 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
834 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
835 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
836 "radio as it is disabled by h/w \n");
837 return -EPERM;
838 }
839 ath_radio_enable(sc);
840 }
841 return 0;
842 default:
843 return -EINVAL;
844 }
845}
846
847/* Init s/w rfkill */
848static int ath_init_sw_rfkill(struct ath_softc *sc)
849{
850 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
851 RFKILL_TYPE_WLAN);
852 if (!sc->rf_kill.rfkill) {
853 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
854 return -ENOMEM;
855 }
856
857 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
858 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
859 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
860 sc->rf_kill.rfkill->data = sc;
861 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
862 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
863 sc->rf_kill.rfkill->user_claim_unsupported = 1;
864
865 return 0;
866}
867
868/* Deinitialize rfkill */
869static void ath_deinit_rfkill(struct ath_softc *sc)
870{
871 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
872 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
873
874 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
875 rfkill_unregister(sc->rf_kill.rfkill);
876 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
877 sc->rf_kill.rfkill = NULL;
878 }
879}
880#endif /* CONFIG_RFKILL */
881
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530882static int ath_detach(struct ath_softc *sc)
883{
884 struct ieee80211_hw *hw = sc->hw;
885
886 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
887
888 /* Deinit LED control */
889 ath_deinit_leds(sc);
890
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530891#ifdef CONFIG_RFKILL
892 /* deinit rfkill */
893 ath_deinit_rfkill(sc);
894#endif
895
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530896 /* Unregister hw */
897
898 ieee80211_unregister_hw(hw);
899
900 /* unregister Rate control */
901 ath_rate_control_unregister();
902
903 /* tx/rx cleanup */
904
905 ath_rx_cleanup(sc);
906 ath_tx_cleanup(sc);
907
908 /* Deinit */
909
910 ath_deinit(sc);
911
912 return 0;
913}
914
915static int ath_attach(u16 devid,
916 struct ath_softc *sc)
917{
918 struct ieee80211_hw *hw = sc->hw;
919 int error = 0;
920
921 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
922
923 error = ath_init(devid, sc);
924 if (error != 0)
925 return error;
926
927 /* Init nodes */
928
929 INIT_LIST_HEAD(&sc->node_list);
930 spin_lock_init(&sc->node_lock);
931
932 /* get mac address from hardware and set in mac80211 */
933
934 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
935
936 /* setup channels and rates */
937
938 sc->sbands[IEEE80211_BAND_2GHZ].channels =
939 sc->channels[IEEE80211_BAND_2GHZ];
940 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
941 sc->rates[IEEE80211_BAND_2GHZ];
942 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
943
944 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
945 /* Setup HT capabilities for 2.4Ghz*/
946 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
947
948 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
949 &sc->sbands[IEEE80211_BAND_2GHZ];
950
951 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
952 sc->sbands[IEEE80211_BAND_5GHZ].channels =
953 sc->channels[IEEE80211_BAND_5GHZ];
954 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
955 sc->rates[IEEE80211_BAND_5GHZ];
956 sc->sbands[IEEE80211_BAND_5GHZ].band =
957 IEEE80211_BAND_5GHZ;
958
959 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
960 /* Setup HT capabilities for 5Ghz*/
961 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
962
963 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
964 &sc->sbands[IEEE80211_BAND_5GHZ];
965 }
966
967 /* FIXME: Have to figure out proper hw init values later */
968
969 hw->queues = 4;
970 hw->ampdu_queues = 1;
971
972 /* Register rate control */
973 hw->rate_control_algorithm = "ath9k_rate_control";
974 error = ath_rate_control_register();
975 if (error != 0) {
976 DPRINTF(sc, ATH_DBG_FATAL,
977 "%s: Unable to register rate control "
978 "algorithm:%d\n", __func__, error);
979 ath_rate_control_unregister();
980 goto bad;
981 }
982
983 error = ieee80211_register_hw(hw);
984 if (error != 0) {
985 ath_rate_control_unregister();
986 goto bad;
987 }
988
989 /* Initialize LED control */
990 ath_init_leds(sc);
991
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530992#ifdef CONFIG_RFKILL
993 /* Initialze h/w Rfkill */
994 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
995 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
996
997 /* Initialize s/w rfkill */
998 if (ath_init_sw_rfkill(sc))
999 goto detach;
1000#endif
1001
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301002 /* initialize tx/rx engine */
1003
1004 error = ath_tx_init(sc, ATH_TXBUF);
1005 if (error != 0)
1006 goto detach;
1007
1008 error = ath_rx_init(sc, ATH_RXBUF);
1009 if (error != 0)
1010 goto detach;
1011
1012 return 0;
1013detach:
1014 ath_detach(sc);
1015bad:
1016 return error;
1017}
1018
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001019static int ath9k_start(struct ieee80211_hw *hw)
1020{
1021 struct ath_softc *sc = hw->priv;
1022 struct ieee80211_channel *curchan = hw->conf.channel;
1023 int error = 0, pos;
1024
1025 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
1026 "initial channel: %d MHz\n", __func__, curchan->center_freq);
1027
1028 /* setup initial channel */
1029
1030 pos = ath_get_channel(sc, curchan);
1031 if (pos == -1) {
1032 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1033 return -EINVAL;
1034 }
1035
1036 sc->sc_ah->ah_channels[pos].chanmode =
1037 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
1038
1039 /* open ath_dev */
1040 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
1041 if (error) {
1042 DPRINTF(sc, ATH_DBG_FATAL,
1043 "%s: Unable to complete ath_open\n", __func__);
1044 return error;
1045 }
1046
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301047#ifdef CONFIG_RFKILL
1048 /* Start rfkill polling */
1049 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1050 queue_delayed_work(sc->hw->workqueue,
1051 &sc->rf_kill.rfkill_poll, 0);
1052
1053 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
1054 if (rfkill_register(sc->rf_kill.rfkill)) {
1055 DPRINTF(sc, ATH_DBG_FATAL,
1056 "Unable to register rfkill\n");
1057 rfkill_free(sc->rf_kill.rfkill);
1058
1059 /* Deinitialize the device */
1060 if (sc->pdev->irq)
1061 free_irq(sc->pdev->irq, sc);
1062 ath_detach(sc);
1063 pci_iounmap(sc->pdev, sc->mem);
1064 pci_release_region(sc->pdev, 0);
1065 pci_disable_device(sc->pdev);
1066 ieee80211_free_hw(hw);
1067 return -EIO;
1068 } else {
1069 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
1070 }
1071 }
1072#endif
1073
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001074 ieee80211_wake_queues(hw);
1075 return 0;
1076}
1077
1078static int ath9k_tx(struct ieee80211_hw *hw,
1079 struct sk_buff *skb)
1080{
1081 struct ath_softc *sc = hw->priv;
1082 int hdrlen, padsize;
Jouni Malinen147583c2008-08-11 14:01:50 +03001083 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1084
1085 /*
1086 * As a temporary workaround, assign seq# here; this will likely need
1087 * to be cleaned up to work better with Beacon transmission and virtual
1088 * BSSes.
1089 */
1090 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1091 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1092 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1093 sc->seq_no += 0x10;
1094 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1095 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1096 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001097
1098 /* Add the padding after the header if this is not already done */
1099 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1100 if (hdrlen & 3) {
1101 padsize = hdrlen % 4;
1102 if (skb_headroom(skb) < padsize)
1103 return -1;
1104 skb_push(skb, padsize);
1105 memmove(skb->data, skb->data + padsize, hdrlen);
1106 }
1107
1108 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1109 __func__,
1110 skb);
1111
1112 if (ath_tx_start(sc, skb) != 0) {
1113 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
1114 dev_kfree_skb_any(skb);
1115 /* FIXME: Check for proper return value from ATH_DEV */
1116 return 0;
1117 }
1118
1119 return 0;
1120}
1121
1122static void ath9k_stop(struct ieee80211_hw *hw)
1123{
1124 struct ath_softc *sc = hw->priv;
1125 int error;
1126
1127 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
1128
1129 error = ath_suspend(sc);
1130 if (error)
1131 DPRINTF(sc, ATH_DBG_CONFIG,
1132 "%s: Device is no longer present\n", __func__);
1133
1134 ieee80211_stop_queues(hw);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301135
1136#ifdef CONFIG_RFKILL
1137 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1138 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1139#endif
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001140}
1141
1142static int ath9k_add_interface(struct ieee80211_hw *hw,
1143 struct ieee80211_if_init_conf *conf)
1144{
1145 struct ath_softc *sc = hw->priv;
1146 int error, ic_opmode = 0;
1147
1148 /* Support only vap for now */
1149
1150 if (sc->sc_nvaps)
1151 return -ENOBUFS;
1152
1153 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001154 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001155 ic_opmode = ATH9K_M_STA;
1156 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02001157 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001158 ic_opmode = ATH9K_M_IBSS;
1159 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02001160 case NL80211_IFTYPE_AP:
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001161 ic_opmode = ATH9K_M_HOSTAP;
1162 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001163 default:
1164 DPRINTF(sc, ATH_DBG_FATAL,
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001165 "%s: Interface type %d not yet supported\n",
1166 __func__, conf->type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001167 return -EOPNOTSUPP;
1168 }
1169
1170 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1171 __func__,
1172 ic_opmode);
1173
1174 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
1175 if (error) {
1176 DPRINTF(sc, ATH_DBG_FATAL,
1177 "%s: Unable to attach vap, error: %d\n",
1178 __func__, error);
1179 return error;
1180 }
1181
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07001182 if (conf->type == NL80211_IFTYPE_AP) {
1183 /* TODO: is this a suitable place to start ANI for AP mode? */
1184 /* Start ANI */
1185 mod_timer(&sc->sc_ani.timer,
1186 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1187 }
1188
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001189 return 0;
1190}
1191
1192static void ath9k_remove_interface(struct ieee80211_hw *hw,
1193 struct ieee80211_if_init_conf *conf)
1194{
1195 struct ath_softc *sc = hw->priv;
1196 struct ath_vap *avp;
1197 int error;
1198
1199 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1200
1201 avp = sc->sc_vaps[0];
1202 if (avp == NULL) {
1203 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1204 __func__);
1205 return;
1206 }
1207
1208#ifdef CONFIG_SLOW_ANT_DIV
1209 ath_slow_ant_div_stop(&sc->sc_antdiv);
1210#endif
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07001211 /* Stop ANI */
1212 del_timer_sync(&sc->sc_ani.timer);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001213
1214 /* Update ratectrl */
1215 ath_rate_newstate(sc, avp);
1216
1217 /* Reclaim beacon resources */
Sujithb4696c8b2008-08-11 14:04:52 +05301218 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1219 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001220 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1221 ath_beacon_return(sc, avp);
1222 }
1223
1224 /* Set interrupt mask */
1225 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1226 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
Sujith672840a2008-08-11 14:05:08 +05301227 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001228
1229 error = ath_vap_detach(sc, 0);
1230 if (error)
1231 DPRINTF(sc, ATH_DBG_FATAL,
1232 "%s: Unable to detach vap, error: %d\n",
1233 __func__, error);
1234}
1235
1236static int ath9k_config(struct ieee80211_hw *hw,
1237 struct ieee80211_conf *conf)
1238{
1239 struct ath_softc *sc = hw->priv;
1240 struct ieee80211_channel *curchan = hw->conf.channel;
1241 int pos;
1242
1243 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1244 __func__,
1245 curchan->center_freq);
1246
1247 pos = ath_get_channel(sc, curchan);
1248 if (pos == -1) {
1249 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1250 return -EINVAL;
1251 }
1252
1253 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +05301254 (curchan->band == IEEE80211_BAND_2GHZ) ?
1255 CHANNEL_G : CHANNEL_A;
1256
1257 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
1258 sc->sc_ah->ah_channels[pos].chanmode =
1259 ath_get_extchanmode(sc, curchan);
1260
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001261 sc->sc_config.txpowlimit = 2 * conf->power_level;
1262
1263 /* set h/w channel */
1264 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1265 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1266 __func__);
1267
1268 return 0;
1269}
1270
1271static int ath9k_config_interface(struct ieee80211_hw *hw,
1272 struct ieee80211_vif *vif,
1273 struct ieee80211_if_conf *conf)
1274{
1275 struct ath_softc *sc = hw->priv;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001276 struct ath_hal *ah = sc->sc_ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001277 struct ath_vap *avp;
1278 u32 rfilt = 0;
1279 int error, i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001280
1281 avp = sc->sc_vaps[0];
1282 if (avp == NULL) {
1283 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1284 __func__);
1285 return -EINVAL;
1286 }
1287
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001288 /* TODO: Need to decide which hw opmode to use for multi-interface
1289 * cases */
Johannes Berg05c914f2008-09-11 00:01:58 +02001290 if (vif->type == NL80211_IFTYPE_AP &&
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001291 ah->ah_opmode != ATH9K_M_HOSTAP) {
1292 ah->ah_opmode = ATH9K_M_HOSTAP;
1293 ath9k_hw_setopmode(ah);
1294 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1295 /* Request full reset to get hw opmode changed properly */
1296 sc->sc_flags |= SC_OP_FULL_RESET;
1297 }
1298
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001299 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1300 !is_zero_ether_addr(conf->bssid)) {
1301 switch (vif->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001302 case NL80211_IFTYPE_STATION:
1303 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001304 /* Update ratectrl about the new state */
1305 ath_rate_newstate(sc, avp);
1306
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001307 /* Set BSSID */
1308 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1309 sc->sc_curaid = 0;
1310 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1311 sc->sc_curaid);
1312
1313 /* Set aggregation protection mode parameters */
1314 sc->sc_config.ath_aggr_prot = 0;
1315
1316 /*
1317 * Reset our TSF so that its value is lower than the
1318 * beacon that we are trying to catch.
1319 * Only then hw will update its TSF register with the
1320 * new beacon. Reset the TSF before setting the BSSID
1321 * to avoid allowing in any frames that would update
1322 * our TSF only to have us clear it
1323 * immediately thereafter.
1324 */
1325 ath9k_hw_reset_tsf(sc->sc_ah);
1326
1327 /* Disable BMISS interrupt when we're not associated */
1328 ath9k_hw_set_interrupts(sc->sc_ah,
1329 sc->sc_imask &
1330 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
1331 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1332
1333 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -07001334 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001335 __func__, rfilt,
Johannes Berge1749612008-10-27 15:59:26 -07001336 sc->sc_curbssid, sc->sc_curaid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001337
1338 /* need to reconfigure the beacon */
Sujith672840a2008-08-11 14:05:08 +05301339 sc->sc_flags &= ~SC_OP_BEACONS ;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001340
1341 break;
1342 default:
1343 break;
1344 }
1345 }
1346
1347 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
Johannes Berg05c914f2008-09-11 00:01:58 +02001348 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1349 (vif->type == NL80211_IFTYPE_AP))) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001350 /*
1351 * Allocate and setup the beacon frame.
1352 *
1353 * Stop any previous beacon DMA. This may be
1354 * necessary, for example, when an ibss merge
1355 * causes reconfiguration; we may be called
1356 * with beacon transmission active.
1357 */
1358 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1359
1360 error = ath_beacon_alloc(sc, 0);
1361 if (error != 0)
1362 return error;
1363
1364 ath_beacon_sync(sc, 0);
1365 }
1366
1367 /* Check for WLAN_CAPABILITY_PRIVACY ? */
Johannes Berg05c914f2008-09-11 00:01:58 +02001368 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001369 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1370 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1371 ath9k_hw_keysetmac(sc->sc_ah,
1372 (u16)i,
1373 sc->sc_curbssid);
1374 }
1375
1376 /* Only legacy IBSS for now */
Johannes Berg05c914f2008-09-11 00:01:58 +02001377 if (vif->type == NL80211_IFTYPE_ADHOC)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001378 ath_update_chainmask(sc, 0);
1379
1380 return 0;
1381}
1382
1383#define SUPPORTED_FILTERS \
1384 (FIF_PROMISC_IN_BSS | \
1385 FIF_ALLMULTI | \
1386 FIF_CONTROL | \
1387 FIF_OTHER_BSS | \
1388 FIF_BCN_PRBRESP_PROMISC | \
1389 FIF_FCSFAIL)
1390
Sujith7dcfdcd2008-08-11 14:03:13 +05301391/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001392static void ath9k_configure_filter(struct ieee80211_hw *hw,
1393 unsigned int changed_flags,
1394 unsigned int *total_flags,
1395 int mc_count,
1396 struct dev_mc_list *mclist)
1397{
1398 struct ath_softc *sc = hw->priv;
Sujith7dcfdcd2008-08-11 14:03:13 +05301399 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001400
1401 changed_flags &= SUPPORTED_FILTERS;
1402 *total_flags &= SUPPORTED_FILTERS;
1403
Sujith7dcfdcd2008-08-11 14:03:13 +05301404 sc->rx_filter = *total_flags;
1405 rfilt = ath_calcrxfilter(sc);
1406 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1407
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001408 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1409 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
Sujith7dcfdcd2008-08-11 14:03:13 +05301410 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001411 }
Sujith7dcfdcd2008-08-11 14:03:13 +05301412
1413 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1414 __func__, sc->rx_filter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001415}
1416
1417static void ath9k_sta_notify(struct ieee80211_hw *hw,
1418 struct ieee80211_vif *vif,
1419 enum sta_notify_cmd cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02001420 struct ieee80211_sta *sta)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001421{
1422 struct ath_softc *sc = hw->priv;
1423 struct ath_node *an;
1424 unsigned long flags;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001425
1426 spin_lock_irqsave(&sc->node_lock, flags);
Johannes Berg17741cd2008-09-11 00:02:02 +02001427 an = ath_node_find(sc, sta->addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001428 spin_unlock_irqrestore(&sc->node_lock, flags);
1429
1430 switch (cmd) {
1431 case STA_NOTIFY_ADD:
1432 spin_lock_irqsave(&sc->node_lock, flags);
1433 if (!an) {
Johannes Berg17741cd2008-09-11 00:02:02 +02001434 ath_node_attach(sc, sta->addr, 0);
Johannes Berge1749612008-10-27 15:59:26 -07001435 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %pM\n",
1436 __func__, sta->addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001437 } else {
Johannes Berg17741cd2008-09-11 00:02:02 +02001438 ath_node_get(sc, sta->addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001439 }
1440 spin_unlock_irqrestore(&sc->node_lock, flags);
1441 break;
1442 case STA_NOTIFY_REMOVE:
1443 if (!an)
1444 DPRINTF(sc, ATH_DBG_FATAL,
1445 "%s: Removal of a non-existent node\n",
1446 __func__);
1447 else {
1448 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
Johannes Berge1749612008-10-27 15:59:26 -07001449 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %pM\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001450 __func__,
Johannes Berge1749612008-10-27 15:59:26 -07001451 sta->addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001452 }
1453 break;
1454 default:
1455 break;
1456 }
1457}
1458
1459static int ath9k_conf_tx(struct ieee80211_hw *hw,
1460 u16 queue,
1461 const struct ieee80211_tx_queue_params *params)
1462{
1463 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +05301464 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001465 int ret = 0, qnum;
1466
1467 if (queue >= WME_NUM_AC)
1468 return 0;
1469
1470 qi.tqi_aifs = params->aifs;
1471 qi.tqi_cwmin = params->cw_min;
1472 qi.tqi_cwmax = params->cw_max;
1473 qi.tqi_burstTime = params->txop;
1474 qnum = ath_get_hal_qnum(queue, sc);
1475
1476 DPRINTF(sc, ATH_DBG_CONFIG,
1477 "%s: Configure tx [queue/halq] [%d/%d], "
1478 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1479 __func__,
1480 queue,
1481 qnum,
1482 params->aifs,
1483 params->cw_min,
1484 params->cw_max,
1485 params->txop);
1486
1487 ret = ath_txq_update(sc, qnum, &qi);
1488 if (ret)
1489 DPRINTF(sc, ATH_DBG_FATAL,
1490 "%s: TXQ Update failed\n", __func__);
1491
1492 return ret;
1493}
1494
1495static int ath9k_set_key(struct ieee80211_hw *hw,
1496 enum set_key_cmd cmd,
1497 const u8 *local_addr,
1498 const u8 *addr,
1499 struct ieee80211_key_conf *key)
1500{
1501 struct ath_softc *sc = hw->priv;
1502 int ret = 0;
1503
1504 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1505
1506 switch (cmd) {
1507 case SET_KEY:
1508 ret = ath_key_config(sc, addr, key);
1509 if (!ret) {
1510 set_bit(key->keyidx, sc->sc_keymap);
1511 key->hw_key_idx = key->keyidx;
1512 /* push IV and Michael MIC generation to stack */
1513 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05301514 if (key->alg == ALG_TKIP)
1515 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001516 }
1517 break;
1518 case DISABLE_KEY:
1519 ath_key_delete(sc, key);
1520 clear_bit(key->keyidx, sc->sc_keymap);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001521 break;
1522 default:
1523 ret = -EINVAL;
1524 }
1525
1526 return ret;
1527}
1528
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001529static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1530 struct ieee80211_vif *vif,
1531 struct ieee80211_bss_conf *bss_conf,
1532 u32 changed)
1533{
1534 struct ath_softc *sc = hw->priv;
1535
1536 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1537 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1538 __func__,
1539 bss_conf->use_short_preamble);
1540 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05301541 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001542 else
Sujith672840a2008-08-11 14:05:08 +05301543 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001544 }
1545
1546 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1547 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1548 __func__,
1549 bss_conf->use_cts_prot);
1550 if (bss_conf->use_cts_prot &&
1551 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05301552 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001553 else
Sujith672840a2008-08-11 14:05:08 +05301554 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001555 }
1556
1557 if (changed & BSS_CHANGED_HT) {
1558 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
1559 __func__,
1560 bss_conf->assoc_ht);
1561 ath9k_ht_conf(sc, bss_conf);
1562 }
1563
1564 if (changed & BSS_CHANGED_ASSOC) {
1565 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1566 __func__,
1567 bss_conf->assoc);
1568 ath9k_bss_assoc_info(sc, bss_conf);
1569 }
1570}
1571
1572static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1573{
1574 u64 tsf;
1575 struct ath_softc *sc = hw->priv;
1576 struct ath_hal *ah = sc->sc_ah;
1577
1578 tsf = ath9k_hw_gettsf64(ah);
1579
1580 return tsf;
1581}
1582
1583static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1584{
1585 struct ath_softc *sc = hw->priv;
1586 struct ath_hal *ah = sc->sc_ah;
1587
1588 ath9k_hw_reset_tsf(ah);
1589}
1590
1591static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1592 enum ieee80211_ampdu_mlme_action action,
Johannes Berg17741cd2008-09-11 00:02:02 +02001593 struct ieee80211_sta *sta,
1594 u16 tid, u16 *ssn)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001595{
1596 struct ath_softc *sc = hw->priv;
1597 int ret = 0;
1598
1599 switch (action) {
1600 case IEEE80211_AMPDU_RX_START:
Johannes Berg17741cd2008-09-11 00:02:02 +02001601 ret = ath_rx_aggr_start(sc, sta->addr, tid, ssn);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001602 if (ret < 0)
1603 DPRINTF(sc, ATH_DBG_FATAL,
1604 "%s: Unable to start RX aggregation\n",
1605 __func__);
1606 break;
1607 case IEEE80211_AMPDU_RX_STOP:
Johannes Berg17741cd2008-09-11 00:02:02 +02001608 ret = ath_rx_aggr_stop(sc, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001609 if (ret < 0)
1610 DPRINTF(sc, ATH_DBG_FATAL,
1611 "%s: Unable to stop RX aggregation\n",
1612 __func__);
1613 break;
1614 case IEEE80211_AMPDU_TX_START:
Johannes Berg17741cd2008-09-11 00:02:02 +02001615 ret = ath_tx_aggr_start(sc, sta->addr, tid, ssn);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001616 if (ret < 0)
1617 DPRINTF(sc, ATH_DBG_FATAL,
1618 "%s: Unable to start TX aggregation\n",
1619 __func__);
1620 else
Johannes Berg17741cd2008-09-11 00:02:02 +02001621 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001622 break;
1623 case IEEE80211_AMPDU_TX_STOP:
Johannes Berg17741cd2008-09-11 00:02:02 +02001624 ret = ath_tx_aggr_stop(sc, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001625 if (ret < 0)
1626 DPRINTF(sc, ATH_DBG_FATAL,
1627 "%s: Unable to stop TX aggregation\n",
1628 __func__);
1629
Johannes Berg17741cd2008-09-11 00:02:02 +02001630 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001631 break;
1632 default:
1633 DPRINTF(sc, ATH_DBG_FATAL,
1634 "%s: Unknown AMPDU action\n", __func__);
1635 }
1636
1637 return ret;
1638}
1639
Johannes Berg4233df62008-10-13 13:35:05 +02001640static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1641{
1642 return -EOPNOTSUPP;
1643}
1644
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001645static struct ieee80211_ops ath9k_ops = {
1646 .tx = ath9k_tx,
1647 .start = ath9k_start,
1648 .stop = ath9k_stop,
1649 .add_interface = ath9k_add_interface,
1650 .remove_interface = ath9k_remove_interface,
1651 .config = ath9k_config,
1652 .config_interface = ath9k_config_interface,
1653 .configure_filter = ath9k_configure_filter,
1654 .get_stats = NULL,
1655 .sta_notify = ath9k_sta_notify,
1656 .conf_tx = ath9k_conf_tx,
1657 .get_tx_stats = NULL,
1658 .bss_info_changed = ath9k_bss_info_changed,
1659 .set_tim = NULL,
1660 .set_key = ath9k_set_key,
1661 .hw_scan = NULL,
1662 .get_tkip_seq = NULL,
1663 .set_rts_threshold = NULL,
1664 .set_frag_threshold = NULL,
1665 .set_retry_limit = NULL,
1666 .get_tsf = ath9k_get_tsf,
1667 .reset_tsf = ath9k_reset_tsf,
1668 .tx_last_beacon = NULL,
Johannes Berg4233df62008-10-13 13:35:05 +02001669 .ampdu_action = ath9k_ampdu_action,
1670 .set_frag_threshold = ath9k_no_fragmentation,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001671};
1672
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001673static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1674{
1675 void __iomem *mem;
1676 struct ath_softc *sc;
1677 struct ieee80211_hw *hw;
1678 const char *athname;
1679 u8 csz;
1680 u32 val;
1681 int ret = 0;
1682
1683 if (pci_enable_device(pdev))
1684 return -EIO;
1685
1686 /* XXX 32-bit addressing only */
1687 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1688 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1689 ret = -ENODEV;
1690 goto bad;
1691 }
1692
1693 /*
1694 * Cache line size is used to size and align various
1695 * structures used to communicate with the hardware.
1696 */
1697 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1698 if (csz == 0) {
1699 /*
1700 * Linux 2.4.18 (at least) writes the cache line size
1701 * register as a 16-bit wide register which is wrong.
1702 * We must have this setup properly for rx buffer
1703 * DMA to work so force a reasonable value here if it
1704 * comes up zero.
1705 */
1706 csz = L1_CACHE_BYTES / sizeof(u32);
1707 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1708 }
1709 /*
1710 * The default setting of latency timer yields poor results,
1711 * set it to the value used by other systems. It may be worth
1712 * tweaking this setting more.
1713 */
1714 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1715
1716 pci_set_master(pdev);
1717
1718 /*
1719 * Disable the RETRY_TIMEOUT register (0x41) to keep
1720 * PCI Tx retries from interfering with C3 CPU state.
1721 */
1722 pci_read_config_dword(pdev, 0x40, &val);
1723 if ((val & 0x0000ff00) != 0)
1724 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1725
1726 ret = pci_request_region(pdev, 0, "ath9k");
1727 if (ret) {
1728 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1729 ret = -ENODEV;
1730 goto bad;
1731 }
1732
1733 mem = pci_iomap(pdev, 0, 0);
1734 if (!mem) {
1735 printk(KERN_ERR "PCI memory map error\n") ;
1736 ret = -EIO;
1737 goto bad1;
1738 }
1739
1740 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1741 if (hw == NULL) {
1742 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1743 goto bad2;
1744 }
1745
Sujith19b73c72008-08-14 13:28:20 +05301746 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
Jouni Malinene022edb2008-08-22 17:31:33 +03001747 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
Sujith19b73c72008-08-14 13:28:20 +05301748 IEEE80211_HW_SIGNAL_DBM |
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001749 IEEE80211_HW_NOISE_DBM;
1750
Luis R. Rodriguezf59ac042008-08-29 16:26:43 -07001751 hw->wiphy->interface_modes =
1752 BIT(NL80211_IFTYPE_AP) |
1753 BIT(NL80211_IFTYPE_STATION) |
1754 BIT(NL80211_IFTYPE_ADHOC);
1755
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001756 SET_IEEE80211_DEV(hw, &pdev->dev);
1757 pci_set_drvdata(pdev, hw);
1758
1759 sc = hw->priv;
1760 sc->hw = hw;
1761 sc->pdev = pdev;
1762 sc->mem = mem;
1763
1764 if (ath_attach(id->device, sc) != 0) {
1765 ret = -ENODEV;
1766 goto bad3;
1767 }
1768
1769 /* setup interrupt service routine */
1770
1771 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1772 printk(KERN_ERR "%s: request_irq failed\n",
1773 wiphy_name(hw->wiphy));
1774 ret = -EIO;
1775 goto bad4;
1776 }
1777
1778 athname = ath9k_hw_probe(id->vendor, id->device);
1779
1780 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1781 wiphy_name(hw->wiphy),
1782 athname ? athname : "Atheros ???",
1783 (unsigned long)mem, pdev->irq);
1784
1785 return 0;
1786bad4:
1787 ath_detach(sc);
1788bad3:
1789 ieee80211_free_hw(hw);
1790bad2:
1791 pci_iounmap(pdev, mem);
1792bad1:
1793 pci_release_region(pdev, 0);
1794bad:
1795 pci_disable_device(pdev);
1796 return ret;
1797}
1798
1799static void ath_pci_remove(struct pci_dev *pdev)
1800{
1801 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1802 struct ath_softc *sc = hw->priv;
Senthil Balasubramanian6115e852008-09-22 14:22:39 +05301803 enum ath9k_int status;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001804
Senthil Balasubramanian6115e852008-09-22 14:22:39 +05301805 if (pdev->irq) {
1806 ath9k_hw_set_interrupts(sc->sc_ah, 0);
1807 /* clear the ISR */
1808 ath9k_hw_getisr(sc->sc_ah, &status);
David S. Millerb262e602008-10-01 06:12:56 -07001809 sc->sc_flags |= SC_OP_INVALID;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001810 free_irq(pdev->irq, sc);
Senthil Balasubramanian6115e852008-09-22 14:22:39 +05301811 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001812 ath_detach(sc);
Senthil Balasubramanian6115e852008-09-22 14:22:39 +05301813
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001814 pci_iounmap(pdev, sc->mem);
1815 pci_release_region(pdev, 0);
1816 pci_disable_device(pdev);
1817 ieee80211_free_hw(hw);
1818}
1819
1820#ifdef CONFIG_PM
1821
1822static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1823{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301824 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1825 struct ath_softc *sc = hw->priv;
1826
1827 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301828
1829#ifdef CONFIG_RFKILL
1830 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1831 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1832#endif
1833
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001834 pci_save_state(pdev);
1835 pci_disable_device(pdev);
1836 pci_set_power_state(pdev, 3);
1837
1838 return 0;
1839}
1840
1841static int ath_pci_resume(struct pci_dev *pdev)
1842{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301843 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1844 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001845 u32 val;
1846 int err;
1847
1848 err = pci_enable_device(pdev);
1849 if (err)
1850 return err;
1851 pci_restore_state(pdev);
1852 /*
1853 * Suspend/Resume resets the PCI configuration space, so we have to
1854 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1855 * PCI Tx retries from interfering with C3 CPU state
1856 */
1857 pci_read_config_dword(pdev, 0x40, &val);
1858 if ((val & 0x0000ff00) != 0)
1859 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1860
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301861 /* Enable LED */
1862 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1863 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1864 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1865
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301866#ifdef CONFIG_RFKILL
1867 /*
1868 * check the h/w rfkill state on resume
1869 * and start the rfkill poll timer
1870 */
1871 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1872 queue_delayed_work(sc->hw->workqueue,
1873 &sc->rf_kill.rfkill_poll, 0);
1874#endif
1875
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001876 return 0;
1877}
1878
1879#endif /* CONFIG_PM */
1880
1881MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1882
1883static struct pci_driver ath_pci_driver = {
1884 .name = "ath9k",
1885 .id_table = ath_pci_id_table,
1886 .probe = ath_pci_probe,
1887 .remove = ath_pci_remove,
1888#ifdef CONFIG_PM
1889 .suspend = ath_pci_suspend,
1890 .resume = ath_pci_resume,
1891#endif /* CONFIG_PM */
1892};
1893
1894static int __init init_ath_pci(void)
1895{
1896 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1897
1898 if (pci_register_driver(&ath_pci_driver) < 0) {
1899 printk(KERN_ERR
1900 "ath_pci: No devices found, driver not installed.\n");
1901 pci_unregister_driver(&ath_pci_driver);
1902 return -ENODEV;
1903 }
1904
1905 return 0;
1906}
1907module_init(init_ath_pci);
1908
1909static void __exit exit_ath_pci(void)
1910{
1911 pci_unregister_driver(&ath_pci_driver);
1912 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1913}
1914module_exit(exit_ath_pci);