blob: 5bef0e3603f2a44e19169a5957bb6a0bf201150a [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * pci.c - Low-Level PCI Access in IA-64
3 *
4 * Derived from bios32.c of i386 tree.
5 *
6 * (c) Copyright 2002, 2005 Hewlett-Packard Development Company, L.P.
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Bjorn Helgaas <bjorn.helgaas@hp.com>
9 * Copyright (C) 2004 Silicon Graphics, Inc.
10 *
11 * Note: Above list of copyright holders is incomplete...
12 */
13#include <linux/config.h>
14
15#include <linux/acpi.h>
16#include <linux/types.h>
17#include <linux/kernel.h>
18#include <linux/pci.h>
19#include <linux/init.h>
20#include <linux/ioport.h>
21#include <linux/slab.h>
22#include <linux/smp_lock.h>
23#include <linux/spinlock.h>
24
25#include <asm/machvec.h>
26#include <asm/page.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <asm/system.h>
28#include <asm/io.h>
29#include <asm/sal.h>
30#include <asm/smp.h>
31#include <asm/irq.h>
32#include <asm/hw_irq.h>
33
Linus Torvalds1da177e2005-04-16 15:20:36 -070034/*
35 * Low-level SAL-based PCI configuration access functions. Note that SAL
36 * calls are already serialized (via sal_lock), so we don't need another
37 * synchronization mechanism here.
38 */
39
40#define PCI_SAL_ADDRESS(seg, bus, devfn, reg) \
41 (((u64) seg << 24) | (bus << 16) | (devfn << 8) | (reg))
42
43/* SAL 3.2 adds support for extended config space. */
44
45#define PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg) \
46 (((u64) seg << 28) | (bus << 20) | (devfn << 12) | (reg))
47
48static int
49pci_sal_read (unsigned int seg, unsigned int bus, unsigned int devfn,
50 int reg, int len, u32 *value)
51{
52 u64 addr, data = 0;
53 int mode, result;
54
55 if (!value || (seg > 65535) || (bus > 255) || (devfn > 255) || (reg > 4095))
56 return -EINVAL;
57
58 if ((seg | reg) <= 255) {
59 addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
60 mode = 0;
61 } else {
62 addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
63 mode = 1;
64 }
65 result = ia64_sal_pci_config_read(addr, mode, len, &data);
66 if (result != 0)
67 return -EINVAL;
68
69 *value = (u32) data;
70 return 0;
71}
72
73static int
74pci_sal_write (unsigned int seg, unsigned int bus, unsigned int devfn,
75 int reg, int len, u32 value)
76{
77 u64 addr;
78 int mode, result;
79
80 if ((seg > 65535) || (bus > 255) || (devfn > 255) || (reg > 4095))
81 return -EINVAL;
82
83 if ((seg | reg) <= 255) {
84 addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg);
85 mode = 0;
86 } else {
87 addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg);
88 mode = 1;
89 }
90 result = ia64_sal_pci_config_write(addr, mode, len, value);
91 if (result != 0)
92 return -EINVAL;
93 return 0;
94}
95
96static struct pci_raw_ops pci_sal_ops = {
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -070097 .read = pci_sal_read,
Linus Torvalds1da177e2005-04-16 15:20:36 -070098 .write = pci_sal_write
99};
100
101struct pci_raw_ops *raw_pci_ops = &pci_sal_ops;
102
103static int
104pci_read (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
105{
106 return raw_pci_ops->read(pci_domain_nr(bus), bus->number,
107 devfn, where, size, value);
108}
109
110static int
111pci_write (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
112{
113 return raw_pci_ops->write(pci_domain_nr(bus), bus->number,
114 devfn, where, size, value);
115}
116
117struct pci_ops pci_root_ops = {
118 .read = pci_read,
119 .write = pci_write,
120};
121
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122/* Called by ACPI when it finds a new root bus. */
123
124static struct pci_controller * __devinit
125alloc_pci_controller (int seg)
126{
127 struct pci_controller *controller;
128
129 controller = kmalloc(sizeof(*controller), GFP_KERNEL);
130 if (!controller)
131 return NULL;
132
133 memset(controller, 0, sizeof(*controller));
134 controller->segment = seg;
Christoph Lameter514604c2005-07-07 16:59:00 -0700135 controller->node = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136 return controller;
137}
138
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700139struct pci_root_info {
140 struct pci_controller *controller;
141 char *name;
142};
143
144static unsigned int
145new_space (u64 phys_base, int sparse)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146{
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700147 u64 mmio_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 int i;
149
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700150 if (phys_base == 0)
151 return 0; /* legacy I/O port space */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700153 mmio_base = (u64) ioremap(phys_base, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154 for (i = 0; i < num_io_spaces; i++)
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700155 if (io_space[i].mmio_base == mmio_base &&
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156 io_space[i].sparse == sparse)
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700157 return i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158
159 if (num_io_spaces == MAX_IO_SPACES) {
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700160 printk(KERN_ERR "PCI: Too many IO port spaces "
161 "(MAX_IO_SPACES=%lu)\n", MAX_IO_SPACES);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 return ~0;
163 }
164
165 i = num_io_spaces++;
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700166 io_space[i].mmio_base = mmio_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167 io_space[i].sparse = sparse;
168
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700169 return i;
170}
171
172static u64 __devinit
173add_io_space (struct pci_root_info *info, struct acpi_resource_address64 *addr)
174{
175 struct resource *resource;
176 char *name;
177 u64 base, min, max, base_port;
178 unsigned int sparse = 0, space_nr, len;
179
180 resource = kzalloc(sizeof(*resource), GFP_KERNEL);
181 if (!resource) {
182 printk(KERN_ERR "PCI: No memory for %s I/O port space\n",
183 info->name);
184 goto out;
185 }
186
187 len = strlen(info->name) + 32;
188 name = kzalloc(len, GFP_KERNEL);
189 if (!name) {
190 printk(KERN_ERR "PCI: No memory for %s I/O port space name\n",
191 info->name);
192 goto free_resource;
193 }
194
Bob Moore50eca3e2005-09-30 19:03:00 -0400195 min = addr->minimum;
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700196 max = min + addr->address_length - 1;
Bob Moore08978312005-10-21 00:00:00 -0400197 if (addr->info.io.translation_type == ACPI_SPARSE_TRANSLATION)
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700198 sparse = 1;
199
Bob Moore50eca3e2005-09-30 19:03:00 -0400200 space_nr = new_space(addr->translation_offset, sparse);
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700201 if (space_nr == ~0)
202 goto free_name;
203
204 base = __pa(io_space[space_nr].mmio_base);
205 base_port = IO_SPACE_BASE(space_nr);
206 snprintf(name, len, "%s I/O Ports %08lx-%08lx", info->name,
207 base_port + min, base_port + max);
208
209 /*
210 * The SDM guarantees the legacy 0-64K space is sparse, but if the
211 * mapping is done by the processor (not the bridge), ACPI may not
212 * mark it as sparse.
213 */
214 if (space_nr == 0)
215 sparse = 1;
216
217 resource->name = name;
218 resource->flags = IORESOURCE_MEM;
219 resource->start = base + (sparse ? IO_SPACE_SPARSE_ENCODING(min) : min);
220 resource->end = base + (sparse ? IO_SPACE_SPARSE_ENCODING(max) : max);
221 insert_resource(&iomem_resource, resource);
222
223 return base_port;
224
225free_name:
226 kfree(name);
227free_resource:
228 kfree(resource);
229out:
230 return ~0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231}
232
Bjorn Helgaas463eb292005-09-23 11:39:07 -0600233static acpi_status __devinit resource_to_window(struct acpi_resource *resource,
234 struct acpi_resource_address64 *addr)
235{
236 acpi_status status;
237
238 /*
239 * We're only interested in _CRS descriptors that are
240 * - address space descriptors for memory or I/O space
241 * - non-zero size
242 * - producers, i.e., the address space is routed downstream,
243 * not consumed by the bridge itself
244 */
245 status = acpi_resource_to_address64(resource, addr);
246 if (ACPI_SUCCESS(status) &&
247 (addr->resource_type == ACPI_MEMORY_RANGE ||
248 addr->resource_type == ACPI_IO_RANGE) &&
249 addr->address_length &&
250 addr->producer_consumer == ACPI_PRODUCER)
251 return AE_OK;
252
253 return AE_ERROR;
254}
255
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256static acpi_status __devinit
257count_window (struct acpi_resource *resource, void *data)
258{
259 unsigned int *windows = (unsigned int *) data;
260 struct acpi_resource_address64 addr;
261 acpi_status status;
262
Bjorn Helgaas463eb292005-09-23 11:39:07 -0600263 status = resource_to_window(resource, &addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264 if (ACPI_SUCCESS(status))
Bjorn Helgaas463eb292005-09-23 11:39:07 -0600265 (*windows)++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266
267 return AE_OK;
268}
269
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
271{
272 struct pci_root_info *info = data;
273 struct pci_window *window;
274 struct acpi_resource_address64 addr;
275 acpi_status status;
276 unsigned long flags, offset = 0;
277 struct resource *root;
278
Bjorn Helgaas463eb292005-09-23 11:39:07 -0600279 /* Return AE_OK for non-window resources to keep scanning for more */
280 status = resource_to_window(res, &addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281 if (!ACPI_SUCCESS(status))
282 return AE_OK;
283
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284 if (addr.resource_type == ACPI_MEMORY_RANGE) {
285 flags = IORESOURCE_MEM;
286 root = &iomem_resource;
Bob Moore50eca3e2005-09-30 19:03:00 -0400287 offset = addr.translation_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288 } else if (addr.resource_type == ACPI_IO_RANGE) {
289 flags = IORESOURCE_IO;
290 root = &ioport_resource;
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700291 offset = add_io_space(info, &addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292 if (offset == ~0)
293 return AE_OK;
294 } else
295 return AE_OK;
296
297 window = &info->controller->window[info->controller->windows++];
298 window->resource.name = info->name;
299 window->resource.flags = flags;
Bob Moore50eca3e2005-09-30 19:03:00 -0400300 window->resource.start = addr.minimum + offset;
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700301 window->resource.end = window->resource.start + addr.address_length - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700302 window->resource.child = NULL;
303 window->offset = offset;
304
305 if (insert_resource(root, &window->resource)) {
306 printk(KERN_ERR "alloc 0x%lx-0x%lx from %s for %s failed\n",
307 window->resource.start, window->resource.end,
308 root->name, info->name);
309 }
310
311 return AE_OK;
312}
313
314static void __devinit
315pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl)
316{
317 int i, j;
318
319 j = 0;
320 for (i = 0; i < ctrl->windows; i++) {
321 struct resource *res = &ctrl->window[i].resource;
322 /* HP's firmware has a hack to work around a Windows bug.
323 * Ignore these tiny memory ranges */
324 if ((res->flags & IORESOURCE_MEM) &&
325 (res->end - res->start < 16))
326 continue;
327 if (j >= PCI_BUS_NUM_RESOURCES) {
328 printk("Ignoring range [%lx-%lx] (%lx)\n", res->start,
329 res->end, res->flags);
330 continue;
331 }
332 bus->resource[j++] = res;
333 }
334}
335
336struct pci_bus * __devinit
337pci_acpi_scan_root(struct acpi_device *device, int domain, int bus)
338{
339 struct pci_root_info info;
340 struct pci_controller *controller;
341 unsigned int windows = 0;
342 struct pci_bus *pbus;
343 char *name;
Christoph Lameter514604c2005-07-07 16:59:00 -0700344 int pxm;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345
346 controller = alloc_pci_controller(domain);
347 if (!controller)
348 goto out1;
349
350 controller->acpi_handle = device->handle;
351
Christoph Lameter514604c2005-07-07 16:59:00 -0700352 pxm = acpi_get_pxm(controller->acpi_handle);
353#ifdef CONFIG_NUMA
354 if (pxm >= 0)
Yasunori Goto762834e2006-06-23 02:03:19 -0700355 controller->node = pxm_to_node(pxm);
Christoph Lameter514604c2005-07-07 16:59:00 -0700356#endif
357
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window,
359 &windows);
Christoph Lameter514604c2005-07-07 16:59:00 -0700360 controller->window = kmalloc_node(sizeof(*controller->window) * windows,
361 GFP_KERNEL, controller->node);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362 if (!controller->window)
363 goto out2;
364
365 name = kmalloc(16, GFP_KERNEL);
366 if (!name)
367 goto out3;
368
369 sprintf(name, "PCI Bus %04x:%02x", domain, bus);
370 info.controller = controller;
371 info.name = name;
372 acpi_walk_resources(device->handle, METHOD_NAME__CRS, add_window,
373 &info);
374
Rajesh Shahc431ada2005-04-28 00:25:45 -0700375 pbus = pci_scan_bus_parented(NULL, bus, &pci_root_ops, controller);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376 if (pbus)
377 pcibios_setup_root_windows(pbus, controller);
378
379 return pbus;
380
381out3:
382 kfree(controller->window);
383out2:
384 kfree(controller);
385out1:
386 return NULL;
387}
388
389void pcibios_resource_to_bus(struct pci_dev *dev,
390 struct pci_bus_region *region, struct resource *res)
391{
392 struct pci_controller *controller = PCI_CONTROLLER(dev);
393 unsigned long offset = 0;
394 int i;
395
396 for (i = 0; i < controller->windows; i++) {
397 struct pci_window *window = &controller->window[i];
398 if (!(window->resource.flags & res->flags))
399 continue;
400 if (window->resource.start > res->start)
401 continue;
402 if (window->resource.end < res->end)
403 continue;
404 offset = window->offset;
405 break;
406 }
407
408 region->start = res->start - offset;
409 region->end = res->end - offset;
410}
411EXPORT_SYMBOL(pcibios_resource_to_bus);
412
413void pcibios_bus_to_resource(struct pci_dev *dev,
414 struct resource *res, struct pci_bus_region *region)
415{
416 struct pci_controller *controller = PCI_CONTROLLER(dev);
417 unsigned long offset = 0;
418 int i;
419
420 for (i = 0; i < controller->windows; i++) {
421 struct pci_window *window = &controller->window[i];
422 if (!(window->resource.flags & res->flags))
423 continue;
424 if (window->resource.start - window->offset > region->start)
425 continue;
426 if (window->resource.end - window->offset < region->end)
427 continue;
428 offset = window->offset;
429 break;
430 }
431
432 res->start = region->start + offset;
433 res->end = region->end + offset;
434}
Keith Owens41290c12005-08-24 16:06:25 +1000435EXPORT_SYMBOL(pcibios_bus_to_resource);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700436
Rajesh Shah71c35112005-04-28 00:25:46 -0700437static int __devinit is_valid_resource(struct pci_dev *dev, int idx)
438{
439 unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM;
440 struct resource *devr = &dev->resource[idx];
441
442 if (!dev->bus)
443 return 0;
444 for (i=0; i<PCI_BUS_NUM_RESOURCES; i++) {
445 struct resource *busr = dev->bus->resource[i];
446
447 if (!busr || ((busr->flags ^ devr->flags) & type_mask))
448 continue;
449 if ((devr->start) && (devr->start >= busr->start) &&
450 (devr->end <= busr->end))
451 return 1;
452 }
453 return 0;
454}
455
Kenji Kaneshige7b9c8ba2006-01-16 13:45:23 +0900456static void __devinit
457pcibios_fixup_resources(struct pci_dev *dev, int start, int limit)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700458{
459 struct pci_bus_region region;
460 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461
Kenji Kaneshige7b9c8ba2006-01-16 13:45:23 +0900462 for (i = start; i < limit; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463 if (!dev->resource[i].flags)
464 continue;
465 region.start = dev->resource[i].start;
466 region.end = dev->resource[i].end;
467 pcibios_bus_to_resource(dev, &dev->resource[i], &region);
Rajesh Shah71c35112005-04-28 00:25:46 -0700468 if ((is_valid_resource(dev, i)))
469 pci_claim_resource(dev, i);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470 }
471}
472
Kenji Kaneshige7b9c8ba2006-01-16 13:45:23 +0900473static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
474{
475 pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES);
476}
477
478static void __devinit pcibios_fixup_bridge_resources(struct pci_dev *dev)
479{
480 pcibios_fixup_resources(dev, PCI_BRIDGE_RESOURCES, PCI_NUM_RESOURCES);
481}
482
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483/*
484 * Called after each bus is probed, but before its children are examined.
485 */
486void __devinit
487pcibios_fixup_bus (struct pci_bus *b)
488{
489 struct pci_dev *dev;
490
Rajesh Shahf7d473d2005-04-28 00:25:51 -0700491 if (b->self) {
492 pci_read_bridge_bases(b);
Kenji Kaneshige7b9c8ba2006-01-16 13:45:23 +0900493 pcibios_fixup_bridge_resources(b->self);
Rajesh Shahf7d473d2005-04-28 00:25:51 -0700494 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495 list_for_each_entry(dev, &b->devices, bus_list)
496 pcibios_fixup_device_resources(dev);
497
498 return;
499}
500
501void __devinit
502pcibios_update_irq (struct pci_dev *dev, int irq)
503{
504 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
505
506 /* ??? FIXME -- record old value for shutdown. */
507}
508
509static inline int
510pcibios_enable_resources (struct pci_dev *dev, int mask)
511{
512 u16 cmd, old_cmd;
513 int idx;
514 struct resource *r;
Rajesh Shahfab3fb02005-04-28 00:25:45 -0700515 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700516
517 if (!dev)
518 return -EINVAL;
519
520 pci_read_config_word(dev, PCI_COMMAND, &cmd);
521 old_cmd = cmd;
Rajesh Shahfab3fb02005-04-28 00:25:45 -0700522 for (idx=0; idx<PCI_NUM_RESOURCES; idx++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523 /* Only set up the desired resources. */
524 if (!(mask & (1 << idx)))
525 continue;
526
527 r = &dev->resource[idx];
Rajesh Shahfab3fb02005-04-28 00:25:45 -0700528 if (!(r->flags & type_mask))
529 continue;
530 if ((idx == PCI_ROM_RESOURCE) &&
531 (!(r->flags & IORESOURCE_ROM_ENABLE)))
532 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700533 if (!r->start && r->end) {
534 printk(KERN_ERR
535 "PCI: Device %s not available because of resource collisions\n",
536 pci_name(dev));
537 return -EINVAL;
538 }
539 if (r->flags & IORESOURCE_IO)
540 cmd |= PCI_COMMAND_IO;
541 if (r->flags & IORESOURCE_MEM)
542 cmd |= PCI_COMMAND_MEMORY;
543 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700544 if (cmd != old_cmd) {
545 printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
546 pci_write_config_word(dev, PCI_COMMAND, cmd);
547 }
548 return 0;
549}
550
551int
552pcibios_enable_device (struct pci_dev *dev, int mask)
553{
554 int ret;
555
556 ret = pcibios_enable_resources(dev, mask);
557 if (ret < 0)
558 return ret;
559
560 return acpi_pci_irq_enable(dev);
561}
562
Linus Torvalds1da177e2005-04-16 15:20:36 -0700563void
564pcibios_disable_device (struct pci_dev *dev)
565{
566 acpi_pci_irq_disable(dev);
567}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700568
569void
570pcibios_align_resource (void *data, struct resource *res,
Greg Kroah-Hartmane31dd6e2006-06-12 17:06:02 -0700571 resource_size_t size, resource_size_t align)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572{
573}
574
575/*
576 * PCI BIOS setup, always defaults to SAL interface
577 */
578char * __init
579pcibios_setup (char *str)
580{
Matthew Wilcoxac311ac2006-02-24 12:46:23 -0700581 return str;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582}
583
584int
585pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
586 enum pci_mmap_state mmap_state, int write_combine)
587{
588 /*
589 * I/O space cannot be accessed via normal processor loads and
590 * stores on this platform.
591 */
592 if (mmap_state == pci_mmap_io)
593 /*
594 * XXX we could relax this for I/O spaces for which ACPI
595 * indicates that the space is 1-to-1 mapped. But at the
596 * moment, we don't support multiple PCI address spaces and
597 * the legacy I/O space is not 1-to-1 mapped, so this is moot.
598 */
599 return -EINVAL;
600
601 /*
602 * Leave vm_pgoff as-is, the PCI space address is the physical
603 * address on this platform.
604 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 if (write_combine && efi_range_is_wc(vma->vm_start,
606 vma->vm_end - vma->vm_start))
607 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
608 else
609 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
610
611 if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
612 vma->vm_end - vma->vm_start, vma->vm_page_prot))
613 return -EAGAIN;
614
615 return 0;
616}
617
618/**
619 * ia64_pci_get_legacy_mem - generic legacy mem routine
620 * @bus: bus to get legacy memory base address for
621 *
622 * Find the base of legacy memory for @bus. This is typically the first
623 * megabyte of bus address space for @bus or is simply 0 on platforms whose
624 * chipsets support legacy I/O and memory routing. Returns the base address
625 * or an error pointer if an error occurred.
626 *
627 * This is the ia64 generic version of this routine. Other platforms
628 * are free to override it with a machine vector.
629 */
630char *ia64_pci_get_legacy_mem(struct pci_bus *bus)
631{
632 return (char *)__IA64_UNCACHED_OFFSET;
633}
634
635/**
636 * pci_mmap_legacy_page_range - map legacy memory space to userland
637 * @bus: bus whose legacy space we're mapping
638 * @vma: vma passed in by mmap
639 *
640 * Map legacy memory space for this device back to userspace using a machine
641 * vector to get the base address.
642 */
643int
644pci_mmap_legacy_page_range(struct pci_bus *bus, struct vm_area_struct *vma)
645{
Bjorn Helgaas32e62c62006-05-05 17:19:50 -0600646 unsigned long size = vma->vm_end - vma->vm_start;
647 pgprot_t prot;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648 char *addr;
649
Bjorn Helgaas32e62c62006-05-05 17:19:50 -0600650 /*
651 * Avoid attribute aliasing. See Documentation/ia64/aliasing.txt
652 * for more details.
653 */
654 if (!valid_mmap_phys_addr_range(vma->vm_pgoff << PAGE_SHIFT, size))
655 return -EINVAL;
656 prot = phys_mem_access_prot(NULL, vma->vm_pgoff, size,
657 vma->vm_page_prot);
658 if (pgprot_val(prot) != pgprot_val(pgprot_noncached(vma->vm_page_prot)))
659 return -EINVAL;
660
Linus Torvalds1da177e2005-04-16 15:20:36 -0700661 addr = pci_get_legacy_mem(bus);
662 if (IS_ERR(addr))
663 return PTR_ERR(addr);
664
665 vma->vm_pgoff += (unsigned long)addr >> PAGE_SHIFT;
Bjorn Helgaas32e62c62006-05-05 17:19:50 -0600666 vma->vm_page_prot = prot;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667
668 if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
Bjorn Helgaas32e62c62006-05-05 17:19:50 -0600669 size, vma->vm_page_prot))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670 return -EAGAIN;
671
672 return 0;
673}
674
675/**
676 * ia64_pci_legacy_read - read from legacy I/O space
677 * @bus: bus to read
678 * @port: legacy port value
679 * @val: caller allocated storage for returned value
680 * @size: number of bytes to read
681 *
682 * Simply reads @size bytes from @port and puts the result in @val.
683 *
684 * Again, this (and the write routine) are generic versions that can be
685 * overridden by the platform. This is necessary on platforms that don't
686 * support legacy I/O routing or that hard fail on legacy I/O timeouts.
687 */
688int ia64_pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size)
689{
690 int ret = size;
691
692 switch (size) {
693 case 1:
694 *val = inb(port);
695 break;
696 case 2:
697 *val = inw(port);
698 break;
699 case 4:
700 *val = inl(port);
701 break;
702 default:
703 ret = -EINVAL;
704 break;
705 }
706
707 return ret;
708}
709
710/**
711 * ia64_pci_legacy_write - perform a legacy I/O write
712 * @bus: bus pointer
713 * @port: port to write
714 * @val: value to write
715 * @size: number of bytes to write from @val
716 *
717 * Simply writes @size bytes of @val to @port.
718 */
Satoru Takeuchia72391e2006-04-20 18:49:48 +0900719int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700720{
Alex Williamson408045a2005-12-21 15:21:36 -0700721 int ret = size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700722
723 switch (size) {
724 case 1:
725 outb(val, port);
726 break;
727 case 2:
728 outw(val, port);
729 break;
730 case 4:
731 outl(val, port);
732 break;
733 default:
734 ret = -EINVAL;
735 break;
736 }
737
738 return ret;
739}
740
741/**
742 * pci_cacheline_size - determine cacheline size for PCI devices
743 * @dev: void
744 *
745 * We want to use the line-size of the outer-most cache. We assume
746 * that this line-size is the same for all CPUs.
747 *
748 * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info().
749 *
750 * RETURNS: An appropriate -ERRNO error value on eror, or zero for success.
751 */
752static unsigned long
753pci_cacheline_size (void)
754{
755 u64 levels, unique_caches;
756 s64 status;
757 pal_cache_config_info_t cci;
758 static u8 cacheline_size;
759
760 if (cacheline_size)
761 return cacheline_size;
762
763 status = ia64_pal_cache_summary(&levels, &unique_caches);
764 if (status != 0) {
765 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
766 __FUNCTION__, status);
767 return SMP_CACHE_BYTES;
768 }
769
770 status = ia64_pal_cache_config_info(levels - 1, /* cache_type (data_or_unified)= */ 2,
771 &cci);
772 if (status != 0) {
773 printk(KERN_ERR "%s: ia64_pal_cache_config_info() failed (status=%ld)\n",
774 __FUNCTION__, status);
775 return SMP_CACHE_BYTES;
776 }
777 cacheline_size = 1 << cci.pcci_line_size;
778 return cacheline_size;
779}
780
781/**
782 * pcibios_prep_mwi - helper function for drivers/pci/pci.c:pci_set_mwi()
783 * @dev: the PCI device for which MWI is enabled
784 *
785 * For ia64, we can get the cacheline sizes from PAL.
786 *
787 * RETURNS: An appropriate -ERRNO error value on eror, or zero for success.
788 */
789int
790pcibios_prep_mwi (struct pci_dev *dev)
791{
792 unsigned long desired_linesize, current_linesize;
793 int rc = 0;
794 u8 pci_linesize;
795
796 desired_linesize = pci_cacheline_size();
797
798 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &pci_linesize);
799 current_linesize = 4 * pci_linesize;
800 if (desired_linesize != current_linesize) {
801 printk(KERN_WARNING "PCI: slot %s has incorrect PCI cache line size of %lu bytes,",
802 pci_name(dev), current_linesize);
803 if (current_linesize > desired_linesize) {
804 printk(" expected %lu bytes instead\n", desired_linesize);
805 rc = -EINVAL;
806 } else {
807 printk(" correcting to %lu\n", desired_linesize);
808 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, desired_linesize / 4);
809 }
810 }
811 return rc;
812}
813
814int pci_vector_resources(int last, int nr_released)
815{
816 int count = nr_released;
817
Bjorn Helgaas4f41d5a2005-11-07 15:13:59 -0700818 count += (IA64_LAST_DEVICE_VECTOR - last);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700819
820 return count;
821}