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Wolfram Sangbb2fd8a2010-04-29 10:03:17 +02001/*
2 * Watchdog driver for IMX2 and later processors
3 *
4 * Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
Anson Huang1a9c5ef2014-01-13 19:58:34 +08005 * Copyright (C) 2014 Freescale Semiconductor, Inc.
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +02006 *
7 * some parts adapted by similar drivers from Darius Augulis and Vladimir
8 * Zapolskiy, additional improvements by Wim Van Sebroeck.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
15 *
16 * MX1: MX2+:
17 * ---- -----
18 * Registers: 32-bit 16-bit
19 * Stopable timer: Yes No
20 * Need to enable clk: No Yes
21 * Halt on suspend: Manual Can be automatic
22 */
23
Xiubo Li30cb0422014-04-04 09:33:24 +080024#include <linux/clk.h>
Jingchang Lu334a9d82014-09-12 15:24:36 +080025#include <linux/delay.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020026#include <linux/init.h>
Xiubo Li30cb0422014-04-04 09:33:24 +080027#include <linux/io.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020028#include <linux/kernel.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020029#include <linux/module.h>
30#include <linux/moduleparam.h>
Xiubo Lif728f4b2014-06-03 10:45:14 +080031#include <linux/of_address.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020032#include <linux/platform_device.h>
Xiubo Lia7977002014-04-04 09:33:25 +080033#include <linux/regmap.h>
Xiubo Li30cb0422014-04-04 09:33:24 +080034#include <linux/watchdog.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020035
36#define DRIVER_NAME "imx2-wdt"
37
38#define IMX2_WDT_WCR 0x00 /* Control Register */
39#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
Tim Harveybc677ff42016-04-01 08:16:43 -070040#define IMX2_WDT_WCR_WDA (1 << 5) /* -> External Reset WDOG_B */
41#define IMX2_WDT_WCR_SRS (1 << 4) /* -> Software Reset Signal */
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020042#define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
43#define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
Anson Huang1a9c5ef2014-01-13 19:58:34 +080044#define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020045
46#define IMX2_WDT_WSR 0x02 /* Service Register */
47#define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
48#define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */
49
Oskar Schirmer474ef122012-02-16 12:17:45 +000050#define IMX2_WDT_WRSR 0x04 /* Reset Status Register */
51#define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */
52
Markus Pargmann5fe65ce2014-09-08 09:14:07 +020053#define IMX2_WDT_WMCR 0x08 /* Misc Register */
54
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020055#define IMX2_WDT_MAX_TIME 128
56#define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */
57
58#define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8)
59
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +020060struct imx2_wdt_device {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020061 struct clk *clk;
Xiubo Lia7977002014-04-04 09:33:25 +080062 struct regmap *regmap;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +020063 struct watchdog_device wdog;
Tim Harveybc677ff42016-04-01 08:16:43 -070064 bool ext_reset;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +020065};
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020066
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +010067static bool nowayout = WATCHDOG_NOWAYOUT;
68module_param(nowayout, bool, 0);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020069MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
70 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
71
72
73static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
74module_param(timeout, uint, 0);
75MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
76 __MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
77
78static const struct watchdog_info imx2_wdt_info = {
79 .identity = "imx2+ watchdog",
80 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
81};
82
Guenter Roeck4d8b2292016-02-26 17:32:49 -080083static int imx2_wdt_restart(struct watchdog_device *wdog, unsigned long action,
84 void *data)
Jingchang Lu334a9d82014-09-12 15:24:36 +080085{
Damien Riegel2d9d24752015-11-16 12:28:04 -050086 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Jingchang Lu334a9d82014-09-12 15:24:36 +080087 unsigned int wcr_enable = IMX2_WDT_WCR_WDE;
Damien Riegel2d9d24752015-11-16 12:28:04 -050088
Tim Harveybc677ff42016-04-01 08:16:43 -070089 /* Use internal reset or external - not both */
90 if (wdev->ext_reset)
91 wcr_enable |= IMX2_WDT_WCR_SRS; /* do not assert int reset */
92 else
93 wcr_enable |= IMX2_WDT_WCR_WDA; /* do not assert ext-reset */
94
Jingchang Lu334a9d82014-09-12 15:24:36 +080095 /* Assert SRS signal */
Fabio Estevam9493c0d2015-10-02 00:25:28 -030096 regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
Jingchang Lu334a9d82014-09-12 15:24:36 +080097 /*
98 * Due to imx6q errata ERR004346 (WDOG: WDOG SRS bit requires to be
99 * written twice), we add another two writes to ensure there must be at
100 * least two writes happen in the same one 32kHz clock period. We save
101 * the target check here, since the writes shouldn't be a huge burden
102 * for other platforms.
103 */
Fabio Estevam9493c0d2015-10-02 00:25:28 -0300104 regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
105 regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
Jingchang Lu334a9d82014-09-12 15:24:36 +0800106
107 /* wait for reset to assert... */
108 mdelay(500);
109
Damien Riegel2d9d24752015-11-16 12:28:04 -0500110 return 0;
Jingchang Lu334a9d82014-09-12 15:24:36 +0800111}
112
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200113static inline void imx2_wdt_setup(struct watchdog_device *wdog)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200114{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200115 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Xiubo Lia7977002014-04-04 09:33:25 +0800116 u32 val;
117
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200118 regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200119
Anson Huang1a9c5ef2014-01-13 19:58:34 +0800120 /* Suspend timer in low power mode, write once-only */
121 val |= IMX2_WDT_WCR_WDZST;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200122 /* Strip the old watchdog Time-Out value */
123 val &= ~IMX2_WDT_WCR_WT;
Tim Harveybc677ff42016-04-01 08:16:43 -0700124 /* Generate internal chip-level reset if WDOG times out */
125 if (!wdev->ext_reset)
126 val &= ~IMX2_WDT_WCR_WRE;
127 /* Or if external-reset assert WDOG_B reset only on time-out */
128 else
129 val |= IMX2_WDT_WCR_WRE;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200130 /* Keep Watchdog Disabled */
131 val &= ~IMX2_WDT_WCR_WDE;
132 /* Set the watchdog's Time-Out value */
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200133 val |= WDOG_SEC_TO_COUNT(wdog->timeout);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200134
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200135 regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200136
137 /* enable the watchdog */
138 val |= IMX2_WDT_WCR_WDE;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200139 regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200140}
141
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200142static inline bool imx2_wdt_is_running(struct imx2_wdt_device *wdev)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200143{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200144 u32 val;
145
146 regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
147
148 return val & IMX2_WDT_WCR_WDE;
149}
150
151static int imx2_wdt_ping(struct watchdog_device *wdog)
152{
153 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
154
155 regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1);
156 regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2);
157 return 0;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200158}
159
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200160static int imx2_wdt_set_timeout(struct watchdog_device *wdog,
161 unsigned int new_timeout)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200162{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200163 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200164
Michael Grzeschik30dd4a82015-05-06 13:17:59 +0200165 wdog->timeout = new_timeout;
166
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200167 regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT,
Xiubo Lia7977002014-04-04 09:33:25 +0800168 WDOG_SEC_TO_COUNT(new_timeout));
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200169 return 0;
170}
171
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200172static int imx2_wdt_start(struct watchdog_device *wdog)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200173{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200174 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200175
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800176 if (imx2_wdt_is_running(wdev))
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200177 imx2_wdt_set_timeout(wdog, wdog->timeout);
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800178 else
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200179 imx2_wdt_setup(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200180
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800181 set_bit(WDOG_HW_RUNNING, &wdog->status);
182
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200183 return imx2_wdt_ping(wdog);
184}
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200185
Krzysztof Kozlowski4bd8ce32015-01-05 10:09:17 +0100186static const struct watchdog_ops imx2_wdt_ops = {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200187 .owner = THIS_MODULE,
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200188 .start = imx2_wdt_start,
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200189 .ping = imx2_wdt_ping,
190 .set_timeout = imx2_wdt_set_timeout,
Damien Riegel2d9d24752015-11-16 12:28:04 -0500191 .restart = imx2_wdt_restart,
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200192};
193
Krzysztof Kozlowski4bd8ce32015-01-05 10:09:17 +0100194static const struct regmap_config imx2_wdt_regmap_config = {
Xiubo Lia7977002014-04-04 09:33:25 +0800195 .reg_bits = 16,
196 .reg_stride = 2,
197 .val_bits = 16,
198 .max_register = 0x8,
199};
200
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200201static int __init imx2_wdt_probe(struct platform_device *pdev)
202{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200203 struct imx2_wdt_device *wdev;
204 struct watchdog_device *wdog;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200205 struct resource *res;
Xiubo Lia7977002014-04-04 09:33:25 +0800206 void __iomem *base;
207 int ret;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200208 u32 val;
209
210 wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
211 if (!wdev)
212 return -ENOMEM;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200213
214 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Xiubo Lia7977002014-04-04 09:33:25 +0800215 base = devm_ioremap_resource(&pdev->dev, res);
216 if (IS_ERR(base))
217 return PTR_ERR(base);
218
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200219 wdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
220 &imx2_wdt_regmap_config);
221 if (IS_ERR(wdev->regmap)) {
Xiubo Lia7977002014-04-04 09:33:25 +0800222 dev_err(&pdev->dev, "regmap init failed\n");
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200223 return PTR_ERR(wdev->regmap);
Xiubo Lia7977002014-04-04 09:33:25 +0800224 }
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200225
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200226 wdev->clk = devm_clk_get(&pdev->dev, NULL);
227 if (IS_ERR(wdev->clk)) {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200228 dev_err(&pdev->dev, "can't get Watchdog clock\n");
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200229 return PTR_ERR(wdev->clk);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200230 }
231
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200232 wdog = &wdev->wdog;
233 wdog->info = &imx2_wdt_info;
234 wdog->ops = &imx2_wdt_ops;
235 wdog->min_timeout = 1;
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800236 wdog->max_hw_heartbeat_ms = IMX2_WDT_MAX_TIME * 1000;
Vladimir Zapolskiy81351932015-06-02 15:46:18 +0300237 wdog->parent = &pdev->dev;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200238
Fabio Estevamaefb1632015-06-22 01:16:18 -0300239 ret = clk_prepare_enable(wdev->clk);
240 if (ret)
241 return ret;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200242
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200243 regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
244 wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200245
Tim Harveybc677ff42016-04-01 08:16:43 -0700246 wdev->ext_reset = of_property_read_bool(pdev->dev.of_node,
247 "fsl,ext-reset-output");
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200248 wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
249 if (wdog->timeout != timeout)
250 dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
251 timeout, wdog->timeout);
252
253 platform_set_drvdata(pdev, wdog);
254 watchdog_set_drvdata(wdog, wdev);
255 watchdog_set_nowayout(wdog, nowayout);
Damien Riegel2d9d24752015-11-16 12:28:04 -0500256 watchdog_set_restart_priority(wdog, 128);
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200257 watchdog_init_timeout(wdog, timeout, &pdev->dev);
258
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800259 if (imx2_wdt_is_running(wdev)) {
260 imx2_wdt_set_timeout(wdog, wdog->timeout);
261 set_bit(WDOG_HW_RUNNING, &wdog->status);
262 }
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200263
Markus Pargmann5fe65ce2014-09-08 09:14:07 +0200264 /*
265 * Disable the watchdog power down counter at boot. Otherwise the power
266 * down counter will pull down the #WDOG interrupt line for one clock
267 * cycle.
268 */
269 regmap_write(wdev->regmap, IMX2_WDT_WMCR, 0);
270
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200271 ret = watchdog_register_device(wdog);
272 if (ret) {
273 dev_err(&pdev->dev, "cannot register watchdog device\n");
Fabio Estevamdb11cba2015-06-22 01:16:19 -0300274 goto disable_clk;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200275 }
276
277 dev_info(&pdev->dev, "timeout %d sec (nowayout=%d)\n",
278 wdog->timeout, nowayout);
279
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200280 return 0;
Fabio Estevamdb11cba2015-06-22 01:16:19 -0300281
282disable_clk:
283 clk_disable_unprepare(wdev->clk);
284 return ret;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200285}
286
287static int __exit imx2_wdt_remove(struct platform_device *pdev)
288{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200289 struct watchdog_device *wdog = platform_get_drvdata(pdev);
290 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200291
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200292 watchdog_unregister_device(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200293
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200294 if (imx2_wdt_is_running(wdev)) {
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200295 imx2_wdt_ping(wdog);
296 dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
Jingoo Hanbdf49572013-04-29 18:15:53 +0900297 }
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200298 return 0;
299}
300
301static void imx2_wdt_shutdown(struct platform_device *pdev)
302{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200303 struct watchdog_device *wdog = platform_get_drvdata(pdev);
304 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200305
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200306 if (imx2_wdt_is_running(wdev)) {
307 /*
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800308 * We are running, configure max timeout before reboot
309 * will take place.
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200310 */
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200311 imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
312 imx2_wdt_ping(wdog);
313 dev_crit(&pdev->dev, "Device shutdown: Expect reboot!\n");
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200314 }
315}
316
Xiubo Liaefbaf32014-09-22 18:00:52 +0800317#ifdef CONFIG_PM_SLEEP
Xiubo Libbd59002014-10-16 11:44:15 +0800318/* Disable watchdog if it is active or non-active but still running */
Xiubo Liaefbaf32014-09-22 18:00:52 +0800319static int imx2_wdt_suspend(struct device *dev)
320{
321 struct watchdog_device *wdog = dev_get_drvdata(dev);
322 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
323
Xiubo Libbd59002014-10-16 11:44:15 +0800324 /* The watchdog IP block is running */
325 if (imx2_wdt_is_running(wdev)) {
326 imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
327 imx2_wdt_ping(wdog);
Xiubo Libbd59002014-10-16 11:44:15 +0800328 }
Xiubo Liaefbaf32014-09-22 18:00:52 +0800329
330 clk_disable_unprepare(wdev->clk);
331
332 return 0;
333}
334
335/* Enable watchdog and configure it if necessary */
336static int imx2_wdt_resume(struct device *dev)
337{
338 struct watchdog_device *wdog = dev_get_drvdata(dev);
339 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Fabio Estevamaefb1632015-06-22 01:16:18 -0300340 int ret;
Xiubo Liaefbaf32014-09-22 18:00:52 +0800341
Fabio Estevamaefb1632015-06-22 01:16:18 -0300342 ret = clk_prepare_enable(wdev->clk);
343 if (ret)
344 return ret;
Xiubo Liaefbaf32014-09-22 18:00:52 +0800345
346 if (watchdog_active(wdog) && !imx2_wdt_is_running(wdev)) {
Xiubo Libbd59002014-10-16 11:44:15 +0800347 /*
348 * If the watchdog is still active and resumes
349 * from deep sleep state, need to restart the
350 * watchdog again.
Xiubo Liaefbaf32014-09-22 18:00:52 +0800351 */
352 imx2_wdt_setup(wdog);
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800353 }
354 if (imx2_wdt_is_running(wdev)) {
Xiubo Liaefbaf32014-09-22 18:00:52 +0800355 imx2_wdt_set_timeout(wdog, wdog->timeout);
356 imx2_wdt_ping(wdog);
Xiubo Liaefbaf32014-09-22 18:00:52 +0800357 }
358
359 return 0;
360}
361#endif
362
363static SIMPLE_DEV_PM_OPS(imx2_wdt_pm_ops, imx2_wdt_suspend,
364 imx2_wdt_resume);
365
Shawn Guof5a427e2011-07-18 11:15:21 +0800366static const struct of_device_id imx2_wdt_dt_ids[] = {
367 { .compatible = "fsl,imx21-wdt", },
368 { /* sentinel */ }
369};
Niels de Vos813296a2013-07-29 09:38:18 +0200370MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
Shawn Guof5a427e2011-07-18 11:15:21 +0800371
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200372static struct platform_driver imx2_wdt_driver = {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200373 .remove = __exit_p(imx2_wdt_remove),
374 .shutdown = imx2_wdt_shutdown,
375 .driver = {
376 .name = DRIVER_NAME,
Xiubo Liaefbaf32014-09-22 18:00:52 +0800377 .pm = &imx2_wdt_pm_ops,
Shawn Guof5a427e2011-07-18 11:15:21 +0800378 .of_match_table = imx2_wdt_dt_ids,
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200379 },
380};
381
Fabio Porcedda1cb92042013-01-09 12:15:27 +0100382module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200383
384MODULE_AUTHOR("Wolfram Sang");
385MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
386MODULE_LICENSE("GPL v2");
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200387MODULE_ALIAS("platform:" DRIVER_NAME);