David Howells | f05e798 | 2012-03-28 18:11:12 +0100 | [diff] [blame] | 1 | #ifndef _ASM_X86_BARRIER_H |
| 2 | #define _ASM_X86_BARRIER_H |
| 3 | |
| 4 | #include <asm/alternative.h> |
| 5 | #include <asm/nops.h> |
| 6 | |
| 7 | /* |
| 8 | * Force strict CPU ordering. |
Michael S. Tsirkin | 57d9b1b | 2016-01-28 19:02:44 +0200 | [diff] [blame] | 9 | * And yes, this might be required on UP too when we're talking |
David Howells | f05e798 | 2012-03-28 18:11:12 +0100 | [diff] [blame] | 10 | * to devices. |
| 11 | */ |
| 12 | |
| 13 | #ifdef CONFIG_X86_32 |
Michael S. Tsirkin | bd92247 | 2016-01-28 19:02:29 +0200 | [diff] [blame] | 14 | #define mb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "mfence", \ |
| 15 | X86_FEATURE_XMM2) ::: "memory", "cc") |
| 16 | #define rmb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "lfence", \ |
| 17 | X86_FEATURE_XMM2) ::: "memory", "cc") |
| 18 | #define wmb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "sfence", \ |
| 19 | X86_FEATURE_XMM2) ::: "memory", "cc") |
David Howells | f05e798 | 2012-03-28 18:11:12 +0100 | [diff] [blame] | 20 | #else |
| 21 | #define mb() asm volatile("mfence":::"memory") |
| 22 | #define rmb() asm volatile("lfence":::"memory") |
| 23 | #define wmb() asm volatile("sfence" ::: "memory") |
| 24 | #endif |
| 25 | |
Alexander Duyck | 1077fa3 | 2014-12-11 15:02:06 -0800 | [diff] [blame] | 26 | #ifdef CONFIG_X86_PPRO_FENCE |
| 27 | #define dma_rmb() rmb() |
| 28 | #else |
| 29 | #define dma_rmb() barrier() |
| 30 | #endif |
| 31 | #define dma_wmb() barrier() |
| 32 | |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 33 | #define __smp_mb() mb() |
| 34 | #define __smp_rmb() dma_rmb() |
| 35 | #define __smp_wmb() barrier() |
| 36 | #define __smp_store_mb(var, value) do { (void)xchg(&var, value); } while (0) |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 37 | |
Dave Jones | 09df7c4 | 2014-03-10 19:32:22 -0400 | [diff] [blame] | 38 | #if defined(CONFIG_X86_PPRO_FENCE) |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 39 | |
| 40 | /* |
Peter Zijlstra | 4f3aaf2 | 2014-06-11 11:01:45 +0200 | [diff] [blame] | 41 | * For this option x86 doesn't have a strong TSO memory |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 42 | * model and we should fall back to full barriers. |
| 43 | */ |
| 44 | |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 45 | #define __smp_store_release(p, v) \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 46 | do { \ |
| 47 | compiletime_assert_atomic_type(*p); \ |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 48 | __smp_mb(); \ |
Andrey Konovalov | 76695af | 2015-08-02 17:11:04 +0200 | [diff] [blame] | 49 | WRITE_ONCE(*p, v); \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 50 | } while (0) |
| 51 | |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 52 | #define __smp_load_acquire(p) \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 53 | ({ \ |
Andrey Konovalov | 76695af | 2015-08-02 17:11:04 +0200 | [diff] [blame] | 54 | typeof(*p) ___p1 = READ_ONCE(*p); \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 55 | compiletime_assert_atomic_type(*p); \ |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 56 | __smp_mb(); \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 57 | ___p1; \ |
| 58 | }) |
| 59 | |
| 60 | #else /* regular x86 TSO memory ordering */ |
| 61 | |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 62 | #define __smp_store_release(p, v) \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 63 | do { \ |
| 64 | compiletime_assert_atomic_type(*p); \ |
| 65 | barrier(); \ |
Andrey Konovalov | 76695af | 2015-08-02 17:11:04 +0200 | [diff] [blame] | 66 | WRITE_ONCE(*p, v); \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 67 | } while (0) |
| 68 | |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 69 | #define __smp_load_acquire(p) \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 70 | ({ \ |
Andrey Konovalov | 76695af | 2015-08-02 17:11:04 +0200 | [diff] [blame] | 71 | typeof(*p) ___p1 = READ_ONCE(*p); \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 72 | compiletime_assert_atomic_type(*p); \ |
| 73 | barrier(); \ |
| 74 | ___p1; \ |
| 75 | }) |
| 76 | |
David Howells | f05e798 | 2012-03-28 18:11:12 +0100 | [diff] [blame] | 77 | #endif |
| 78 | |
Peter Zijlstra | d00a569 | 2014-03-13 19:00:35 +0100 | [diff] [blame] | 79 | /* Atomic operations are already serializing on x86 */ |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 80 | #define __smp_mb__before_atomic() barrier() |
| 81 | #define __smp_mb__after_atomic() barrier() |
Peter Zijlstra | d00a569 | 2014-03-13 19:00:35 +0100 | [diff] [blame] | 82 | |
Michael S. Tsirkin | 300b06d | 2015-12-21 09:22:18 +0200 | [diff] [blame] | 83 | #include <asm-generic/barrier.h> |
| 84 | |
David Howells | f05e798 | 2012-03-28 18:11:12 +0100 | [diff] [blame] | 85 | #endif /* _ASM_X86_BARRIER_H */ |