Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 1 | /* |
| 2 | * FB driver for the S6D02A1 LCD Controller |
| 3 | * |
| 4 | * Based on fb_st7735r.c by Noralf Tronnes |
| 5 | * Init code from UTFT library by Henning Karlsen |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/init.h> |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 21 | #include <video/mipi_display.h> |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 22 | |
| 23 | #include "fbtft.h" |
| 24 | |
| 25 | #define DRVNAME "fb_s6d02a1" |
| 26 | |
| 27 | static int default_init_sequence[] = { |
| 28 | |
| 29 | -1, 0xf0, 0x5a, 0x5a, |
| 30 | |
| 31 | -1, 0xfc, 0x5a, 0x5a, |
| 32 | |
| 33 | -1, 0xfa, 0x02, 0x1f, 0x00, 0x10, 0x22, 0x30, 0x38, 0x3A, 0x3A, 0x3A, 0x3A, 0x3A, 0x3d, 0x02, 0x01, |
| 34 | |
| 35 | -1, 0xfb, 0x21, 0x00, 0x02, 0x04, 0x07, 0x0a, 0x0b, 0x0c, 0x0c, 0x16, 0x1e, 0x30, 0x3f, 0x01, 0x02, |
| 36 | |
| 37 | /* power setting sequence */ |
| 38 | -1, 0xfd, 0x00, 0x00, 0x00, 0x17, 0x10, 0x00, 0x01, 0x01, 0x00, 0x1f, 0x1f, |
| 39 | |
| 40 | -1, 0xf4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x3f, 0x07, 0x00, 0x3C, 0x36, 0x00, 0x3C, 0x36, 0x00, |
| 41 | |
| 42 | -1, 0xf5, 0x00, 0x70, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6d, 0x66, 0x06, |
| 43 | |
| 44 | -1, 0xf6, 0x02, 0x00, 0x3f, 0x00, 0x00, 0x00, 0x02, 0x00, 0x06, 0x01, 0x00, |
| 45 | |
| 46 | -1, 0xf2, 0x00, 0x01, 0x03, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x04, 0x08, 0x08, |
| 47 | |
| 48 | -1, 0xf8, 0x11, |
| 49 | |
| 50 | -1, 0xf7, 0xc8, 0x20, 0x00, 0x00, |
| 51 | |
| 52 | -1, 0xf3, 0x00, 0x00, |
| 53 | |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 54 | -1, MIPI_DCS_EXIT_SLEEP_MODE, |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 55 | -2, 50, |
| 56 | |
| 57 | -1, 0xf3, 0x00, 0x01, |
| 58 | -2, 50, |
| 59 | -1, 0xf3, 0x00, 0x03, |
| 60 | -2, 50, |
| 61 | -1, 0xf3, 0x00, 0x07, |
| 62 | -2, 50, |
| 63 | -1, 0xf3, 0x00, 0x0f, |
| 64 | -2, 50, |
| 65 | |
| 66 | -1, 0xf4, 0x00, 0x04, 0x00, 0x00, 0x00, 0x3f, 0x3f, 0x07, 0x00, 0x3C, 0x36, 0x00, 0x3C, 0x36, 0x00, |
| 67 | -2, 50, |
| 68 | |
| 69 | -1, 0xf3, 0x00, 0x1f, |
| 70 | -2, 50, |
| 71 | -1, 0xf3, 0x00, 0x7f, |
| 72 | -2, 50, |
| 73 | |
| 74 | -1, 0xf3, 0x00, 0xff, |
| 75 | -2, 50, |
| 76 | |
| 77 | -1, 0xfd, 0x00, 0x00, 0x00, 0x17, 0x10, 0x00, 0x00, 0x01, 0x00, 0x16, 0x16, |
| 78 | |
| 79 | -1, 0xf4, 0x00, 0x09, 0x00, 0x00, 0x00, 0x3f, 0x3f, 0x07, 0x00, 0x3C, 0x36, 0x00, 0x3C, 0x36, 0x00, |
| 80 | |
| 81 | /* initializing sequence */ |
| 82 | |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 83 | -1, MIPI_DCS_SET_ADDRESS_MODE, 0x08, |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 84 | |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 85 | -1, MIPI_DCS_SET_TEAR_ON, 0x00, |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 86 | |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 87 | -1, MIPI_DCS_SET_PIXEL_FORMAT, 0x05, |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 88 | |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 89 | /* gamma setting - possible values 0x01, 0x02, 0x04, 0x08 */ |
| 90 | -1, MIPI_DCS_SET_GAMMA_CURVE, 0x01, |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 91 | |
| 92 | -2, 150, |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 93 | -1, MIPI_DCS_SET_DISPLAY_ON, |
| 94 | -1, MIPI_DCS_WRITE_MEMORY_START, |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 95 | /* end marker */ |
| 96 | -3 |
| 97 | |
| 98 | }; |
| 99 | |
| 100 | static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) |
| 101 | { |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 102 | write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, |
| 103 | xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF); |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 104 | |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 105 | write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, |
| 106 | ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF); |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 107 | |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 108 | write_reg(par, MIPI_DCS_WRITE_MEMORY_START); |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 109 | } |
| 110 | |
Anish Bhatt | e6ea202 | 2015-09-03 00:53:33 -0700 | [diff] [blame] | 111 | #define MY BIT(7) |
| 112 | #define MX BIT(6) |
| 113 | #define MV BIT(5) |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 114 | static int set_var(struct fbtft_par *par) |
| 115 | { |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 116 | /* Memory data access control (0x36h) |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 117 | RGB/BGR: |
| 118 | 1. Mode selection pin SRGB |
| 119 | RGB H/W pin for color filter setting: 0=RGB, 1=BGR |
| 120 | 2. MADCTL RGB bit |
| 121 | RGB-BGR ORDER color filter panel: 0=RGB, 1=BGR */ |
| 122 | switch (par->info->var.rotate) { |
| 123 | case 0: |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 124 | write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, |
| 125 | MX | MY | (par->bgr << 3)); |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 126 | break; |
| 127 | case 270: |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 128 | write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, |
| 129 | MY | MV | (par->bgr << 3)); |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 130 | break; |
| 131 | case 180: |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 132 | write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, |
| 133 | par->bgr << 3); |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 134 | break; |
| 135 | case 90: |
Priit Laes | 3d6924d | 2015-12-20 20:36:03 +0200 | [diff] [blame] | 136 | write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, |
| 137 | MX | MV | (par->bgr << 3)); |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 138 | break; |
| 139 | } |
| 140 | |
| 141 | return 0; |
| 142 | } |
| 143 | |
| 144 | static struct fbtft_display display = { |
| 145 | .regwidth = 8, |
| 146 | .width = 128, |
| 147 | .height = 160, |
| 148 | .init_sequence = default_init_sequence, |
| 149 | .fbtftops = { |
| 150 | .set_addr_win = set_addr_win, |
| 151 | .set_var = set_var, |
| 152 | }, |
| 153 | }; |
Anish Bhatt | 1014c2c | 2015-09-03 00:53:36 -0700 | [diff] [blame] | 154 | |
Thomas Petazzoni | 910968f | 2014-12-31 10:11:23 +0100 | [diff] [blame] | 155 | FBTFT_REGISTER_DRIVER(DRVNAME, "samsung,s6d02a1", &display); |
| 156 | |
| 157 | MODULE_ALIAS("spi:" DRVNAME); |
| 158 | MODULE_ALIAS("platform:" DRVNAME); |
| 159 | MODULE_ALIAS("spi:s6d02a1"); |
| 160 | MODULE_ALIAS("platform:s6d02a1"); |
| 161 | |
| 162 | MODULE_DESCRIPTION("FB driver for the S6D02A1 LCD Controller"); |
| 163 | MODULE_AUTHOR("WOLFGANG BUENING"); |
| 164 | MODULE_LICENSE("GPL"); |