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Eric W. Biederman3b7d1922006-10-04 02:16:59 -07001#ifndef LINUX_MSI_H
2#define LINUX_MSI_H
3
Neil Hormanb50cac52011-10-06 14:08:18 -04004#include <linux/kobject.h>
Michael Ellerman4aa9bc92007-04-05 17:19:10 +10005#include <linux/list.h>
6
Eric W. Biederman3b7d1922006-10-04 02:16:59 -07007struct msi_msg {
8 u32 address_lo; /* low 32 bits of msi message address */
9 u32 address_hi; /* high 32 bits of msi message address */
10 u32 data; /* 16 bits of msi message data */
11};
12
Yijing Wang38737d82014-10-27 10:44:36 +080013extern int pci_msi_ignore_mask;
Satoru Takeuchic54c1872007-01-18 13:50:05 +090014/* Helper functions */
Thomas Gleixner1c9db522010-09-28 16:46:51 +020015struct irq_data;
Thomas Gleixner39431ac2010-09-28 19:09:51 +020016struct msi_desc;
Bjorn Helgaas2366d062013-04-18 10:55:46 -060017void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
Bjorn Helgaas2366d062013-04-18 10:55:46 -060018void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
Jiang Liu891d4a42014-11-09 23:10:33 +080019
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070020struct msi_desc {
21 struct {
Matthew Wilcox24d27552009-03-17 08:54:06 -040022 __u8 is_msix : 1;
Yijing Wang31ea5d42014-06-19 16:30:30 +080023 __u8 multiple: 3; /* log2 num of messages allocated */
24 __u8 multi_cap : 3; /* log2 num of messages supported */
Bjorn Helgaasf7625982013-11-14 11:28:18 -070025 __u8 maskbit : 1; /* mask-pending bit supported ? */
26 __u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */
Bjorn Helgaasf7625982013-11-14 11:28:18 -070027 __u16 entry_nr; /* specific enabled entry */
28 unsigned default_irq; /* default pre-assigned irq */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -040029 } msi_attrib;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070030
Matthew Wilcoxf2440d92009-03-17 08:54:09 -040031 u32 masked; /* mask bits */
Michael Ellerman4aa9bc92007-04-05 17:19:10 +100032 unsigned int irq;
Alexander Gordeev65f6ae62013-05-13 11:05:48 +020033 unsigned int nvec_used; /* number of messages */
Michael Ellerman4aa9bc92007-04-05 17:19:10 +100034 struct list_head list;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070035
Matthew Wilcox264d9ca2009-03-17 08:54:08 -040036 union {
37 void __iomem *mask_base;
38 u8 mask_pos;
39 };
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070040 struct pci_dev *dev;
41
Eric W. Biederman392ee1e2007-03-08 13:04:57 -070042 /* Last set MSI message */
43 struct msi_msg msg;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070044};
45
Jiang Liud31eb342014-11-15 22:24:03 +080046/* Helpers to hide struct msi_desc implementation details */
47#define msi_desc_to_dev(desc) (&(desc)->dev.dev)
48#define dev_to_msi_list(dev) (&to_pci_dev((dev))->msi_list)
49#define first_msi_entry(dev) \
50 list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
51#define for_each_msi_entry(desc, dev) \
52 list_for_each_entry((desc), dev_to_msi_list((dev)), list)
53
54#ifdef CONFIG_PCI_MSI
55#define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
56#define for_each_pci_msi_entry(desc, pdev) \
57 for_each_msi_entry((desc), &(pdev)->dev)
58
59static inline struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc)
60{
61 return desc->dev;
62}
63#endif /* CONFIG_PCI_MSI */
64
Jiang Liu891d4a42014-11-09 23:10:33 +080065void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
Jiang Liu83a18912014-11-09 23:10:34 +080066void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
67void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
68
Thomas Gleixner23ed8d52014-11-23 11:55:58 +010069u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
70u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
71void pci_msi_mask_irq(struct irq_data *data);
72void pci_msi_unmask_irq(struct irq_data *data);
73
Jiang Liu83a18912014-11-09 23:10:34 +080074/* Conversion helpers. Should be removed after merging */
75static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
76{
77 __pci_write_msi_msg(entry, msg);
78}
79static inline void write_msi_msg(int irq, struct msi_msg *msg)
80{
81 pci_write_msi_msg(irq, msg);
82}
Thomas Gleixner23ed8d52014-11-23 11:55:58 +010083static inline void mask_msi_irq(struct irq_data *data)
84{
85 pci_msi_mask_irq(data);
86}
87static inline void unmask_msi_irq(struct irq_data *data)
88{
89 pci_msi_unmask_irq(data);
90}
Jiang Liu891d4a42014-11-09 23:10:33 +080091
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070092/*
Thomas Petazzoni4287d822013-08-09 22:27:06 +020093 * The arch hooks to setup up msi irqs. Those functions are
94 * implemented as weak symbols so that they /can/ be overriden by
95 * architecture specific code if needed.
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070096 */
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -070097int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070098void arch_teardown_msi_irq(unsigned int irq);
Bjorn Helgaas2366d062013-04-18 10:55:46 -060099int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
100void arch_teardown_msi_irqs(struct pci_dev *dev);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800101void arch_restore_msi_irqs(struct pci_dev *dev);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200102
103void default_teardown_msi_irqs(struct pci_dev *dev);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800104void default_restore_msi_irqs(struct pci_dev *dev);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700105
Yijing Wangc2791b82014-11-11 17:45:45 -0700106struct msi_controller {
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200107 struct module *owner;
108 struct device *dev;
Thomas Petazzoni0d5a6db2013-08-09 22:27:09 +0200109 struct device_node *of_node;
110 struct list_head list;
Marc Zyngier020c3122014-11-15 10:49:12 +0000111#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
112 struct irq_domain *domain;
113#endif
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200114
Yijing Wangc2791b82014-11-11 17:45:45 -0700115 int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200116 struct msi_desc *desc);
Yijing Wangc2791b82014-11-11 17:45:45 -0700117 void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200118};
119
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100120#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
Jiang Liud9109692014-11-15 22:24:04 +0800121
Jiang Liuaeeb5962014-11-15 22:24:05 +0800122#include <linux/irqhandler.h>
Jiang Liud9109692014-11-15 22:24:04 +0800123#include <asm/msi.h>
124
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100125struct irq_domain;
126struct irq_chip;
127struct device_node;
128struct msi_domain_info;
129
130/**
131 * struct msi_domain_ops - MSI interrupt domain callbacks
132 * @get_hwirq: Retrieve the resulting hw irq number
133 * @msi_init: Domain specific init function for MSI interrupts
134 * @msi_free: Domain specific function to free a MSI interrupts
Jiang Liud9109692014-11-15 22:24:04 +0800135 * @msi_check: Callback for verification of the domain/info/dev data
136 * @msi_prepare: Prepare the allocation of the interrupts in the domain
137 * @msi_finish: Optional callbacl to finalize the allocation
138 * @set_desc: Set the msi descriptor for an interrupt
139 * @handle_error: Optional error handler if the allocation fails
140 *
141 * @get_hwirq, @msi_init and @msi_free are callbacks used by
142 * msi_create_irq_domain() and related interfaces
143 *
144 * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
145 * are callbacks used by msi_irq_domain_alloc_irqs() and related
146 * interfaces which are based on msi_desc.
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100147 */
148struct msi_domain_ops {
Jiang Liuaeeb5962014-11-15 22:24:05 +0800149 irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
150 msi_alloc_info_t *arg);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100151 int (*msi_init)(struct irq_domain *domain,
152 struct msi_domain_info *info,
153 unsigned int virq, irq_hw_number_t hwirq,
Jiang Liuaeeb5962014-11-15 22:24:05 +0800154 msi_alloc_info_t *arg);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100155 void (*msi_free)(struct irq_domain *domain,
156 struct msi_domain_info *info,
157 unsigned int virq);
Jiang Liud9109692014-11-15 22:24:04 +0800158 int (*msi_check)(struct irq_domain *domain,
159 struct msi_domain_info *info,
160 struct device *dev);
161 int (*msi_prepare)(struct irq_domain *domain,
162 struct device *dev, int nvec,
163 msi_alloc_info_t *arg);
164 void (*msi_finish)(msi_alloc_info_t *arg, int retval);
165 void (*set_desc)(msi_alloc_info_t *arg,
166 struct msi_desc *desc);
167 int (*handle_error)(struct irq_domain *domain,
168 struct msi_desc *desc, int error);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100169};
170
171/**
172 * struct msi_domain_info - MSI interrupt domain data
Jiang Liuaeeb5962014-11-15 22:24:05 +0800173 * @flags: Flags to decribe features and capabilities
174 * @ops: The callback data structure
175 * @chip: Optional: associated interrupt chip
176 * @chip_data: Optional: associated interrupt chip data
177 * @handler: Optional: associated interrupt flow handler
178 * @handler_data: Optional: associated interrupt flow handler data
179 * @handler_name: Optional: associated interrupt flow handler name
180 * @data: Optional: domain specific data
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100181 */
182struct msi_domain_info {
Jiang Liuaeeb5962014-11-15 22:24:05 +0800183 u32 flags;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100184 struct msi_domain_ops *ops;
185 struct irq_chip *chip;
Jiang Liuaeeb5962014-11-15 22:24:05 +0800186 void *chip_data;
187 irq_flow_handler_t handler;
188 void *handler_data;
189 const char *handler_name;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100190 void *data;
191};
192
Jiang Liuaeeb5962014-11-15 22:24:05 +0800193/* Flags for msi_domain_info */
194enum {
195 /*
196 * Init non implemented ops callbacks with default MSI domain
197 * callbacks.
198 */
199 MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
200 /*
201 * Init non implemented chip callbacks with default MSI chip
202 * callbacks.
203 */
204 MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
205 /* Build identity map between hwirq and irq */
206 MSI_FLAG_IDENTITY_MAP = (1 << 2),
207 /* Support multiple PCI MSI interrupts */
208 MSI_FLAG_MULTI_PCI_MSI = (1 << 3),
209 /* Support PCI MSIX interrupts */
210 MSI_FLAG_PCI_MSIX = (1 << 4),
211};
212
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100213int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
214 bool force);
215
216struct irq_domain *msi_create_irq_domain(struct device_node *of_node,
217 struct msi_domain_info *info,
218 struct irq_domain *parent);
Jiang Liud9109692014-11-15 22:24:04 +0800219int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
220 int nvec);
221void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100222struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
223
224#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
225
Jiang Liu3878eae2014-11-11 21:02:18 +0800226#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
227void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
228struct irq_domain *pci_msi_create_irq_domain(struct device_node *node,
229 struct msi_domain_info *info,
230 struct irq_domain *parent);
231int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
232 int nvec, int type);
233void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev);
Jiang Liu8e047ad2014-11-15 22:24:07 +0800234struct irq_domain *pci_msi_create_default_irq_domain(struct device_node *node,
235 struct msi_domain_info *info, struct irq_domain *parent);
236
Jiang Liu3878eae2014-11-11 21:02:18 +0800237irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
238 struct msi_desc *desc);
239int pci_msi_domain_check_cap(struct irq_domain *domain,
240 struct msi_domain_info *info, struct device *dev);
241#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
242
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700243#endif /* LINUX_MSI_H */