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gerrit-public.fairphone.software / kernel / msm-4.9 / e5051b8472c2fde91e44d906c9a2e516a10b60b2 / . / arch / arm / boot / dts / spear3xx.dtsi
blob: c2a852d43c4895fe543b0849f9580d594bca4531 [file] [log] [blame]
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]1/*
2 * DTS file for all SPEAr3xx SoCs
3 *
Viresh Kumar10d89352012-06-20 12:53:02 -0700[diff] [blame]4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/include/ "skeleton.dtsi"
15
16/ {
17 interrupt-parent = <&vic>;
18
19 cpus {
20 cpu@0 {
21 compatible = "arm,arm926ejs";
22 };
23 };
24
25 memory {
26 device_type = "memory";
27 reg = <0 0x40000000>;
28 };
29
30 ahb {
31 #address-cells = <1>;
32 #size-cells = <1>;
33 compatible = "simple-bus";
34 ranges = <0xd0000000 0xd0000000 0x30000000>;
35
36 vic: interrupt-controller@f1100000 {
37 compatible = "arm,pl190-vic";
38 interrupt-controller;
39 reg = <0xf1100000 0x1000>;
40 #interrupt-cells = <1>;
41 };
42
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530[diff] [blame]43 dma@fc400000 {
44 compatible = "arm,pl080", "arm,primecell";
45 reg = <0xfc400000 0x1000>;
46 interrupt-parent = <&vic>;
47 interrupts = <8>;
48 status = "disabled";
49 };
50
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]51 gmac: eth@e0800000 {
52 compatible = "st,spear600-gmac";
53 reg = <0xe0800000 0x8000>;
54 interrupts = <23 22>;
55 interrupt-names = "macirq", "eth_wake_irq";
Deepak Sikri4c7a0782012-08-09 13:18:40 +0530[diff] [blame]56 phy-mode = "mii";
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]57 status = "disabled";
58 };
59
60 smi: flash@fc000000 {
61 compatible = "st,spear600-smi";
62 #address-cells = <1>;
63 #size-cells = <1>;
64 reg = <0xfc000000 0x1000>;
65 interrupts = <9>;
66 status = "disabled";
67 };
68
69 spi0: spi@d0100000 {
70 compatible = "arm,pl022", "arm,primecell";
71 reg = <0xd0100000 0x1000>;
72 interrupts = <20>;
Shiraz Hashim8113ba92012-11-10 17:31:01 +0530[diff] [blame]73 #address-cells = <1>;
74 #size-cells = <0>;
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]75 status = "disabled";
76 };
77
78 ehci@e1800000 {
79 compatible = "st,spear600-ehci", "usb-ehci";
80 reg = <0xe1800000 0x1000>;
81 interrupts = <26>;
82 status = "disabled";
83 };
84
85 ohci@e1900000 {
86 compatible = "st,spear600-ohci", "usb-ohci";
87 reg = <0xe1900000 0x1000>;
88 interrupts = <25>;
89 status = "disabled";
90 };
91
92 ohci@e2100000 {
93 compatible = "st,spear600-ohci", "usb-ohci";
94 reg = <0xe2100000 0x1000>;
95 interrupts = <27>;
96 status = "disabled";
97 };
98
99 apb {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 compatible = "simple-bus";
103 ranges = <0xd0000000 0xd0000000 0x30000000>;
104
105 gpio0: gpio@fc980000 {
106 compatible = "arm,pl061", "arm,primecell";
107 reg = <0xfc980000 0x1000>;
108 interrupts = <11>;
109 gpio-controller;
110 #gpio-cells = <2>;
111 interrupt-controller;
112 #interrupt-cells = <2>;
113 status = "disabled";
114 };
115
116 i2c0: i2c@d0180000 {
117 #address-cells = <1>;
118 #size-cells = <0>;
119 compatible = "snps,designware-i2c";
120 reg = <0xd0180000 0x1000>;
121 interrupts = <21>;
122 status = "disabled";
123 };
124
125 rtc@fc900000 {
Vipul Kumar Samarf631b9842012-07-05 11:51:47 +0800[diff] [blame]126 compatible = "st,spear600-rtc";
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]127 reg = <0xfc900000 0x1000>;
128 interrupts = <10>;
129 status = "disabled";
130 };
131
132 serial@d0000000 {
133 compatible = "arm,pl011", "arm,primecell";
134 reg = <0xd0000000 0x1000>;
135 interrupts = <19>;
136 status = "disabled";
137 };
138
139 wdt@fc880000 {
140 compatible = "arm,sp805", "arm,primecell";
141 reg = <0xfc880000 0x1000>;
142 interrupts = <12>;
143 status = "disabled";
144 };
Viresh Kumar30551c02012-04-21 13:15:37 +0530[diff] [blame]145
146 timer@f0000000 {
147 compatible = "st,spear-timer";
148 reg = <0xf0000000 0x400>;
149 interrupts = <2>;
150 };
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530[diff] [blame]151 };
152 };
153};