| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 2004 MontaVista Software Inc. |
| 7 | * Author: Manish Lachwani, mlachwani@mvista.com |
| 8 | * Copyright (C) 2004 Ralf Baechle |
| 9 | */ |
| 10 | #ifndef __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H |
| 11 | #define __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H |
| 12 | |
| 13 | /* |
| 14 | * Momentum Ocelot-3 is based on Rm7900 processor which |
| 15 | * is based on the E9000 core. |
| 16 | */ |
| 17 | #define cpu_has_watch 1 |
| 18 | #define cpu_has_mips16 0 |
| 19 | #define cpu_has_divec 0 |
| 20 | #define cpu_has_vce 0 |
| 21 | #define cpu_has_cache_cdex_p 0 |
| 22 | #define cpu_has_cache_cdex_s 0 |
| 23 | #define cpu_has_prefetch 1 |
| 24 | #define cpu_has_mcheck 0 |
| 25 | #define cpu_has_ejtag 0 |
| 26 | |
| 27 | #define cpu_has_llsc 1 |
| 28 | #define cpu_has_vtag_icache 0 |
| 29 | #define cpu_has_dc_aliases 0 |
| 30 | #define cpu_has_ic_fills_f_dc 0 |
| Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame^] | 31 | #define cpu_has_dsp 0 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | #define cpu_icache_snoops_remote_store 0 |
| 33 | |
| 34 | #define cpu_has_nofpuex 0 |
| 35 | #define cpu_has_64bits 1 |
| 36 | |
| 37 | #define cpu_has_subset_pcaches 0 |
| 38 | |
| 39 | #define cpu_dcache_line_size() 32 |
| 40 | #define cpu_icache_line_size() 32 |
| 41 | #define cpu_scache_line_size() 32 |
| 42 | |
| 43 | /* |
| 44 | * On the RM9000 we need to ensure that I-cache lines being fetches only |
| 45 | * contain valid instructions are funny things will happen. |
| 46 | */ |
| 47 | #define PLAT_TRAMPOLINE_STUFF_LINE 32UL |
| 48 | |
| 49 | #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ |