arch/arm/boot/dts/omap3-igep.dtsi

/*
 * Device Tree Source for IGEP Technology devices
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "omap34xx.dtsi"

/ {
	memory {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "igep2";
		ti,mcbsp = <&mcbsp2>;
		ti,codec = <&twl_audio>;
	};
};

&omap3_pmx_core {
	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			0x152 (PIN_INPUT | MUX_MODE0)		/* uart1_rx.uart1_rx */
			0x14c (PIN_OUTPUT |MUX_MODE0)		/* uart1_tx.uart1_tx */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			0x14a (PIN_INPUT | MUX_MODE0)		/* uart2_rx.uart2_rx */
			0x148 (PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			0x16e (PIN_INPUT | MUX_MODE0)		/* uart3_rx.uart3_rx */
			0x170 (PIN_OUTPUT | MUX_MODE0)		/* uart3_tx.uart3_tx */
		>;
	};

	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			0x10c (PIN_INPUT | MUX_MODE0)		/* mcbsp2_fsx.mcbsp2_fsx */
			0x10e (PIN_INPUT | MUX_MODE0)		/* mcbsp2_clkx.mcbsp2_clkx */
			0x110 (PIN_INPUT | MUX_MODE0)		/* mcbsp2_dr.mcbsp2.dr */
			0x112 (PIN_OUTPUT | MUX_MODE0)		/* mcbsp2_dx.mcbsp2_dx */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x114 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
			0x116 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
			0x118 (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat0.sdmmc1_dat0 */
			0x11a (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
			0x11c (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
			0x11e (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
			0x120 (PIN_INPUT | MUX_MODE0)		/* sdmmc1_dat4.sdmmc1_dat4 */
			0x122 (PIN_INPUT | MUX_MODE0)		/* sdmmc1_dat5.sdmmc1_dat5 */
			0x124 (PIN_INPUT | MUX_MODE0)		/* sdmmc1_dat6.sdmmc1_dat6 */
			0x126 (PIN_INPUT | MUX_MODE0)		/* sdmmc1_dat7.sdmmc1_dat7 */
		>;
	};

	smsc911x_pins: pinmux_smsc911x_pins {
		pinctrl-single,pins = <
			0x1a2 (PIN_INPUT | MUX_MODE4)		/* mcspi1_cs2.gpio_176 */
		>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			      };
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c2 {
	clock-frequency = <400000>;
};

&mcbsp2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
};

&mmc1 {
      pinctrl-names = "default";
      pinctrl-0 = <&mmc1_pins>;
      vmmc-supply = <&vmmc1>;
      vmmc_aux-supply = <&vsim>;
      bus-width = <8>;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&uart1 {
       pinctrl-names = "default";
       pinctrl-0 = <&uart1_pins>;
};

&uart2 {
       pinctrl-names = "default";
       pinctrl-0 = <&uart2_pins>;
};

&uart3 {
       pinctrl-names = "default";
       pinctrl-0 = <&uart3_pins>;
};

&twl_gpio {
	ti,use-leds;
};