Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * The driver for the ForteMedia FM801 based soundcards |
| 3 | * Copyright (c) by Jaroslav Kysela <perex@suse.cz> |
| 4 | * |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | * |
| 20 | */ |
| 21 | |
| 22 | #include <sound/driver.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/init.h> |
| 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/pci.h> |
| 27 | #include <linux/slab.h> |
| 28 | #include <linux/moduleparam.h> |
| 29 | #include <sound/core.h> |
| 30 | #include <sound/pcm.h> |
| 31 | #include <sound/ac97_codec.h> |
| 32 | #include <sound/mpu401.h> |
| 33 | #include <sound/opl3.h> |
| 34 | #include <sound/initval.h> |
| 35 | |
| 36 | #include <asm/io.h> |
| 37 | |
| 38 | #if (defined(CONFIG_SND_FM801_TEA575X) || defined(CONFIG_SND_FM801_TEA575X_MODULE)) && (defined(CONFIG_VIDEO_DEV) || defined(CONFIG_VIDEO_DEV_MODULE)) |
| 39 | #include <sound/tea575x-tuner.h> |
| 40 | #define TEA575X_RADIO 1 |
| 41 | #endif |
| 42 | |
| 43 | MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); |
| 44 | MODULE_DESCRIPTION("ForteMedia FM801"); |
| 45 | MODULE_LICENSE("GPL"); |
| 46 | MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801}," |
| 47 | "{Genius,SoundMaker Live 5.1}}"); |
| 48 | |
| 49 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ |
| 50 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ |
| 51 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ |
| 52 | /* |
| 53 | * Enable TEA575x tuner |
| 54 | * 1 = MediaForte 256-PCS |
| 55 | * 2 = MediaForte 256-PCPR |
| 56 | * 3 = MediaForte 64-PCR |
| 57 | * High 16-bits are video (radio) device number + 1 |
| 58 | */ |
| 59 | static int tea575x_tuner[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; |
| 60 | |
| 61 | module_param_array(index, int, NULL, 0444); |
| 62 | MODULE_PARM_DESC(index, "Index value for the FM801 soundcard."); |
| 63 | module_param_array(id, charp, NULL, 0444); |
| 64 | MODULE_PARM_DESC(id, "ID string for the FM801 soundcard."); |
| 65 | module_param_array(enable, bool, NULL, 0444); |
| 66 | MODULE_PARM_DESC(enable, "Enable FM801 soundcard."); |
| 67 | module_param_array(tea575x_tuner, int, NULL, 0444); |
| 68 | MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner."); |
| 69 | |
| 70 | /* |
| 71 | * Direct registers |
| 72 | */ |
| 73 | |
| 74 | #define FM801_REG(chip, reg) (chip->port + FM801_##reg) |
| 75 | |
| 76 | #define FM801_PCM_VOL 0x00 /* PCM Output Volume */ |
| 77 | #define FM801_FM_VOL 0x02 /* FM Output Volume */ |
| 78 | #define FM801_I2S_VOL 0x04 /* I2S Volume */ |
| 79 | #define FM801_REC_SRC 0x06 /* Record Source */ |
| 80 | #define FM801_PLY_CTRL 0x08 /* Playback Control */ |
| 81 | #define FM801_PLY_COUNT 0x0a /* Playback Count */ |
| 82 | #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */ |
| 83 | #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */ |
| 84 | #define FM801_CAP_CTRL 0x14 /* Capture Control */ |
| 85 | #define FM801_CAP_COUNT 0x16 /* Capture Count */ |
| 86 | #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */ |
| 87 | #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */ |
| 88 | #define FM801_CODEC_CTRL 0x22 /* Codec Control */ |
| 89 | #define FM801_I2S_MODE 0x24 /* I2S Mode Control */ |
| 90 | #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */ |
| 91 | #define FM801_I2C_CTRL 0x29 /* I2C Control */ |
| 92 | #define FM801_AC97_CMD 0x2a /* AC'97 Command */ |
| 93 | #define FM801_AC97_DATA 0x2c /* AC'97 Data */ |
| 94 | #define FM801_MPU401_DATA 0x30 /* MPU401 Data */ |
| 95 | #define FM801_MPU401_CMD 0x31 /* MPU401 Command */ |
| 96 | #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */ |
| 97 | #define FM801_GEN_CTRL 0x54 /* General Control */ |
| 98 | #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */ |
| 99 | #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */ |
| 100 | #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */ |
| 101 | #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */ |
| 102 | #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */ |
| 103 | #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */ |
| 104 | #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */ |
| 105 | |
| 106 | #define FM801_AC97_ADDR_SHIFT 10 |
| 107 | |
| 108 | /* playback and record control register bits */ |
| 109 | #define FM801_BUF1_LAST (1<<1) |
| 110 | #define FM801_BUF2_LAST (1<<2) |
| 111 | #define FM801_START (1<<5) |
| 112 | #define FM801_PAUSE (1<<6) |
| 113 | #define FM801_IMMED_STOP (1<<7) |
| 114 | #define FM801_RATE_SHIFT 8 |
| 115 | #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT) |
| 116 | #define FM801_CHANNELS_4 (1<<12) /* playback only */ |
| 117 | #define FM801_CHANNELS_6 (2<<12) /* playback only */ |
| 118 | #define FM801_CHANNELS_6MS (3<<12) /* playback only */ |
| 119 | #define FM801_CHANNELS_MASK (3<<12) |
| 120 | #define FM801_16BIT (1<<14) |
| 121 | #define FM801_STEREO (1<<15) |
| 122 | |
| 123 | /* IRQ status bits */ |
| 124 | #define FM801_IRQ_PLAYBACK (1<<8) |
| 125 | #define FM801_IRQ_CAPTURE (1<<9) |
| 126 | #define FM801_IRQ_VOLUME (1<<14) |
| 127 | #define FM801_IRQ_MPU (1<<15) |
| 128 | |
| 129 | /* GPIO control register */ |
| 130 | #define FM801_GPIO_GP0 (1<<0) /* read/write */ |
| 131 | #define FM801_GPIO_GP1 (1<<1) |
| 132 | #define FM801_GPIO_GP2 (1<<2) |
| 133 | #define FM801_GPIO_GP3 (1<<3) |
| 134 | #define FM801_GPIO_GP(x) (1<<(0+(x))) |
| 135 | #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/ |
| 136 | #define FM801_GPIO_GD1 (1<<9) |
| 137 | #define FM801_GPIO_GD2 (1<<10) |
| 138 | #define FM801_GPIO_GD3 (1<<11) |
| 139 | #define FM801_GPIO_GD(x) (1<<(8+(x))) |
| 140 | #define FM801_GPIO_GS0 (1<<12) /* function select: */ |
| 141 | #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */ |
| 142 | #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */ |
| 143 | #define FM801_GPIO_GS3 (1<<15) |
| 144 | #define FM801_GPIO_GS(x) (1<<(12+(x))) |
| 145 | |
| 146 | /* |
| 147 | |
| 148 | */ |
| 149 | |
| 150 | typedef struct _snd_fm801 fm801_t; |
| 151 | |
| 152 | struct _snd_fm801 { |
| 153 | int irq; |
| 154 | |
| 155 | unsigned long port; /* I/O port number */ |
| 156 | unsigned int multichannel: 1, /* multichannel support */ |
| 157 | secondary: 1; /* secondary codec */ |
| 158 | unsigned char secondary_addr; /* address of the secondary codec */ |
| 159 | |
| 160 | unsigned short ply_ctrl; /* playback control */ |
| 161 | unsigned short cap_ctrl; /* capture control */ |
| 162 | |
| 163 | unsigned long ply_buffer; |
| 164 | unsigned int ply_buf; |
| 165 | unsigned int ply_count; |
| 166 | unsigned int ply_size; |
| 167 | unsigned int ply_pos; |
| 168 | |
| 169 | unsigned long cap_buffer; |
| 170 | unsigned int cap_buf; |
| 171 | unsigned int cap_count; |
| 172 | unsigned int cap_size; |
| 173 | unsigned int cap_pos; |
| 174 | |
| 175 | ac97_bus_t *ac97_bus; |
| 176 | ac97_t *ac97; |
| 177 | ac97_t *ac97_sec; |
| 178 | |
| 179 | struct pci_dev *pci; |
| 180 | snd_card_t *card; |
| 181 | snd_pcm_t *pcm; |
| 182 | snd_rawmidi_t *rmidi; |
| 183 | snd_pcm_substream_t *playback_substream; |
| 184 | snd_pcm_substream_t *capture_substream; |
| 185 | unsigned int p_dma_size; |
| 186 | unsigned int c_dma_size; |
| 187 | |
| 188 | spinlock_t reg_lock; |
| 189 | snd_info_entry_t *proc_entry; |
| 190 | |
| 191 | #ifdef TEA575X_RADIO |
| 192 | tea575x_t tea; |
| 193 | #endif |
| 194 | }; |
| 195 | |
| 196 | static struct pci_device_id snd_fm801_ids[] = { |
| 197 | { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */ |
Sergey Vlasov | 26be865 | 2005-04-11 14:17:19 +0200 | [diff] [blame] | 198 | { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | { 0, } |
| 200 | }; |
| 201 | |
| 202 | MODULE_DEVICE_TABLE(pci, snd_fm801_ids); |
| 203 | |
| 204 | /* |
| 205 | * common I/O routines |
| 206 | */ |
| 207 | |
| 208 | static int snd_fm801_update_bits(fm801_t *chip, unsigned short reg, |
| 209 | unsigned short mask, unsigned short value) |
| 210 | { |
| 211 | int change; |
| 212 | unsigned long flags; |
| 213 | unsigned short old, new; |
| 214 | |
| 215 | spin_lock_irqsave(&chip->reg_lock, flags); |
| 216 | old = inw(chip->port + reg); |
| 217 | new = (old & ~mask) | value; |
| 218 | change = old != new; |
| 219 | if (change) |
| 220 | outw(new, chip->port + reg); |
| 221 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
| 222 | return change; |
| 223 | } |
| 224 | |
| 225 | static void snd_fm801_codec_write(ac97_t *ac97, |
| 226 | unsigned short reg, |
| 227 | unsigned short val) |
| 228 | { |
| 229 | fm801_t *chip = ac97->private_data; |
| 230 | int idx; |
| 231 | |
| 232 | /* |
| 233 | * Wait until the codec interface is not ready.. |
| 234 | */ |
| 235 | for (idx = 0; idx < 100; idx++) { |
| 236 | if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9))) |
| 237 | goto ok1; |
| 238 | udelay(10); |
| 239 | } |
| 240 | snd_printk("AC'97 interface is busy (1)\n"); |
| 241 | return; |
| 242 | |
| 243 | ok1: |
| 244 | /* write data and address */ |
| 245 | outw(val, FM801_REG(chip, AC97_DATA)); |
| 246 | outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD)); |
| 247 | /* |
| 248 | * Wait until the write command is not completed.. |
| 249 | */ |
| 250 | for (idx = 0; idx < 1000; idx++) { |
| 251 | if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9))) |
| 252 | return; |
| 253 | udelay(10); |
| 254 | } |
| 255 | snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num); |
| 256 | } |
| 257 | |
| 258 | static unsigned short snd_fm801_codec_read(ac97_t *ac97, unsigned short reg) |
| 259 | { |
| 260 | fm801_t *chip = ac97->private_data; |
| 261 | int idx; |
| 262 | |
| 263 | /* |
| 264 | * Wait until the codec interface is not ready.. |
| 265 | */ |
| 266 | for (idx = 0; idx < 100; idx++) { |
| 267 | if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9))) |
| 268 | goto ok1; |
| 269 | udelay(10); |
| 270 | } |
| 271 | snd_printk("AC'97 interface is busy (1)\n"); |
| 272 | return 0; |
| 273 | |
| 274 | ok1: |
| 275 | /* read command */ |
| 276 | outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | (1<<7), FM801_REG(chip, AC97_CMD)); |
| 277 | for (idx = 0; idx < 100; idx++) { |
| 278 | if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9))) |
| 279 | goto ok2; |
| 280 | udelay(10); |
| 281 | } |
| 282 | snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num); |
| 283 | return 0; |
| 284 | |
| 285 | ok2: |
| 286 | for (idx = 0; idx < 1000; idx++) { |
| 287 | if (inw(FM801_REG(chip, AC97_CMD)) & (1<<8)) |
| 288 | goto ok3; |
| 289 | udelay(10); |
| 290 | } |
| 291 | snd_printk("AC'97 interface #%d is not valid (2)\n", ac97->num); |
| 292 | return 0; |
| 293 | |
| 294 | ok3: |
| 295 | return inw(FM801_REG(chip, AC97_DATA)); |
| 296 | } |
| 297 | |
| 298 | static unsigned int rates[] = { |
| 299 | 5500, 8000, 9600, 11025, |
| 300 | 16000, 19200, 22050, 32000, |
| 301 | 38400, 44100, 48000 |
| 302 | }; |
| 303 | |
| 304 | static snd_pcm_hw_constraint_list_t hw_constraints_rates = { |
| 305 | .count = ARRAY_SIZE(rates), |
| 306 | .list = rates, |
| 307 | .mask = 0, |
| 308 | }; |
| 309 | |
| 310 | static unsigned int channels[] = { |
| 311 | 2, 4, 6 |
| 312 | }; |
| 313 | |
| 314 | #define CHANNELS sizeof(channels) / sizeof(channels[0]) |
| 315 | |
| 316 | static snd_pcm_hw_constraint_list_t hw_constraints_channels = { |
| 317 | .count = CHANNELS, |
| 318 | .list = channels, |
| 319 | .mask = 0, |
| 320 | }; |
| 321 | |
| 322 | /* |
| 323 | * Sample rate routines |
| 324 | */ |
| 325 | |
| 326 | static unsigned short snd_fm801_rate_bits(unsigned int rate) |
| 327 | { |
| 328 | unsigned int idx; |
| 329 | |
| 330 | for (idx = 0; idx < ARRAY_SIZE(rates); idx++) |
| 331 | if (rates[idx] == rate) |
| 332 | return idx; |
| 333 | snd_BUG(); |
| 334 | return ARRAY_SIZE(rates) - 1; |
| 335 | } |
| 336 | |
| 337 | /* |
| 338 | * PCM part |
| 339 | */ |
| 340 | |
| 341 | static int snd_fm801_playback_trigger(snd_pcm_substream_t * substream, |
| 342 | int cmd) |
| 343 | { |
| 344 | fm801_t *chip = snd_pcm_substream_chip(substream); |
| 345 | |
| 346 | spin_lock(&chip->reg_lock); |
| 347 | switch (cmd) { |
| 348 | case SNDRV_PCM_TRIGGER_START: |
| 349 | chip->ply_ctrl &= ~(FM801_BUF1_LAST | |
| 350 | FM801_BUF2_LAST | |
| 351 | FM801_PAUSE); |
| 352 | chip->ply_ctrl |= FM801_START | |
| 353 | FM801_IMMED_STOP; |
| 354 | break; |
| 355 | case SNDRV_PCM_TRIGGER_STOP: |
| 356 | chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE); |
| 357 | break; |
| 358 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 359 | chip->ply_ctrl |= FM801_PAUSE; |
| 360 | break; |
| 361 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 362 | chip->ply_ctrl &= ~FM801_PAUSE; |
| 363 | break; |
| 364 | default: |
| 365 | spin_unlock(&chip->reg_lock); |
| 366 | snd_BUG(); |
| 367 | return -EINVAL; |
| 368 | } |
| 369 | outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL)); |
| 370 | spin_unlock(&chip->reg_lock); |
| 371 | return 0; |
| 372 | } |
| 373 | |
| 374 | static int snd_fm801_capture_trigger(snd_pcm_substream_t * substream, |
| 375 | int cmd) |
| 376 | { |
| 377 | fm801_t *chip = snd_pcm_substream_chip(substream); |
| 378 | |
| 379 | spin_lock(&chip->reg_lock); |
| 380 | switch (cmd) { |
| 381 | case SNDRV_PCM_TRIGGER_START: |
| 382 | chip->cap_ctrl &= ~(FM801_BUF1_LAST | |
| 383 | FM801_BUF2_LAST | |
| 384 | FM801_PAUSE); |
| 385 | chip->cap_ctrl |= FM801_START | |
| 386 | FM801_IMMED_STOP; |
| 387 | break; |
| 388 | case SNDRV_PCM_TRIGGER_STOP: |
| 389 | chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE); |
| 390 | break; |
| 391 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 392 | chip->cap_ctrl |= FM801_PAUSE; |
| 393 | break; |
| 394 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 395 | chip->cap_ctrl &= ~FM801_PAUSE; |
| 396 | break; |
| 397 | default: |
| 398 | spin_unlock(&chip->reg_lock); |
| 399 | snd_BUG(); |
| 400 | return -EINVAL; |
| 401 | } |
| 402 | outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL)); |
| 403 | spin_unlock(&chip->reg_lock); |
| 404 | return 0; |
| 405 | } |
| 406 | |
| 407 | static int snd_fm801_hw_params(snd_pcm_substream_t * substream, |
| 408 | snd_pcm_hw_params_t * hw_params) |
| 409 | { |
| 410 | return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); |
| 411 | } |
| 412 | |
| 413 | static int snd_fm801_hw_free(snd_pcm_substream_t * substream) |
| 414 | { |
| 415 | return snd_pcm_lib_free_pages(substream); |
| 416 | } |
| 417 | |
| 418 | static int snd_fm801_playback_prepare(snd_pcm_substream_t * substream) |
| 419 | { |
| 420 | fm801_t *chip = snd_pcm_substream_chip(substream); |
| 421 | snd_pcm_runtime_t *runtime = substream->runtime; |
| 422 | |
| 423 | chip->ply_size = snd_pcm_lib_buffer_bytes(substream); |
| 424 | chip->ply_count = snd_pcm_lib_period_bytes(substream); |
| 425 | spin_lock_irq(&chip->reg_lock); |
| 426 | chip->ply_ctrl &= ~(FM801_START | FM801_16BIT | |
| 427 | FM801_STEREO | FM801_RATE_MASK | |
| 428 | FM801_CHANNELS_MASK); |
| 429 | if (snd_pcm_format_width(runtime->format) == 16) |
| 430 | chip->ply_ctrl |= FM801_16BIT; |
| 431 | if (runtime->channels > 1) { |
| 432 | chip->ply_ctrl |= FM801_STEREO; |
| 433 | if (runtime->channels == 4) |
| 434 | chip->ply_ctrl |= FM801_CHANNELS_4; |
| 435 | else if (runtime->channels == 6) |
| 436 | chip->ply_ctrl |= FM801_CHANNELS_6; |
| 437 | } |
| 438 | chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; |
| 439 | chip->ply_buf = 0; |
| 440 | outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL)); |
| 441 | outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT)); |
| 442 | chip->ply_buffer = runtime->dma_addr; |
| 443 | chip->ply_pos = 0; |
| 444 | outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1)); |
| 445 | outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2)); |
| 446 | spin_unlock_irq(&chip->reg_lock); |
| 447 | return 0; |
| 448 | } |
| 449 | |
| 450 | static int snd_fm801_capture_prepare(snd_pcm_substream_t * substream) |
| 451 | { |
| 452 | fm801_t *chip = snd_pcm_substream_chip(substream); |
| 453 | snd_pcm_runtime_t *runtime = substream->runtime; |
| 454 | |
| 455 | chip->cap_size = snd_pcm_lib_buffer_bytes(substream); |
| 456 | chip->cap_count = snd_pcm_lib_period_bytes(substream); |
| 457 | spin_lock_irq(&chip->reg_lock); |
| 458 | chip->cap_ctrl &= ~(FM801_START | FM801_16BIT | |
| 459 | FM801_STEREO | FM801_RATE_MASK); |
| 460 | if (snd_pcm_format_width(runtime->format) == 16) |
| 461 | chip->cap_ctrl |= FM801_16BIT; |
| 462 | if (runtime->channels > 1) |
| 463 | chip->cap_ctrl |= FM801_STEREO; |
| 464 | chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; |
| 465 | chip->cap_buf = 0; |
| 466 | outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL)); |
| 467 | outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT)); |
| 468 | chip->cap_buffer = runtime->dma_addr; |
| 469 | chip->cap_pos = 0; |
| 470 | outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1)); |
| 471 | outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2)); |
| 472 | spin_unlock_irq(&chip->reg_lock); |
| 473 | return 0; |
| 474 | } |
| 475 | |
| 476 | static snd_pcm_uframes_t snd_fm801_playback_pointer(snd_pcm_substream_t * substream) |
| 477 | { |
| 478 | fm801_t *chip = snd_pcm_substream_chip(substream); |
| 479 | size_t ptr; |
| 480 | |
| 481 | if (!(chip->ply_ctrl & FM801_START)) |
| 482 | return 0; |
| 483 | spin_lock(&chip->reg_lock); |
| 484 | ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT)); |
| 485 | if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) { |
| 486 | ptr += chip->ply_count; |
| 487 | ptr %= chip->ply_size; |
| 488 | } |
| 489 | spin_unlock(&chip->reg_lock); |
| 490 | return bytes_to_frames(substream->runtime, ptr); |
| 491 | } |
| 492 | |
| 493 | static snd_pcm_uframes_t snd_fm801_capture_pointer(snd_pcm_substream_t * substream) |
| 494 | { |
| 495 | fm801_t *chip = snd_pcm_substream_chip(substream); |
| 496 | size_t ptr; |
| 497 | |
| 498 | if (!(chip->cap_ctrl & FM801_START)) |
| 499 | return 0; |
| 500 | spin_lock(&chip->reg_lock); |
| 501 | ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT)); |
| 502 | if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) { |
| 503 | ptr += chip->cap_count; |
| 504 | ptr %= chip->cap_size; |
| 505 | } |
| 506 | spin_unlock(&chip->reg_lock); |
| 507 | return bytes_to_frames(substream->runtime, ptr); |
| 508 | } |
| 509 | |
| 510 | static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
| 511 | { |
| 512 | fm801_t *chip = dev_id; |
| 513 | unsigned short status; |
| 514 | unsigned int tmp; |
| 515 | |
| 516 | status = inw(FM801_REG(chip, IRQ_STATUS)); |
| 517 | status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME; |
| 518 | if (! status) |
| 519 | return IRQ_NONE; |
| 520 | /* ack first */ |
| 521 | outw(status, FM801_REG(chip, IRQ_STATUS)); |
| 522 | if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) { |
| 523 | spin_lock(&chip->reg_lock); |
| 524 | chip->ply_buf++; |
| 525 | chip->ply_pos += chip->ply_count; |
| 526 | chip->ply_pos %= chip->ply_size; |
| 527 | tmp = chip->ply_pos + chip->ply_count; |
| 528 | tmp %= chip->ply_size; |
| 529 | outl(chip->ply_buffer + tmp, |
| 530 | (chip->ply_buf & 1) ? |
| 531 | FM801_REG(chip, PLY_BUF1) : |
| 532 | FM801_REG(chip, PLY_BUF2)); |
| 533 | spin_unlock(&chip->reg_lock); |
| 534 | snd_pcm_period_elapsed(chip->playback_substream); |
| 535 | } |
| 536 | if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) { |
| 537 | spin_lock(&chip->reg_lock); |
| 538 | chip->cap_buf++; |
| 539 | chip->cap_pos += chip->cap_count; |
| 540 | chip->cap_pos %= chip->cap_size; |
| 541 | tmp = chip->cap_pos + chip->cap_count; |
| 542 | tmp %= chip->cap_size; |
| 543 | outl(chip->cap_buffer + tmp, |
| 544 | (chip->cap_buf & 1) ? |
| 545 | FM801_REG(chip, CAP_BUF1) : |
| 546 | FM801_REG(chip, CAP_BUF2)); |
| 547 | spin_unlock(&chip->reg_lock); |
| 548 | snd_pcm_period_elapsed(chip->capture_substream); |
| 549 | } |
| 550 | if (chip->rmidi && (status & FM801_IRQ_MPU)) |
| 551 | snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); |
| 552 | if (status & FM801_IRQ_VOLUME) |
| 553 | ;/* TODO */ |
| 554 | |
| 555 | return IRQ_HANDLED; |
| 556 | } |
| 557 | |
| 558 | static snd_pcm_hardware_t snd_fm801_playback = |
| 559 | { |
| 560 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
| 561 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
| 562 | SNDRV_PCM_INFO_PAUSE | |
| 563 | SNDRV_PCM_INFO_MMAP_VALID), |
| 564 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, |
| 565 | .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, |
| 566 | .rate_min = 5500, |
| 567 | .rate_max = 48000, |
| 568 | .channels_min = 1, |
| 569 | .channels_max = 2, |
| 570 | .buffer_bytes_max = (128*1024), |
| 571 | .period_bytes_min = 64, |
| 572 | .period_bytes_max = (128*1024), |
| 573 | .periods_min = 1, |
| 574 | .periods_max = 1024, |
| 575 | .fifo_size = 0, |
| 576 | }; |
| 577 | |
| 578 | static snd_pcm_hardware_t snd_fm801_capture = |
| 579 | { |
| 580 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
| 581 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
| 582 | SNDRV_PCM_INFO_PAUSE | |
| 583 | SNDRV_PCM_INFO_MMAP_VALID), |
| 584 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, |
| 585 | .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, |
| 586 | .rate_min = 5500, |
| 587 | .rate_max = 48000, |
| 588 | .channels_min = 1, |
| 589 | .channels_max = 2, |
| 590 | .buffer_bytes_max = (128*1024), |
| 591 | .period_bytes_min = 64, |
| 592 | .period_bytes_max = (128*1024), |
| 593 | .periods_min = 1, |
| 594 | .periods_max = 1024, |
| 595 | .fifo_size = 0, |
| 596 | }; |
| 597 | |
| 598 | static int snd_fm801_playback_open(snd_pcm_substream_t * substream) |
| 599 | { |
| 600 | fm801_t *chip = snd_pcm_substream_chip(substream); |
| 601 | snd_pcm_runtime_t *runtime = substream->runtime; |
| 602 | int err; |
| 603 | |
| 604 | chip->playback_substream = substream; |
| 605 | runtime->hw = snd_fm801_playback; |
| 606 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); |
| 607 | if (chip->multichannel) { |
| 608 | runtime->hw.channels_max = 6; |
| 609 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels); |
| 610 | } |
| 611 | if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) |
| 612 | return err; |
| 613 | return 0; |
| 614 | } |
| 615 | |
| 616 | static int snd_fm801_capture_open(snd_pcm_substream_t * substream) |
| 617 | { |
| 618 | fm801_t *chip = snd_pcm_substream_chip(substream); |
| 619 | snd_pcm_runtime_t *runtime = substream->runtime; |
| 620 | int err; |
| 621 | |
| 622 | chip->capture_substream = substream; |
| 623 | runtime->hw = snd_fm801_capture; |
| 624 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); |
| 625 | if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) |
| 626 | return err; |
| 627 | return 0; |
| 628 | } |
| 629 | |
| 630 | static int snd_fm801_playback_close(snd_pcm_substream_t * substream) |
| 631 | { |
| 632 | fm801_t *chip = snd_pcm_substream_chip(substream); |
| 633 | |
| 634 | chip->playback_substream = NULL; |
| 635 | return 0; |
| 636 | } |
| 637 | |
| 638 | static int snd_fm801_capture_close(snd_pcm_substream_t * substream) |
| 639 | { |
| 640 | fm801_t *chip = snd_pcm_substream_chip(substream); |
| 641 | |
| 642 | chip->capture_substream = NULL; |
| 643 | return 0; |
| 644 | } |
| 645 | |
| 646 | static snd_pcm_ops_t snd_fm801_playback_ops = { |
| 647 | .open = snd_fm801_playback_open, |
| 648 | .close = snd_fm801_playback_close, |
| 649 | .ioctl = snd_pcm_lib_ioctl, |
| 650 | .hw_params = snd_fm801_hw_params, |
| 651 | .hw_free = snd_fm801_hw_free, |
| 652 | .prepare = snd_fm801_playback_prepare, |
| 653 | .trigger = snd_fm801_playback_trigger, |
| 654 | .pointer = snd_fm801_playback_pointer, |
| 655 | }; |
| 656 | |
| 657 | static snd_pcm_ops_t snd_fm801_capture_ops = { |
| 658 | .open = snd_fm801_capture_open, |
| 659 | .close = snd_fm801_capture_close, |
| 660 | .ioctl = snd_pcm_lib_ioctl, |
| 661 | .hw_params = snd_fm801_hw_params, |
| 662 | .hw_free = snd_fm801_hw_free, |
| 663 | .prepare = snd_fm801_capture_prepare, |
| 664 | .trigger = snd_fm801_capture_trigger, |
| 665 | .pointer = snd_fm801_capture_pointer, |
| 666 | }; |
| 667 | |
| 668 | static void snd_fm801_pcm_free(snd_pcm_t *pcm) |
| 669 | { |
| 670 | fm801_t *chip = pcm->private_data; |
| 671 | chip->pcm = NULL; |
| 672 | snd_pcm_lib_preallocate_free_for_all(pcm); |
| 673 | } |
| 674 | |
| 675 | static int __devinit snd_fm801_pcm(fm801_t *chip, int device, snd_pcm_t ** rpcm) |
| 676 | { |
| 677 | snd_pcm_t *pcm; |
| 678 | int err; |
| 679 | |
| 680 | if (rpcm) |
| 681 | *rpcm = NULL; |
| 682 | if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0) |
| 683 | return err; |
| 684 | |
| 685 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops); |
| 686 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops); |
| 687 | |
| 688 | pcm->private_data = chip; |
| 689 | pcm->private_free = snd_fm801_pcm_free; |
| 690 | pcm->info_flags = 0; |
| 691 | strcpy(pcm->name, "FM801"); |
| 692 | chip->pcm = pcm; |
| 693 | |
| 694 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, |
| 695 | snd_dma_pci_data(chip->pci), |
| 696 | chip->multichannel ? 128*1024 : 64*1024, 128*1024); |
| 697 | |
| 698 | if (rpcm) |
| 699 | *rpcm = pcm; |
| 700 | return 0; |
| 701 | } |
| 702 | |
| 703 | /* |
| 704 | * TEA5757 radio |
| 705 | */ |
| 706 | |
| 707 | #ifdef TEA575X_RADIO |
| 708 | |
| 709 | /* 256PCS GPIO numbers */ |
| 710 | #define TEA_256PCS_DATA 1 |
| 711 | #define TEA_256PCS_WRITE_ENABLE 2 /* inverted */ |
| 712 | #define TEA_256PCS_BUS_CLOCK 3 |
| 713 | |
| 714 | static void snd_fm801_tea575x_256pcs_write(tea575x_t *tea, unsigned int val) |
| 715 | { |
| 716 | fm801_t *chip = tea->private_data; |
| 717 | unsigned short reg; |
| 718 | int i = 25; |
| 719 | |
| 720 | spin_lock_irq(&chip->reg_lock); |
| 721 | reg = inw(FM801_REG(chip, GPIO_CTRL)); |
| 722 | /* use GPIO lines and set write enable bit */ |
| 723 | reg |= FM801_GPIO_GS(TEA_256PCS_DATA) | |
| 724 | FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) | |
| 725 | FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK); |
| 726 | /* all of lines are in the write direction */ |
| 727 | /* clear data and clock lines */ |
| 728 | reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) | |
| 729 | FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) | |
| 730 | FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) | |
| 731 | FM801_GPIO_GP(TEA_256PCS_DATA) | |
| 732 | FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) | |
| 733 | FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE)); |
| 734 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 735 | udelay(1); |
| 736 | |
| 737 | while (i--) { |
| 738 | if (val & (1 << i)) |
| 739 | reg |= FM801_GPIO_GP(TEA_256PCS_DATA); |
| 740 | else |
| 741 | reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA); |
| 742 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 743 | udelay(1); |
| 744 | reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); |
| 745 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 746 | reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); |
| 747 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 748 | udelay(1); |
| 749 | } |
| 750 | |
| 751 | /* and reset the write enable bit */ |
| 752 | reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) | |
| 753 | FM801_GPIO_GP(TEA_256PCS_DATA); |
| 754 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 755 | spin_unlock_irq(&chip->reg_lock); |
| 756 | } |
| 757 | |
| 758 | static unsigned int snd_fm801_tea575x_256pcs_read(tea575x_t *tea) |
| 759 | { |
| 760 | fm801_t *chip = tea->private_data; |
| 761 | unsigned short reg; |
| 762 | unsigned int val = 0; |
| 763 | int i; |
| 764 | |
| 765 | spin_lock_irq(&chip->reg_lock); |
| 766 | reg = inw(FM801_REG(chip, GPIO_CTRL)); |
| 767 | /* use GPIO lines, set data direction to input */ |
| 768 | reg |= FM801_GPIO_GS(TEA_256PCS_DATA) | |
| 769 | FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) | |
| 770 | FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) | |
| 771 | FM801_GPIO_GD(TEA_256PCS_DATA) | |
| 772 | FM801_GPIO_GP(TEA_256PCS_DATA) | |
| 773 | FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE); |
| 774 | /* all of lines are in the write direction, except data */ |
| 775 | /* clear data, write enable and clock lines */ |
| 776 | reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) | |
| 777 | FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) | |
| 778 | FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK)); |
| 779 | |
| 780 | for (i = 0; i < 24; i++) { |
| 781 | reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); |
| 782 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 783 | udelay(1); |
| 784 | reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); |
| 785 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 786 | udelay(1); |
| 787 | val <<= 1; |
| 788 | if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA)) |
| 789 | val |= 1; |
| 790 | } |
| 791 | |
| 792 | spin_unlock_irq(&chip->reg_lock); |
| 793 | |
| 794 | return val; |
| 795 | } |
| 796 | |
| 797 | /* 256PCPR GPIO numbers */ |
| 798 | #define TEA_256PCPR_BUS_CLOCK 0 |
| 799 | #define TEA_256PCPR_DATA 1 |
| 800 | #define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */ |
| 801 | |
| 802 | static void snd_fm801_tea575x_256pcpr_write(tea575x_t *tea, unsigned int val) |
| 803 | { |
| 804 | fm801_t *chip = tea->private_data; |
| 805 | unsigned short reg; |
| 806 | int i = 25; |
| 807 | |
| 808 | spin_lock_irq(&chip->reg_lock); |
| 809 | reg = inw(FM801_REG(chip, GPIO_CTRL)); |
| 810 | /* use GPIO lines and set write enable bit */ |
| 811 | reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) | |
| 812 | FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) | |
| 813 | FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK); |
| 814 | /* all of lines are in the write direction */ |
| 815 | /* clear data and clock lines */ |
| 816 | reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) | |
| 817 | FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) | |
| 818 | FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) | |
| 819 | FM801_GPIO_GP(TEA_256PCPR_DATA) | |
| 820 | FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) | |
| 821 | FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE)); |
| 822 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 823 | udelay(1); |
| 824 | |
| 825 | while (i--) { |
| 826 | if (val & (1 << i)) |
| 827 | reg |= FM801_GPIO_GP(TEA_256PCPR_DATA); |
| 828 | else |
| 829 | reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA); |
| 830 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 831 | udelay(1); |
| 832 | reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); |
| 833 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 834 | reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); |
| 835 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 836 | udelay(1); |
| 837 | } |
| 838 | |
| 839 | /* and reset the write enable bit */ |
| 840 | reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) | |
| 841 | FM801_GPIO_GP(TEA_256PCPR_DATA); |
| 842 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 843 | spin_unlock_irq(&chip->reg_lock); |
| 844 | } |
| 845 | |
| 846 | static unsigned int snd_fm801_tea575x_256pcpr_read(tea575x_t *tea) |
| 847 | { |
| 848 | fm801_t *chip = tea->private_data; |
| 849 | unsigned short reg; |
| 850 | unsigned int val = 0; |
| 851 | int i; |
| 852 | |
| 853 | spin_lock_irq(&chip->reg_lock); |
| 854 | reg = inw(FM801_REG(chip, GPIO_CTRL)); |
| 855 | /* use GPIO lines, set data direction to input */ |
| 856 | reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) | |
| 857 | FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) | |
| 858 | FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) | |
| 859 | FM801_GPIO_GD(TEA_256PCPR_DATA) | |
| 860 | FM801_GPIO_GP(TEA_256PCPR_DATA) | |
| 861 | FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE); |
| 862 | /* all of lines are in the write direction, except data */ |
| 863 | /* clear data, write enable and clock lines */ |
| 864 | reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) | |
| 865 | FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) | |
| 866 | FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK)); |
| 867 | |
| 868 | for (i = 0; i < 24; i++) { |
| 869 | reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); |
| 870 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 871 | udelay(1); |
| 872 | reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); |
| 873 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 874 | udelay(1); |
| 875 | val <<= 1; |
| 876 | if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA)) |
| 877 | val |= 1; |
| 878 | } |
| 879 | |
| 880 | spin_unlock_irq(&chip->reg_lock); |
| 881 | |
| 882 | return val; |
| 883 | } |
| 884 | |
| 885 | /* 64PCR GPIO numbers */ |
| 886 | #define TEA_64PCR_BUS_CLOCK 0 |
| 887 | #define TEA_64PCR_WRITE_ENABLE 1 /* inverted */ |
| 888 | #define TEA_64PCR_DATA 2 |
| 889 | |
| 890 | static void snd_fm801_tea575x_64pcr_write(tea575x_t *tea, unsigned int val) |
| 891 | { |
| 892 | fm801_t *chip = tea->private_data; |
| 893 | unsigned short reg; |
| 894 | int i = 25; |
| 895 | |
| 896 | spin_lock_irq(&chip->reg_lock); |
| 897 | reg = inw(FM801_REG(chip, GPIO_CTRL)); |
| 898 | /* use GPIO lines and set write enable bit */ |
| 899 | reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | |
| 900 | FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) | |
| 901 | FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK); |
| 902 | /* all of lines are in the write direction */ |
| 903 | /* clear data and clock lines */ |
| 904 | reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) | |
| 905 | FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) | |
| 906 | FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) | |
| 907 | FM801_GPIO_GP(TEA_64PCR_DATA) | |
| 908 | FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) | |
| 909 | FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE)); |
| 910 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 911 | udelay(1); |
| 912 | |
| 913 | while (i--) { |
| 914 | if (val & (1 << i)) |
| 915 | reg |= FM801_GPIO_GP(TEA_64PCR_DATA); |
| 916 | else |
| 917 | reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA); |
| 918 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 919 | udelay(1); |
| 920 | reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); |
| 921 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 922 | reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); |
| 923 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 924 | udelay(1); |
| 925 | } |
| 926 | |
| 927 | /* and reset the write enable bit */ |
| 928 | reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) | |
| 929 | FM801_GPIO_GP(TEA_64PCR_DATA); |
| 930 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 931 | spin_unlock_irq(&chip->reg_lock); |
| 932 | } |
| 933 | |
| 934 | static unsigned int snd_fm801_tea575x_64pcr_read(tea575x_t *tea) |
| 935 | { |
| 936 | fm801_t *chip = tea->private_data; |
| 937 | unsigned short reg; |
| 938 | unsigned int val = 0; |
| 939 | int i; |
| 940 | |
| 941 | spin_lock_irq(&chip->reg_lock); |
| 942 | reg = inw(FM801_REG(chip, GPIO_CTRL)); |
| 943 | /* use GPIO lines, set data direction to input */ |
| 944 | reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | |
| 945 | FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) | |
| 946 | FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) | |
| 947 | FM801_GPIO_GD(TEA_64PCR_DATA) | |
| 948 | FM801_GPIO_GP(TEA_64PCR_DATA) | |
| 949 | FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE); |
| 950 | /* all of lines are in the write direction, except data */ |
| 951 | /* clear data, write enable and clock lines */ |
| 952 | reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) | |
| 953 | FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) | |
| 954 | FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK)); |
| 955 | |
| 956 | for (i = 0; i < 24; i++) { |
| 957 | reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); |
| 958 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 959 | udelay(1); |
| 960 | reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); |
| 961 | outw(reg, FM801_REG(chip, GPIO_CTRL)); |
| 962 | udelay(1); |
| 963 | val <<= 1; |
| 964 | if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA)) |
| 965 | val |= 1; |
| 966 | } |
| 967 | |
| 968 | spin_unlock_irq(&chip->reg_lock); |
| 969 | |
| 970 | return val; |
| 971 | } |
| 972 | |
| 973 | static struct snd_tea575x_ops snd_fm801_tea_ops[3] = { |
| 974 | { |
| 975 | /* 1 = MediaForte 256-PCS */ |
| 976 | .write = snd_fm801_tea575x_256pcs_write, |
| 977 | .read = snd_fm801_tea575x_256pcs_read, |
| 978 | }, |
| 979 | { |
| 980 | /* 2 = MediaForte 256-PCPR */ |
| 981 | .write = snd_fm801_tea575x_256pcpr_write, |
| 982 | .read = snd_fm801_tea575x_256pcpr_read, |
| 983 | }, |
| 984 | { |
| 985 | /* 3 = MediaForte 64-PCR */ |
| 986 | .write = snd_fm801_tea575x_64pcr_write, |
| 987 | .read = snd_fm801_tea575x_64pcr_read, |
| 988 | } |
| 989 | }; |
| 990 | #endif |
| 991 | |
| 992 | /* |
| 993 | * Mixer routines |
| 994 | */ |
| 995 | |
| 996 | #define FM801_SINGLE(xname, reg, shift, mask, invert) \ |
| 997 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \ |
| 998 | .get = snd_fm801_get_single, .put = snd_fm801_put_single, \ |
| 999 | .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } |
| 1000 | |
| 1001 | static int snd_fm801_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) |
| 1002 | { |
| 1003 | int mask = (kcontrol->private_value >> 16) & 0xff; |
| 1004 | |
| 1005 | uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 1006 | uinfo->count = 1; |
| 1007 | uinfo->value.integer.min = 0; |
| 1008 | uinfo->value.integer.max = mask; |
| 1009 | return 0; |
| 1010 | } |
| 1011 | |
| 1012 | static int snd_fm801_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) |
| 1013 | { |
| 1014 | fm801_t *chip = snd_kcontrol_chip(kcontrol); |
| 1015 | int reg = kcontrol->private_value & 0xff; |
| 1016 | int shift = (kcontrol->private_value >> 8) & 0xff; |
| 1017 | int mask = (kcontrol->private_value >> 16) & 0xff; |
| 1018 | int invert = (kcontrol->private_value >> 24) & 0xff; |
| 1019 | |
| 1020 | ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask; |
| 1021 | if (invert) |
| 1022 | ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; |
| 1023 | return 0; |
| 1024 | } |
| 1025 | |
| 1026 | static int snd_fm801_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) |
| 1027 | { |
| 1028 | fm801_t *chip = snd_kcontrol_chip(kcontrol); |
| 1029 | int reg = kcontrol->private_value & 0xff; |
| 1030 | int shift = (kcontrol->private_value >> 8) & 0xff; |
| 1031 | int mask = (kcontrol->private_value >> 16) & 0xff; |
| 1032 | int invert = (kcontrol->private_value >> 24) & 0xff; |
| 1033 | unsigned short val; |
| 1034 | |
| 1035 | val = (ucontrol->value.integer.value[0] & mask); |
| 1036 | if (invert) |
| 1037 | val = mask - val; |
| 1038 | return snd_fm801_update_bits(chip, reg, mask << shift, val << shift); |
| 1039 | } |
| 1040 | |
| 1041 | #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ |
| 1042 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \ |
| 1043 | .get = snd_fm801_get_double, .put = snd_fm801_put_double, \ |
| 1044 | .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) } |
| 1045 | |
| 1046 | static int snd_fm801_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) |
| 1047 | { |
| 1048 | int mask = (kcontrol->private_value >> 16) & 0xff; |
| 1049 | |
| 1050 | uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 1051 | uinfo->count = 2; |
| 1052 | uinfo->value.integer.min = 0; |
| 1053 | uinfo->value.integer.max = mask; |
| 1054 | return 0; |
| 1055 | } |
| 1056 | |
| 1057 | static int snd_fm801_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) |
| 1058 | { |
| 1059 | fm801_t *chip = snd_kcontrol_chip(kcontrol); |
| 1060 | int reg = kcontrol->private_value & 0xff; |
| 1061 | int shift_left = (kcontrol->private_value >> 8) & 0x0f; |
| 1062 | int shift_right = (kcontrol->private_value >> 12) & 0x0f; |
| 1063 | int mask = (kcontrol->private_value >> 16) & 0xff; |
| 1064 | int invert = (kcontrol->private_value >> 24) & 0xff; |
| 1065 | |
| 1066 | spin_lock_irq(&chip->reg_lock); |
| 1067 | ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask; |
| 1068 | ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask; |
| 1069 | spin_unlock_irq(&chip->reg_lock); |
| 1070 | if (invert) { |
| 1071 | ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; |
| 1072 | ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; |
| 1073 | } |
| 1074 | return 0; |
| 1075 | } |
| 1076 | |
| 1077 | static int snd_fm801_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) |
| 1078 | { |
| 1079 | fm801_t *chip = snd_kcontrol_chip(kcontrol); |
| 1080 | int reg = kcontrol->private_value & 0xff; |
| 1081 | int shift_left = (kcontrol->private_value >> 8) & 0x0f; |
| 1082 | int shift_right = (kcontrol->private_value >> 12) & 0x0f; |
| 1083 | int mask = (kcontrol->private_value >> 16) & 0xff; |
| 1084 | int invert = (kcontrol->private_value >> 24) & 0xff; |
| 1085 | unsigned short val1, val2; |
| 1086 | |
| 1087 | val1 = ucontrol->value.integer.value[0] & mask; |
| 1088 | val2 = ucontrol->value.integer.value[1] & mask; |
| 1089 | if (invert) { |
| 1090 | val1 = mask - val1; |
| 1091 | val2 = mask - val2; |
| 1092 | } |
| 1093 | return snd_fm801_update_bits(chip, reg, |
| 1094 | (mask << shift_left) | (mask << shift_right), |
| 1095 | (val1 << shift_left ) | (val2 << shift_right)); |
| 1096 | } |
| 1097 | |
| 1098 | static int snd_fm801_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) |
| 1099 | { |
| 1100 | static char *texts[5] = { |
| 1101 | "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary" |
| 1102 | }; |
| 1103 | |
| 1104 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; |
| 1105 | uinfo->count = 1; |
| 1106 | uinfo->value.enumerated.items = 5; |
| 1107 | if (uinfo->value.enumerated.item > 4) |
| 1108 | uinfo->value.enumerated.item = 4; |
| 1109 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); |
| 1110 | return 0; |
| 1111 | } |
| 1112 | |
| 1113 | static int snd_fm801_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) |
| 1114 | { |
| 1115 | fm801_t *chip = snd_kcontrol_chip(kcontrol); |
| 1116 | unsigned short val; |
| 1117 | |
| 1118 | val = inw(FM801_REG(chip, REC_SRC)) & 7; |
| 1119 | if (val > 4) |
| 1120 | val = 4; |
| 1121 | ucontrol->value.enumerated.item[0] = val; |
| 1122 | return 0; |
| 1123 | } |
| 1124 | |
| 1125 | static int snd_fm801_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) |
| 1126 | { |
| 1127 | fm801_t *chip = snd_kcontrol_chip(kcontrol); |
| 1128 | unsigned short val; |
| 1129 | |
| 1130 | if ((val = ucontrol->value.enumerated.item[0]) > 4) |
| 1131 | return -EINVAL; |
| 1132 | return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val); |
| 1133 | } |
| 1134 | |
| 1135 | #define FM801_CONTROLS (sizeof(snd_fm801_controls)/sizeof(snd_kcontrol_new_t)) |
| 1136 | |
| 1137 | static snd_kcontrol_new_t snd_fm801_controls[] __devinitdata = { |
| 1138 | FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1), |
| 1139 | FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1), |
| 1140 | FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1), |
| 1141 | FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1), |
| 1142 | FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1), |
| 1143 | FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1), |
| 1144 | { |
| 1145 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 1146 | .name = "Digital Capture Source", |
| 1147 | .info = snd_fm801_info_mux, |
| 1148 | .get = snd_fm801_get_mux, |
| 1149 | .put = snd_fm801_put_mux, |
| 1150 | } |
| 1151 | }; |
| 1152 | |
| 1153 | #define FM801_CONTROLS_MULTI (sizeof(snd_fm801_controls_multi)/sizeof(snd_kcontrol_new_t)) |
| 1154 | |
| 1155 | static snd_kcontrol_new_t snd_fm801_controls_multi[] __devinitdata = { |
| 1156 | FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0), |
| 1157 | FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0), |
Clemens Ladisch | 10e8d78 | 2005-08-03 13:40:08 +0200 | [diff] [blame] | 1158 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0), |
| 1159 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0), |
| 1160 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0), |
| 1161 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1162 | }; |
| 1163 | |
| 1164 | static void snd_fm801_mixer_free_ac97_bus(ac97_bus_t *bus) |
| 1165 | { |
| 1166 | fm801_t *chip = bus->private_data; |
| 1167 | chip->ac97_bus = NULL; |
| 1168 | } |
| 1169 | |
| 1170 | static void snd_fm801_mixer_free_ac97(ac97_t *ac97) |
| 1171 | { |
| 1172 | fm801_t *chip = ac97->private_data; |
| 1173 | if (ac97->num == 0) { |
| 1174 | chip->ac97 = NULL; |
| 1175 | } else { |
| 1176 | chip->ac97_sec = NULL; |
| 1177 | } |
| 1178 | } |
| 1179 | |
| 1180 | static int __devinit snd_fm801_mixer(fm801_t *chip) |
| 1181 | { |
| 1182 | ac97_template_t ac97; |
| 1183 | unsigned int i; |
| 1184 | int err; |
| 1185 | static ac97_bus_ops_t ops = { |
| 1186 | .write = snd_fm801_codec_write, |
| 1187 | .read = snd_fm801_codec_read, |
| 1188 | }; |
| 1189 | |
| 1190 | if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) |
| 1191 | return err; |
| 1192 | chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus; |
| 1193 | |
| 1194 | memset(&ac97, 0, sizeof(ac97)); |
| 1195 | ac97.private_data = chip; |
| 1196 | ac97.private_free = snd_fm801_mixer_free_ac97; |
| 1197 | if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) |
| 1198 | return err; |
| 1199 | if (chip->secondary) { |
| 1200 | ac97.num = 1; |
| 1201 | ac97.addr = chip->secondary_addr; |
| 1202 | if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0) |
| 1203 | return err; |
| 1204 | } |
| 1205 | for (i = 0; i < FM801_CONTROLS; i++) |
| 1206 | snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip)); |
| 1207 | if (chip->multichannel) { |
| 1208 | for (i = 0; i < FM801_CONTROLS_MULTI; i++) |
| 1209 | snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip)); |
| 1210 | } |
| 1211 | return 0; |
| 1212 | } |
| 1213 | |
| 1214 | /* |
| 1215 | * initialization routines |
| 1216 | */ |
| 1217 | |
| 1218 | static int snd_fm801_free(fm801_t *chip) |
| 1219 | { |
| 1220 | unsigned short cmdw; |
| 1221 | |
| 1222 | if (chip->irq < 0) |
| 1223 | goto __end_hw; |
| 1224 | |
| 1225 | /* interrupt setup - mask everything */ |
| 1226 | cmdw = inw(FM801_REG(chip, IRQ_MASK)); |
| 1227 | cmdw |= 0x00c3; |
| 1228 | outw(cmdw, FM801_REG(chip, IRQ_MASK)); |
| 1229 | |
| 1230 | __end_hw: |
| 1231 | #ifdef TEA575X_RADIO |
| 1232 | snd_tea575x_exit(&chip->tea); |
| 1233 | #endif |
| 1234 | if (chip->irq >= 0) |
| 1235 | free_irq(chip->irq, (void *)chip); |
| 1236 | pci_release_regions(chip->pci); |
| 1237 | pci_disable_device(chip->pci); |
| 1238 | |
| 1239 | kfree(chip); |
| 1240 | return 0; |
| 1241 | } |
| 1242 | |
| 1243 | static int snd_fm801_dev_free(snd_device_t *device) |
| 1244 | { |
| 1245 | fm801_t *chip = device->device_data; |
| 1246 | return snd_fm801_free(chip); |
| 1247 | } |
| 1248 | |
| 1249 | static int __devinit snd_fm801_create(snd_card_t * card, |
| 1250 | struct pci_dev * pci, |
| 1251 | int tea575x_tuner, |
| 1252 | fm801_t ** rchip) |
| 1253 | { |
| 1254 | fm801_t *chip; |
| 1255 | unsigned char rev, id; |
| 1256 | unsigned short cmdw; |
| 1257 | unsigned long timeout; |
| 1258 | int err; |
| 1259 | static snd_device_ops_t ops = { |
| 1260 | .dev_free = snd_fm801_dev_free, |
| 1261 | }; |
| 1262 | |
| 1263 | *rchip = NULL; |
| 1264 | if ((err = pci_enable_device(pci)) < 0) |
| 1265 | return err; |
| 1266 | chip = kcalloc(1, sizeof(*chip), GFP_KERNEL); |
| 1267 | if (chip == NULL) { |
| 1268 | pci_disable_device(pci); |
| 1269 | return -ENOMEM; |
| 1270 | } |
| 1271 | spin_lock_init(&chip->reg_lock); |
| 1272 | chip->card = card; |
| 1273 | chip->pci = pci; |
| 1274 | chip->irq = -1; |
| 1275 | if ((err = pci_request_regions(pci, "FM801")) < 0) { |
| 1276 | kfree(chip); |
| 1277 | pci_disable_device(pci); |
| 1278 | return err; |
| 1279 | } |
| 1280 | chip->port = pci_resource_start(pci, 0); |
| 1281 | if (request_irq(pci->irq, snd_fm801_interrupt, SA_INTERRUPT|SA_SHIRQ, "FM801", (void *)chip)) { |
| 1282 | snd_printk("unable to grab IRQ %d\n", chip->irq); |
| 1283 | snd_fm801_free(chip); |
| 1284 | return -EBUSY; |
| 1285 | } |
| 1286 | chip->irq = pci->irq; |
| 1287 | pci_set_master(pci); |
| 1288 | |
| 1289 | pci_read_config_byte(pci, PCI_REVISION_ID, &rev); |
| 1290 | if (rev >= 0xb1) /* FM801-AU */ |
| 1291 | chip->multichannel = 1; |
| 1292 | |
| 1293 | /* codec cold reset + AC'97 warm reset */ |
| 1294 | outw((1<<5)|(1<<6), FM801_REG(chip, CODEC_CTRL)); |
| 1295 | inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */ |
| 1296 | udelay(100); |
| 1297 | outw(0, FM801_REG(chip, CODEC_CTRL)); |
| 1298 | |
| 1299 | timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */ |
| 1300 | |
| 1301 | outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD)); |
| 1302 | udelay(5); |
| 1303 | do { |
| 1304 | if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) |
| 1305 | goto __ac97_secondary; |
| 1306 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 1307 | schedule_timeout(1); |
| 1308 | } while (time_after(timeout, jiffies)); |
| 1309 | snd_printk("Primary AC'97 codec not found\n"); |
| 1310 | snd_fm801_free(chip); |
| 1311 | return -EIO; |
| 1312 | |
| 1313 | __ac97_secondary: |
| 1314 | if (!chip->multichannel) /* lookup is not required */ |
| 1315 | goto __ac97_ok; |
| 1316 | for (id = 3; id > 0; id--) { /* my card has the secondary codec */ |
| 1317 | /* at address #3, so the loop is inverted */ |
| 1318 | |
| 1319 | timeout = jiffies + HZ / 20; |
| 1320 | |
| 1321 | outw((1<<7) | (id << FM801_AC97_ADDR_SHIFT) | AC97_VENDOR_ID1, FM801_REG(chip, AC97_CMD)); |
| 1322 | udelay(5); |
| 1323 | do { |
| 1324 | if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) { |
| 1325 | cmdw = inw(FM801_REG(chip, AC97_DATA)); |
| 1326 | if (cmdw != 0xffff && cmdw != 0) { |
| 1327 | chip->secondary = 1; |
| 1328 | chip->secondary_addr = id; |
| 1329 | goto __ac97_ok; |
| 1330 | } |
| 1331 | } |
| 1332 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 1333 | schedule_timeout(1); |
| 1334 | } while (time_after(timeout, jiffies)); |
| 1335 | } |
| 1336 | |
| 1337 | /* the recovery phase, it seems that probing for non-existing codec might */ |
| 1338 | /* cause timeout problems */ |
| 1339 | timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */ |
| 1340 | |
| 1341 | outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD)); |
| 1342 | udelay(5); |
| 1343 | do { |
| 1344 | if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) |
| 1345 | goto __ac97_ok; |
| 1346 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 1347 | schedule_timeout(1); |
| 1348 | } while (time_after(timeout, jiffies)); |
| 1349 | snd_printk("Primary AC'97 codec not responding\n"); |
| 1350 | snd_fm801_free(chip); |
| 1351 | return -EIO; |
| 1352 | |
| 1353 | __ac97_ok: |
| 1354 | |
| 1355 | /* init volume */ |
| 1356 | outw(0x0808, FM801_REG(chip, PCM_VOL)); |
| 1357 | outw(0x9f1f, FM801_REG(chip, FM_VOL)); |
| 1358 | outw(0x8808, FM801_REG(chip, I2S_VOL)); |
| 1359 | |
| 1360 | /* I2S control - I2S mode */ |
| 1361 | outw(0x0003, FM801_REG(chip, I2S_MODE)); |
| 1362 | |
| 1363 | /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */ |
| 1364 | cmdw = inw(FM801_REG(chip, IRQ_MASK)); |
| 1365 | cmdw &= ~0x0083; |
| 1366 | outw(cmdw, FM801_REG(chip, IRQ_MASK)); |
| 1367 | |
| 1368 | /* interrupt clear */ |
| 1369 | outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS)); |
| 1370 | |
| 1371 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { |
| 1372 | snd_fm801_free(chip); |
| 1373 | return err; |
| 1374 | } |
| 1375 | |
| 1376 | snd_card_set_dev(card, &pci->dev); |
| 1377 | |
| 1378 | #ifdef TEA575X_RADIO |
| 1379 | if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) { |
| 1380 | chip->tea.dev_nr = tea575x_tuner >> 16; |
| 1381 | chip->tea.card = card; |
| 1382 | chip->tea.freq_fixup = 10700; |
| 1383 | chip->tea.private_data = chip; |
| 1384 | chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1]; |
| 1385 | snd_tea575x_init(&chip->tea); |
| 1386 | } |
| 1387 | #endif |
| 1388 | |
| 1389 | *rchip = chip; |
| 1390 | return 0; |
| 1391 | } |
| 1392 | |
| 1393 | static int __devinit snd_card_fm801_probe(struct pci_dev *pci, |
| 1394 | const struct pci_device_id *pci_id) |
| 1395 | { |
| 1396 | static int dev; |
| 1397 | snd_card_t *card; |
| 1398 | fm801_t *chip; |
| 1399 | opl3_t *opl3; |
| 1400 | int err; |
| 1401 | |
| 1402 | if (dev >= SNDRV_CARDS) |
| 1403 | return -ENODEV; |
| 1404 | if (!enable[dev]) { |
| 1405 | dev++; |
| 1406 | return -ENOENT; |
| 1407 | } |
| 1408 | |
| 1409 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); |
| 1410 | if (card == NULL) |
| 1411 | return -ENOMEM; |
| 1412 | if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) { |
| 1413 | snd_card_free(card); |
| 1414 | return err; |
| 1415 | } |
| 1416 | |
| 1417 | strcpy(card->driver, "FM801"); |
| 1418 | strcpy(card->shortname, "ForteMedia FM801-"); |
| 1419 | strcat(card->shortname, chip->multichannel ? "AU" : "AS"); |
| 1420 | sprintf(card->longname, "%s at 0x%lx, irq %i", |
| 1421 | card->shortname, chip->port, chip->irq); |
| 1422 | |
| 1423 | if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) { |
| 1424 | snd_card_free(card); |
| 1425 | return err; |
| 1426 | } |
| 1427 | if ((err = snd_fm801_mixer(chip)) < 0) { |
| 1428 | snd_card_free(card); |
| 1429 | return err; |
| 1430 | } |
| 1431 | if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801, |
| 1432 | FM801_REG(chip, MPU401_DATA), 1, |
| 1433 | chip->irq, 0, &chip->rmidi)) < 0) { |
| 1434 | snd_card_free(card); |
| 1435 | return err; |
| 1436 | } |
| 1437 | if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0), |
| 1438 | FM801_REG(chip, OPL3_BANK1), |
| 1439 | OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) { |
| 1440 | snd_card_free(card); |
| 1441 | return err; |
| 1442 | } |
| 1443 | if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { |
| 1444 | snd_card_free(card); |
| 1445 | return err; |
| 1446 | } |
| 1447 | |
| 1448 | if ((err = snd_card_register(card)) < 0) { |
| 1449 | snd_card_free(card); |
| 1450 | return err; |
| 1451 | } |
| 1452 | pci_set_drvdata(pci, card); |
| 1453 | dev++; |
| 1454 | return 0; |
| 1455 | } |
| 1456 | |
| 1457 | static void __devexit snd_card_fm801_remove(struct pci_dev *pci) |
| 1458 | { |
| 1459 | snd_card_free(pci_get_drvdata(pci)); |
| 1460 | pci_set_drvdata(pci, NULL); |
| 1461 | } |
| 1462 | |
| 1463 | static struct pci_driver driver = { |
| 1464 | .name = "FM801", |
| 1465 | .id_table = snd_fm801_ids, |
| 1466 | .probe = snd_card_fm801_probe, |
| 1467 | .remove = __devexit_p(snd_card_fm801_remove), |
| 1468 | }; |
| 1469 | |
| 1470 | static int __init alsa_card_fm801_init(void) |
| 1471 | { |
Takashi Iwai | 01d25d4 | 2005-04-11 16:58:24 +0200 | [diff] [blame] | 1472 | return pci_register_driver(&driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1473 | } |
| 1474 | |
| 1475 | static void __exit alsa_card_fm801_exit(void) |
| 1476 | { |
| 1477 | pci_unregister_driver(&driver); |
| 1478 | } |
| 1479 | |
| 1480 | module_init(alsa_card_fm801_init) |
| 1481 | module_exit(alsa_card_fm801_exit) |