blob: 7fa74462bd9fc12cd9459cfe8cba083cc7ce5613 [file] [log] [blame]
Yusuke Goda04e917b2008-06-06 17:03:23 +09001/*
2 * Renesas - AP-325RXA
3 * (Compatible with Algo System ., LTD. - AP-320A)
4 *
5 * Copyright (C) 2008 Renesas Solutions Corp.
6 * Author : Yusuke Goda <goda.yuske@renesas.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/device.h>
Magnus Damm4875ea22008-07-28 19:11:07 +090015#include <linux/interrupt.h>
Yusuke Goda04e917b2008-06-06 17:03:23 +090016#include <linux/platform_device.h>
17#include <linux/mtd/physmap.h>
18#include <linux/delay.h>
Magnus Damm026953d2008-07-05 12:32:44 +090019#include <linux/i2c.h>
Magnus Damm69689802008-07-28 19:07:04 +090020#include <linux/delay.h>
Magnus Damm4875ea22008-07-28 19:11:07 +090021#include <linux/smc911x.h>
Magnus Damm8b2224d2008-07-28 19:14:35 +090022#include <media/soc_camera_platform.h>
23#include <media/sh_mobile_ceu.h>
Magnus Damm69689802008-07-28 19:07:04 +090024#include <asm/sh_mobile_lcdc.h>
Yusuke Goda04e917b2008-06-06 17:03:23 +090025#include <asm/io.h>
Magnus Damm69689802008-07-28 19:07:04 +090026#include <asm/clock.h>
Yusuke Goda04e917b2008-06-06 17:03:23 +090027
Magnus Damm4875ea22008-07-28 19:11:07 +090028static struct smc911x_platdata smc911x_info = {
29 .flags = SMC911X_USE_32BIT,
30 .irq_flags = IRQF_TRIGGER_LOW,
31};
32
Yusuke Goda04e917b2008-06-06 17:03:23 +090033static struct resource smc9118_resources[] = {
34 [0] = {
35 .start = 0xb6080000,
36 .end = 0xb60fffff,
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = {
40 .start = 35,
41 .end = 35,
42 .flags = IORESOURCE_IRQ,
43 }
44};
45
46static struct platform_device smc9118_device = {
47 .name = "smc911x",
48 .id = -1,
49 .num_resources = ARRAY_SIZE(smc9118_resources),
50 .resource = smc9118_resources,
Magnus Damm4875ea22008-07-28 19:11:07 +090051 .dev = {
52 .platform_data = &smc911x_info,
53 },
Yusuke Goda04e917b2008-06-06 17:03:23 +090054};
55
56static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
57 {
58 .name = "uboot",
59 .offset = 0,
60 .size = (1 * 1024 * 1024),
61 .mask_flags = MTD_WRITEABLE, /* Read-only */
62 }, {
63 .name = "kernel",
64 .offset = MTDPART_OFS_APPEND,
65 .size = (2 * 1024 * 1024),
66 }, {
67 .name = "other",
68 .offset = MTDPART_OFS_APPEND,
69 .size = MTDPART_SIZ_FULL,
70 },
71};
72
73static struct physmap_flash_data ap325rxa_nor_flash_data = {
74 .width = 2,
75 .parts = ap325rxa_nor_flash_partitions,
76 .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
77};
78
79static struct resource ap325rxa_nor_flash_resources[] = {
80 [0] = {
81 .name = "NOR Flash",
82 .start = 0x00000000,
83 .end = 0x00ffffff,
84 .flags = IORESOURCE_MEM,
85 }
86};
87
88static struct platform_device ap325rxa_nor_flash_device = {
89 .name = "physmap-flash",
90 .resource = ap325rxa_nor_flash_resources,
91 .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
92 .dev = {
93 .platform_data = &ap325rxa_nor_flash_data,
94 },
95};
96
Magnus Damm69689802008-07-28 19:07:04 +090097#define FPGA_LCDREG 0xB4100180
98#define FPGA_BKLREG 0xB4100212
99#define FPGA_LCDREG_VAL 0x0018
100#define PORT_PHCR 0xA405010E
101#define PORT_PLCR 0xA4050114
102#define PORT_PMCR 0xA4050116
103#define PORT_PRCR 0xA405011C
Magnus Damm69689802008-07-28 19:07:04 +0900104#define PORT_PSCR 0xA405011E
Magnus Damm8b2224d2008-07-28 19:14:35 +0900105#define PORT_PZCR 0xA405014C
106#define PORT_HIZCRA 0xA4050158
107#define PORT_MSELCRB 0xA4050182
Magnus Damm69689802008-07-28 19:07:04 +0900108#define PORT_PSDR 0xA405013E
Magnus Damm8b2224d2008-07-28 19:14:35 +0900109#define PORT_PZDR 0xA405016C
110#define PORT_PSELD 0xA4050154
Magnus Damm69689802008-07-28 19:07:04 +0900111
112static void ap320_wvga_power_on(void *board_data)
113{
114 msleep(100);
115
116 /* ASD AP-320/325 LCD ON */
117 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
118
119 /* backlight */
120 ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR);
121 ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
122 ctrl_outw(0x100, FPGA_BKLREG);
123}
124
125static struct sh_mobile_lcdc_info lcdc_info = {
126 .clock_source = LCDC_CLK_EXTERNAL,
127 .ch[0] = {
128 .chan = LCDC_CHAN_MAINLCD,
129 .bpp = 16,
130 .interface_type = RGB18,
131 .clock_divider = 1,
132 .lcd_cfg = {
133 .name = "LB070WV1",
134 .xres = 800,
135 .yres = 480,
136 .left_margin = 40,
137 .right_margin = 160,
138 .hsync_len = 8,
139 .upper_margin = 63,
140 .lower_margin = 80,
141 .vsync_len = 1,
142 .sync = 0, /* hsync and vsync are active low */
143 },
144 .board_cfg = {
145 .display_on = ap320_wvga_power_on,
146 },
147 }
148};
149
150static struct resource lcdc_resources[] = {
151 [0] = {
152 .name = "LCDC",
153 .start = 0xfe940000, /* P4-only space */
154 .end = 0xfe941fff,
155 .flags = IORESOURCE_MEM,
156 },
157};
158
159static struct platform_device lcdc_device = {
160 .name = "sh_mobile_lcdc_fb",
161 .num_resources = ARRAY_SIZE(lcdc_resources),
162 .resource = lcdc_resources,
163 .dev = {
164 .platform_data = &lcdc_info,
165 },
166};
167
Magnus Damm8b2224d2008-07-28 19:14:35 +0900168static unsigned char camera_ncm03j_magic[] =
169{
170 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
171 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
172 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
173 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
174 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
175 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
176 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
177 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
178 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
179 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
180 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
181 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
182 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
183 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
184 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
185 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
186};
187
188static int camera_set_capture(struct soc_camera_platform_info *info,
189 int enable)
190{
191 struct i2c_adapter *a = i2c_get_adapter(0);
192 struct i2c_msg msg;
193 int ret = 0;
194 int i;
195
196 if (!enable)
197 return 0; /* no disable for now */
198
199 for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
200 u_int8_t buf[8];
201
202 msg.addr = 0x6e;
203 msg.buf = buf;
204 msg.len = 2;
205 msg.flags = 0;
206
207 buf[0] = camera_ncm03j_magic[i];
208 buf[1] = camera_ncm03j_magic[i + 1];
209
210 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
211 }
212
213 return ret;
214}
215
216static struct soc_camera_platform_info camera_info = {
217 .iface = 0,
218 .format_name = "UYVY",
219 .format_depth = 16,
220 .format = {
221 .pixelformat = V4L2_PIX_FMT_UYVY,
222 .colorspace = V4L2_COLORSPACE_SMPTE170M,
223 .width = 640,
224 .height = 480,
225 },
226 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
227 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
228 .set_capture = camera_set_capture,
229};
230
231static struct platform_device camera_device = {
232 .name = "soc_camera_platform",
233 .dev = {
234 .platform_data = &camera_info,
235 },
236};
237
238static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
239 .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
240 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
241};
242
243static struct resource ceu_resources[] = {
244 [0] = {
245 .name = "CEU",
246 .start = 0xfe910000,
247 .end = 0xfe91009f,
248 .flags = IORESOURCE_MEM,
249 },
250 [1] = {
251 .start = 52,
252 .flags = IORESOURCE_IRQ,
253 },
254 [2] = {
255 /* place holder for contiguous memory */
256 },
257};
258
259static struct platform_device ceu_device = {
260 .name = "sh_mobile_ceu",
261 .num_resources = ARRAY_SIZE(ceu_resources),
262 .resource = ceu_resources,
263 .dev = {
264 .platform_data = &sh_mobile_ceu_info,
265 },
266};
267
Yusuke Goda04e917b2008-06-06 17:03:23 +0900268static struct platform_device *ap325rxa_devices[] __initdata = {
269 &smc9118_device,
Magnus Damm69689802008-07-28 19:07:04 +0900270 &ap325rxa_nor_flash_device,
271 &lcdc_device,
Magnus Damm8b2224d2008-07-28 19:14:35 +0900272 &ceu_device,
273 &camera_device,
Yusuke Goda04e917b2008-06-06 17:03:23 +0900274};
275
Magnus Damm026953d2008-07-05 12:32:44 +0900276static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
277};
278
Yusuke Goda04e917b2008-06-06 17:03:23 +0900279static int __init ap325rxa_devices_setup(void)
280{
Magnus Damm69689802008-07-28 19:07:04 +0900281 clk_always_enable("mstp200"); /* LCDC */
Magnus Damm8b2224d2008-07-28 19:14:35 +0900282 clk_always_enable("mstp203"); /* CEU */
283
284 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
Magnus Damm69689802008-07-28 19:07:04 +0900285
Magnus Damm026953d2008-07-05 12:32:44 +0900286 i2c_register_board_info(0, ap325rxa_i2c_devices,
287 ARRAY_SIZE(ap325rxa_i2c_devices));
288
Yusuke Goda04e917b2008-06-06 17:03:23 +0900289 return platform_add_devices(ap325rxa_devices,
290 ARRAY_SIZE(ap325rxa_devices));
291}
292device_initcall(ap325rxa_devices_setup);
293
Yusuke Goda04e917b2008-06-06 17:03:23 +0900294static void __init ap325rxa_setup(char **cmdline_p)
295{
Magnus Damm69689802008-07-28 19:07:04 +0900296 /* LCDC configuration */
297 ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
298 ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
299 ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
300 ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
301 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);
Magnus Damm8b2224d2008-07-28 19:14:35 +0900302
303 /* CEU */
304 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
305 ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
306 ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR);
307 ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR);
Yusuke Goda04e917b2008-06-06 17:03:23 +0900308}
309
310static struct sh_machine_vector mv_ap325rxa __initmv = {
311 .mv_name = "AP-325RXA",
312 .mv_setup = ap325rxa_setup,
313};