blob: 819a0331cda9d440fd368f16d38941db371caa8c [file] [log] [blame]
Jeremy Fitzhardingea42089d2007-07-17 18:37:04 -07001/******************************************************************************
2 * xen.h
3 *
4 * Guest OS interface to Xen.
5 *
6 * Copyright (c) 2004, K A Fraser
7 */
8
9#ifndef __XEN_PUBLIC_XEN_H__
10#define __XEN_PUBLIC_XEN_H__
11
12#include <asm/xen/interface.h>
Gerd Hoffmann1c7b67f2008-06-03 16:17:30 +020013#include <asm/pvclock-abi.h>
Jeremy Fitzhardingea42089d2007-07-17 18:37:04 -070014
15/*
16 * XEN "SYSTEM CALLS" (a.k.a. HYPERCALLS).
17 */
18
19/*
20 * x86_32: EAX = vector; EBX, ECX, EDX, ESI, EDI = args 1, 2, 3, 4, 5.
21 * EAX = return value
22 * (argument registers may be clobbered on return)
23 * x86_64: RAX = vector; RDI, RSI, RDX, R10, R8, R9 = args 1, 2, 3, 4, 5, 6.
24 * RAX = return value
25 * (argument registers not clobbered on return; RCX, R11 are)
26 */
27#define __HYPERVISOR_set_trap_table 0
28#define __HYPERVISOR_mmu_update 1
29#define __HYPERVISOR_set_gdt 2
30#define __HYPERVISOR_stack_switch 3
31#define __HYPERVISOR_set_callbacks 4
32#define __HYPERVISOR_fpu_taskswitch 5
33#define __HYPERVISOR_sched_op 6
34#define __HYPERVISOR_dom0_op 7
35#define __HYPERVISOR_set_debugreg 8
36#define __HYPERVISOR_get_debugreg 9
37#define __HYPERVISOR_update_descriptor 10
38#define __HYPERVISOR_memory_op 12
39#define __HYPERVISOR_multicall 13
40#define __HYPERVISOR_update_va_mapping 14
41#define __HYPERVISOR_set_timer_op 15
42#define __HYPERVISOR_event_channel_op_compat 16
43#define __HYPERVISOR_xen_version 17
44#define __HYPERVISOR_console_io 18
45#define __HYPERVISOR_physdev_op_compat 19
46#define __HYPERVISOR_grant_table_op 20
47#define __HYPERVISOR_vm_assist 21
48#define __HYPERVISOR_update_va_mapping_otherdomain 22
49#define __HYPERVISOR_iret 23 /* x86 only */
50#define __HYPERVISOR_vcpu_op 24
51#define __HYPERVISOR_set_segment_base 25 /* x86/64 only */
52#define __HYPERVISOR_mmuext_op 26
53#define __HYPERVISOR_acm_op 27
54#define __HYPERVISOR_nmi_op 28
55#define __HYPERVISOR_sched_op_new 29
56#define __HYPERVISOR_callback_op 30
57#define __HYPERVISOR_xenoprof_op 31
58#define __HYPERVISOR_event_channel_op 32
59#define __HYPERVISOR_physdev_op 33
60#define __HYPERVISOR_hvm_op 34
61
Isaku Yamahata9a9db272008-04-02 10:53:50 -070062/* Architecture-specific hypercall definitions. */
63#define __HYPERVISOR_arch_0 48
64#define __HYPERVISOR_arch_1 49
65#define __HYPERVISOR_arch_2 50
66#define __HYPERVISOR_arch_3 51
67#define __HYPERVISOR_arch_4 52
68#define __HYPERVISOR_arch_5 53
69#define __HYPERVISOR_arch_6 54
70#define __HYPERVISOR_arch_7 55
71
Jeremy Fitzhardingea42089d2007-07-17 18:37:04 -070072/*
73 * VIRTUAL INTERRUPTS
74 *
75 * Virtual interrupts that a guest OS may receive from Xen.
76 */
77#define VIRQ_TIMER 0 /* Timebase update, and/or requested timeout. */
78#define VIRQ_DEBUG 1 /* Request guest to dump debug info. */
79#define VIRQ_CONSOLE 2 /* (DOM0) Bytes received on emergency console. */
80#define VIRQ_DOM_EXC 3 /* (DOM0) Exceptional event for some domain. */
81#define VIRQ_DEBUGGER 6 /* (DOM0) A domain has paused for debugging. */
Jeremy Fitzhardingea42089d2007-07-17 18:37:04 -070082
Isaku Yamahata2eb6d5e2008-04-02 10:53:51 -070083/* Architecture-specific VIRQ definitions. */
84#define VIRQ_ARCH_0 16
85#define VIRQ_ARCH_1 17
86#define VIRQ_ARCH_2 18
87#define VIRQ_ARCH_3 19
88#define VIRQ_ARCH_4 20
89#define VIRQ_ARCH_5 21
90#define VIRQ_ARCH_6 22
91#define VIRQ_ARCH_7 23
92
93#define NR_VIRQS 24
Jeremy Fitzhardingea42089d2007-07-17 18:37:04 -070094/*
95 * MMU-UPDATE REQUESTS
96 *
97 * HYPERVISOR_mmu_update() accepts a list of (ptr, val) pairs.
98 * A foreigndom (FD) can be specified (or DOMID_SELF for none).
99 * Where the FD has some effect, it is described below.
100 * ptr[1:0] specifies the appropriate MMU_* command.
101 *
102 * ptr[1:0] == MMU_NORMAL_PT_UPDATE:
103 * Updates an entry in a page table. If updating an L1 table, and the new
104 * table entry is valid/present, the mapped frame must belong to the FD, if
105 * an FD has been specified. If attempting to map an I/O page then the
106 * caller assumes the privilege of the FD.
107 * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller.
108 * FD == DOMID_XEN: Map restricted areas of Xen's heap space.
109 * ptr[:2] -- Machine address of the page-table entry to modify.
110 * val -- Value to write.
111 *
112 * ptr[1:0] == MMU_MACHPHYS_UPDATE:
113 * Updates an entry in the machine->pseudo-physical mapping table.
114 * ptr[:2] -- Machine address within the frame whose mapping to modify.
115 * The frame must belong to the FD, if one is specified.
116 * val -- Value to write into the mapping entry.
117 */
118#define MMU_NORMAL_PT_UPDATE 0 /* checked '*ptr = val'. ptr is MA. */
119#define MMU_MACHPHYS_UPDATE 1 /* ptr = MA of frame to modify entry for */
120
121/*
122 * MMU EXTENDED OPERATIONS
123 *
124 * HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures.
125 * A foreigndom (FD) can be specified (or DOMID_SELF for none).
126 * Where the FD has some effect, it is described below.
127 *
128 * cmd: MMUEXT_(UN)PIN_*_TABLE
129 * mfn: Machine frame number to be (un)pinned as a p.t. page.
130 * The frame must belong to the FD, if one is specified.
131 *
132 * cmd: MMUEXT_NEW_BASEPTR
133 * mfn: Machine frame number of new page-table base to install in MMU.
134 *
135 * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only]
136 * mfn: Machine frame number of new page-table base to install in MMU
137 * when in user space.
138 *
139 * cmd: MMUEXT_TLB_FLUSH_LOCAL
140 * No additional arguments. Flushes local TLB.
141 *
142 * cmd: MMUEXT_INVLPG_LOCAL
143 * linear_addr: Linear address to be flushed from the local TLB.
144 *
145 * cmd: MMUEXT_TLB_FLUSH_MULTI
146 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
147 *
148 * cmd: MMUEXT_INVLPG_MULTI
149 * linear_addr: Linear address to be flushed.
150 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
151 *
152 * cmd: MMUEXT_TLB_FLUSH_ALL
153 * No additional arguments. Flushes all VCPUs' TLBs.
154 *
155 * cmd: MMUEXT_INVLPG_ALL
156 * linear_addr: Linear address to be flushed from all VCPUs' TLBs.
157 *
158 * cmd: MMUEXT_FLUSH_CACHE
159 * No additional arguments. Writes back and flushes cache contents.
160 *
161 * cmd: MMUEXT_SET_LDT
162 * linear_addr: Linear address of LDT base (NB. must be page-aligned).
163 * nr_ents: Number of entries in LDT.
164 */
165#define MMUEXT_PIN_L1_TABLE 0
166#define MMUEXT_PIN_L2_TABLE 1
167#define MMUEXT_PIN_L3_TABLE 2
168#define MMUEXT_PIN_L4_TABLE 3
169#define MMUEXT_UNPIN_TABLE 4
170#define MMUEXT_NEW_BASEPTR 5
171#define MMUEXT_TLB_FLUSH_LOCAL 6
172#define MMUEXT_INVLPG_LOCAL 7
173#define MMUEXT_TLB_FLUSH_MULTI 8
174#define MMUEXT_INVLPG_MULTI 9
175#define MMUEXT_TLB_FLUSH_ALL 10
176#define MMUEXT_INVLPG_ALL 11
177#define MMUEXT_FLUSH_CACHE 12
178#define MMUEXT_SET_LDT 13
179#define MMUEXT_NEW_USER_BASEPTR 15
180
181#ifndef __ASSEMBLY__
182struct mmuext_op {
183 unsigned int cmd;
184 union {
185 /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR */
186 unsigned long mfn;
187 /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */
188 unsigned long linear_addr;
189 } arg1;
190 union {
191 /* SET_LDT */
192 unsigned int nr_ents;
193 /* TLB_FLUSH_MULTI, INVLPG_MULTI */
194 void *vcpumask;
195 } arg2;
196};
197DEFINE_GUEST_HANDLE_STRUCT(mmuext_op);
198#endif
199
200/* These are passed as 'flags' to update_va_mapping. They can be ORed. */
201/* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap. */
202/* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer. */
203#define UVMF_NONE (0UL<<0) /* No flushing at all. */
204#define UVMF_TLB_FLUSH (1UL<<0) /* Flush entire TLB(s). */
205#define UVMF_INVLPG (2UL<<0) /* Flush only one entry. */
206#define UVMF_FLUSHTYPE_MASK (3UL<<0)
207#define UVMF_MULTI (0UL<<2) /* Flush subset of TLBs. */
208#define UVMF_LOCAL (0UL<<2) /* Flush local TLB. */
209#define UVMF_ALL (1UL<<2) /* Flush all TLBs. */
210
211/*
212 * Commands to HYPERVISOR_console_io().
213 */
214#define CONSOLEIO_write 0
215#define CONSOLEIO_read 1
216
217/*
218 * Commands to HYPERVISOR_vm_assist().
219 */
220#define VMASST_CMD_enable 0
221#define VMASST_CMD_disable 1
222#define VMASST_TYPE_4gb_segments 0
223#define VMASST_TYPE_4gb_segments_notify 1
224#define VMASST_TYPE_writable_pagetables 2
225#define VMASST_TYPE_pae_extended_cr3 3
226#define MAX_VMASST_TYPE 3
227
228#ifndef __ASSEMBLY__
229
230typedef uint16_t domid_t;
231
232/* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */
233#define DOMID_FIRST_RESERVED (0x7FF0U)
234
235/* DOMID_SELF is used in certain contexts to refer to oneself. */
236#define DOMID_SELF (0x7FF0U)
237
238/*
239 * DOMID_IO is used to restrict page-table updates to mapping I/O memory.
240 * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO
241 * is useful to ensure that no mappings to the OS's own heap are accidentally
242 * installed. (e.g., in Linux this could cause havoc as reference counts
243 * aren't adjusted on the I/O-mapping code path).
244 * This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can
245 * be specified by any calling domain.
246 */
247#define DOMID_IO (0x7FF1U)
248
249/*
250 * DOMID_XEN is used to allow privileged domains to map restricted parts of
251 * Xen's heap space (e.g., the machine_to_phys table).
252 * This only makes sense in MMUEXT_SET_FOREIGNDOM, and is only permitted if
253 * the caller is privileged.
254 */
255#define DOMID_XEN (0x7FF2U)
256
257/*
258 * Send an array of these to HYPERVISOR_mmu_update().
259 * NB. The fields are natural pointer/address size for this architecture.
260 */
261struct mmu_update {
262 uint64_t ptr; /* Machine address of PTE. */
263 uint64_t val; /* New contents of PTE. */
264};
265DEFINE_GUEST_HANDLE_STRUCT(mmu_update);
266
267/*
268 * Send an array of these to HYPERVISOR_multicall().
269 * NB. The fields are natural register size for this architecture.
270 */
271struct multicall_entry {
272 unsigned long op;
273 long result;
274 unsigned long args[6];
275};
276DEFINE_GUEST_HANDLE_STRUCT(multicall_entry);
277
278/*
279 * Event channel endpoints per domain:
280 * 1024 if a long is 32 bits; 4096 if a long is 64 bits.
281 */
282#define NR_EVENT_CHANNELS (sizeof(unsigned long) * sizeof(unsigned long) * 64)
283
284struct vcpu_time_info {
285 /*
286 * Updates to the following values are preceded and followed
287 * by an increment of 'version'. The guest can therefore
288 * detect updates by looking for changes to 'version'. If the
289 * least-significant bit of the version number is set then an
290 * update is in progress and the guest must wait to read a
291 * consistent set of values. The correct way to interact with
292 * the version number is similar to Linux's seqlock: see the
293 * implementations of read_seqbegin/read_seqretry.
294 */
295 uint32_t version;
296 uint32_t pad0;
297 uint64_t tsc_timestamp; /* TSC at last update of time vals. */
298 uint64_t system_time; /* Time, in nanosecs, since boot. */
299 /*
300 * Current system time:
301 * system_time + ((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul
302 * CPU frequency (Hz):
303 * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift
304 */
305 uint32_t tsc_to_system_mul;
306 int8_t tsc_shift;
307 int8_t pad1[3];
308}; /* 32 bytes */
309
310struct vcpu_info {
311 /*
312 * 'evtchn_upcall_pending' is written non-zero by Xen to indicate
313 * a pending notification for a particular VCPU. It is then cleared
314 * by the guest OS /before/ checking for pending work, thus avoiding
315 * a set-and-check race. Note that the mask is only accessed by Xen
316 * on the CPU that is currently hosting the VCPU. This means that the
317 * pending and mask flags can be updated by the guest without special
318 * synchronisation (i.e., no need for the x86 LOCK prefix).
319 * This may seem suboptimal because if the pending flag is set by
320 * a different CPU then an IPI may be scheduled even when the mask
321 * is set. However, note:
322 * 1. The task of 'interrupt holdoff' is covered by the per-event-
323 * channel mask bits. A 'noisy' event that is continually being
324 * triggered can be masked at source at this very precise
325 * granularity.
326 * 2. The main purpose of the per-VCPU mask is therefore to restrict
327 * reentrant execution: whether for concurrency control, or to
328 * prevent unbounded stack usage. Whatever the purpose, we expect
329 * that the mask will be asserted only for short periods at a time,
330 * and so the likelihood of a 'spurious' IPI is suitably small.
331 * The mask is read before making an event upcall to the guest: a
332 * non-zero mask therefore guarantees that the VCPU will not receive
333 * an upcall activation. The mask is cleared when the VCPU requests
334 * to block: this avoids wakeup-waiting races.
335 */
336 uint8_t evtchn_upcall_pending;
337 uint8_t evtchn_upcall_mask;
338 unsigned long evtchn_pending_sel;
339 struct arch_vcpu_info arch;
Gerd Hoffmann1c7b67f2008-06-03 16:17:30 +0200340 struct pvclock_vcpu_time_info time;
Jeremy Fitzhardingea42089d2007-07-17 18:37:04 -0700341}; /* 64 bytes (x86) */
342
343/*
344 * Xen/kernel shared data -- pointer provided in start_info.
345 * NB. We expect that this struct is smaller than a page.
346 */
347struct shared_info {
348 struct vcpu_info vcpu_info[MAX_VIRT_CPUS];
349
350 /*
351 * A domain can create "event channels" on which it can send and receive
352 * asynchronous event notifications. There are three classes of event that
353 * are delivered by this mechanism:
354 * 1. Bi-directional inter- and intra-domain connections. Domains must
355 * arrange out-of-band to set up a connection (usually by allocating
356 * an unbound 'listener' port and avertising that via a storage service
357 * such as xenstore).
358 * 2. Physical interrupts. A domain with suitable hardware-access
359 * privileges can bind an event-channel port to a physical interrupt
360 * source.
361 * 3. Virtual interrupts ('events'). A domain can bind an event-channel
362 * port to a virtual interrupt source, such as the virtual-timer
363 * device or the emergency console.
364 *
365 * Event channels are addressed by a "port index". Each channel is
366 * associated with two bits of information:
367 * 1. PENDING -- notifies the domain that there is a pending notification
368 * to be processed. This bit is cleared by the guest.
369 * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING
370 * will cause an asynchronous upcall to be scheduled. This bit is only
371 * updated by the guest. It is read-only within Xen. If a channel
372 * becomes pending while the channel is masked then the 'edge' is lost
373 * (i.e., when the channel is unmasked, the guest must manually handle
374 * pending notifications as no upcall will be scheduled by Xen).
375 *
376 * To expedite scanning of pending notifications, any 0->1 pending
377 * transition on an unmasked channel causes a corresponding bit in a
378 * per-vcpu selector word to be set. Each bit in the selector covers a
379 * 'C long' in the PENDING bitfield array.
380 */
381 unsigned long evtchn_pending[sizeof(unsigned long) * 8];
382 unsigned long evtchn_mask[sizeof(unsigned long) * 8];
383
384 /*
385 * Wallclock time: updated only by control software. Guests should base
386 * their gettimeofday() syscall on this wallclock-base value.
387 */
Gerd Hoffmann1c7b67f2008-06-03 16:17:30 +0200388 struct pvclock_wall_clock wc;
Jeremy Fitzhardingea42089d2007-07-17 18:37:04 -0700389
390 struct arch_shared_info arch;
391
392};
393
394/*
395 * Start-of-day memory layout for the initial domain (DOM0):
396 * 1. The domain is started within contiguous virtual-memory region.
397 * 2. The contiguous region begins and ends on an aligned 4MB boundary.
398 * 3. The region start corresponds to the load address of the OS image.
399 * If the load address is not 4MB aligned then the address is rounded down.
400 * 4. This the order of bootstrap elements in the initial virtual region:
401 * a. relocated kernel image
402 * b. initial ram disk [mod_start, mod_len]
403 * c. list of allocated page frames [mfn_list, nr_pages]
404 * d. start_info_t structure [register ESI (x86)]
405 * e. bootstrap page tables [pt_base, CR3 (x86)]
406 * f. bootstrap stack [register ESP (x86)]
407 * 5. Bootstrap elements are packed together, but each is 4kB-aligned.
408 * 6. The initial ram disk may be omitted.
409 * 7. The list of page frames forms a contiguous 'pseudo-physical' memory
410 * layout for the domain. In particular, the bootstrap virtual-memory
411 * region is a 1:1 mapping to the first section of the pseudo-physical map.
412 * 8. All bootstrap elements are mapped read-writable for the guest OS. The
413 * only exception is the bootstrap page table, which is mapped read-only.
414 * 9. There is guaranteed to be at least 512kB padding after the final
415 * bootstrap element. If necessary, the bootstrap virtual region is
416 * extended by an extra 4MB to ensure this.
417 */
418
419#define MAX_GUEST_CMDLINE 1024
420struct start_info {
421 /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME. */
422 char magic[32]; /* "xen-<version>-<platform>". */
423 unsigned long nr_pages; /* Total pages allocated to this domain. */
424 unsigned long shared_info; /* MACHINE address of shared info struct. */
425 uint32_t flags; /* SIF_xxx flags. */
426 unsigned long store_mfn; /* MACHINE page number of shared page. */
427 uint32_t store_evtchn; /* Event channel for store communication. */
428 union {
429 struct {
430 unsigned long mfn; /* MACHINE page number of console page. */
431 uint32_t evtchn; /* Event channel for console page. */
432 } domU;
433 struct {
434 uint32_t info_off; /* Offset of console_info struct. */
435 uint32_t info_size; /* Size of console_info struct from start.*/
436 } dom0;
437 } console;
438 /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME). */
439 unsigned long pt_base; /* VIRTUAL address of page directory. */
440 unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames. */
441 unsigned long mfn_list; /* VIRTUAL address of page-frame list. */
442 unsigned long mod_start; /* VIRTUAL address of pre-loaded module. */
443 unsigned long mod_len; /* Size (bytes) of pre-loaded module. */
444 int8_t cmd_line[MAX_GUEST_CMDLINE];
445};
446
447/* These flags are passed in the 'flags' field of start_info_t. */
448#define SIF_PRIVILEGED (1<<0) /* Is the domain privileged? */
449#define SIF_INITDOMAIN (1<<1) /* Is this the initial control domain? */
450
451typedef uint64_t cpumap_t;
452
453typedef uint8_t xen_domain_handle_t[16];
454
455/* Turn a plain number into a C unsigned long constant. */
456#define __mk_unsigned_long(x) x ## UL
457#define mk_unsigned_long(x) __mk_unsigned_long(x)
458
459#else /* __ASSEMBLY__ */
460
461/* In assembly code we cannot use C numeric constant suffixes. */
462#define mk_unsigned_long(x) x
463
464#endif /* !__ASSEMBLY__ */
465
466#endif /* __XEN_PUBLIC_XEN_H__ */