blob: 0860e59541f5a5bf1213c8c08a888fd549772c66 [file] [log] [blame]
AnilKumar Chimatae78789a2017-04-07 12:18:46 -07001/*
2 * QTI CE device driver.
3 *
4 * Copyright (c) 2010-2017, The Linux Foundation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and
8 * only version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#include <linux/mman.h>
16#include <linux/types.h>
17#include <linux/platform_device.h>
18#include <linux/dma-mapping.h>
19#include <linux/kernel.h>
20#include <linux/dmapool.h>
21#include <linux/interrupt.h>
22#include <linux/spinlock.h>
23#include <linux/init.h>
24#include <linux/module.h>
25#include <linux/fs.h>
26#include <linux/miscdevice.h>
27#include <linux/uaccess.h>
28#include <linux/debugfs.h>
29#include <linux/scatterlist.h>
30#include <linux/crypto.h>
31#include <linux/platform_data/qcom_crypto_device.h>
32#include <linux/msm-bus.h>
33#include <linux/qcedev.h>
34
35#include <crypto/hash.h>
36#include "qcedevi.h"
37#include "qce.h"
38
39#include <linux/compat.h>
40#include "compat_qcedev.h"
41
42#define CACHE_LINE_SIZE 32
43#define CE_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE
44
45static uint8_t _std_init_vector_sha1_uint8[] = {
46 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
47 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
48 0xC3, 0xD2, 0xE1, 0xF0
49};
50/* standard initialization vector for SHA-256, source: FIPS 180-2 */
51static uint8_t _std_init_vector_sha256_uint8[] = {
52 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
53 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
54 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
55 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
56};
57
58static DEFINE_MUTEX(send_cmd_lock);
59static DEFINE_MUTEX(qcedev_sent_bw_req);
60
61static void qcedev_ce_high_bw_req(struct qcedev_control *podev,
62 bool high_bw_req)
63{
64 int ret = 0;
65
66 mutex_lock(&qcedev_sent_bw_req);
67 if (high_bw_req) {
68 if (podev->high_bw_req_count == 0) {
69 ret = qce_enable_clk(podev->qce);
70 if (ret) {
71 pr_err("%s Unable enable clk\n", __func__);
72 mutex_unlock(&qcedev_sent_bw_req);
73 return;
74 }
75 ret = msm_bus_scale_client_update_request(
76 podev->bus_scale_handle, 1);
77 if (ret) {
78 pr_err("%s Unable to set to high bandwidth\n",
79 __func__);
80 ret = qce_disable_clk(podev->qce);
81 mutex_unlock(&qcedev_sent_bw_req);
82 return;
83 }
84 }
85 podev->high_bw_req_count++;
86 } else {
87 if (podev->high_bw_req_count == 1) {
88 ret = msm_bus_scale_client_update_request(
89 podev->bus_scale_handle, 0);
90 if (ret) {
91 pr_err("%s Unable to set to low bandwidth\n",
92 __func__);
93 mutex_unlock(&qcedev_sent_bw_req);
94 return;
95 }
96 ret = qce_disable_clk(podev->qce);
97 if (ret) {
98 pr_err("%s Unable disable clk\n", __func__);
99 ret = msm_bus_scale_client_update_request(
100 podev->bus_scale_handle, 1);
101 if (ret)
102 pr_err("%s Unable to set to high bandwidth\n",
103 __func__);
104 mutex_unlock(&qcedev_sent_bw_req);
105 return;
106 }
107 }
108 podev->high_bw_req_count--;
109 }
110 mutex_unlock(&qcedev_sent_bw_req);
111}
112
113#define QCEDEV_MAGIC 0x56434544 /* "qced" */
114
115static int qcedev_open(struct inode *inode, struct file *file);
116static int qcedev_release(struct inode *inode, struct file *file);
117static int start_cipher_req(struct qcedev_control *podev);
118static int start_sha_req(struct qcedev_control *podev);
119static inline long qcedev_ioctl(struct file *file,
120 unsigned int cmd, unsigned long arg);
121
122#ifdef CONFIG_COMPAT
123#include "compat_qcedev.c"
124#else
125#define compat_qcedev_ioctl NULL
126#endif
127
128static const struct file_operations qcedev_fops = {
129 .owner = THIS_MODULE,
130 .unlocked_ioctl = qcedev_ioctl,
131 .compat_ioctl = compat_qcedev_ioctl,
132 .open = qcedev_open,
133 .release = qcedev_release,
134};
135
136static struct qcedev_control qce_dev[] = {
137 {
138 .miscdevice = {
139 .minor = MISC_DYNAMIC_MINOR,
140 .name = "qce",
141 .fops = &qcedev_fops,
142 },
143 .magic = QCEDEV_MAGIC,
144 },
145};
146
147#define MAX_QCE_DEVICE ARRAY_SIZE(qce_dev)
148#define DEBUG_MAX_FNAME 16
149#define DEBUG_MAX_RW_BUF 1024
150
151struct qcedev_stat {
152 u32 qcedev_dec_success;
153 u32 qcedev_dec_fail;
154 u32 qcedev_enc_success;
155 u32 qcedev_enc_fail;
156 u32 qcedev_sha_success;
157 u32 qcedev_sha_fail;
158};
159
160static struct qcedev_stat _qcedev_stat;
161static struct dentry *_debug_dent;
162static char _debug_read_buf[DEBUG_MAX_RW_BUF];
163static int _debug_qcedev;
164
165static struct qcedev_control *qcedev_minor_to_control(unsigned int n)
166{
167 int i;
168
169 for (i = 0; i < MAX_QCE_DEVICE; i++) {
170 if (qce_dev[i].miscdevice.minor == n)
171 return &qce_dev[i];
172 }
173 return NULL;
174}
175
176static int qcedev_open(struct inode *inode, struct file *file)
177{
178 struct qcedev_handle *handle;
179 struct qcedev_control *podev;
180
181 podev = qcedev_minor_to_control(MINOR(inode->i_rdev));
182 if (podev == NULL) {
183 pr_err("%s: no such device %d\n", __func__,
184 MINOR(inode->i_rdev));
185 return -ENOENT;
186 }
187
188 handle = kzalloc(sizeof(struct qcedev_handle), GFP_KERNEL);
189 if (handle == NULL)
190 return -ENOMEM;
191
192 handle->cntl = podev;
193 file->private_data = handle;
194 if (podev->platform_support.bus_scale_table != NULL)
195 qcedev_ce_high_bw_req(podev, true);
196 return 0;
197}
198
199static int qcedev_release(struct inode *inode, struct file *file)
200{
201 struct qcedev_control *podev;
202 struct qcedev_handle *handle;
203
204 handle = file->private_data;
205 podev = handle->cntl;
206 if (podev != NULL && podev->magic != QCEDEV_MAGIC) {
207 pr_err("%s: invalid handle %p\n",
208 __func__, podev);
209 }
210 kzfree(handle);
211 file->private_data = NULL;
212 if (podev != NULL && podev->platform_support.bus_scale_table != NULL)
213 qcedev_ce_high_bw_req(podev, false);
214 return 0;
215}
216
217static void req_done(unsigned long data)
218{
219 struct qcedev_control *podev = (struct qcedev_control *)data;
220 struct qcedev_async_req *areq;
221 unsigned long flags = 0;
222 struct qcedev_async_req *new_req = NULL;
223 int ret = 0;
224
225 spin_lock_irqsave(&podev->lock, flags);
226 areq = podev->active_command;
227 podev->active_command = NULL;
228
229again:
230 if (!list_empty(&podev->ready_commands)) {
231 new_req = container_of(podev->ready_commands.next,
232 struct qcedev_async_req, list);
233 list_del(&new_req->list);
234 podev->active_command = new_req;
235 new_req->err = 0;
236 if (new_req->op_type == QCEDEV_CRYPTO_OPER_CIPHER)
237 ret = start_cipher_req(podev);
238 else
239 ret = start_sha_req(podev);
240 }
241
242 spin_unlock_irqrestore(&podev->lock, flags);
243
244 if (areq)
245 complete(&areq->complete);
246
247 if (new_req && ret) {
248 complete(&new_req->complete);
249 spin_lock_irqsave(&podev->lock, flags);
250 podev->active_command = NULL;
251 areq = NULL;
252 ret = 0;
253 new_req = NULL;
254 goto again;
255 }
256}
257
258void qcedev_sha_req_cb(void *cookie, unsigned char *digest,
259 unsigned char *authdata, int ret)
260{
261 struct qcedev_sha_req *areq;
262 struct qcedev_control *pdev;
263 struct qcedev_handle *handle;
264
265 uint32_t *auth32 = (uint32_t *)authdata;
266
267 areq = (struct qcedev_sha_req *) cookie;
268 handle = (struct qcedev_handle *) areq->cookie;
269 pdev = handle->cntl;
270
271 if (digest)
272 memcpy(&handle->sha_ctxt.digest[0], digest, 32);
273
274 if (authdata) {
275 handle->sha_ctxt.auth_data[0] = auth32[0];
276 handle->sha_ctxt.auth_data[1] = auth32[1];
277 handle->sha_ctxt.auth_data[2] = auth32[2];
278 handle->sha_ctxt.auth_data[3] = auth32[3];
279 }
280
281 tasklet_schedule(&pdev->done_tasklet);
282};
283
284
285void qcedev_cipher_req_cb(void *cookie, unsigned char *icv,
286 unsigned char *iv, int ret)
287{
288 struct qcedev_cipher_req *areq;
289 struct qcedev_handle *handle;
290 struct qcedev_control *podev;
291 struct qcedev_async_req *qcedev_areq;
292
293 areq = (struct qcedev_cipher_req *) cookie;
294 handle = (struct qcedev_handle *) areq->cookie;
295 podev = handle->cntl;
296 qcedev_areq = podev->active_command;
297
298 if (iv)
299 memcpy(&qcedev_areq->cipher_op_req.iv[0], iv,
300 qcedev_areq->cipher_op_req.ivlen);
301 tasklet_schedule(&podev->done_tasklet);
302};
303
304static int start_cipher_req(struct qcedev_control *podev)
305{
306 struct qcedev_async_req *qcedev_areq;
307 struct qce_req creq;
308 int ret = 0;
309
310 /* start the command on the podev->active_command */
311 qcedev_areq = podev->active_command;
312 qcedev_areq->cipher_req.cookie = qcedev_areq->handle;
313 if (qcedev_areq->cipher_op_req.use_pmem == QCEDEV_USE_PMEM) {
314 pr_err("%s: Use of PMEM is not supported\n", __func__);
315 goto unsupported;
316 }
317 creq.pmem = NULL;
318 switch (qcedev_areq->cipher_op_req.alg) {
319 case QCEDEV_ALG_DES:
320 creq.alg = CIPHER_ALG_DES;
321 break;
322 case QCEDEV_ALG_3DES:
323 creq.alg = CIPHER_ALG_3DES;
324 break;
325 case QCEDEV_ALG_AES:
326 creq.alg = CIPHER_ALG_AES;
327 break;
328 default:
329 return -EINVAL;
330 };
331
332 switch (qcedev_areq->cipher_op_req.mode) {
333 case QCEDEV_AES_MODE_CBC:
334 case QCEDEV_DES_MODE_CBC:
335 creq.mode = QCE_MODE_CBC;
336 break;
337 case QCEDEV_AES_MODE_ECB:
338 case QCEDEV_DES_MODE_ECB:
339 creq.mode = QCE_MODE_ECB;
340 break;
341 case QCEDEV_AES_MODE_CTR:
342 creq.mode = QCE_MODE_CTR;
343 break;
344 case QCEDEV_AES_MODE_XTS:
345 creq.mode = QCE_MODE_XTS;
346 break;
347 default:
348 return -EINVAL;
349 };
350
351 if ((creq.alg == CIPHER_ALG_AES) &&
352 (creq.mode == QCE_MODE_CTR)) {
353 creq.dir = QCE_ENCRYPT;
354 } else {
355 if (qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC)
356 creq.dir = QCE_ENCRYPT;
357 else
358 creq.dir = QCE_DECRYPT;
359 }
360
361 creq.iv = &qcedev_areq->cipher_op_req.iv[0];
362 creq.ivsize = qcedev_areq->cipher_op_req.ivlen;
363
364 creq.enckey = &qcedev_areq->cipher_op_req.enckey[0];
365 creq.encklen = qcedev_areq->cipher_op_req.encklen;
366
367 creq.cryptlen = qcedev_areq->cipher_op_req.data_len;
368
369 if (qcedev_areq->cipher_op_req.encklen == 0) {
370 if ((qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC_NO_KEY)
371 || (qcedev_areq->cipher_op_req.op ==
372 QCEDEV_OPER_DEC_NO_KEY))
373 creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY;
374 else {
375 int i;
376
377 for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
378 if (qcedev_areq->cipher_op_req.enckey[i] != 0)
379 break;
380 }
381
382 if ((podev->platform_support.hw_key_support == 1) &&
383 (i == QCEDEV_MAX_KEY_SIZE))
384 creq.op = QCE_REQ_ABLK_CIPHER;
385 else {
386 ret = -EINVAL;
387 goto unsupported;
388 }
389 }
390 } else {
391 creq.op = QCE_REQ_ABLK_CIPHER;
392 }
393
394 creq.qce_cb = qcedev_cipher_req_cb;
395 creq.areq = (void *)&qcedev_areq->cipher_req;
396 creq.flags = 0;
397 ret = qce_ablk_cipher_req(podev->qce, &creq);
398unsupported:
399 if (ret)
400 qcedev_areq->err = -ENXIO;
401 else
402 qcedev_areq->err = 0;
403 return ret;
404};
405
406static int start_sha_req(struct qcedev_control *podev)
407{
408 struct qcedev_async_req *qcedev_areq;
409 struct qce_sha_req sreq;
410 int ret = 0;
411 struct qcedev_handle *handle;
412
413 /* start the command on the podev->active_command */
414 qcedev_areq = podev->active_command;
415 handle = qcedev_areq->handle;
416
417 switch (qcedev_areq->sha_op_req.alg) {
418 case QCEDEV_ALG_SHA1:
419 sreq.alg = QCE_HASH_SHA1;
420 break;
421 case QCEDEV_ALG_SHA256:
422 sreq.alg = QCE_HASH_SHA256;
423 break;
424 case QCEDEV_ALG_SHA1_HMAC:
425 if (podev->ce_support.sha_hmac) {
426 sreq.alg = QCE_HASH_SHA1_HMAC;
427 sreq.authkey = &handle->sha_ctxt.authkey[0];
428 sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
429
430 } else {
431 sreq.alg = QCE_HASH_SHA1;
432 sreq.authkey = NULL;
433 }
434 break;
435 case QCEDEV_ALG_SHA256_HMAC:
436 if (podev->ce_support.sha_hmac) {
437 sreq.alg = QCE_HASH_SHA256_HMAC;
438 sreq.authkey = &handle->sha_ctxt.authkey[0];
439 sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
440 } else {
441 sreq.alg = QCE_HASH_SHA256;
442 sreq.authkey = NULL;
443 }
444 break;
445 case QCEDEV_ALG_AES_CMAC:
446 sreq.alg = QCE_HASH_AES_CMAC;
447 sreq.authkey = &handle->sha_ctxt.authkey[0];
448 sreq.authklen = qcedev_areq->sha_op_req.authklen;
449 break;
450 default:
451 pr_err("Algorithm %d not supported, exiting\n",
452 qcedev_areq->sha_op_req.alg);
453 return -EINVAL;
454 };
455
456 qcedev_areq->sha_req.cookie = handle;
457
458 sreq.qce_cb = qcedev_sha_req_cb;
459 if (qcedev_areq->sha_op_req.alg != QCEDEV_ALG_AES_CMAC) {
460 sreq.auth_data[0] = handle->sha_ctxt.auth_data[0];
461 sreq.auth_data[1] = handle->sha_ctxt.auth_data[1];
462 sreq.auth_data[2] = handle->sha_ctxt.auth_data[2];
463 sreq.auth_data[3] = handle->sha_ctxt.auth_data[3];
464 sreq.digest = &handle->sha_ctxt.digest[0];
465 sreq.first_blk = handle->sha_ctxt.first_blk;
466 sreq.last_blk = handle->sha_ctxt.last_blk;
467 }
468 sreq.size = qcedev_areq->sha_req.sreq.nbytes;
469 sreq.src = qcedev_areq->sha_req.sreq.src;
470 sreq.areq = (void *)&qcedev_areq->sha_req;
471 sreq.flags = 0;
472
473 ret = qce_process_sha_req(podev->qce, &sreq);
474
475 if (ret)
476 qcedev_areq->err = -ENXIO;
477 else
478 qcedev_areq->err = 0;
479 return ret;
480};
481
482static int submit_req(struct qcedev_async_req *qcedev_areq,
483 struct qcedev_handle *handle)
484{
485 struct qcedev_control *podev;
486 unsigned long flags = 0;
487 int ret = 0;
488 struct qcedev_stat *pstat;
489
490 qcedev_areq->err = 0;
491 podev = handle->cntl;
492
493 spin_lock_irqsave(&podev->lock, flags);
494
495 if (podev->active_command == NULL) {
496 podev->active_command = qcedev_areq;
497 if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER)
498 ret = start_cipher_req(podev);
499 else
500 ret = start_sha_req(podev);
501 } else {
502 list_add_tail(&qcedev_areq->list, &podev->ready_commands);
503 }
504
505 if (ret != 0)
506 podev->active_command = NULL;
507
508 spin_unlock_irqrestore(&podev->lock, flags);
509
510 if (ret == 0)
511 wait_for_completion(&qcedev_areq->complete);
512
513 if (ret)
514 qcedev_areq->err = -EIO;
515
516 pstat = &_qcedev_stat;
517 if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER) {
518 switch (qcedev_areq->cipher_op_req.op) {
519 case QCEDEV_OPER_DEC:
520 if (qcedev_areq->err)
521 pstat->qcedev_dec_fail++;
522 else
523 pstat->qcedev_dec_success++;
524 break;
525 case QCEDEV_OPER_ENC:
526 if (qcedev_areq->err)
527 pstat->qcedev_enc_fail++;
528 else
529 pstat->qcedev_enc_success++;
530 break;
531 default:
532 break;
533 };
534 } else {
535 if (qcedev_areq->err)
536 pstat->qcedev_sha_fail++;
537 else
538 pstat->qcedev_sha_success++;
539 }
540
541 return qcedev_areq->err;
542}
543
544static int qcedev_sha_init(struct qcedev_async_req *areq,
545 struct qcedev_handle *handle)
546{
547 struct qcedev_sha_ctxt *sha_ctxt = &handle->sha_ctxt;
548
549 memset(sha_ctxt, 0, sizeof(struct qcedev_sha_ctxt));
550 sha_ctxt->first_blk = 1;
551
552 if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
553 (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)) {
554 memcpy(&sha_ctxt->digest[0],
555 &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
556 sha_ctxt->diglen = SHA1_DIGEST_SIZE;
557 } else {
558 if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA256) ||
559 (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)) {
560 memcpy(&sha_ctxt->digest[0],
561 &_std_init_vector_sha256_uint8[0],
562 SHA256_DIGEST_SIZE);
563 sha_ctxt->diglen = SHA256_DIGEST_SIZE;
564 }
565 }
566 sha_ctxt->init_done = true;
567 return 0;
568}
569
570
571static int qcedev_sha_update_max_xfer(struct qcedev_async_req *qcedev_areq,
572 struct qcedev_handle *handle,
573 struct scatterlist *sg_src)
574{
575 int err = 0;
576 int i = 0;
577 uint32_t total;
578
579 uint8_t *user_src = NULL;
580 uint8_t *k_src = NULL;
581 uint8_t *k_buf_src = NULL;
582 uint8_t *k_align_src = NULL;
583
584 uint32_t sha_pad_len = 0;
585 uint32_t trailing_buf_len = 0;
586 uint32_t t_buf = handle->sha_ctxt.trailing_buf_len;
587 uint32_t sha_block_size;
588
589 total = qcedev_areq->sha_op_req.data_len + t_buf;
590
591 if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1)
592 sha_block_size = SHA1_BLOCK_SIZE;
593 else
594 sha_block_size = SHA256_BLOCK_SIZE;
595
596 if (total <= sha_block_size) {
597 uint32_t len = qcedev_areq->sha_op_req.data_len;
598
599 i = 0;
600
601 k_src = &handle->sha_ctxt.trailing_buf[t_buf];
602
603 /* Copy data from user src(s) */
604 while (len > 0) {
605 user_src =
606 (void __user *)qcedev_areq->sha_op_req.data[i].vaddr;
607 if (user_src && copy_from_user(k_src,
608 (void __user *)user_src,
609 qcedev_areq->sha_op_req.data[i].len))
610 return -EFAULT;
611
612 len -= qcedev_areq->sha_op_req.data[i].len;
613 k_src += qcedev_areq->sha_op_req.data[i].len;
614 i++;
615 }
616 handle->sha_ctxt.trailing_buf_len = total;
617
618 return 0;
619 }
620
621
622 k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2,
623 GFP_KERNEL);
624 if (k_buf_src == NULL)
625 return -ENOMEM;
626
627 k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
628 CACHE_LINE_SIZE);
629 k_src = k_align_src;
630
631 /* check for trailing buffer from previous updates and append it */
632 if (t_buf > 0) {
633 memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
634 t_buf);
635 k_src += t_buf;
636 }
637
638 /* Copy data from user src(s) */
639 user_src = (void __user *)qcedev_areq->sha_op_req.data[0].vaddr;
640 if (user_src && copy_from_user(k_src,
641 (void __user *)user_src,
642 qcedev_areq->sha_op_req.data[0].len)) {
643 kzfree(k_buf_src);
644 return -EFAULT;
645 }
646 k_src += qcedev_areq->sha_op_req.data[0].len;
647 for (i = 1; i < qcedev_areq->sha_op_req.entries; i++) {
648 user_src = (void __user *)qcedev_areq->sha_op_req.data[i].vaddr;
649 if (user_src && copy_from_user(k_src,
650 (void __user *)user_src,
651 qcedev_areq->sha_op_req.data[i].len)) {
652 kzfree(k_buf_src);
653 return -EFAULT;
654 }
655 k_src += qcedev_areq->sha_op_req.data[i].len;
656 }
657
658 /* get new trailing buffer */
659 sha_pad_len = ALIGN(total, CE_SHA_BLOCK_SIZE) - total;
660 trailing_buf_len = CE_SHA_BLOCK_SIZE - sha_pad_len;
661
662 qcedev_areq->sha_req.sreq.src = sg_src;
663 sg_set_buf(qcedev_areq->sha_req.sreq.src, k_align_src,
664 total-trailing_buf_len);
665 sg_mark_end(qcedev_areq->sha_req.sreq.src);
666
667 qcedev_areq->sha_req.sreq.nbytes = total - trailing_buf_len;
668
669 /* update sha_ctxt trailing buf content to new trailing buf */
670 if (trailing_buf_len > 0) {
671 memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
672 memcpy(&handle->sha_ctxt.trailing_buf[0],
673 (k_src - trailing_buf_len),
674 trailing_buf_len);
675 }
676 handle->sha_ctxt.trailing_buf_len = trailing_buf_len;
677
678 err = submit_req(qcedev_areq, handle);
679
680 handle->sha_ctxt.last_blk = 0;
681 handle->sha_ctxt.first_blk = 0;
682
683 kzfree(k_buf_src);
684 return err;
685}
686
687static int qcedev_sha_update(struct qcedev_async_req *qcedev_areq,
688 struct qcedev_handle *handle,
689 struct scatterlist *sg_src)
690{
691 int err = 0;
692 int i = 0;
693 int j = 0;
694 int k = 0;
695 int num_entries = 0;
696 uint32_t total = 0;
697
698 if (handle->sha_ctxt.init_done == false) {
699 pr_err("%s Init was not called\n", __func__);
700 return -EINVAL;
701 }
702
703 if (qcedev_areq->sha_op_req.data_len > QCE_MAX_OPER_DATA) {
704
705 struct qcedev_sha_op_req *saved_req;
706 struct qcedev_sha_op_req req;
707 struct qcedev_sha_op_req *sreq = &qcedev_areq->sha_op_req;
708
709 /* save the original req structure */
710 saved_req =
711 kmalloc(sizeof(struct qcedev_sha_op_req), GFP_KERNEL);
712 if (saved_req == NULL) {
713 pr_err("%s:Can't Allocate mem:saved_req 0x%lx\n",
714 __func__, (uintptr_t)saved_req);
715 return -ENOMEM;
716 }
717 memcpy(&req, sreq, sizeof(struct qcedev_sha_op_req));
718 memcpy(saved_req, sreq, sizeof(struct qcedev_sha_op_req));
719
720 i = 0;
721 /* Address 32 KB at a time */
722 while ((i < req.entries) && (err == 0)) {
723 if (sreq->data[i].len > QCE_MAX_OPER_DATA) {
724 sreq->data[0].len = QCE_MAX_OPER_DATA;
725 if (i > 0) {
726 sreq->data[0].vaddr =
727 sreq->data[i].vaddr;
728 }
729
730 sreq->data_len = QCE_MAX_OPER_DATA;
731 sreq->entries = 1;
732
733 err = qcedev_sha_update_max_xfer(qcedev_areq,
734 handle, sg_src);
735
736 sreq->data[i].len = req.data[i].len -
737 QCE_MAX_OPER_DATA;
738 sreq->data[i].vaddr = req.data[i].vaddr +
739 QCE_MAX_OPER_DATA;
740 req.data[i].vaddr = sreq->data[i].vaddr;
741 req.data[i].len = sreq->data[i].len;
742 } else {
743 total = 0;
744 for (j = i; j < req.entries; j++) {
745 num_entries++;
746 if ((total + sreq->data[j].len) >=
747 QCE_MAX_OPER_DATA) {
748 sreq->data[j].len =
749 (QCE_MAX_OPER_DATA - total);
750 total = QCE_MAX_OPER_DATA;
751 break;
752 }
753 total += sreq->data[j].len;
754 }
755
756 sreq->data_len = total;
757 if (i > 0)
758 for (k = 0; k < num_entries; k++) {
759 sreq->data[k].len =
760 sreq->data[i+k].len;
761 sreq->data[k].vaddr =
762 sreq->data[i+k].vaddr;
763 }
764 sreq->entries = num_entries;
765
766 i = j;
767 err = qcedev_sha_update_max_xfer(qcedev_areq,
768 handle, sg_src);
769 num_entries = 0;
770
771 sreq->data[i].vaddr = req.data[i].vaddr +
772 sreq->data[i].len;
773 sreq->data[i].len = req.data[i].len -
774 sreq->data[i].len;
775 req.data[i].vaddr = sreq->data[i].vaddr;
776 req.data[i].len = sreq->data[i].len;
777
778 if (sreq->data[i].len == 0)
779 i++;
780 }
781 } /* end of while ((i < req.entries) && (err == 0)) */
782
783 /* Restore the original req structure */
784 for (i = 0; i < saved_req->entries; i++) {
785 sreq->data[i].len = saved_req->data[i].len;
786 sreq->data[i].vaddr = saved_req->data[i].vaddr;
787 }
788 sreq->entries = saved_req->entries;
789 sreq->data_len = saved_req->data_len;
790 kzfree(saved_req);
791 } else
792 err = qcedev_sha_update_max_xfer(qcedev_areq, handle, sg_src);
793
794 return err;
795}
796
797static int qcedev_sha_final(struct qcedev_async_req *qcedev_areq,
798 struct qcedev_handle *handle)
799{
800 int err = 0;
801 struct scatterlist sg_src;
802 uint32_t total;
803 uint8_t *k_buf_src = NULL;
804 uint8_t *k_align_src = NULL;
805
806 if (handle->sha_ctxt.init_done == false) {
807 pr_err("%s Init was not called\n", __func__);
808 return -EINVAL;
809 }
810
811 handle->sha_ctxt.last_blk = 1;
812
813 total = handle->sha_ctxt.trailing_buf_len;
814
815 if (total) {
816 k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2,
817 GFP_KERNEL);
818 if (k_buf_src == NULL)
819 return -ENOMEM;
820
821 k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
822 CACHE_LINE_SIZE);
823 memcpy(k_align_src, &handle->sha_ctxt.trailing_buf[0], total);
824 }
825 qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
826 sg_set_buf(qcedev_areq->sha_req.sreq.src, k_align_src, total);
827 sg_mark_end(qcedev_areq->sha_req.sreq.src);
828
829 qcedev_areq->sha_req.sreq.nbytes = total;
830
831 err = submit_req(qcedev_areq, handle);
832
833 handle->sha_ctxt.first_blk = 0;
834 handle->sha_ctxt.last_blk = 0;
835 handle->sha_ctxt.auth_data[0] = 0;
836 handle->sha_ctxt.auth_data[1] = 0;
837 handle->sha_ctxt.trailing_buf_len = 0;
838 handle->sha_ctxt.init_done = false;
839 memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
840
841 kzfree(k_buf_src);
842 return err;
843}
844
845static int qcedev_hash_cmac(struct qcedev_async_req *qcedev_areq,
846 struct qcedev_handle *handle,
847 struct scatterlist *sg_src)
848{
849 int err = 0;
850 int i = 0;
851 uint32_t total;
852
853 uint8_t *user_src = NULL;
854 uint8_t *k_src = NULL;
855 uint8_t *k_buf_src = NULL;
856
857 total = qcedev_areq->sha_op_req.data_len;
858
859 if (copy_from_user(&handle->sha_ctxt.authkey[0],
860 (void __user *)qcedev_areq->sha_op_req.authkey,
861 qcedev_areq->sha_op_req.authklen))
862 return -EFAULT;
863
864
865 k_buf_src = kmalloc(total, GFP_KERNEL);
866 if (k_buf_src == NULL)
867 return -ENOMEM;
868
869 k_src = k_buf_src;
870
871 /* Copy data from user src(s) */
872 user_src = (void __user *)qcedev_areq->sha_op_req.data[0].vaddr;
873 for (i = 0; i < qcedev_areq->sha_op_req.entries; i++) {
874 user_src =
875 (void __user *)qcedev_areq->sha_op_req.data[i].vaddr;
876 if (user_src && copy_from_user(k_src, (void __user *)user_src,
877 qcedev_areq->sha_op_req.data[i].len)) {
878 kzfree(k_buf_src);
879 return -EFAULT;
880 }
881 k_src += qcedev_areq->sha_op_req.data[i].len;
882 }
883
884 qcedev_areq->sha_req.sreq.src = sg_src;
885 sg_set_buf(qcedev_areq->sha_req.sreq.src, k_buf_src, total);
886 sg_mark_end(qcedev_areq->sha_req.sreq.src);
887
888 qcedev_areq->sha_req.sreq.nbytes = total;
889 handle->sha_ctxt.diglen = qcedev_areq->sha_op_req.diglen;
890 err = submit_req(qcedev_areq, handle);
891
892 kzfree(k_buf_src);
893 return err;
894}
895
896static int qcedev_set_hmac_auth_key(struct qcedev_async_req *areq,
897 struct qcedev_handle *handle,
898 struct scatterlist *sg_src)
899{
900 int err = 0;
901
902 if (areq->sha_op_req.authklen <= QCEDEV_MAX_KEY_SIZE) {
903 qcedev_sha_init(areq, handle);
904 if (copy_from_user(&handle->sha_ctxt.authkey[0],
905 (void __user *)areq->sha_op_req.authkey,
906 areq->sha_op_req.authklen))
907 return -EFAULT;
908 } else {
909 struct qcedev_async_req authkey_areq;
910 uint8_t authkey[QCEDEV_MAX_SHA_BLOCK_SIZE];
911
912 init_completion(&authkey_areq.complete);
913
914 authkey_areq.sha_op_req.entries = 1;
915 authkey_areq.sha_op_req.data[0].vaddr =
916 areq->sha_op_req.authkey;
917 authkey_areq.sha_op_req.data[0].len = areq->sha_op_req.authklen;
918 authkey_areq.sha_op_req.data_len = areq->sha_op_req.authklen;
919 authkey_areq.sha_op_req.diglen = 0;
920 authkey_areq.handle = handle;
921
922 memset(&authkey_areq.sha_op_req.digest[0], 0,
923 QCEDEV_MAX_SHA_DIGEST);
924 if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
925 authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA1;
926 if (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)
927 authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA256;
928
929 authkey_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
930
931 qcedev_sha_init(&authkey_areq, handle);
932 err = qcedev_sha_update(&authkey_areq, handle, sg_src);
933 if (!err)
934 err = qcedev_sha_final(&authkey_areq, handle);
935 else
936 return err;
937 memcpy(&authkey[0], &handle->sha_ctxt.digest[0],
938 handle->sha_ctxt.diglen);
939 qcedev_sha_init(areq, handle);
940
941 memcpy(&handle->sha_ctxt.authkey[0], &authkey[0],
942 handle->sha_ctxt.diglen);
943 }
944 return err;
945}
946
947static int qcedev_hmac_get_ohash(struct qcedev_async_req *qcedev_areq,
948 struct qcedev_handle *handle)
949{
950 int err = 0;
951 struct scatterlist sg_src;
952 uint8_t *k_src = NULL;
953 uint32_t sha_block_size = 0;
954 uint32_t sha_digest_size = 0;
955
956 if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
957 sha_digest_size = SHA1_DIGEST_SIZE;
958 sha_block_size = SHA1_BLOCK_SIZE;
959 } else {
960 if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
961 sha_digest_size = SHA256_DIGEST_SIZE;
962 sha_block_size = SHA256_BLOCK_SIZE;
963 }
964 }
965 k_src = kmalloc(sha_block_size, GFP_KERNEL);
966 if (k_src == NULL)
967 return -ENOMEM;
968
969 /* check for trailing buffer from previous updates and append it */
970 memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
971 handle->sha_ctxt.trailing_buf_len);
972
973 qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
974 sg_set_buf(qcedev_areq->sha_req.sreq.src, k_src, sha_block_size);
975 sg_mark_end(qcedev_areq->sha_req.sreq.src);
976
977 qcedev_areq->sha_req.sreq.nbytes = sha_block_size;
978 memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
979 memcpy(&handle->sha_ctxt.trailing_buf[0], &handle->sha_ctxt.digest[0],
980 sha_digest_size);
981 handle->sha_ctxt.trailing_buf_len = sha_digest_size;
982
983 handle->sha_ctxt.first_blk = 1;
984 handle->sha_ctxt.last_blk = 0;
985 handle->sha_ctxt.auth_data[0] = 0;
986 handle->sha_ctxt.auth_data[1] = 0;
987
988 if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
989 memcpy(&handle->sha_ctxt.digest[0],
990 &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
991 handle->sha_ctxt.diglen = SHA1_DIGEST_SIZE;
992 }
993
994 if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
995 memcpy(&handle->sha_ctxt.digest[0],
996 &_std_init_vector_sha256_uint8[0], SHA256_DIGEST_SIZE);
997 handle->sha_ctxt.diglen = SHA256_DIGEST_SIZE;
998 }
999 err = submit_req(qcedev_areq, handle);
1000
1001 handle->sha_ctxt.last_blk = 0;
1002 handle->sha_ctxt.first_blk = 0;
1003
1004 kzfree(k_src);
1005 return err;
1006}
1007
1008static int qcedev_hmac_update_iokey(struct qcedev_async_req *areq,
1009 struct qcedev_handle *handle, bool ikey)
1010{
1011 int i;
1012 uint32_t constant;
1013 uint32_t sha_block_size;
1014
1015 if (ikey)
1016 constant = 0x36;
1017 else
1018 constant = 0x5c;
1019
1020 if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
1021 sha_block_size = SHA1_BLOCK_SIZE;
1022 else
1023 sha_block_size = SHA256_BLOCK_SIZE;
1024
1025 memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
1026 for (i = 0; i < sha_block_size; i++)
1027 handle->sha_ctxt.trailing_buf[i] =
1028 (handle->sha_ctxt.authkey[i] ^ constant);
1029
1030 handle->sha_ctxt.trailing_buf_len = sha_block_size;
1031 return 0;
1032}
1033
1034static int qcedev_hmac_init(struct qcedev_async_req *areq,
1035 struct qcedev_handle *handle,
1036 struct scatterlist *sg_src)
1037{
1038 int err;
1039 struct qcedev_control *podev = handle->cntl;
1040
1041 err = qcedev_set_hmac_auth_key(areq, handle, sg_src);
1042 if (err)
1043 return err;
1044 if (!podev->ce_support.sha_hmac)
1045 qcedev_hmac_update_iokey(areq, handle, true);
1046 return 0;
1047}
1048
1049static int qcedev_hmac_final(struct qcedev_async_req *areq,
1050 struct qcedev_handle *handle)
1051{
1052 int err;
1053 struct qcedev_control *podev = handle->cntl;
1054
1055 err = qcedev_sha_final(areq, handle);
1056 if (podev->ce_support.sha_hmac)
1057 return err;
1058
1059 qcedev_hmac_update_iokey(areq, handle, false);
1060 err = qcedev_hmac_get_ohash(areq, handle);
1061 if (err)
1062 return err;
1063 err = qcedev_sha_final(areq, handle);
1064
1065 return err;
1066}
1067
1068static int qcedev_hash_init(struct qcedev_async_req *areq,
1069 struct qcedev_handle *handle,
1070 struct scatterlist *sg_src)
1071{
1072 if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
1073 (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
1074 return qcedev_sha_init(areq, handle);
1075 else
1076 return qcedev_hmac_init(areq, handle, sg_src);
1077}
1078
1079static int qcedev_hash_update(struct qcedev_async_req *qcedev_areq,
1080 struct qcedev_handle *handle,
1081 struct scatterlist *sg_src)
1082{
1083 return qcedev_sha_update(qcedev_areq, handle, sg_src);
1084}
1085
1086static int qcedev_hash_final(struct qcedev_async_req *areq,
1087 struct qcedev_handle *handle)
1088{
1089 if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
1090 (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
1091 return qcedev_sha_final(areq, handle);
1092 else
1093 return qcedev_hmac_final(areq, handle);
1094}
1095
1096static int qcedev_vbuf_ablk_cipher_max_xfer(struct qcedev_async_req *areq,
1097 int *di, struct qcedev_handle *handle,
1098 uint8_t *k_align_src)
1099{
1100 int err = 0;
1101 int i = 0;
1102 int dst_i = *di;
1103 struct scatterlist sg_src;
1104 uint32_t byteoffset = 0;
1105 uint8_t *user_src = NULL;
1106 uint8_t *k_align_dst = k_align_src;
1107 struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
1108
1109
1110 if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
1111 byteoffset = areq->cipher_op_req.byteoffset;
1112
1113 user_src = (void __user *)areq->cipher_op_req.vbuf.src[0].vaddr;
1114 if (user_src && copy_from_user((k_align_src + byteoffset),
1115 (void __user *)user_src,
1116 areq->cipher_op_req.vbuf.src[0].len))
1117 return -EFAULT;
1118
1119 k_align_src += byteoffset + areq->cipher_op_req.vbuf.src[0].len;
1120
1121 for (i = 1; i < areq->cipher_op_req.entries; i++) {
1122 user_src =
1123 (void __user *)areq->cipher_op_req.vbuf.src[i].vaddr;
1124 if (user_src && copy_from_user(k_align_src,
1125 (void __user *)user_src,
1126 areq->cipher_op_req.vbuf.src[i].len)) {
1127 return -EFAULT;
1128 }
1129 k_align_src += areq->cipher_op_req.vbuf.src[i].len;
1130 }
1131
1132 /* restore src beginning */
1133 k_align_src = k_align_dst;
1134 areq->cipher_op_req.data_len += byteoffset;
1135
1136 areq->cipher_req.creq.src = (struct scatterlist *) &sg_src;
1137 areq->cipher_req.creq.dst = (struct scatterlist *) &sg_src;
1138
1139 /* In place encryption/decryption */
1140 sg_set_buf(areq->cipher_req.creq.src,
1141 k_align_dst,
1142 areq->cipher_op_req.data_len);
1143 sg_mark_end(areq->cipher_req.creq.src);
1144
1145 areq->cipher_req.creq.nbytes = areq->cipher_op_req.data_len;
1146 areq->cipher_req.creq.info = areq->cipher_op_req.iv;
1147 areq->cipher_op_req.entries = 1;
1148
1149 err = submit_req(areq, handle);
1150
1151 /* copy data to destination buffer*/
1152 creq->data_len -= byteoffset;
1153
1154 while (creq->data_len > 0) {
1155 if (creq->vbuf.dst[dst_i].len <= creq->data_len) {
1156 if (err == 0 && copy_to_user(
1157 (void __user *)creq->vbuf.dst[dst_i].vaddr,
1158 (k_align_dst + byteoffset),
1159 creq->vbuf.dst[dst_i].len))
1160 return -EFAULT;
1161
1162 k_align_dst += creq->vbuf.dst[dst_i].len +
1163 byteoffset;
1164 creq->data_len -= creq->vbuf.dst[dst_i].len;
1165 dst_i++;
1166 } else {
1167 if (err == 0 && copy_to_user(
1168 (void __user *)creq->vbuf.dst[dst_i].vaddr,
1169 (k_align_dst + byteoffset),
1170 creq->data_len))
1171 return -EFAULT;
1172
1173 k_align_dst += creq->data_len;
1174 creq->vbuf.dst[dst_i].len -= creq->data_len;
1175 creq->vbuf.dst[dst_i].vaddr += creq->data_len;
1176 creq->data_len = 0;
1177 }
1178 }
1179 *di = dst_i;
1180
1181 return err;
1182};
1183
1184static int qcedev_vbuf_ablk_cipher(struct qcedev_async_req *areq,
1185 struct qcedev_handle *handle)
1186{
1187 int err = 0;
1188 int di = 0;
1189 int i = 0;
1190 int j = 0;
1191 int k = 0;
1192 uint32_t byteoffset = 0;
1193 int num_entries = 0;
1194 uint32_t total = 0;
1195 uint32_t len;
1196 uint8_t *k_buf_src = NULL;
1197 uint8_t *k_align_src = NULL;
1198 uint32_t max_data_xfer;
1199 struct qcedev_cipher_op_req *saved_req;
1200 struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
1201
1202 total = 0;
1203
1204 if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
1205 byteoffset = areq->cipher_op_req.byteoffset;
1206 k_buf_src = kmalloc(QCE_MAX_OPER_DATA + CACHE_LINE_SIZE * 2,
1207 GFP_KERNEL);
1208 if (k_buf_src == NULL)
1209 return -ENOMEM;
1210 k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
1211 CACHE_LINE_SIZE);
1212 max_data_xfer = QCE_MAX_OPER_DATA - byteoffset;
1213
1214 saved_req = kmalloc(sizeof(struct qcedev_cipher_op_req), GFP_KERNEL);
1215 if (saved_req == NULL) {
1216 kzfree(k_buf_src);
1217 return -ENOMEM;
1218
1219 }
1220 memcpy(saved_req, creq, sizeof(struct qcedev_cipher_op_req));
1221
1222 if (areq->cipher_op_req.data_len > max_data_xfer) {
1223 struct qcedev_cipher_op_req req;
1224
1225 /* save the original req structure */
1226 memcpy(&req, creq, sizeof(struct qcedev_cipher_op_req));
1227
1228 i = 0;
1229 /* Address 32 KB at a time */
1230 while ((i < req.entries) && (err == 0)) {
1231 if (creq->vbuf.src[i].len > max_data_xfer) {
1232 creq->vbuf.src[0].len = max_data_xfer;
1233 if (i > 0) {
1234 creq->vbuf.src[0].vaddr =
1235 creq->vbuf.src[i].vaddr;
1236 }
1237
1238 creq->data_len = max_data_xfer;
1239 creq->entries = 1;
1240
1241 err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
1242 &di, handle, k_align_src);
1243 if (err < 0) {
1244 kzfree(k_buf_src);
1245 kzfree(saved_req);
1246 return err;
1247 }
1248
1249 creq->vbuf.src[i].len = req.vbuf.src[i].len -
1250 max_data_xfer;
1251 creq->vbuf.src[i].vaddr =
1252 req.vbuf.src[i].vaddr +
1253 max_data_xfer;
1254 req.vbuf.src[i].vaddr =
1255 creq->vbuf.src[i].vaddr;
1256 req.vbuf.src[i].len = creq->vbuf.src[i].len;
1257
1258 } else {
1259 total = areq->cipher_op_req.byteoffset;
1260 for (j = i; j < req.entries; j++) {
1261 num_entries++;
1262 if ((total + creq->vbuf.src[j].len)
1263 >= max_data_xfer) {
1264 creq->vbuf.src[j].len =
1265 max_data_xfer - total;
1266 total = max_data_xfer;
1267 break;
1268 }
1269 total += creq->vbuf.src[j].len;
1270 }
1271
1272 creq->data_len = total;
1273 if (i > 0)
1274 for (k = 0; k < num_entries; k++) {
1275 creq->vbuf.src[k].len =
1276 creq->vbuf.src[i+k].len;
1277 creq->vbuf.src[k].vaddr =
1278 creq->vbuf.src[i+k].vaddr;
1279 }
1280 creq->entries = num_entries;
1281
1282 i = j;
1283 err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
1284 &di, handle, k_align_src);
1285 if (err < 0) {
1286 kzfree(k_buf_src);
1287 kzfree(saved_req);
1288 return err;
1289 }
1290
1291 num_entries = 0;
1292 areq->cipher_op_req.byteoffset = 0;
1293
1294 creq->vbuf.src[i].vaddr = req.vbuf.src[i].vaddr
1295 + creq->vbuf.src[i].len;
1296 creq->vbuf.src[i].len = req.vbuf.src[i].len -
1297 creq->vbuf.src[i].len;
1298
1299 req.vbuf.src[i].vaddr =
1300 creq->vbuf.src[i].vaddr;
1301 req.vbuf.src[i].len = creq->vbuf.src[i].len;
1302
1303 if (creq->vbuf.src[i].len == 0)
1304 i++;
1305 }
1306
1307 areq->cipher_op_req.byteoffset = 0;
1308 max_data_xfer = QCE_MAX_OPER_DATA;
1309 byteoffset = 0;
1310
1311 } /* end of while ((i < req.entries) && (err == 0)) */
1312 } else
1313 err = qcedev_vbuf_ablk_cipher_max_xfer(areq, &di, handle,
1314 k_align_src);
1315
1316 /* Restore the original req structure */
1317 for (i = 0; i < saved_req->entries; i++) {
1318 creq->vbuf.src[i].len = saved_req->vbuf.src[i].len;
1319 creq->vbuf.src[i].vaddr = saved_req->vbuf.src[i].vaddr;
1320 }
1321 for (len = 0, i = 0; len < saved_req->data_len; i++) {
1322 creq->vbuf.dst[i].len = saved_req->vbuf.dst[i].len;
1323 creq->vbuf.dst[i].vaddr = saved_req->vbuf.dst[i].vaddr;
1324 len += saved_req->vbuf.dst[i].len;
1325 }
1326 creq->entries = saved_req->entries;
1327 creq->data_len = saved_req->data_len;
1328 creq->byteoffset = saved_req->byteoffset;
1329
1330 kzfree(saved_req);
1331 kzfree(k_buf_src);
1332 return err;
1333
1334}
1335
1336static int qcedev_check_cipher_key(struct qcedev_cipher_op_req *req,
1337 struct qcedev_control *podev)
1338{
1339 /* if intending to use HW key make sure key fields are set
1340 * correctly and HW key is indeed supported in target
1341 */
1342 if (req->encklen == 0) {
1343 int i;
1344
1345 for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
1346 if (req->enckey[i]) {
1347 pr_err("%s: Invalid key: non-zero key input\n",
1348 __func__);
1349 goto error;
1350 }
1351 }
1352 if ((req->op != QCEDEV_OPER_ENC_NO_KEY) &&
1353 (req->op != QCEDEV_OPER_DEC_NO_KEY))
1354 if (!podev->platform_support.hw_key_support) {
1355 pr_err("%s: Invalid op %d\n", __func__,
1356 (uint32_t)req->op);
1357 goto error;
1358 }
1359 } else {
1360 if (req->encklen == QCEDEV_AES_KEY_192) {
1361 if (!podev->ce_support.aes_key_192) {
1362 pr_err("%s: AES-192 not supported\n", __func__);
1363 goto error;
1364 }
1365 } else {
1366 /* if not using HW key make sure key
1367 * length is valid
1368 */
1369 if (req->mode == QCEDEV_AES_MODE_XTS) {
1370 if ((req->encklen != QCEDEV_AES_KEY_128*2) &&
1371 (req->encklen != QCEDEV_AES_KEY_256*2)) {
1372 pr_err("%s: unsupported key size: %d\n",
1373 __func__, req->encklen);
1374 goto error;
1375 }
1376 } else {
1377 if ((req->encklen != QCEDEV_AES_KEY_128) &&
1378 (req->encklen != QCEDEV_AES_KEY_256)) {
1379 pr_err("%s: unsupported key size %d\n",
1380 __func__, req->encklen);
1381 goto error;
1382 }
1383 }
1384 }
1385 }
1386 return 0;
1387error:
1388 return -EINVAL;
1389}
1390
1391static int qcedev_check_cipher_params(struct qcedev_cipher_op_req *req,
1392 struct qcedev_control *podev)
1393{
1394 uint32_t total = 0;
1395 uint32_t i;
1396
1397 if (req->use_pmem) {
1398 pr_err("%s: Use of PMEM is not supported\n", __func__);
1399 goto error;
1400 }
1401 if ((req->entries == 0) || (req->data_len == 0) ||
1402 (req->entries > QCEDEV_MAX_BUFFERS)) {
1403 pr_err("%s: Invalid cipher length/entries\n", __func__);
1404 goto error;
1405 }
1406 if ((req->alg >= QCEDEV_ALG_LAST) ||
1407 (req->mode >= QCEDEV_AES_DES_MODE_LAST)) {
1408 pr_err("%s: Invalid algorithm %d\n", __func__,
1409 (uint32_t)req->alg);
1410 goto error;
1411 }
1412 if ((req->mode == QCEDEV_AES_MODE_XTS) &&
1413 (!podev->ce_support.aes_xts)) {
1414 pr_err("%s: XTS algorithm is not supported\n", __func__);
1415 goto error;
1416 }
1417 if (req->alg == QCEDEV_ALG_AES) {
1418 if (qcedev_check_cipher_key(req, podev))
1419 goto error;
1420
1421 }
1422 /* if using a byteoffset, make sure it is CTR mode using vbuf */
1423 if (req->byteoffset) {
1424 if (req->mode != QCEDEV_AES_MODE_CTR) {
1425 pr_err("%s: Operation on byte offset not supported\n",
1426 __func__);
1427 goto error;
1428 }
1429 if (req->byteoffset >= AES_CE_BLOCK_SIZE) {
1430 pr_err("%s: Invalid byte offset\n", __func__);
1431 goto error;
1432 }
1433 total = req->byteoffset;
1434 for (i = 0; i < req->entries; i++) {
1435 if (total > U32_MAX - req->vbuf.src[i].len) {
1436 pr_err("%s:Integer overflow on total src len\n",
1437 __func__);
1438 goto error;
1439 }
1440 total += req->vbuf.src[i].len;
1441 }
1442 }
1443
1444 if (req->data_len < req->byteoffset) {
1445 pr_err("%s: req data length %u is less than byteoffset %u\n",
1446 __func__, req->data_len, req->byteoffset);
1447 goto error;
1448 }
1449
1450 /* Ensure IV size */
1451 if (req->ivlen > QCEDEV_MAX_IV_SIZE) {
1452 pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen);
1453 goto error;
1454 }
1455
1456 /* Ensure Key size */
1457 if (req->encklen > QCEDEV_MAX_KEY_SIZE) {
1458 pr_err("%s: Klen is not correct: %u\n", __func__, req->encklen);
1459 goto error;
1460 }
1461
1462 /* Ensure zer ivlen for ECB mode */
1463 if (req->ivlen > 0) {
1464 if ((req->mode == QCEDEV_AES_MODE_ECB) ||
1465 (req->mode == QCEDEV_DES_MODE_ECB)) {
1466 pr_err("%s: Expecting a zero length IV\n", __func__);
1467 goto error;
1468 }
1469 } else {
1470 if ((req->mode != QCEDEV_AES_MODE_ECB) &&
1471 (req->mode != QCEDEV_DES_MODE_ECB)) {
1472 pr_err("%s: Expecting a non-zero ength IV\n", __func__);
1473 goto error;
1474 }
1475 }
1476 /* Check for sum of all dst length is equal to data_len */
1477 for (i = 0, total = 0; i < req->entries; i++) {
1478 if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) {
1479 pr_err("%s: NULL req dst vbuf[%d] with length %d\n",
1480 __func__, i, req->vbuf.dst[i].len);
1481 goto error;
1482 }
1483 if (req->vbuf.dst[i].len >= U32_MAX - total) {
1484 pr_err("%s: Integer overflow on total req dst vbuf length\n",
1485 __func__);
1486 goto error;
1487 }
1488 total += req->vbuf.dst[i].len;
1489 }
1490 if (total != req->data_len) {
1491 pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n",
1492 __func__, i, total, req->data_len);
1493 goto error;
1494 }
1495 /* Check for sum of all src length is equal to data_len */
1496 for (i = 0, total = 0; i < req->entries; i++) {
1497 if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) {
1498 pr_err("%s: NULL req src vbuf[%d] with length %d\n",
1499 __func__, i, req->vbuf.src[i].len);
1500 goto error;
1501 }
1502 if (req->vbuf.src[i].len > U32_MAX - total) {
1503 pr_err("%s: Integer overflow on total req src vbuf length\n",
1504 __func__);
1505 goto error;
1506 }
1507 total += req->vbuf.src[i].len;
1508 }
1509 if (total != req->data_len) {
1510 pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
1511 __func__, total, req->data_len);
1512 goto error;
1513 }
1514 return 0;
1515error:
1516 return -EINVAL;
1517
1518}
1519
1520static int qcedev_check_sha_params(struct qcedev_sha_op_req *req,
1521 struct qcedev_control *podev)
1522{
1523 uint32_t total = 0;
1524 uint32_t i;
1525
1526 if ((req->alg == QCEDEV_ALG_AES_CMAC) &&
1527 (!podev->ce_support.cmac)) {
1528 pr_err("%s: CMAC not supported\n", __func__);
1529 goto sha_error;
1530 }
1531 if ((!req->entries) || (req->entries > QCEDEV_MAX_BUFFERS)) {
1532 pr_err("%s: Invalid num entries (%d)\n",
1533 __func__, req->entries);
1534 goto sha_error;
1535 }
1536
1537 if (req->alg >= QCEDEV_ALG_SHA_ALG_LAST) {
1538 pr_err("%s: Invalid algorithm (%d)\n", __func__, req->alg);
1539 goto sha_error;
1540 }
1541 if ((req->alg == QCEDEV_ALG_SHA1_HMAC) ||
1542 (req->alg == QCEDEV_ALG_SHA1_HMAC)) {
1543 if (req->authkey == NULL) {
1544 pr_err("%s: Invalid authkey pointer\n", __func__);
1545 goto sha_error;
1546 }
1547 if (req->authklen <= 0) {
1548 pr_err("%s: Invalid authkey length (%d)\n",
1549 __func__, req->authklen);
1550 goto sha_error;
1551 }
1552 }
1553
1554 if (req->alg == QCEDEV_ALG_AES_CMAC) {
1555 if ((req->authklen != QCEDEV_AES_KEY_128) &&
1556 (req->authklen != QCEDEV_AES_KEY_256)) {
1557 pr_err("%s: unsupported key length\n", __func__);
1558 goto sha_error;
1559 }
1560 }
1561
1562 /* Check for sum of all src length is equal to data_len */
1563 for (i = 0, total = 0; i < req->entries; i++) {
1564 if (req->data[i].len > U32_MAX - total) {
1565 pr_err("%s: Integer overflow on total req buf length\n",
1566 __func__);
1567 goto sha_error;
1568 }
1569 total += req->data[i].len;
1570 }
1571
1572 if (total != req->data_len) {
1573 pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
1574 __func__, total, req->data_len);
1575 goto sha_error;
1576 }
1577 return 0;
1578sha_error:
1579 return -EINVAL;
1580}
1581
1582static inline long qcedev_ioctl(struct file *file,
1583 unsigned int cmd, unsigned long arg)
1584{
1585 int err = 0;
1586 struct qcedev_handle *handle;
1587 struct qcedev_control *podev;
1588 struct qcedev_async_req qcedev_areq;
1589 struct qcedev_stat *pstat;
1590
1591 handle = file->private_data;
1592 podev = handle->cntl;
1593 qcedev_areq.handle = handle;
1594 if (podev == NULL || podev->magic != QCEDEV_MAGIC) {
1595 pr_err("%s: invalid handle %p\n",
1596 __func__, podev);
1597 return -ENOENT;
1598 }
1599
1600 /* Verify user arguments. */
1601 if (_IOC_TYPE(cmd) != QCEDEV_IOC_MAGIC)
1602 return -ENOTTY;
1603
1604 init_completion(&qcedev_areq.complete);
1605 pstat = &_qcedev_stat;
1606
1607 switch (cmd) {
1608 case QCEDEV_IOCTL_ENC_REQ:
1609 case QCEDEV_IOCTL_DEC_REQ:
1610 if (copy_from_user(&qcedev_areq.cipher_op_req,
1611 (void __user *)arg,
1612 sizeof(struct qcedev_cipher_op_req)))
1613 return -EFAULT;
1614 qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_CIPHER;
1615
1616 if (qcedev_check_cipher_params(&qcedev_areq.cipher_op_req,
1617 podev))
1618 return -EINVAL;
1619
1620 err = qcedev_vbuf_ablk_cipher(&qcedev_areq, handle);
1621 if (err)
1622 return err;
1623 if (copy_to_user((void __user *)arg,
1624 &qcedev_areq.cipher_op_req,
1625 sizeof(struct qcedev_cipher_op_req)))
1626 return -EFAULT;
1627 break;
1628
1629 case QCEDEV_IOCTL_SHA_INIT_REQ:
1630 {
1631 struct scatterlist sg_src;
1632
1633 if (copy_from_user(&qcedev_areq.sha_op_req,
1634 (void __user *)arg,
1635 sizeof(struct qcedev_sha_op_req)))
1636 return -EFAULT;
1637 if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev))
1638 return -EINVAL;
1639 qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
1640 err = qcedev_hash_init(&qcedev_areq, handle, &sg_src);
1641 if (err)
1642 return err;
1643 if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req,
1644 sizeof(struct qcedev_sha_op_req)))
1645 return -EFAULT;
1646 }
1647 handle->sha_ctxt.init_done = true;
1648 break;
1649 case QCEDEV_IOCTL_GET_CMAC_REQ:
1650 if (!podev->ce_support.cmac)
1651 return -ENOTTY;
1652 case QCEDEV_IOCTL_SHA_UPDATE_REQ:
1653 {
1654 struct scatterlist sg_src;
1655
1656 if (copy_from_user(&qcedev_areq.sha_op_req,
1657 (void __user *)arg,
1658 sizeof(struct qcedev_sha_op_req)))
1659 return -EFAULT;
1660 if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev))
1661 return -EINVAL;
1662 qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
1663
1664 if (qcedev_areq.sha_op_req.alg == QCEDEV_ALG_AES_CMAC) {
1665 err = qcedev_hash_cmac(&qcedev_areq, handle, &sg_src);
1666 if (err)
1667 return err;
1668 } else {
1669 if (handle->sha_ctxt.init_done == false) {
1670 pr_err("%s Init was not called\n", __func__);
1671 return -EINVAL;
1672 }
1673 err = qcedev_hash_update(&qcedev_areq, handle, &sg_src);
1674 if (err)
1675 return err;
1676 }
1677
1678 if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
1679 pr_err("Invalid sha_ctxt.diglen %d\n",
1680 handle->sha_ctxt.diglen);
1681 return -EINVAL;
1682 }
1683 memcpy(&qcedev_areq.sha_op_req.digest[0],
1684 &handle->sha_ctxt.digest[0],
1685 handle->sha_ctxt.diglen);
1686 if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req,
1687 sizeof(struct qcedev_sha_op_req)))
1688 return -EFAULT;
1689 }
1690 break;
1691
1692 case QCEDEV_IOCTL_SHA_FINAL_REQ:
1693
1694 if (handle->sha_ctxt.init_done == false) {
1695 pr_err("%s Init was not called\n", __func__);
1696 return -EINVAL;
1697 }
1698 if (copy_from_user(&qcedev_areq.sha_op_req,
1699 (void __user *)arg,
1700 sizeof(struct qcedev_sha_op_req)))
1701 return -EFAULT;
1702 if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev))
1703 return -EINVAL;
1704 qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
1705 err = qcedev_hash_final(&qcedev_areq, handle);
1706 if (err)
1707 return err;
1708 qcedev_areq.sha_op_req.diglen = handle->sha_ctxt.diglen;
1709 memcpy(&qcedev_areq.sha_op_req.digest[0],
1710 &handle->sha_ctxt.digest[0],
1711 handle->sha_ctxt.diglen);
1712 if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req,
1713 sizeof(struct qcedev_sha_op_req)))
1714 return -EFAULT;
1715 handle->sha_ctxt.init_done = false;
1716 break;
1717
1718 case QCEDEV_IOCTL_GET_SHA_REQ:
1719 {
1720 struct scatterlist sg_src;
1721
1722 if (copy_from_user(&qcedev_areq.sha_op_req,
1723 (void __user *)arg,
1724 sizeof(struct qcedev_sha_op_req)))
1725 return -EFAULT;
1726 if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev))
1727 return -EINVAL;
1728 qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
1729 qcedev_hash_init(&qcedev_areq, handle, &sg_src);
1730 err = qcedev_hash_update(&qcedev_areq, handle, &sg_src);
1731 if (err)
1732 return err;
1733 err = qcedev_hash_final(&qcedev_areq, handle);
1734 if (err)
1735 return err;
1736 qcedev_areq.sha_op_req.diglen = handle->sha_ctxt.diglen;
1737 memcpy(&qcedev_areq.sha_op_req.digest[0],
1738 &handle->sha_ctxt.digest[0],
1739 handle->sha_ctxt.diglen);
1740 if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req,
1741 sizeof(struct qcedev_sha_op_req)))
1742 return -EFAULT;
1743 }
1744 break;
1745
1746 default:
1747 return -ENOTTY;
1748 }
1749
1750 return err;
1751}
1752
1753static int qcedev_probe(struct platform_device *pdev)
1754{
1755 void *handle = NULL;
1756 int rc = 0;
1757 struct qcedev_control *podev;
1758 struct msm_ce_hw_support *platform_support;
1759
1760 podev = &qce_dev[0];
1761
1762 podev->high_bw_req_count = 0;
1763 INIT_LIST_HEAD(&podev->ready_commands);
1764 podev->active_command = NULL;
1765
1766 spin_lock_init(&podev->lock);
1767
1768 tasklet_init(&podev->done_tasklet, req_done, (unsigned long)podev);
1769
1770 /* open qce */
1771 handle = qce_open(pdev, &rc);
1772 if (handle == NULL) {
1773 platform_set_drvdata(pdev, NULL);
1774 return rc;
1775 }
1776
1777 podev->qce = handle;
1778 podev->pdev = pdev;
1779 platform_set_drvdata(pdev, podev);
1780
1781 rc = misc_register(&podev->miscdevice);
1782 qce_hw_support(podev->qce, &podev->ce_support);
1783 if (podev->ce_support.bam) {
1784 podev->platform_support.ce_shared = 0;
1785 podev->platform_support.shared_ce_resource = 0;
1786 podev->platform_support.hw_key_support =
1787 podev->ce_support.hw_key;
1788 podev->platform_support.bus_scale_table = NULL;
1789 podev->platform_support.sha_hmac = 1;
1790
1791 podev->platform_support.bus_scale_table =
1792 (struct msm_bus_scale_pdata *)
1793 msm_bus_cl_get_pdata(pdev);
1794 if (!podev->platform_support.bus_scale_table)
1795 pr_err("bus_scale_table is NULL\n");
1796 } else {
1797 platform_support =
1798 (struct msm_ce_hw_support *)pdev->dev.platform_data;
1799 podev->platform_support.ce_shared = platform_support->ce_shared;
1800 podev->platform_support.shared_ce_resource =
1801 platform_support->shared_ce_resource;
1802 podev->platform_support.hw_key_support =
1803 platform_support->hw_key_support;
1804 podev->platform_support.bus_scale_table =
1805 platform_support->bus_scale_table;
1806 podev->platform_support.sha_hmac = platform_support->sha_hmac;
1807 }
1808 if (podev->platform_support.bus_scale_table != NULL) {
1809 podev->bus_scale_handle =
1810 msm_bus_scale_register_client(
1811 (struct msm_bus_scale_pdata *)
1812 podev->platform_support.bus_scale_table);
1813 if (!podev->bus_scale_handle) {
1814 pr_err("%s not able to get bus scale\n",
1815 __func__);
1816 rc = -ENOMEM;
1817 goto err;
1818 }
1819 }
1820
1821 if (rc >= 0)
1822 return 0;
1823
1824 if (podev->platform_support.bus_scale_table != NULL)
1825 msm_bus_scale_unregister_client(podev->bus_scale_handle);
1826err:
1827
1828 if (handle)
1829 qce_close(handle);
1830 platform_set_drvdata(pdev, NULL);
1831 podev->qce = NULL;
1832 podev->pdev = NULL;
1833 return rc;
1834};
1835
1836static int qcedev_remove(struct platform_device *pdev)
1837{
1838 struct qcedev_control *podev;
1839
1840 podev = platform_get_drvdata(pdev);
1841 if (!podev)
1842 return 0;
1843 if (podev->qce)
1844 qce_close(podev->qce);
1845
1846 if (podev->platform_support.bus_scale_table != NULL)
1847 msm_bus_scale_unregister_client(podev->bus_scale_handle);
1848
1849 if (podev->miscdevice.minor != MISC_DYNAMIC_MINOR)
1850 misc_deregister(&podev->miscdevice);
1851 tasklet_kill(&podev->done_tasklet);
1852 return 0;
1853};
1854
1855static int qcedev_suspend(struct platform_device *pdev, pm_message_t state)
1856{
1857 struct qcedev_control *podev;
1858 int ret;
1859
1860 podev = platform_get_drvdata(pdev);
1861
1862 if (!podev || !podev->platform_support.bus_scale_table)
1863 return 0;
1864
1865 mutex_lock(&qcedev_sent_bw_req);
1866 if (podev->high_bw_req_count) {
1867 ret = msm_bus_scale_client_update_request(
1868 podev->bus_scale_handle, 0);
1869 if (ret) {
1870 pr_err("%s Unable to set to low bandwidth\n",
1871 __func__);
1872 goto suspend_exit;
1873 }
1874 ret = qce_disable_clk(podev->qce);
1875 if (ret) {
1876 pr_err("%s Unable disable clk\n", __func__);
1877 ret = msm_bus_scale_client_update_request(
1878 podev->bus_scale_handle, 1);
1879 if (ret)
1880 pr_err("%s Unable to set to high bandwidth\n",
1881 __func__);
1882 goto suspend_exit;
1883 }
1884 }
1885
1886suspend_exit:
1887 mutex_unlock(&qcedev_sent_bw_req);
1888 return 0;
1889}
1890
1891static int qcedev_resume(struct platform_device *pdev)
1892{
1893 struct qcedev_control *podev;
1894 int ret;
1895
1896 podev = platform_get_drvdata(pdev);
1897
1898 if (!podev || !podev->platform_support.bus_scale_table)
1899 return 0;
1900
1901 mutex_lock(&qcedev_sent_bw_req);
1902 if (podev->high_bw_req_count) {
1903 ret = qce_enable_clk(podev->qce);
1904 if (ret) {
1905 pr_err("%s Unable enable clk\n", __func__);
1906 goto resume_exit;
1907 }
1908 ret = msm_bus_scale_client_update_request(
1909 podev->bus_scale_handle, 1);
1910 if (ret) {
1911 pr_err("%s Unable to set to high bandwidth\n",
1912 __func__);
1913 ret = qce_disable_clk(podev->qce);
1914 if (ret)
1915 pr_err("%s Unable enable clk\n",
1916 __func__);
1917 goto resume_exit;
1918 }
1919 }
1920
1921resume_exit:
1922 mutex_unlock(&qcedev_sent_bw_req);
1923 return 0;
1924}
1925
1926static const struct of_device_id qcedev_match[] = {
1927 { .compatible = "qcom,qcedev",
1928 },
1929 {}
1930};
1931
1932static struct platform_driver qcedev_plat_driver = {
1933 .probe = qcedev_probe,
1934 .remove = qcedev_remove,
1935 .suspend = qcedev_suspend,
1936 .resume = qcedev_resume,
1937 .driver = {
1938 .name = "qce",
1939 .owner = THIS_MODULE,
1940 .of_match_table = qcedev_match,
1941 },
1942};
1943
1944static int _disp_stats(int id)
1945{
1946 struct qcedev_stat *pstat;
1947 int len = 0;
1948
1949 pstat = &_qcedev_stat;
1950 len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
1951 "\nQTI QCE dev driver %d Statistics:\n",
1952 id + 1);
1953
1954 len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
1955 " Encryption operation success : %d\n",
1956 pstat->qcedev_enc_success);
1957 len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
1958 " Encryption operation fail : %d\n",
1959 pstat->qcedev_enc_fail);
1960 len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
1961 " Decryption operation success : %d\n",
1962 pstat->qcedev_dec_success);
1963
1964 len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
1965 " Encryption operation fail : %d\n",
1966 pstat->qcedev_dec_fail);
1967
1968 return len;
1969}
1970
1971static int _debug_stats_open(struct inode *inode, struct file *file)
1972{
1973 file->private_data = inode->i_private;
1974 return 0;
1975}
1976
1977static ssize_t _debug_stats_read(struct file *file, char __user *buf,
1978 size_t count, loff_t *ppos)
1979{
1980 ssize_t rc = -EINVAL;
1981 int qcedev = *((int *) file->private_data);
1982 int len;
1983
1984 len = _disp_stats(qcedev);
1985
1986 if (len <= count)
1987 rc = simple_read_from_buffer((void __user *) buf, len,
1988 ppos, (void *) _debug_read_buf, len);
1989 return rc;
1990}
1991
1992static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
1993 size_t count, loff_t *ppos)
1994{
1995 memset((char *)&_qcedev_stat, 0, sizeof(struct qcedev_stat));
1996 return count;
1997};
1998
1999static const struct file_operations _debug_stats_ops = {
2000 .open = _debug_stats_open,
2001 .read = _debug_stats_read,
2002 .write = _debug_stats_write,
2003};
2004
2005static int _qcedev_debug_init(void)
2006{
2007 int rc;
2008 char name[DEBUG_MAX_FNAME];
2009 struct dentry *dent;
2010
2011 _debug_dent = debugfs_create_dir("qcedev", NULL);
2012 if (IS_ERR(_debug_dent)) {
2013 pr_err("qcedev debugfs_create_dir fail, error %ld\n",
2014 PTR_ERR(_debug_dent));
2015 return PTR_ERR(_debug_dent);
2016 }
2017
2018 snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
2019 _debug_qcedev = 0;
2020 dent = debugfs_create_file(name, 0644, _debug_dent,
2021 &_debug_qcedev, &_debug_stats_ops);
2022 if (dent == NULL) {
2023 pr_err("qcedev debugfs_create_file fail, error %ld\n",
2024 PTR_ERR(dent));
2025 rc = PTR_ERR(dent);
2026 goto err;
2027 }
2028 return 0;
2029err:
2030 debugfs_remove_recursive(_debug_dent);
2031 return rc;
2032}
2033
2034static int qcedev_init(void)
2035{
2036 int rc;
2037
2038 rc = _qcedev_debug_init();
2039 if (rc)
2040 return rc;
2041 return platform_driver_register(&qcedev_plat_driver);
2042}
2043
2044static void qcedev_exit(void)
2045{
2046 debugfs_remove_recursive(_debug_dent);
2047 platform_driver_unregister(&qcedev_plat_driver);
2048}
2049
2050MODULE_LICENSE("GPL v2");
2051MODULE_DESCRIPTION("QTI DEV Crypto driver");
2052
2053module_init(qcedev_init);
2054module_exit(qcedev_exit);