Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 3 | * Copyright (C) 2013, Intel Corporation |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; either version 2 of the License, or |
| 8 | * (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/device.h> |
| 23 | #include <linux/ioport.h> |
| 24 | #include <linux/errno.h> |
Sachin Kamat | cbfd6a2 | 2013-04-08 15:49:33 +0530 | [diff] [blame] | 25 | #include <linux/err.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 26 | #include <linux/interrupt.h> |
| 27 | #include <linux/platform_device.h> |
Sebastian Andrzej Siewior | 8348c25 | 2010-11-22 17:12:15 -0800 | [diff] [blame] | 28 | #include <linux/spi/pxa2xx_spi.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 29 | #include <linux/spi/spi.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 30 | #include <linux/delay.h> |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 31 | #include <linux/gpio.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 32 | #include <linux/slab.h> |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 33 | #include <linux/clk.h> |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 34 | #include <linux/pm_runtime.h> |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 35 | #include <linux/acpi.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 36 | |
| 37 | #include <asm/io.h> |
| 38 | #include <asm/irq.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 39 | #include <asm/delay.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 40 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 41 | #include "spi-pxa2xx.h" |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 42 | |
| 43 | MODULE_AUTHOR("Stephen Street"); |
Will Newton | 037cdaf | 2007-12-10 15:49:25 -0800 | [diff] [blame] | 44 | MODULE_DESCRIPTION("PXA2xx SSP SPI Controller"); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 45 | MODULE_LICENSE("GPL"); |
Kay Sievers | 7e38c3c | 2008-04-10 21:29:20 -0700 | [diff] [blame] | 46 | MODULE_ALIAS("platform:pxa2xx-spi"); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 47 | |
| 48 | #define MAX_BUSES 3 |
| 49 | |
Vernon Sauder | f1f640a | 2008-10-15 22:02:43 -0700 | [diff] [blame] | 50 | #define TIMOUT_DFLT 1000 |
| 51 | |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 52 | /* |
| 53 | * for testing SSCR1 changes that require SSP restart, basically |
| 54 | * everything except the service and interrupt enables, the pxa270 developer |
| 55 | * manual says only SSCR1_SCFR, SSCR1_SPH, SSCR1_SPO need to be in this |
| 56 | * list, but the PXA255 dev man says all bits without really meaning the |
| 57 | * service and interrupt enables |
| 58 | */ |
| 59 | #define SSCR1_CHANGE_MASK (SSCR1_TTELP | SSCR1_TTE | SSCR1_SCFR \ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 60 | | SSCR1_ECRA | SSCR1_ECRB | SSCR1_SCLKDIR \ |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 61 | | SSCR1_SFRMDIR | SSCR1_RWOT | SSCR1_TRAIL \ |
| 62 | | SSCR1_IFS | SSCR1_STRF | SSCR1_EFWR \ |
| 63 | | SSCR1_RFT | SSCR1_TFT | SSCR1_MWDS \ |
| 64 | | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 65 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 66 | #define LPSS_RX_THRESH_DFLT 64 |
| 67 | #define LPSS_TX_LOTHRESH_DFLT 160 |
| 68 | #define LPSS_TX_HITHRESH_DFLT 224 |
| 69 | |
| 70 | /* Offset from drv_data->lpss_base */ |
Mika Westerberg | 1de7061 | 2013-07-03 13:25:06 +0300 | [diff] [blame] | 71 | #define GENERAL_REG 0x08 |
| 72 | #define GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24) |
Mika Westerberg | 0054e28 | 2013-03-05 12:05:17 +0200 | [diff] [blame] | 73 | #define SSP_REG 0x0c |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 74 | #define SPI_CS_CONTROL 0x18 |
| 75 | #define SPI_CS_CONTROL_SW_MODE BIT(0) |
| 76 | #define SPI_CS_CONTROL_CS_HIGH BIT(1) |
| 77 | |
| 78 | static bool is_lpss_ssp(const struct driver_data *drv_data) |
| 79 | { |
| 80 | return drv_data->ssp_type == LPSS_SSP; |
| 81 | } |
| 82 | |
| 83 | /* |
| 84 | * Read and write LPSS SSP private registers. Caller must first check that |
| 85 | * is_lpss_ssp() returns true before these can be called. |
| 86 | */ |
| 87 | static u32 __lpss_ssp_read_priv(struct driver_data *drv_data, unsigned offset) |
| 88 | { |
| 89 | WARN_ON(!drv_data->lpss_base); |
| 90 | return readl(drv_data->lpss_base + offset); |
| 91 | } |
| 92 | |
| 93 | static void __lpss_ssp_write_priv(struct driver_data *drv_data, |
| 94 | unsigned offset, u32 value) |
| 95 | { |
| 96 | WARN_ON(!drv_data->lpss_base); |
| 97 | writel(value, drv_data->lpss_base + offset); |
| 98 | } |
| 99 | |
| 100 | /* |
| 101 | * lpss_ssp_setup - perform LPSS SSP specific setup |
| 102 | * @drv_data: pointer to the driver private data |
| 103 | * |
| 104 | * Perform LPSS SSP specific setup. This function must be called first if |
| 105 | * one is going to use LPSS SSP private registers. |
| 106 | */ |
| 107 | static void lpss_ssp_setup(struct driver_data *drv_data) |
| 108 | { |
| 109 | unsigned offset = 0x400; |
| 110 | u32 value, orig; |
| 111 | |
| 112 | if (!is_lpss_ssp(drv_data)) |
| 113 | return; |
| 114 | |
| 115 | /* |
| 116 | * Perform auto-detection of the LPSS SSP private registers. They |
| 117 | * can be either at 1k or 2k offset from the base address. |
| 118 | */ |
| 119 | orig = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL); |
| 120 | |
Chew, Chiau Ee | e61f487 | 2014-06-13 23:57:25 +0800 | [diff] [blame^] | 121 | /* Test SPI_CS_CONTROL_SW_MODE bit enabling */ |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 122 | value = orig | SPI_CS_CONTROL_SW_MODE; |
| 123 | writel(value, drv_data->ioaddr + offset + SPI_CS_CONTROL); |
| 124 | value = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL); |
| 125 | if (value != (orig | SPI_CS_CONTROL_SW_MODE)) { |
| 126 | offset = 0x800; |
| 127 | goto detection_done; |
| 128 | } |
| 129 | |
Chew, Chiau Ee | e61f487 | 2014-06-13 23:57:25 +0800 | [diff] [blame^] | 130 | orig = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL); |
| 131 | |
| 132 | /* Test SPI_CS_CONTROL_SW_MODE bit disabling */ |
| 133 | value = orig & ~SPI_CS_CONTROL_SW_MODE; |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 134 | writel(value, drv_data->ioaddr + offset + SPI_CS_CONTROL); |
| 135 | value = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL); |
Chew, Chiau Ee | e61f487 | 2014-06-13 23:57:25 +0800 | [diff] [blame^] | 136 | if (value != (orig & ~SPI_CS_CONTROL_SW_MODE)) { |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 137 | offset = 0x800; |
| 138 | goto detection_done; |
| 139 | } |
| 140 | |
| 141 | detection_done: |
| 142 | /* Now set the LPSS base */ |
| 143 | drv_data->lpss_base = drv_data->ioaddr + offset; |
| 144 | |
| 145 | /* Enable software chip select control */ |
| 146 | value = SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH; |
| 147 | __lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value); |
Mika Westerberg | 0054e28 | 2013-03-05 12:05:17 +0200 | [diff] [blame] | 148 | |
| 149 | /* Enable multiblock DMA transfers */ |
Mika Westerberg | 1de7061 | 2013-07-03 13:25:06 +0300 | [diff] [blame] | 150 | if (drv_data->master_info->enable_dma) { |
Mika Westerberg | 0054e28 | 2013-03-05 12:05:17 +0200 | [diff] [blame] | 151 | __lpss_ssp_write_priv(drv_data, SSP_REG, 1); |
Mika Westerberg | 1de7061 | 2013-07-03 13:25:06 +0300 | [diff] [blame] | 152 | |
| 153 | value = __lpss_ssp_read_priv(drv_data, GENERAL_REG); |
| 154 | value |= GENERAL_REG_RXTO_HOLDOFF_DISABLE; |
| 155 | __lpss_ssp_write_priv(drv_data, GENERAL_REG, value); |
| 156 | } |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 157 | } |
| 158 | |
| 159 | static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable) |
| 160 | { |
| 161 | u32 value; |
| 162 | |
| 163 | if (!is_lpss_ssp(drv_data)) |
| 164 | return; |
| 165 | |
| 166 | value = __lpss_ssp_read_priv(drv_data, SPI_CS_CONTROL); |
| 167 | if (enable) |
| 168 | value &= ~SPI_CS_CONTROL_CS_HIGH; |
| 169 | else |
| 170 | value |= SPI_CS_CONTROL_CS_HIGH; |
| 171 | __lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value); |
| 172 | } |
| 173 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 174 | static void cs_assert(struct driver_data *drv_data) |
| 175 | { |
| 176 | struct chip_data *chip = drv_data->cur_chip; |
| 177 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 178 | if (drv_data->ssp_type == CE4100_SSP) { |
| 179 | write_SSSR(drv_data->cur_chip->frm, drv_data->ioaddr); |
| 180 | return; |
| 181 | } |
| 182 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 183 | if (chip->cs_control) { |
| 184 | chip->cs_control(PXA2XX_CS_ASSERT); |
| 185 | return; |
| 186 | } |
| 187 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 188 | if (gpio_is_valid(chip->gpio_cs)) { |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 189 | gpio_set_value(chip->gpio_cs, chip->gpio_cs_inverted); |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 190 | return; |
| 191 | } |
| 192 | |
| 193 | lpss_ssp_cs_control(drv_data, true); |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 194 | } |
| 195 | |
| 196 | static void cs_deassert(struct driver_data *drv_data) |
| 197 | { |
| 198 | struct chip_data *chip = drv_data->cur_chip; |
| 199 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 200 | if (drv_data->ssp_type == CE4100_SSP) |
| 201 | return; |
| 202 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 203 | if (chip->cs_control) { |
Daniel Ribeiro | 2b2562d | 2009-04-08 22:48:03 -0300 | [diff] [blame] | 204 | chip->cs_control(PXA2XX_CS_DEASSERT); |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 205 | return; |
| 206 | } |
| 207 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 208 | if (gpio_is_valid(chip->gpio_cs)) { |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 209 | gpio_set_value(chip->gpio_cs, !chip->gpio_cs_inverted); |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 210 | return; |
| 211 | } |
| 212 | |
| 213 | lpss_ssp_cs_control(drv_data, false); |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 214 | } |
| 215 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 216 | int pxa2xx_spi_flush(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 217 | { |
| 218 | unsigned long limit = loops_per_jiffy << 1; |
| 219 | |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 220 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 221 | |
| 222 | do { |
| 223 | while (read_SSSR(reg) & SSSR_RNE) { |
| 224 | read_SSDR(reg); |
| 225 | } |
Roel Kluin | 306c68a | 2009-04-21 12:24:46 -0700 | [diff] [blame] | 226 | } while ((read_SSSR(reg) & SSSR_BSY) && --limit); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 227 | write_SSSR_CS(drv_data, SSSR_ROR); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 228 | |
| 229 | return limit; |
| 230 | } |
| 231 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 232 | static int null_writer(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 233 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 234 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 235 | u8 n_bytes = drv_data->n_bytes; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 236 | |
Sebastian Andrzej Siewior | 4a25605 | 2010-11-22 17:12:15 -0800 | [diff] [blame] | 237 | if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 238 | || (drv_data->tx == drv_data->tx_end)) |
| 239 | return 0; |
| 240 | |
| 241 | write_SSDR(0, reg); |
| 242 | drv_data->tx += n_bytes; |
| 243 | |
| 244 | return 1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 245 | } |
| 246 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 247 | static int null_reader(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 248 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 249 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 250 | u8 n_bytes = drv_data->n_bytes; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 251 | |
| 252 | while ((read_SSSR(reg) & SSSR_RNE) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 253 | && (drv_data->rx < drv_data->rx_end)) { |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 254 | read_SSDR(reg); |
| 255 | drv_data->rx += n_bytes; |
| 256 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 257 | |
| 258 | return drv_data->rx == drv_data->rx_end; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 259 | } |
| 260 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 261 | static int u8_writer(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 262 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 263 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 264 | |
Sebastian Andrzej Siewior | 4a25605 | 2010-11-22 17:12:15 -0800 | [diff] [blame] | 265 | if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 266 | || (drv_data->tx == drv_data->tx_end)) |
| 267 | return 0; |
| 268 | |
| 269 | write_SSDR(*(u8 *)(drv_data->tx), reg); |
| 270 | ++drv_data->tx; |
| 271 | |
| 272 | return 1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 273 | } |
| 274 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 275 | static int u8_reader(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 276 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 277 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 278 | |
| 279 | while ((read_SSSR(reg) & SSSR_RNE) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 280 | && (drv_data->rx < drv_data->rx_end)) { |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 281 | *(u8 *)(drv_data->rx) = read_SSDR(reg); |
| 282 | ++drv_data->rx; |
| 283 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 284 | |
| 285 | return drv_data->rx == drv_data->rx_end; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 286 | } |
| 287 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 288 | static int u16_writer(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 289 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 290 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 291 | |
Sebastian Andrzej Siewior | 4a25605 | 2010-11-22 17:12:15 -0800 | [diff] [blame] | 292 | if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 293 | || (drv_data->tx == drv_data->tx_end)) |
| 294 | return 0; |
| 295 | |
| 296 | write_SSDR(*(u16 *)(drv_data->tx), reg); |
| 297 | drv_data->tx += 2; |
| 298 | |
| 299 | return 1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 300 | } |
| 301 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 302 | static int u16_reader(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 303 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 304 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 305 | |
| 306 | while ((read_SSSR(reg) & SSSR_RNE) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 307 | && (drv_data->rx < drv_data->rx_end)) { |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 308 | *(u16 *)(drv_data->rx) = read_SSDR(reg); |
| 309 | drv_data->rx += 2; |
| 310 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 311 | |
| 312 | return drv_data->rx == drv_data->rx_end; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 313 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 314 | |
| 315 | static int u32_writer(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 316 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 317 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 318 | |
Sebastian Andrzej Siewior | 4a25605 | 2010-11-22 17:12:15 -0800 | [diff] [blame] | 319 | if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 320 | || (drv_data->tx == drv_data->tx_end)) |
| 321 | return 0; |
| 322 | |
| 323 | write_SSDR(*(u32 *)(drv_data->tx), reg); |
| 324 | drv_data->tx += 4; |
| 325 | |
| 326 | return 1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 327 | } |
| 328 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 329 | static int u32_reader(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 330 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 331 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 332 | |
| 333 | while ((read_SSSR(reg) & SSSR_RNE) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 334 | && (drv_data->rx < drv_data->rx_end)) { |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 335 | *(u32 *)(drv_data->rx) = read_SSDR(reg); |
| 336 | drv_data->rx += 4; |
| 337 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 338 | |
| 339 | return drv_data->rx == drv_data->rx_end; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 340 | } |
| 341 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 342 | void *pxa2xx_spi_next_transfer(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 343 | { |
| 344 | struct spi_message *msg = drv_data->cur_msg; |
| 345 | struct spi_transfer *trans = drv_data->cur_transfer; |
| 346 | |
| 347 | /* Move to next transfer */ |
| 348 | if (trans->transfer_list.next != &msg->transfers) { |
| 349 | drv_data->cur_transfer = |
| 350 | list_entry(trans->transfer_list.next, |
| 351 | struct spi_transfer, |
| 352 | transfer_list); |
| 353 | return RUNNING_STATE; |
| 354 | } else |
| 355 | return DONE_STATE; |
| 356 | } |
| 357 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 358 | /* caller already set message->status; dma and pio irqs are blocked */ |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 359 | static void giveback(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 360 | { |
| 361 | struct spi_transfer* last_transfer; |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 362 | struct spi_message *msg; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 363 | |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 364 | msg = drv_data->cur_msg; |
| 365 | drv_data->cur_msg = NULL; |
| 366 | drv_data->cur_transfer = NULL; |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 367 | |
Axel Lin | 23e2c2a | 2014-02-12 22:13:27 +0800 | [diff] [blame] | 368 | last_transfer = list_last_entry(&msg->transfers, struct spi_transfer, |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 369 | transfer_list); |
| 370 | |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 371 | /* Delay if requested before any change in chip select */ |
| 372 | if (last_transfer->delay_usecs) |
| 373 | udelay(last_transfer->delay_usecs); |
| 374 | |
| 375 | /* Drop chip select UNLESS cs_change is true or we are returning |
| 376 | * a message with an error, or next message is for another chip |
| 377 | */ |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 378 | if (!last_transfer->cs_change) |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 379 | cs_deassert(drv_data); |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 380 | else { |
| 381 | struct spi_message *next_msg; |
| 382 | |
| 383 | /* Holding of cs was hinted, but we need to make sure |
| 384 | * the next message is for the same chip. Don't waste |
| 385 | * time with the following tests unless this was hinted. |
| 386 | * |
| 387 | * We cannot postpone this until pump_messages, because |
| 388 | * after calling msg->complete (below) the driver that |
| 389 | * sent the current message could be unloaded, which |
| 390 | * could invalidate the cs_control() callback... |
| 391 | */ |
| 392 | |
| 393 | /* get a pointer to the next message, if any */ |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 394 | next_msg = spi_get_next_queued_message(drv_data->master); |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 395 | |
| 396 | /* see if the next and current messages point |
| 397 | * to the same chip |
| 398 | */ |
| 399 | if (next_msg && next_msg->spi != msg->spi) |
| 400 | next_msg = NULL; |
| 401 | if (!next_msg || msg->state == ERROR_STATE) |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 402 | cs_deassert(drv_data); |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 403 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 404 | |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 405 | spi_finalize_current_message(drv_data->master); |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 406 | drv_data->cur_chip = NULL; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 407 | } |
| 408 | |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 409 | static void reset_sccr1(struct driver_data *drv_data) |
| 410 | { |
| 411 | void __iomem *reg = drv_data->ioaddr; |
| 412 | struct chip_data *chip = drv_data->cur_chip; |
| 413 | u32 sccr1_reg; |
| 414 | |
| 415 | sccr1_reg = read_SSCR1(reg) & ~drv_data->int_cr1; |
| 416 | sccr1_reg &= ~SSCR1_RFT; |
| 417 | sccr1_reg |= chip->threshold; |
| 418 | write_SSCR1(sccr1_reg, reg); |
| 419 | } |
| 420 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 421 | static void int_error_stop(struct driver_data *drv_data, const char* msg) |
| 422 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 423 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 424 | |
| 425 | /* Stop and reset SSP */ |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 426 | write_SSSR_CS(drv_data, drv_data->clear_sr); |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 427 | reset_sccr1(drv_data); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 428 | if (!pxa25x_ssp_comp(drv_data)) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 429 | write_SSTO(0, reg); |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 430 | pxa2xx_spi_flush(drv_data); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 431 | write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg); |
| 432 | |
| 433 | dev_err(&drv_data->pdev->dev, "%s\n", msg); |
| 434 | |
| 435 | drv_data->cur_msg->state = ERROR_STATE; |
| 436 | tasklet_schedule(&drv_data->pump_transfers); |
| 437 | } |
| 438 | |
| 439 | static void int_transfer_complete(struct driver_data *drv_data) |
| 440 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 441 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 442 | |
| 443 | /* Stop SSP */ |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 444 | write_SSSR_CS(drv_data, drv_data->clear_sr); |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 445 | reset_sccr1(drv_data); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 446 | if (!pxa25x_ssp_comp(drv_data)) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 447 | write_SSTO(0, reg); |
| 448 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 449 | /* Update total byte transferred return count actual bytes read */ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 450 | drv_data->cur_msg->actual_length += drv_data->len - |
| 451 | (drv_data->rx_end - drv_data->rx); |
| 452 | |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 453 | /* Transfer delays and chip select release are |
| 454 | * handled in pump_transfers or giveback |
| 455 | */ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 456 | |
| 457 | /* Move to next transfer */ |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 458 | drv_data->cur_msg->state = pxa2xx_spi_next_transfer(drv_data); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 459 | |
| 460 | /* Schedule transfer tasklet */ |
| 461 | tasklet_schedule(&drv_data->pump_transfers); |
| 462 | } |
| 463 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 464 | static irqreturn_t interrupt_transfer(struct driver_data *drv_data) |
| 465 | { |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 466 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 467 | |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 468 | u32 irq_mask = (read_SSCR1(reg) & SSCR1_TIE) ? |
| 469 | drv_data->mask_sr : drv_data->mask_sr & ~SSSR_TFS; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 470 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 471 | u32 irq_status = read_SSSR(reg) & irq_mask; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 472 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 473 | if (irq_status & SSSR_ROR) { |
| 474 | int_error_stop(drv_data, "interrupt_transfer: fifo overrun"); |
| 475 | return IRQ_HANDLED; |
| 476 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 477 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 478 | if (irq_status & SSSR_TINT) { |
| 479 | write_SSSR(SSSR_TINT, reg); |
| 480 | if (drv_data->read(drv_data)) { |
| 481 | int_transfer_complete(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 482 | return IRQ_HANDLED; |
| 483 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 484 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 485 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 486 | /* Drain rx fifo, Fill tx fifo and prevent overruns */ |
| 487 | do { |
| 488 | if (drv_data->read(drv_data)) { |
| 489 | int_transfer_complete(drv_data); |
| 490 | return IRQ_HANDLED; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 491 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 492 | } while (drv_data->write(drv_data)); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 493 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 494 | if (drv_data->read(drv_data)) { |
| 495 | int_transfer_complete(drv_data); |
| 496 | return IRQ_HANDLED; |
| 497 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 498 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 499 | if (drv_data->tx == drv_data->tx_end) { |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 500 | u32 bytes_left; |
| 501 | u32 sccr1_reg; |
| 502 | |
| 503 | sccr1_reg = read_SSCR1(reg); |
| 504 | sccr1_reg &= ~SSCR1_TIE; |
| 505 | |
| 506 | /* |
| 507 | * PXA25x_SSP has no timeout, set up rx threshould for the |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 508 | * remaining RX bytes. |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 509 | */ |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 510 | if (pxa25x_ssp_comp(drv_data)) { |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 511 | |
| 512 | sccr1_reg &= ~SSCR1_RFT; |
| 513 | |
| 514 | bytes_left = drv_data->rx_end - drv_data->rx; |
| 515 | switch (drv_data->n_bytes) { |
| 516 | case 4: |
| 517 | bytes_left >>= 1; |
| 518 | case 2: |
| 519 | bytes_left >>= 1; |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 520 | } |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 521 | |
| 522 | if (bytes_left > RX_THRESH_DFLT) |
| 523 | bytes_left = RX_THRESH_DFLT; |
| 524 | |
| 525 | sccr1_reg |= SSCR1_RxTresh(bytes_left); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 526 | } |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 527 | write_SSCR1(sccr1_reg, reg); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 528 | } |
| 529 | |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 530 | /* We did something */ |
| 531 | return IRQ_HANDLED; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 532 | } |
| 533 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 534 | static irqreturn_t ssp_int(int irq, void *dev_id) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 535 | { |
Jeff Garzik | c7bec5a | 2006-10-06 15:00:58 -0400 | [diff] [blame] | 536 | struct driver_data *drv_data = dev_id; |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 537 | void __iomem *reg = drv_data->ioaddr; |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 538 | u32 sccr1_reg; |
Sebastian Andrzej Siewior | 49cbb1e | 2010-11-22 17:12:14 -0800 | [diff] [blame] | 539 | u32 mask = drv_data->mask_sr; |
| 540 | u32 status; |
| 541 | |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 542 | /* |
| 543 | * The IRQ might be shared with other peripherals so we must first |
| 544 | * check that are we RPM suspended or not. If we are we assume that |
| 545 | * the IRQ was not for us (we shouldn't be RPM suspended when the |
| 546 | * interrupt is enabled). |
| 547 | */ |
| 548 | if (pm_runtime_suspended(&drv_data->pdev->dev)) |
| 549 | return IRQ_NONE; |
| 550 | |
Mika Westerberg | 269e4a4 | 2013-09-04 13:37:43 +0300 | [diff] [blame] | 551 | /* |
| 552 | * If the device is not yet in RPM suspended state and we get an |
| 553 | * interrupt that is meant for another device, check if status bits |
| 554 | * are all set to one. That means that the device is already |
| 555 | * powered off. |
| 556 | */ |
Sebastian Andrzej Siewior | 49cbb1e | 2010-11-22 17:12:14 -0800 | [diff] [blame] | 557 | status = read_SSSR(reg); |
Mika Westerberg | 269e4a4 | 2013-09-04 13:37:43 +0300 | [diff] [blame] | 558 | if (status == ~0) |
| 559 | return IRQ_NONE; |
| 560 | |
| 561 | sccr1_reg = read_SSCR1(reg); |
Sebastian Andrzej Siewior | 49cbb1e | 2010-11-22 17:12:14 -0800 | [diff] [blame] | 562 | |
| 563 | /* Ignore possible writes if we don't need to write */ |
| 564 | if (!(sccr1_reg & SSCR1_TIE)) |
| 565 | mask &= ~SSSR_TFS; |
| 566 | |
| 567 | if (!(status & mask)) |
| 568 | return IRQ_NONE; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 569 | |
| 570 | if (!drv_data->cur_msg) { |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 571 | |
| 572 | write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg); |
| 573 | write_SSCR1(read_SSCR1(reg) & ~drv_data->int_cr1, reg); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 574 | if (!pxa25x_ssp_comp(drv_data)) |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 575 | write_SSTO(0, reg); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 576 | write_SSSR_CS(drv_data, drv_data->clear_sr); |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 577 | |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 578 | dev_err(&drv_data->pdev->dev, |
| 579 | "bad message state in interrupt handler\n"); |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 580 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 581 | /* Never fail */ |
| 582 | return IRQ_HANDLED; |
| 583 | } |
| 584 | |
| 585 | return drv_data->transfer_handler(drv_data); |
| 586 | } |
| 587 | |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 588 | static unsigned int ssp_get_clk_div(struct driver_data *drv_data, int rate) |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 589 | { |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 590 | unsigned long ssp_clk = drv_data->max_clk_rate; |
| 591 | const struct ssp_device *ssp = drv_data->ssp; |
| 592 | |
| 593 | rate = min_t(int, ssp_clk, rate); |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 594 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 595 | if (ssp->type == PXA25x_SSP || ssp->type == CE4100_SSP) |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 596 | return ((ssp_clk / (2 * rate) - 1) & 0xff) << 8; |
| 597 | else |
| 598 | return ((ssp_clk / rate - 1) & 0xfff) << 8; |
| 599 | } |
| 600 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 601 | static void pump_transfers(unsigned long data) |
| 602 | { |
| 603 | struct driver_data *drv_data = (struct driver_data *)data; |
| 604 | struct spi_message *message = NULL; |
| 605 | struct spi_transfer *transfer = NULL; |
| 606 | struct spi_transfer *previous = NULL; |
| 607 | struct chip_data *chip = NULL; |
David Brownell | cf43369 | 2008-04-28 02:14:17 -0700 | [diff] [blame] | 608 | void __iomem *reg = drv_data->ioaddr; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 609 | u32 clk_div = 0; |
| 610 | u8 bits = 0; |
| 611 | u32 speed = 0; |
| 612 | u32 cr0; |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 613 | u32 cr1; |
| 614 | u32 dma_thresh = drv_data->cur_chip->dma_threshold; |
| 615 | u32 dma_burst = drv_data->cur_chip->dma_burst_size; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 616 | |
| 617 | /* Get current state information */ |
| 618 | message = drv_data->cur_msg; |
| 619 | transfer = drv_data->cur_transfer; |
| 620 | chip = drv_data->cur_chip; |
| 621 | |
| 622 | /* Handle for abort */ |
| 623 | if (message->state == ERROR_STATE) { |
| 624 | message->status = -EIO; |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 625 | giveback(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 626 | return; |
| 627 | } |
| 628 | |
| 629 | /* Handle end of message */ |
| 630 | if (message->state == DONE_STATE) { |
| 631 | message->status = 0; |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 632 | giveback(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 633 | return; |
| 634 | } |
| 635 | |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 636 | /* Delay if requested at end of transfer before CS change */ |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 637 | if (message->state == RUNNING_STATE) { |
| 638 | previous = list_entry(transfer->transfer_list.prev, |
| 639 | struct spi_transfer, |
| 640 | transfer_list); |
| 641 | if (previous->delay_usecs) |
| 642 | udelay(previous->delay_usecs); |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 643 | |
| 644 | /* Drop chip select only if cs_change is requested */ |
| 645 | if (previous->cs_change) |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 646 | cs_deassert(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 647 | } |
| 648 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 649 | /* Check if we can DMA this transfer */ |
| 650 | if (!pxa2xx_spi_dma_is_possible(transfer->len) && chip->enable_dma) { |
Ned Forrester | 7e96445 | 2008-09-13 02:33:18 -0700 | [diff] [blame] | 651 | |
| 652 | /* reject already-mapped transfers; PIO won't always work */ |
| 653 | if (message->is_dma_mapped |
| 654 | || transfer->rx_dma || transfer->tx_dma) { |
| 655 | dev_err(&drv_data->pdev->dev, |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 656 | "pump_transfers: mapped transfer length of " |
| 657 | "%u is greater than %d\n", |
Ned Forrester | 7e96445 | 2008-09-13 02:33:18 -0700 | [diff] [blame] | 658 | transfer->len, MAX_DMA_LEN); |
| 659 | message->status = -EINVAL; |
| 660 | giveback(drv_data); |
| 661 | return; |
| 662 | } |
| 663 | |
| 664 | /* warn ... we force this to PIO mode */ |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 665 | dev_warn_ratelimited(&message->spi->dev, |
| 666 | "pump_transfers: DMA disabled for transfer length %ld " |
| 667 | "greater than %d\n", |
| 668 | (long)drv_data->len, MAX_DMA_LEN); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 669 | } |
| 670 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 671 | /* Setup the transfer state based on the type of transfer */ |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 672 | if (pxa2xx_spi_flush(drv_data) == 0) { |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 673 | dev_err(&drv_data->pdev->dev, "pump_transfers: flush failed\n"); |
| 674 | message->status = -EIO; |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 675 | giveback(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 676 | return; |
| 677 | } |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 678 | drv_data->n_bytes = chip->n_bytes; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 679 | drv_data->tx = (void *)transfer->tx_buf; |
| 680 | drv_data->tx_end = drv_data->tx + transfer->len; |
| 681 | drv_data->rx = transfer->rx_buf; |
| 682 | drv_data->rx_end = drv_data->rx + transfer->len; |
| 683 | drv_data->rx_dma = transfer->rx_dma; |
| 684 | drv_data->tx_dma = transfer->tx_dma; |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 685 | drv_data->len = transfer->len; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 686 | drv_data->write = drv_data->tx ? chip->write : null_writer; |
| 687 | drv_data->read = drv_data->rx ? chip->read : null_reader; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 688 | |
| 689 | /* Change speed and bit per word on a per transfer */ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 690 | cr0 = chip->cr0; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 691 | if (transfer->speed_hz || transfer->bits_per_word) { |
| 692 | |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 693 | bits = chip->bits_per_word; |
| 694 | speed = chip->speed_hz; |
| 695 | |
| 696 | if (transfer->speed_hz) |
| 697 | speed = transfer->speed_hz; |
| 698 | |
| 699 | if (transfer->bits_per_word) |
| 700 | bits = transfer->bits_per_word; |
| 701 | |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 702 | clk_div = ssp_get_clk_div(drv_data, speed); |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 703 | |
| 704 | if (bits <= 8) { |
| 705 | drv_data->n_bytes = 1; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 706 | drv_data->read = drv_data->read != null_reader ? |
| 707 | u8_reader : null_reader; |
| 708 | drv_data->write = drv_data->write != null_writer ? |
| 709 | u8_writer : null_writer; |
| 710 | } else if (bits <= 16) { |
| 711 | drv_data->n_bytes = 2; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 712 | drv_data->read = drv_data->read != null_reader ? |
| 713 | u16_reader : null_reader; |
| 714 | drv_data->write = drv_data->write != null_writer ? |
| 715 | u16_writer : null_writer; |
| 716 | } else if (bits <= 32) { |
| 717 | drv_data->n_bytes = 4; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 718 | drv_data->read = drv_data->read != null_reader ? |
| 719 | u32_reader : null_reader; |
| 720 | drv_data->write = drv_data->write != null_writer ? |
| 721 | u32_writer : null_writer; |
| 722 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 723 | /* if bits/word is changed in dma mode, then must check the |
| 724 | * thresholds and burst also */ |
| 725 | if (chip->enable_dma) { |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 726 | if (pxa2xx_spi_set_dma_burst_and_threshold(chip, |
| 727 | message->spi, |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 728 | bits, &dma_burst, |
| 729 | &dma_thresh)) |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 730 | dev_warn_ratelimited(&message->spi->dev, |
| 731 | "pump_transfers: DMA burst size reduced to match bits_per_word\n"); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 732 | } |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 733 | |
| 734 | cr0 = clk_div |
| 735 | | SSCR0_Motorola |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 736 | | SSCR0_DataSize(bits > 16 ? bits - 16 : bits) |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 737 | | SSCR0_SSE |
| 738 | | (bits > 16 ? SSCR0_EDSS : 0); |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 739 | } |
| 740 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 741 | message->state = RUNNING_STATE; |
| 742 | |
Ned Forrester | 7e96445 | 2008-09-13 02:33:18 -0700 | [diff] [blame] | 743 | drv_data->dma_mapped = 0; |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 744 | if (pxa2xx_spi_dma_is_possible(drv_data->len)) |
| 745 | drv_data->dma_mapped = pxa2xx_spi_map_dma_buffers(drv_data); |
Ned Forrester | 7e96445 | 2008-09-13 02:33:18 -0700 | [diff] [blame] | 746 | if (drv_data->dma_mapped) { |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 747 | |
| 748 | /* Ensure we have the correct interrupt handler */ |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 749 | drv_data->transfer_handler = pxa2xx_spi_dma_transfer; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 750 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 751 | pxa2xx_spi_dma_prepare(drv_data, dma_burst); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 752 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 753 | /* Clear status and start DMA engine */ |
| 754 | cr1 = chip->cr1 | dma_thresh | drv_data->dma_cr1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 755 | write_SSSR(drv_data->clear_sr, reg); |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 756 | |
| 757 | pxa2xx_spi_dma_start(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 758 | } else { |
| 759 | /* Ensure we have the correct interrupt handler */ |
| 760 | drv_data->transfer_handler = interrupt_transfer; |
| 761 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 762 | /* Clear status */ |
| 763 | cr1 = chip->cr1 | chip->threshold | drv_data->int_cr1; |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 764 | write_SSSR_CS(drv_data, drv_data->clear_sr); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 765 | } |
| 766 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 767 | if (is_lpss_ssp(drv_data)) { |
| 768 | if ((read_SSIRF(reg) & 0xff) != chip->lpss_rx_threshold) |
| 769 | write_SSIRF(chip->lpss_rx_threshold, reg); |
| 770 | if ((read_SSITF(reg) & 0xffff) != chip->lpss_tx_threshold) |
| 771 | write_SSITF(chip->lpss_tx_threshold, reg); |
| 772 | } |
| 773 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 774 | /* see if we need to reload the config registers */ |
| 775 | if ((read_SSCR0(reg) != cr0) |
| 776 | || (read_SSCR1(reg) & SSCR1_CHANGE_MASK) != |
| 777 | (cr1 & SSCR1_CHANGE_MASK)) { |
| 778 | |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 779 | /* stop the SSP, and update the other bits */ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 780 | write_SSCR0(cr0 & ~SSCR0_SSE, reg); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 781 | if (!pxa25x_ssp_comp(drv_data)) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 782 | write_SSTO(chip->timeout, reg); |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 783 | /* first set CR1 without interrupt and service enables */ |
| 784 | write_SSCR1(cr1 & SSCR1_CHANGE_MASK, reg); |
| 785 | /* restart the SSP */ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 786 | write_SSCR0(cr0, reg); |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 787 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 788 | } else { |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 789 | if (!pxa25x_ssp_comp(drv_data)) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 790 | write_SSTO(chip->timeout, reg); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 791 | } |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 792 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 793 | cs_assert(drv_data); |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 794 | |
| 795 | /* after chip select, release the data by enabling service |
| 796 | * requests and interrupts, without changing any mode bits */ |
| 797 | write_SSCR1(cr1, reg); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 798 | } |
| 799 | |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 800 | static int pxa2xx_spi_transfer_one_message(struct spi_master *master, |
| 801 | struct spi_message *msg) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 802 | { |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 803 | struct driver_data *drv_data = spi_master_get_devdata(master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 804 | |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 805 | drv_data->cur_msg = msg; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 806 | /* Initial message state*/ |
| 807 | drv_data->cur_msg->state = START_STATE; |
| 808 | drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next, |
| 809 | struct spi_transfer, |
| 810 | transfer_list); |
| 811 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 812 | /* prepare to setup the SSP, in pump_transfers, using the per |
| 813 | * chip configuration */ |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 814 | drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 815 | |
| 816 | /* Mark as busy and launch transfers */ |
| 817 | tasklet_schedule(&drv_data->pump_transfers); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 818 | return 0; |
| 819 | } |
| 820 | |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 821 | static int pxa2xx_spi_unprepare_transfer(struct spi_master *master) |
| 822 | { |
| 823 | struct driver_data *drv_data = spi_master_get_devdata(master); |
| 824 | |
| 825 | /* Disable the SSP now */ |
| 826 | write_SSCR0(read_SSCR0(drv_data->ioaddr) & ~SSCR0_SSE, |
| 827 | drv_data->ioaddr); |
| 828 | |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 829 | return 0; |
| 830 | } |
| 831 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 832 | static int setup_cs(struct spi_device *spi, struct chip_data *chip, |
| 833 | struct pxa2xx_spi_chip *chip_info) |
| 834 | { |
| 835 | int err = 0; |
| 836 | |
| 837 | if (chip == NULL || chip_info == NULL) |
| 838 | return 0; |
| 839 | |
| 840 | /* NOTE: setup() can be called multiple times, possibly with |
| 841 | * different chip_info, release previously requested GPIO |
| 842 | */ |
| 843 | if (gpio_is_valid(chip->gpio_cs)) |
| 844 | gpio_free(chip->gpio_cs); |
| 845 | |
| 846 | /* If (*cs_control) is provided, ignore GPIO chip select */ |
| 847 | if (chip_info->cs_control) { |
| 848 | chip->cs_control = chip_info->cs_control; |
| 849 | return 0; |
| 850 | } |
| 851 | |
| 852 | if (gpio_is_valid(chip_info->gpio_cs)) { |
| 853 | err = gpio_request(chip_info->gpio_cs, "SPI_CS"); |
| 854 | if (err) { |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 855 | dev_err(&spi->dev, "failed to request chip select GPIO%d\n", |
| 856 | chip_info->gpio_cs); |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 857 | return err; |
| 858 | } |
| 859 | |
| 860 | chip->gpio_cs = chip_info->gpio_cs; |
| 861 | chip->gpio_cs_inverted = spi->mode & SPI_CS_HIGH; |
| 862 | |
| 863 | err = gpio_direction_output(chip->gpio_cs, |
| 864 | !chip->gpio_cs_inverted); |
| 865 | } |
| 866 | |
| 867 | return err; |
| 868 | } |
| 869 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 870 | static int setup(struct spi_device *spi) |
| 871 | { |
| 872 | struct pxa2xx_spi_chip *chip_info = NULL; |
| 873 | struct chip_data *chip; |
| 874 | struct driver_data *drv_data = spi_master_get_devdata(spi->master); |
| 875 | unsigned int clk_div; |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 876 | uint tx_thres, tx_hi_thres, rx_thres; |
| 877 | |
| 878 | if (is_lpss_ssp(drv_data)) { |
| 879 | tx_thres = LPSS_TX_LOTHRESH_DFLT; |
| 880 | tx_hi_thres = LPSS_TX_HITHRESH_DFLT; |
| 881 | rx_thres = LPSS_RX_THRESH_DFLT; |
| 882 | } else { |
| 883 | tx_thres = TX_THRESH_DFLT; |
| 884 | tx_hi_thres = 0; |
| 885 | rx_thres = RX_THRESH_DFLT; |
| 886 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 887 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 888 | /* Only alloc on first setup */ |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 889 | chip = spi_get_ctldata(spi); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 890 | if (!chip) { |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 891 | chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL); |
Jingoo Han | 9deae45 | 2014-04-29 17:19:38 +0900 | [diff] [blame] | 892 | if (!chip) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 893 | return -ENOMEM; |
| 894 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 895 | if (drv_data->ssp_type == CE4100_SSP) { |
| 896 | if (spi->chip_select > 4) { |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 897 | dev_err(&spi->dev, |
| 898 | "failed setup: cs number must not be > 4.\n"); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 899 | kfree(chip); |
| 900 | return -EINVAL; |
| 901 | } |
| 902 | |
| 903 | chip->frm = spi->chip_select; |
| 904 | } else |
| 905 | chip->gpio_cs = -1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 906 | chip->enable_dma = 0; |
Vernon Sauder | f1f640a | 2008-10-15 22:02:43 -0700 | [diff] [blame] | 907 | chip->timeout = TIMOUT_DFLT; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 908 | } |
| 909 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 910 | /* protocol drivers may change the chip settings, so... |
| 911 | * if chip_info exists, use it */ |
| 912 | chip_info = spi->controller_data; |
| 913 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 914 | /* chip_info isn't always needed */ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 915 | chip->cr1 = 0; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 916 | if (chip_info) { |
Vernon Sauder | f1f640a | 2008-10-15 22:02:43 -0700 | [diff] [blame] | 917 | if (chip_info->timeout) |
| 918 | chip->timeout = chip_info->timeout; |
| 919 | if (chip_info->tx_threshold) |
| 920 | tx_thres = chip_info->tx_threshold; |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 921 | if (chip_info->tx_hi_threshold) |
| 922 | tx_hi_thres = chip_info->tx_hi_threshold; |
Vernon Sauder | f1f640a | 2008-10-15 22:02:43 -0700 | [diff] [blame] | 923 | if (chip_info->rx_threshold) |
| 924 | rx_thres = chip_info->rx_threshold; |
| 925 | chip->enable_dma = drv_data->master_info->enable_dma; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 926 | chip->dma_threshold = 0; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 927 | if (chip_info->enable_loopback) |
| 928 | chip->cr1 = SSCR1_LBM; |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 929 | } else if (ACPI_HANDLE(&spi->dev)) { |
| 930 | /* |
| 931 | * Slave devices enumerated from ACPI namespace don't |
| 932 | * usually have chip_info but we still might want to use |
| 933 | * DMA with them. |
| 934 | */ |
| 935 | chip->enable_dma = drv_data->master_info->enable_dma; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 936 | } |
| 937 | |
Vernon Sauder | f1f640a | 2008-10-15 22:02:43 -0700 | [diff] [blame] | 938 | chip->threshold = (SSCR1_RxTresh(rx_thres) & SSCR1_RFT) | |
| 939 | (SSCR1_TxTresh(tx_thres) & SSCR1_TFT); |
| 940 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 941 | chip->lpss_rx_threshold = SSIRF_RxThresh(rx_thres); |
| 942 | chip->lpss_tx_threshold = SSITF_TxLoThresh(tx_thres) |
| 943 | | SSITF_TxHiThresh(tx_hi_thres); |
| 944 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 945 | /* set dma burst and threshold outside of chip_info path so that if |
| 946 | * chip_info goes away after setting chip->enable_dma, the |
| 947 | * burst and threshold can still respond to changes in bits_per_word */ |
| 948 | if (chip->enable_dma) { |
| 949 | /* set up legal burst and threshold for dma */ |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 950 | if (pxa2xx_spi_set_dma_burst_and_threshold(chip, spi, |
| 951 | spi->bits_per_word, |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 952 | &chip->dma_burst_size, |
| 953 | &chip->dma_threshold)) { |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 954 | dev_warn(&spi->dev, |
| 955 | "in setup: DMA burst size reduced to match bits_per_word\n"); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 956 | } |
| 957 | } |
| 958 | |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 959 | clk_div = ssp_get_clk_div(drv_data, spi->max_speed_hz); |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 960 | chip->speed_hz = spi->max_speed_hz; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 961 | |
| 962 | chip->cr0 = clk_div |
| 963 | | SSCR0_Motorola |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 964 | | SSCR0_DataSize(spi->bits_per_word > 16 ? |
| 965 | spi->bits_per_word - 16 : spi->bits_per_word) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 966 | | SSCR0_SSE |
| 967 | | (spi->bits_per_word > 16 ? SSCR0_EDSS : 0); |
Justin Clacherty | 7f6ee1a | 2007-01-26 00:56:44 -0800 | [diff] [blame] | 968 | chip->cr1 &= ~(SSCR1_SPO | SSCR1_SPH); |
| 969 | chip->cr1 |= (((spi->mode & SPI_CPHA) != 0) ? SSCR1_SPH : 0) |
| 970 | | (((spi->mode & SPI_CPOL) != 0) ? SSCR1_SPO : 0); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 971 | |
Mika Westerberg | b833172 | 2013-01-22 12:26:31 +0200 | [diff] [blame] | 972 | if (spi->mode & SPI_LOOP) |
| 973 | chip->cr1 |= SSCR1_LBM; |
| 974 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 975 | /* NOTE: PXA25x_SSP _could_ use external clocking ... */ |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 976 | if (!pxa25x_ssp_comp(drv_data)) |
David Brownell | 7d07719 | 2009-06-17 16:26:03 -0700 | [diff] [blame] | 977 | dev_dbg(&spi->dev, "%ld Hz actual, %s\n", |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 978 | drv_data->max_clk_rate |
Eric Miao | c9840da | 2010-03-16 16:48:01 +0800 | [diff] [blame] | 979 | / (1 + ((chip->cr0 & SSCR0_SCR(0xfff)) >> 8)), |
| 980 | chip->enable_dma ? "DMA" : "PIO"); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 981 | else |
David Brownell | 7d07719 | 2009-06-17 16:26:03 -0700 | [diff] [blame] | 982 | dev_dbg(&spi->dev, "%ld Hz actual, %s\n", |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 983 | drv_data->max_clk_rate / 2 |
Eric Miao | c9840da | 2010-03-16 16:48:01 +0800 | [diff] [blame] | 984 | / (1 + ((chip->cr0 & SSCR0_SCR(0x0ff)) >> 8)), |
| 985 | chip->enable_dma ? "DMA" : "PIO"); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 986 | |
| 987 | if (spi->bits_per_word <= 8) { |
| 988 | chip->n_bytes = 1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 989 | chip->read = u8_reader; |
| 990 | chip->write = u8_writer; |
| 991 | } else if (spi->bits_per_word <= 16) { |
| 992 | chip->n_bytes = 2; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 993 | chip->read = u16_reader; |
| 994 | chip->write = u16_writer; |
| 995 | } else if (spi->bits_per_word <= 32) { |
| 996 | chip->cr0 |= SSCR0_EDSS; |
| 997 | chip->n_bytes = 4; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 998 | chip->read = u32_reader; |
| 999 | chip->write = u32_writer; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1000 | } |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 1001 | chip->bits_per_word = spi->bits_per_word; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1002 | |
| 1003 | spi_set_ctldata(spi, chip); |
| 1004 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1005 | if (drv_data->ssp_type == CE4100_SSP) |
| 1006 | return 0; |
| 1007 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 1008 | return setup_cs(spi, chip, chip_info); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1009 | } |
| 1010 | |
Hans-Peter Nilsson | 0ffa028 | 2007-02-12 00:52:45 -0800 | [diff] [blame] | 1011 | static void cleanup(struct spi_device *spi) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1012 | { |
Hans-Peter Nilsson | 0ffa028 | 2007-02-12 00:52:45 -0800 | [diff] [blame] | 1013 | struct chip_data *chip = spi_get_ctldata(spi); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1014 | struct driver_data *drv_data = spi_master_get_devdata(spi->master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1015 | |
Daniel Ribeiro | 7348d82 | 2009-05-12 13:19:36 -0700 | [diff] [blame] | 1016 | if (!chip) |
| 1017 | return; |
| 1018 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1019 | if (drv_data->ssp_type != CE4100_SSP && gpio_is_valid(chip->gpio_cs)) |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 1020 | gpio_free(chip->gpio_cs); |
| 1021 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1022 | kfree(chip); |
| 1023 | } |
| 1024 | |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1025 | #ifdef CONFIG_ACPI |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1026 | static struct pxa2xx_spi_master * |
| 1027 | pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev) |
| 1028 | { |
| 1029 | struct pxa2xx_spi_master *pdata; |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1030 | struct acpi_device *adev; |
| 1031 | struct ssp_device *ssp; |
| 1032 | struct resource *res; |
| 1033 | int devid; |
| 1034 | |
| 1035 | if (!ACPI_HANDLE(&pdev->dev) || |
| 1036 | acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev)) |
| 1037 | return NULL; |
| 1038 | |
Mika Westerberg | cc0ee98 | 2013-06-20 17:44:22 +0300 | [diff] [blame] | 1039 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
Jingoo Han | 9deae45 | 2014-04-29 17:19:38 +0900 | [diff] [blame] | 1040 | if (!pdata) |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1041 | return NULL; |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1042 | |
| 1043 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1044 | if (!res) |
| 1045 | return NULL; |
| 1046 | |
| 1047 | ssp = &pdata->ssp; |
| 1048 | |
| 1049 | ssp->phys_base = res->start; |
Sachin Kamat | cbfd6a2 | 2013-04-08 15:49:33 +0530 | [diff] [blame] | 1050 | ssp->mmio_base = devm_ioremap_resource(&pdev->dev, res); |
| 1051 | if (IS_ERR(ssp->mmio_base)) |
Mika Westerberg | 6dc81f6 | 2013-05-13 13:45:09 +0300 | [diff] [blame] | 1052 | return NULL; |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1053 | |
| 1054 | ssp->clk = devm_clk_get(&pdev->dev, NULL); |
| 1055 | ssp->irq = platform_get_irq(pdev, 0); |
| 1056 | ssp->type = LPSS_SSP; |
| 1057 | ssp->pdev = pdev; |
| 1058 | |
| 1059 | ssp->port_id = -1; |
| 1060 | if (adev->pnp.unique_id && !kstrtoint(adev->pnp.unique_id, 0, &devid)) |
| 1061 | ssp->port_id = devid; |
| 1062 | |
| 1063 | pdata->num_chipselect = 1; |
Mika Westerberg | cddb339 | 2013-05-13 13:45:10 +0300 | [diff] [blame] | 1064 | pdata->enable_dma = true; |
Mika Westerberg | 483c319 | 2014-01-13 11:17:04 +0200 | [diff] [blame] | 1065 | pdata->tx_chan_id = -1; |
| 1066 | pdata->rx_chan_id = -1; |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1067 | |
| 1068 | return pdata; |
| 1069 | } |
| 1070 | |
| 1071 | static struct acpi_device_id pxa2xx_spi_acpi_match[] = { |
| 1072 | { "INT33C0", 0 }, |
| 1073 | { "INT33C1", 0 }, |
Mika Westerberg | 54acbd9 | 2013-11-12 12:06:21 +0200 | [diff] [blame] | 1074 | { "INT3430", 0 }, |
| 1075 | { "INT3431", 0 }, |
Mika Westerberg | 4b30f2a | 2013-05-13 13:45:11 +0300 | [diff] [blame] | 1076 | { "80860F0E", 0 }, |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1077 | { }, |
| 1078 | }; |
| 1079 | MODULE_DEVICE_TABLE(acpi, pxa2xx_spi_acpi_match); |
| 1080 | #else |
| 1081 | static inline struct pxa2xx_spi_master * |
| 1082 | pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev) |
| 1083 | { |
| 1084 | return NULL; |
| 1085 | } |
| 1086 | #endif |
| 1087 | |
Grant Likely | fd4a319 | 2012-12-07 16:57:14 +0000 | [diff] [blame] | 1088 | static int pxa2xx_spi_probe(struct platform_device *pdev) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1089 | { |
| 1090 | struct device *dev = &pdev->dev; |
| 1091 | struct pxa2xx_spi_master *platform_info; |
| 1092 | struct spi_master *master; |
Guennadi Liakhovetski | 65a00a2 | 2008-10-15 22:02:42 -0700 | [diff] [blame] | 1093 | struct driver_data *drv_data; |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1094 | struct ssp_device *ssp; |
Guennadi Liakhovetski | 65a00a2 | 2008-10-15 22:02:42 -0700 | [diff] [blame] | 1095 | int status; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1096 | |
Mika Westerberg | 851bacf | 2013-01-07 12:44:33 +0200 | [diff] [blame] | 1097 | platform_info = dev_get_platdata(dev); |
| 1098 | if (!platform_info) { |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1099 | platform_info = pxa2xx_spi_acpi_get_pdata(pdev); |
| 1100 | if (!platform_info) { |
| 1101 | dev_err(&pdev->dev, "missing platform data\n"); |
| 1102 | return -ENODEV; |
| 1103 | } |
Mika Westerberg | 851bacf | 2013-01-07 12:44:33 +0200 | [diff] [blame] | 1104 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1105 | |
Haojian Zhuang | baffe16 | 2010-05-05 10:11:15 -0400 | [diff] [blame] | 1106 | ssp = pxa_ssp_request(pdev->id, pdev->name); |
Mika Westerberg | 851bacf | 2013-01-07 12:44:33 +0200 | [diff] [blame] | 1107 | if (!ssp) |
| 1108 | ssp = &platform_info->ssp; |
| 1109 | |
| 1110 | if (!ssp->mmio_base) { |
| 1111 | dev_err(&pdev->dev, "failed to get ssp\n"); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1112 | return -ENODEV; |
| 1113 | } |
| 1114 | |
| 1115 | /* Allocate master with space for drv_data and null dma buffer */ |
| 1116 | master = spi_alloc_master(dev, sizeof(struct driver_data) + 16); |
| 1117 | if (!master) { |
Guennadi Liakhovetski | 65a00a2 | 2008-10-15 22:02:42 -0700 | [diff] [blame] | 1118 | dev_err(&pdev->dev, "cannot alloc spi_master\n"); |
Haojian Zhuang | baffe16 | 2010-05-05 10:11:15 -0400 | [diff] [blame] | 1119 | pxa_ssp_free(ssp); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1120 | return -ENOMEM; |
| 1121 | } |
| 1122 | drv_data = spi_master_get_devdata(master); |
| 1123 | drv_data->master = master; |
| 1124 | drv_data->master_info = platform_info; |
| 1125 | drv_data->pdev = pdev; |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1126 | drv_data->ssp = ssp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1127 | |
Sebastian Andrzej Siewior | 21486af | 2010-10-08 18:11:19 +0200 | [diff] [blame] | 1128 | master->dev.parent = &pdev->dev; |
Sebastian Andrzej Siewior | 21486af | 2010-10-08 18:11:19 +0200 | [diff] [blame] | 1129 | master->dev.of_node = pdev->dev.of_node; |
David Brownell | e7db06b | 2009-06-17 16:26:04 -0700 | [diff] [blame] | 1130 | /* the spi->mode bits understood by this driver: */ |
Mika Westerberg | b833172 | 2013-01-22 12:26:31 +0200 | [diff] [blame] | 1131 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; |
David Brownell | e7db06b | 2009-06-17 16:26:04 -0700 | [diff] [blame] | 1132 | |
Mika Westerberg | 851bacf | 2013-01-07 12:44:33 +0200 | [diff] [blame] | 1133 | master->bus_num = ssp->port_id; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1134 | master->num_chipselect = platform_info->num_chipselect; |
Mike Rapoport | 7ad0ba9 | 2009-04-06 19:00:57 -0700 | [diff] [blame] | 1135 | master->dma_alignment = DMA_ALIGNMENT; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1136 | master->cleanup = cleanup; |
| 1137 | master->setup = setup; |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 1138 | master->transfer_one_message = pxa2xx_spi_transfer_one_message; |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1139 | master->unprepare_transfer_hardware = pxa2xx_spi_unprepare_transfer; |
Mark Brown | 7dd6278 | 2013-07-28 15:35:21 +0100 | [diff] [blame] | 1140 | master->auto_runtime_pm = true; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1141 | |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1142 | drv_data->ssp_type = ssp->type; |
Mika Westerberg | 2b9b84f | 2013-01-22 12:26:25 +0200 | [diff] [blame] | 1143 | drv_data->null_dma_buf = (u32 *)PTR_ALIGN(&drv_data[1], DMA_ALIGNMENT); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1144 | |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1145 | drv_data->ioaddr = ssp->mmio_base; |
| 1146 | drv_data->ssdr_physical = ssp->phys_base + SSDR; |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1147 | if (pxa25x_ssp_comp(drv_data)) { |
Stephen Warren | 24778be | 2013-05-21 20:36:35 -0600 | [diff] [blame] | 1148 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1149 | drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE; |
| 1150 | drv_data->dma_cr1 = 0; |
| 1151 | drv_data->clear_sr = SSSR_ROR; |
| 1152 | drv_data->mask_sr = SSSR_RFS | SSSR_TFS | SSSR_ROR; |
| 1153 | } else { |
Stephen Warren | 24778be | 2013-05-21 20:36:35 -0600 | [diff] [blame] | 1154 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1155 | drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE; |
Mika Westerberg | 5928808 | 2013-01-22 12:26:29 +0200 | [diff] [blame] | 1156 | drv_data->dma_cr1 = DEFAULT_DMA_CR1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1157 | drv_data->clear_sr = SSSR_ROR | SSSR_TINT; |
| 1158 | drv_data->mask_sr = SSSR_TINT | SSSR_RFS | SSSR_TFS | SSSR_ROR; |
| 1159 | } |
| 1160 | |
Sebastian Andrzej Siewior | 49cbb1e | 2010-11-22 17:12:14 -0800 | [diff] [blame] | 1161 | status = request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), |
| 1162 | drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1163 | if (status < 0) { |
Guennadi Liakhovetski | 65a00a2 | 2008-10-15 22:02:42 -0700 | [diff] [blame] | 1164 | dev_err(&pdev->dev, "cannot get IRQ %d\n", ssp->irq); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1165 | goto out_error_master_alloc; |
| 1166 | } |
| 1167 | |
| 1168 | /* Setup DMA if requested */ |
| 1169 | drv_data->tx_channel = -1; |
| 1170 | drv_data->rx_channel = -1; |
| 1171 | if (platform_info->enable_dma) { |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1172 | status = pxa2xx_spi_dma_setup(drv_data); |
| 1173 | if (status) { |
Mika Westerberg | cddb339 | 2013-05-13 13:45:10 +0300 | [diff] [blame] | 1174 | dev_dbg(dev, "no DMA channels available, using PIO\n"); |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1175 | platform_info->enable_dma = false; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1176 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1177 | } |
| 1178 | |
| 1179 | /* Enable SOC clock */ |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 1180 | clk_prepare_enable(ssp->clk); |
| 1181 | |
| 1182 | drv_data->max_clk_rate = clk_get_rate(ssp->clk); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1183 | |
| 1184 | /* Load default SSP configuration */ |
| 1185 | write_SSCR0(0, drv_data->ioaddr); |
Vernon Sauder | f1f640a | 2008-10-15 22:02:43 -0700 | [diff] [blame] | 1186 | write_SSCR1(SSCR1_RxTresh(RX_THRESH_DFLT) | |
| 1187 | SSCR1_TxTresh(TX_THRESH_DFLT), |
| 1188 | drv_data->ioaddr); |
Eric Miao | c9840da | 2010-03-16 16:48:01 +0800 | [diff] [blame] | 1189 | write_SSCR0(SSCR0_SCR(2) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1190 | | SSCR0_Motorola |
| 1191 | | SSCR0_DataSize(8), |
| 1192 | drv_data->ioaddr); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1193 | if (!pxa25x_ssp_comp(drv_data)) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1194 | write_SSTO(0, drv_data->ioaddr); |
| 1195 | write_SSPSP(0, drv_data->ioaddr); |
| 1196 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 1197 | lpss_ssp_setup(drv_data); |
| 1198 | |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 1199 | tasklet_init(&drv_data->pump_transfers, pump_transfers, |
| 1200 | (unsigned long)drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1201 | |
Antonio Ospite | 836d1a2 | 2014-05-30 18:18:09 +0200 | [diff] [blame] | 1202 | pm_runtime_set_autosuspend_delay(&pdev->dev, 50); |
| 1203 | pm_runtime_use_autosuspend(&pdev->dev); |
| 1204 | pm_runtime_set_active(&pdev->dev); |
| 1205 | pm_runtime_enable(&pdev->dev); |
| 1206 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1207 | /* Register with the SPI framework */ |
| 1208 | platform_set_drvdata(pdev, drv_data); |
Jingoo Han | a807fcd | 2013-09-24 13:46:55 +0900 | [diff] [blame] | 1209 | status = devm_spi_register_master(&pdev->dev, master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1210 | if (status != 0) { |
| 1211 | dev_err(&pdev->dev, "problem registering spi master\n"); |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 1212 | goto out_error_clock_enabled; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1213 | } |
| 1214 | |
| 1215 | return status; |
| 1216 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1217 | out_error_clock_enabled: |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 1218 | clk_disable_unprepare(ssp->clk); |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1219 | pxa2xx_spi_dma_release(drv_data); |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1220 | free_irq(ssp->irq, drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1221 | |
| 1222 | out_error_master_alloc: |
| 1223 | spi_master_put(master); |
Haojian Zhuang | baffe16 | 2010-05-05 10:11:15 -0400 | [diff] [blame] | 1224 | pxa_ssp_free(ssp); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1225 | return status; |
| 1226 | } |
| 1227 | |
| 1228 | static int pxa2xx_spi_remove(struct platform_device *pdev) |
| 1229 | { |
| 1230 | struct driver_data *drv_data = platform_get_drvdata(pdev); |
Julia Lawall | 51e911e | 2009-01-06 14:41:45 -0800 | [diff] [blame] | 1231 | struct ssp_device *ssp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1232 | |
| 1233 | if (!drv_data) |
| 1234 | return 0; |
Julia Lawall | 51e911e | 2009-01-06 14:41:45 -0800 | [diff] [blame] | 1235 | ssp = drv_data->ssp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1236 | |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1237 | pm_runtime_get_sync(&pdev->dev); |
| 1238 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1239 | /* Disable the SSP at the peripheral and SOC level */ |
| 1240 | write_SSCR0(0, drv_data->ioaddr); |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 1241 | clk_disable_unprepare(ssp->clk); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1242 | |
| 1243 | /* Release DMA */ |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1244 | if (drv_data->master_info->enable_dma) |
| 1245 | pxa2xx_spi_dma_release(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1246 | |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1247 | pm_runtime_put_noidle(&pdev->dev); |
| 1248 | pm_runtime_disable(&pdev->dev); |
| 1249 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1250 | /* Release IRQ */ |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1251 | free_irq(ssp->irq, drv_data); |
| 1252 | |
| 1253 | /* Release SSP */ |
Haojian Zhuang | baffe16 | 2010-05-05 10:11:15 -0400 | [diff] [blame] | 1254 | pxa_ssp_free(ssp); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1255 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1256 | return 0; |
| 1257 | } |
| 1258 | |
| 1259 | static void pxa2xx_spi_shutdown(struct platform_device *pdev) |
| 1260 | { |
| 1261 | int status = 0; |
| 1262 | |
| 1263 | if ((status = pxa2xx_spi_remove(pdev)) != 0) |
| 1264 | dev_err(&pdev->dev, "shutdown failed with %d\n", status); |
| 1265 | } |
| 1266 | |
Mika Westerberg | 382cebb | 2014-01-16 14:50:55 +0200 | [diff] [blame] | 1267 | #ifdef CONFIG_PM_SLEEP |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1268 | static int pxa2xx_spi_suspend(struct device *dev) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1269 | { |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1270 | struct driver_data *drv_data = dev_get_drvdata(dev); |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1271 | struct ssp_device *ssp = drv_data->ssp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1272 | int status = 0; |
| 1273 | |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 1274 | status = spi_master_suspend(drv_data->master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1275 | if (status != 0) |
| 1276 | return status; |
| 1277 | write_SSCR0(0, drv_data->ioaddr); |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 1278 | clk_disable_unprepare(ssp->clk); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1279 | |
| 1280 | return 0; |
| 1281 | } |
| 1282 | |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1283 | static int pxa2xx_spi_resume(struct device *dev) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1284 | { |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1285 | struct driver_data *drv_data = dev_get_drvdata(dev); |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1286 | struct ssp_device *ssp = drv_data->ssp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1287 | int status = 0; |
| 1288 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1289 | pxa2xx_spi_dma_resume(drv_data); |
Daniel Ribeiro | 148da33 | 2009-04-21 12:24:43 -0700 | [diff] [blame] | 1290 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1291 | /* Enable the SSP clock */ |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 1292 | clk_prepare_enable(ssp->clk); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1293 | |
Chew, Chiau Ee | c50325f | 2013-11-29 02:13:11 +0800 | [diff] [blame] | 1294 | /* Restore LPSS private register bits */ |
| 1295 | lpss_ssp_setup(drv_data); |
| 1296 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1297 | /* Start the queue running */ |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 1298 | status = spi_master_resume(drv_data->master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1299 | if (status != 0) { |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1300 | dev_err(dev, "problem starting queue (%d)\n", status); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1301 | return status; |
| 1302 | } |
| 1303 | |
| 1304 | return 0; |
| 1305 | } |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1306 | #endif |
| 1307 | |
| 1308 | #ifdef CONFIG_PM_RUNTIME |
| 1309 | static int pxa2xx_spi_runtime_suspend(struct device *dev) |
| 1310 | { |
| 1311 | struct driver_data *drv_data = dev_get_drvdata(dev); |
| 1312 | |
| 1313 | clk_disable_unprepare(drv_data->ssp->clk); |
| 1314 | return 0; |
| 1315 | } |
| 1316 | |
| 1317 | static int pxa2xx_spi_runtime_resume(struct device *dev) |
| 1318 | { |
| 1319 | struct driver_data *drv_data = dev_get_drvdata(dev); |
| 1320 | |
| 1321 | clk_prepare_enable(drv_data->ssp->clk); |
| 1322 | return 0; |
| 1323 | } |
| 1324 | #endif |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1325 | |
Alexey Dobriyan | 4714521 | 2009-12-14 18:00:08 -0800 | [diff] [blame] | 1326 | static const struct dev_pm_ops pxa2xx_spi_pm_ops = { |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1327 | SET_SYSTEM_SLEEP_PM_OPS(pxa2xx_spi_suspend, pxa2xx_spi_resume) |
| 1328 | SET_RUNTIME_PM_OPS(pxa2xx_spi_runtime_suspend, |
| 1329 | pxa2xx_spi_runtime_resume, NULL) |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1330 | }; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1331 | |
| 1332 | static struct platform_driver driver = { |
| 1333 | .driver = { |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1334 | .name = "pxa2xx-spi", |
| 1335 | .owner = THIS_MODULE, |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1336 | .pm = &pxa2xx_spi_pm_ops, |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1337 | .acpi_match_table = ACPI_PTR(pxa2xx_spi_acpi_match), |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1338 | }, |
Sebastian Andrzej Siewior | fbd29a1 | 2010-11-19 09:00:11 -0800 | [diff] [blame] | 1339 | .probe = pxa2xx_spi_probe, |
David Brownell | d1e44d9 | 2007-10-16 01:27:46 -0700 | [diff] [blame] | 1340 | .remove = pxa2xx_spi_remove, |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1341 | .shutdown = pxa2xx_spi_shutdown, |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1342 | }; |
| 1343 | |
| 1344 | static int __init pxa2xx_spi_init(void) |
| 1345 | { |
Sebastian Andrzej Siewior | fbd29a1 | 2010-11-19 09:00:11 -0800 | [diff] [blame] | 1346 | return platform_driver_register(&driver); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1347 | } |
Antonio Ospite | 5b61a74 | 2009-09-22 16:46:10 -0700 | [diff] [blame] | 1348 | subsys_initcall(pxa2xx_spi_init); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1349 | |
| 1350 | static void __exit pxa2xx_spi_exit(void) |
| 1351 | { |
| 1352 | platform_driver_unregister(&driver); |
| 1353 | } |
| 1354 | module_exit(pxa2xx_spi_exit); |