blob: dec48bfaddb8ff79ee7f7734cebfca7f36844461 [file] [log] [blame]
Eddie Dong97222cc2007-09-12 10:58:04 +03001
2/*
3 * Local APIC virtualization
4 *
5 * Copyright (C) 2006 Qumranet, Inc.
6 * Copyright (C) 2007 Novell
7 * Copyright (C) 2007 Intel
Nicolas Kaiser9611c182010-10-06 14:23:22 +02008 * Copyright 2009 Red Hat, Inc. and/or its affiliates.
Eddie Dong97222cc2007-09-12 10:58:04 +03009 *
10 * Authors:
11 * Dor Laor <dor.laor@qumranet.com>
12 * Gregory Haskins <ghaskins@novell.com>
13 * Yaozu (Eddie) Dong <eddie.dong@intel.com>
14 *
15 * Based on Xen 3.1 code, Copyright (c) 2004, Intel Corporation.
16 *
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
19 */
20
Avi Kivityedf88412007-12-16 11:02:48 +020021#include <linux/kvm_host.h>
Eddie Dong97222cc2007-09-12 10:58:04 +030022#include <linux/kvm.h>
23#include <linux/mm.h>
24#include <linux/highmem.h>
25#include <linux/smp.h>
26#include <linux/hrtimer.h>
27#include <linux/io.h>
28#include <linux/module.h>
Roman Zippel6f6d6a12008-05-01 04:34:28 -070029#include <linux/math64.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090030#include <linux/slab.h>
Eddie Dong97222cc2007-09-12 10:58:04 +030031#include <asm/processor.h>
32#include <asm/msr.h>
33#include <asm/page.h>
34#include <asm/current.h>
35#include <asm/apicdef.h>
Arun Sharma600634972011-07-26 16:09:06 -070036#include <linux/atomic.h>
Gleb Natapovc5cc4212012-08-05 15:58:30 +030037#include <linux/jump_label.h>
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -030038#include "kvm_cache_regs.h"
Eddie Dong97222cc2007-09-12 10:58:04 +030039#include "irq.h"
Marcelo Tosatti229456f2009-06-17 09:22:14 -030040#include "trace.h"
Gleb Natapovfc61b802009-07-05 17:39:35 +030041#include "x86.h"
Avi Kivity00b27a32011-11-23 16:30:32 +020042#include "cpuid.h"
Eddie Dong97222cc2007-09-12 10:58:04 +030043
Marcelo Tosattib682b812009-02-10 20:41:41 -020044#ifndef CONFIG_X86_64
45#define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
46#else
47#define mod_64(x, y) ((x) % (y))
48#endif
49
Eddie Dong97222cc2007-09-12 10:58:04 +030050#define PRId64 "d"
51#define PRIx64 "llx"
52#define PRIu64 "u"
53#define PRIo64 "o"
54
55#define APIC_BUS_CYCLE_NS 1
56
57/* #define apic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg) */
58#define apic_debug(fmt, arg...)
59
60#define APIC_LVT_NUM 6
61/* 14 is the version for Xeon and Pentium 8.4.8*/
62#define APIC_VERSION (0x14UL | ((APIC_LVT_NUM - 1) << 16))
63#define LAPIC_MMIO_LENGTH (1 << 12)
64/* followed define is not in apicdef.h */
65#define APIC_SHORT_MASK 0xc0000
66#define APIC_DEST_NOSHORT 0x0
67#define APIC_DEST_MASK 0x800
68#define MAX_APIC_VECTOR 256
Takuya Yoshikawaecba9a52012-09-05 19:30:01 +090069#define APIC_VECTORS_PER_REG 32
Eddie Dong97222cc2007-09-12 10:58:04 +030070
71#define VEC_POS(v) ((v) & (32 - 1))
72#define REG_POS(v) (((v) >> 5) << 4)
Zhang Xiantaoad312c72007-12-13 23:50:52 +080073
Jan Kiszka9bc57912011-09-12 14:10:22 +020074static unsigned int min_timer_period_us = 500;
75module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
76
Eddie Dong97222cc2007-09-12 10:58:04 +030077static inline void apic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val)
78{
79 *((u32 *) (apic->regs + reg_off)) = val;
80}
81
Michael S. Tsirkina0c9a8222012-04-11 18:49:55 +030082static inline int apic_test_vector(int vec, void *bitmap)
83{
84 return test_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
85}
86
Yang Zhang10606912013-04-11 19:21:38 +080087bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector)
88{
89 struct kvm_lapic *apic = vcpu->arch.apic;
90
91 return apic_test_vector(vector, apic->regs + APIC_ISR) ||
92 apic_test_vector(vector, apic->regs + APIC_IRR);
93}
94
Eddie Dong97222cc2007-09-12 10:58:04 +030095static inline void apic_set_vector(int vec, void *bitmap)
96{
97 set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
98}
99
100static inline void apic_clear_vector(int vec, void *bitmap)
101{
102 clear_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
103}
104
Michael S. Tsirkin8680b942012-06-24 19:24:26 +0300105static inline int __apic_test_and_set_vector(int vec, void *bitmap)
106{
107 return __test_and_set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
108}
109
110static inline int __apic_test_and_clear_vector(int vec, void *bitmap)
111{
112 return __test_and_clear_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
113}
114
Gleb Natapovc5cc4212012-08-05 15:58:30 +0300115struct static_key_deferred apic_hw_disabled __read_mostly;
Gleb Natapovf8c1ea12012-08-05 15:58:31 +0300116struct static_key_deferred apic_sw_disabled __read_mostly;
117
118static inline void apic_set_spiv(struct kvm_lapic *apic, u32 val)
Eddie Dong97222cc2007-09-12 10:58:04 +0300119{
Gleb Natapovc48f1492012-08-05 15:58:33 +0300120 if ((kvm_apic_get_reg(apic, APIC_SPIV) ^ val) & APIC_SPIV_APIC_ENABLED) {
Gleb Natapovf8c1ea12012-08-05 15:58:31 +0300121 if (val & APIC_SPIV_APIC_ENABLED)
122 static_key_slow_dec_deferred(&apic_sw_disabled);
123 else
124 static_key_slow_inc(&apic_sw_disabled.key);
125 }
126 apic_set_reg(apic, APIC_SPIV, val);
127}
128
Eddie Dong97222cc2007-09-12 10:58:04 +0300129static inline int apic_enabled(struct kvm_lapic *apic)
130{
Gleb Natapovc48f1492012-08-05 15:58:33 +0300131 return kvm_apic_sw_enabled(apic) && kvm_apic_hw_enabled(apic);
Gleb Natapov54e98182012-08-05 15:58:32 +0300132}
133
Eddie Dong97222cc2007-09-12 10:58:04 +0300134#define LVT_MASK \
135 (APIC_LVT_MASKED | APIC_SEND_PENDING | APIC_VECTOR_MASK)
136
137#define LINT_MASK \
138 (LVT_MASK | APIC_MODE_MASK | APIC_INPUT_POLARITY | \
139 APIC_LVT_REMOTE_IRR | APIC_LVT_LEVEL_TRIGGER)
140
141static inline int kvm_apic_id(struct kvm_lapic *apic)
142{
Gleb Natapovc48f1492012-08-05 15:58:33 +0300143 return (kvm_apic_get_reg(apic, APIC_ID) >> 24) & 0xff;
Eddie Dong97222cc2007-09-12 10:58:04 +0300144}
145
Gleb Natapov17d68b72013-12-12 21:20:08 +0100146#define KVM_X2APIC_CID_BITS 0
147
Gleb Natapov1e08ec42012-09-13 17:19:24 +0300148static void recalculate_apic_map(struct kvm *kvm)
149{
150 struct kvm_apic_map *new, *old = NULL;
151 struct kvm_vcpu *vcpu;
152 int i;
153
154 new = kzalloc(sizeof(struct kvm_apic_map), GFP_KERNEL);
155
156 mutex_lock(&kvm->arch.apic_map_lock);
157
158 if (!new)
159 goto out;
160
161 new->ldr_bits = 8;
162 /* flat mode is default */
163 new->cid_shift = 8;
164 new->cid_mask = 0;
165 new->lid_mask = 0xff;
166
167 kvm_for_each_vcpu(i, vcpu, kvm) {
168 struct kvm_lapic *apic = vcpu->arch.apic;
169 u16 cid, lid;
170 u32 ldr;
171
172 if (!kvm_apic_present(vcpu))
173 continue;
174
175 /*
176 * All APICs have to be configured in the same mode by an OS.
177 * We take advatage of this while building logical id loockup
178 * table. After reset APICs are in xapic/flat mode, so if we
179 * find apic with different setting we assume this is the mode
180 * OS wants all apics to be in; build lookup table accordingly.
181 */
182 if (apic_x2apic_mode(apic)) {
183 new->ldr_bits = 32;
184 new->cid_shift = 16;
Gleb Natapov17d68b72013-12-12 21:20:08 +0100185 new->cid_mask = (1 << KVM_X2APIC_CID_BITS) - 1;
186 new->lid_mask = 0xffff;
Gleb Natapov1e08ec42012-09-13 17:19:24 +0300187 } else if (kvm_apic_sw_enabled(apic) &&
188 !new->cid_mask /* flat mode */ &&
189 kvm_apic_get_reg(apic, APIC_DFR) == APIC_DFR_CLUSTER) {
190 new->cid_shift = 4;
191 new->cid_mask = 0xf;
192 new->lid_mask = 0xf;
193 }
194
195 new->phys_map[kvm_apic_id(apic)] = apic;
196
197 ldr = kvm_apic_get_reg(apic, APIC_LDR);
198 cid = apic_cluster_id(new, ldr);
199 lid = apic_logical_id(new, ldr);
200
201 if (lid)
202 new->logical_map[cid][ffs(lid) - 1] = apic;
203 }
204out:
205 old = rcu_dereference_protected(kvm->arch.apic_map,
206 lockdep_is_held(&kvm->arch.apic_map_lock));
207 rcu_assign_pointer(kvm->arch.apic_map, new);
208 mutex_unlock(&kvm->arch.apic_map_lock);
209
210 if (old)
211 kfree_rcu(old, rcu);
Yang Zhangc7c9c562013-01-25 10:18:51 +0800212
Yang Zhang3d81bc72013-04-11 19:25:13 +0800213 kvm_vcpu_request_scan_ioapic(kvm);
Gleb Natapov1e08ec42012-09-13 17:19:24 +0300214}
215
216static inline void kvm_apic_set_id(struct kvm_lapic *apic, u8 id)
217{
218 apic_set_reg(apic, APIC_ID, id << 24);
219 recalculate_apic_map(apic->vcpu->kvm);
220}
221
222static inline void kvm_apic_set_ldr(struct kvm_lapic *apic, u32 id)
223{
224 apic_set_reg(apic, APIC_LDR, id);
225 recalculate_apic_map(apic->vcpu->kvm);
226}
227
Eddie Dong97222cc2007-09-12 10:58:04 +0300228static inline int apic_lvt_enabled(struct kvm_lapic *apic, int lvt_type)
229{
Gleb Natapovc48f1492012-08-05 15:58:33 +0300230 return !(kvm_apic_get_reg(apic, lvt_type) & APIC_LVT_MASKED);
Eddie Dong97222cc2007-09-12 10:58:04 +0300231}
232
233static inline int apic_lvt_vector(struct kvm_lapic *apic, int lvt_type)
234{
Gleb Natapovc48f1492012-08-05 15:58:33 +0300235 return kvm_apic_get_reg(apic, lvt_type) & APIC_VECTOR_MASK;
Eddie Dong97222cc2007-09-12 10:58:04 +0300236}
237
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +0800238static inline int apic_lvtt_oneshot(struct kvm_lapic *apic)
239{
Gleb Natapovc48f1492012-08-05 15:58:33 +0300240 return ((kvm_apic_get_reg(apic, APIC_LVTT) &
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +0800241 apic->lapic_timer.timer_mode_mask) == APIC_LVT_TIMER_ONESHOT);
242}
243
Eddie Dong97222cc2007-09-12 10:58:04 +0300244static inline int apic_lvtt_period(struct kvm_lapic *apic)
245{
Gleb Natapovc48f1492012-08-05 15:58:33 +0300246 return ((kvm_apic_get_reg(apic, APIC_LVTT) &
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +0800247 apic->lapic_timer.timer_mode_mask) == APIC_LVT_TIMER_PERIODIC);
248}
249
250static inline int apic_lvtt_tscdeadline(struct kvm_lapic *apic)
251{
Gleb Natapovc48f1492012-08-05 15:58:33 +0300252 return ((kvm_apic_get_reg(apic, APIC_LVTT) &
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +0800253 apic->lapic_timer.timer_mode_mask) ==
254 APIC_LVT_TIMER_TSCDEADLINE);
Eddie Dong97222cc2007-09-12 10:58:04 +0300255}
256
Jan Kiszkacc6e4622008-10-20 10:20:03 +0200257static inline int apic_lvt_nmi_mode(u32 lvt_val)
258{
259 return (lvt_val & (APIC_MODE_MASK | APIC_LVT_MASKED)) == APIC_DM_NMI;
260}
261
Gleb Natapovfc61b802009-07-05 17:39:35 +0300262void kvm_apic_set_version(struct kvm_vcpu *vcpu)
263{
264 struct kvm_lapic *apic = vcpu->arch.apic;
265 struct kvm_cpuid_entry2 *feat;
266 u32 v = APIC_VERSION;
267
Gleb Natapovc48f1492012-08-05 15:58:33 +0300268 if (!kvm_vcpu_has_lapic(vcpu))
Gleb Natapovfc61b802009-07-05 17:39:35 +0300269 return;
270
271 feat = kvm_find_cpuid_entry(apic->vcpu, 0x1, 0);
272 if (feat && (feat->ecx & (1 << (X86_FEATURE_X2APIC & 31))))
273 v |= APIC_LVR_DIRECTED_EOI;
274 apic_set_reg(apic, APIC_LVR, v);
275}
276
Mathias Krausef1d24832012-08-30 01:30:18 +0200277static const unsigned int apic_lvt_mask[APIC_LVT_NUM] = {
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +0800278 LVT_MASK , /* part LVTT mask, timer mode mask added at runtime */
Eddie Dong97222cc2007-09-12 10:58:04 +0300279 LVT_MASK | APIC_MODE_MASK, /* LVTTHMR */
280 LVT_MASK | APIC_MODE_MASK, /* LVTPC */
281 LINT_MASK, LINT_MASK, /* LVT0-1 */
282 LVT_MASK /* LVTERR */
283};
284
285static int find_highest_vector(void *bitmap)
286{
Takuya Yoshikawaecba9a52012-09-05 19:30:01 +0900287 int vec;
288 u32 *reg;
Eddie Dong97222cc2007-09-12 10:58:04 +0300289
Takuya Yoshikawaecba9a52012-09-05 19:30:01 +0900290 for (vec = MAX_APIC_VECTOR - APIC_VECTORS_PER_REG;
291 vec >= 0; vec -= APIC_VECTORS_PER_REG) {
292 reg = bitmap + REG_POS(vec);
293 if (*reg)
294 return fls(*reg) - 1 + vec;
295 }
Eddie Dong97222cc2007-09-12 10:58:04 +0300296
Takuya Yoshikawaecba9a52012-09-05 19:30:01 +0900297 return -1;
Eddie Dong97222cc2007-09-12 10:58:04 +0300298}
299
Michael S. Tsirkin8680b942012-06-24 19:24:26 +0300300static u8 count_vectors(void *bitmap)
301{
Takuya Yoshikawaecba9a52012-09-05 19:30:01 +0900302 int vec;
303 u32 *reg;
Michael S. Tsirkin8680b942012-06-24 19:24:26 +0300304 u8 count = 0;
Takuya Yoshikawaecba9a52012-09-05 19:30:01 +0900305
306 for (vec = 0; vec < MAX_APIC_VECTOR; vec += APIC_VECTORS_PER_REG) {
307 reg = bitmap + REG_POS(vec);
308 count += hweight32(*reg);
309 }
310
Michael S. Tsirkin8680b942012-06-24 19:24:26 +0300311 return count;
312}
313
Yang Zhanga20ed542013-04-11 19:25:15 +0800314void kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir)
315{
316 u32 i, pir_val;
317 struct kvm_lapic *apic = vcpu->arch.apic;
318
319 for (i = 0; i <= 7; i++) {
320 pir_val = xchg(&pir[i], 0);
321 if (pir_val)
322 *((u32 *)(apic->regs + APIC_IRR + i * 0x10)) |= pir_val;
323 }
324}
325EXPORT_SYMBOL_GPL(kvm_apic_update_irr);
326
Jan Kiszka11f5cc02013-07-25 09:58:45 +0200327static inline void apic_set_irr(int vec, struct kvm_lapic *apic)
Eddie Dong97222cc2007-09-12 10:58:04 +0300328{
Gleb Natapov33e4c682009-06-11 11:06:51 +0300329 apic->irr_pending = true;
Jan Kiszka11f5cc02013-07-25 09:58:45 +0200330 apic_set_vector(vec, apic->regs + APIC_IRR);
Eddie Dong97222cc2007-09-12 10:58:04 +0300331}
332
Gleb Natapov33e4c682009-06-11 11:06:51 +0300333static inline int apic_search_irr(struct kvm_lapic *apic)
Eddie Dong97222cc2007-09-12 10:58:04 +0300334{
Gleb Natapov33e4c682009-06-11 11:06:51 +0300335 return find_highest_vector(apic->regs + APIC_IRR);
Eddie Dong97222cc2007-09-12 10:58:04 +0300336}
337
338static inline int apic_find_highest_irr(struct kvm_lapic *apic)
339{
340 int result;
341
Yang Zhangc7c9c562013-01-25 10:18:51 +0800342 /*
343 * Note that irr_pending is just a hint. It will be always
344 * true with virtual interrupt delivery enabled.
345 */
Gleb Natapov33e4c682009-06-11 11:06:51 +0300346 if (!apic->irr_pending)
347 return -1;
348
Yang Zhang5a717852013-04-11 19:25:16 +0800349 kvm_x86_ops->sync_pir_to_irr(apic->vcpu);
Gleb Natapov33e4c682009-06-11 11:06:51 +0300350 result = apic_search_irr(apic);
Eddie Dong97222cc2007-09-12 10:58:04 +0300351 ASSERT(result == -1 || result >= 16);
352
353 return result;
354}
355
Gleb Natapov33e4c682009-06-11 11:06:51 +0300356static inline void apic_clear_irr(int vec, struct kvm_lapic *apic)
357{
358 apic->irr_pending = false;
359 apic_clear_vector(vec, apic->regs + APIC_IRR);
360 if (apic_search_irr(apic) != -1)
361 apic->irr_pending = true;
362}
363
Michael S. Tsirkin8680b942012-06-24 19:24:26 +0300364static inline void apic_set_isr(int vec, struct kvm_lapic *apic)
365{
366 if (!__apic_test_and_set_vector(vec, apic->regs + APIC_ISR))
367 ++apic->isr_count;
368 BUG_ON(apic->isr_count > MAX_APIC_VECTOR);
369 /*
370 * ISR (in service register) bit is set when injecting an interrupt.
371 * The highest vector is injected. Thus the latest bit set matches
372 * the highest bit in ISR.
373 */
374 apic->highest_isr_cache = vec;
375}
376
377static inline void apic_clear_isr(int vec, struct kvm_lapic *apic)
378{
379 if (__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR))
380 --apic->isr_count;
381 BUG_ON(apic->isr_count < 0);
382 apic->highest_isr_cache = -1;
383}
384
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800385int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu)
386{
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800387 int highest_irr;
388
Gleb Natapov33e4c682009-06-11 11:06:51 +0300389 /* This may race with setting of irr in __apic_accept_irq() and
390 * value returned may be wrong, but kvm_vcpu_kick() in __apic_accept_irq
391 * will cause vmexit immediately and the value will be recalculated
392 * on the next vmentry.
393 */
Gleb Natapovc48f1492012-08-05 15:58:33 +0300394 if (!kvm_vcpu_has_lapic(vcpu))
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800395 return 0;
Gleb Natapov54e98182012-08-05 15:58:32 +0300396 highest_irr = apic_find_highest_irr(vcpu->arch.apic);
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800397
398 return highest_irr;
399}
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800400
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200401static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
Yang Zhangb4f22252013-04-11 19:21:37 +0800402 int vector, int level, int trig_mode,
403 unsigned long *dest_map);
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200404
Yang Zhangb4f22252013-04-11 19:21:37 +0800405int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
406 unsigned long *dest_map)
Eddie Dong97222cc2007-09-12 10:58:04 +0300407{
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800408 struct kvm_lapic *apic = vcpu->arch.apic;
Zhang Xiantao8be54532007-12-02 22:35:57 +0800409
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200410 return __apic_accept_irq(apic, irq->delivery_mode, irq->vector,
Yang Zhangb4f22252013-04-11 19:21:37 +0800411 irq->level, irq->trig_mode, dest_map);
Eddie Dong97222cc2007-09-12 10:58:04 +0300412}
413
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +0300414static int pv_eoi_put_user(struct kvm_vcpu *vcpu, u8 val)
415{
416
417 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data, &val,
418 sizeof(val));
419}
420
421static int pv_eoi_get_user(struct kvm_vcpu *vcpu, u8 *val)
422{
423
424 return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data, val,
425 sizeof(*val));
426}
427
428static inline bool pv_eoi_enabled(struct kvm_vcpu *vcpu)
429{
430 return vcpu->arch.pv_eoi.msr_val & KVM_MSR_ENABLED;
431}
432
433static bool pv_eoi_get_pending(struct kvm_vcpu *vcpu)
434{
435 u8 val;
436 if (pv_eoi_get_user(vcpu, &val) < 0)
437 apic_debug("Can't read EOI MSR value: 0x%llx\n",
438 (unsigned long long)vcpi->arch.pv_eoi.msr_val);
439 return val & 0x1;
440}
441
442static void pv_eoi_set_pending(struct kvm_vcpu *vcpu)
443{
444 if (pv_eoi_put_user(vcpu, KVM_PV_EOI_ENABLED) < 0) {
445 apic_debug("Can't set EOI MSR value: 0x%llx\n",
446 (unsigned long long)vcpi->arch.pv_eoi.msr_val);
447 return;
448 }
449 __set_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention);
450}
451
452static void pv_eoi_clr_pending(struct kvm_vcpu *vcpu)
453{
454 if (pv_eoi_put_user(vcpu, KVM_PV_EOI_DISABLED) < 0) {
455 apic_debug("Can't clear EOI MSR value: 0x%llx\n",
456 (unsigned long long)vcpi->arch.pv_eoi.msr_val);
457 return;
458 }
459 __clear_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention);
460}
461
Eddie Dong97222cc2007-09-12 10:58:04 +0300462static inline int apic_find_highest_isr(struct kvm_lapic *apic)
463{
464 int result;
Yang Zhangc7c9c562013-01-25 10:18:51 +0800465
466 /* Note that isr_count is always 1 with vid enabled */
Michael S. Tsirkin8680b942012-06-24 19:24:26 +0300467 if (!apic->isr_count)
468 return -1;
469 if (likely(apic->highest_isr_cache != -1))
470 return apic->highest_isr_cache;
Eddie Dong97222cc2007-09-12 10:58:04 +0300471
472 result = find_highest_vector(apic->regs + APIC_ISR);
473 ASSERT(result == -1 || result >= 16);
474
475 return result;
476}
477
Yang Zhangcf9e65b2013-04-11 19:25:14 +0800478void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr)
479{
480 struct kvm_lapic *apic = vcpu->arch.apic;
481 int i;
482
483 for (i = 0; i < 8; i++)
484 apic_set_reg(apic, APIC_TMR + 0x10 * i, tmr[i]);
485}
486
Eddie Dong97222cc2007-09-12 10:58:04 +0300487static void apic_update_ppr(struct kvm_lapic *apic)
488{
Avi Kivity3842d132010-07-27 12:30:24 +0300489 u32 tpr, isrv, ppr, old_ppr;
Eddie Dong97222cc2007-09-12 10:58:04 +0300490 int isr;
491
Gleb Natapovc48f1492012-08-05 15:58:33 +0300492 old_ppr = kvm_apic_get_reg(apic, APIC_PROCPRI);
493 tpr = kvm_apic_get_reg(apic, APIC_TASKPRI);
Eddie Dong97222cc2007-09-12 10:58:04 +0300494 isr = apic_find_highest_isr(apic);
495 isrv = (isr != -1) ? isr : 0;
496
497 if ((tpr & 0xf0) >= (isrv & 0xf0))
498 ppr = tpr & 0xff;
499 else
500 ppr = isrv & 0xf0;
501
502 apic_debug("vlapic %p, ppr 0x%x, isr 0x%x, isrv 0x%x",
503 apic, ppr, isr, isrv);
504
Avi Kivity3842d132010-07-27 12:30:24 +0300505 if (old_ppr != ppr) {
506 apic_set_reg(apic, APIC_PROCPRI, ppr);
Avi Kivity83bcacb2010-10-25 15:23:55 +0200507 if (ppr < old_ppr)
508 kvm_make_request(KVM_REQ_EVENT, apic->vcpu);
Avi Kivity3842d132010-07-27 12:30:24 +0300509 }
Eddie Dong97222cc2007-09-12 10:58:04 +0300510}
511
512static void apic_set_tpr(struct kvm_lapic *apic, u32 tpr)
513{
514 apic_set_reg(apic, APIC_TASKPRI, tpr);
515 apic_update_ppr(apic);
516}
517
518int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest)
519{
Gleb Natapov343f94f2009-03-05 16:34:54 +0200520 return dest == 0xff || kvm_apic_id(apic) == dest;
Eddie Dong97222cc2007-09-12 10:58:04 +0300521}
522
523int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda)
524{
525 int result = 0;
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300526 u32 logical_id;
527
528 if (apic_x2apic_mode(apic)) {
Gleb Natapovc48f1492012-08-05 15:58:33 +0300529 logical_id = kvm_apic_get_reg(apic, APIC_LDR);
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300530 return logical_id & mda;
531 }
Eddie Dong97222cc2007-09-12 10:58:04 +0300532
Gleb Natapovc48f1492012-08-05 15:58:33 +0300533 logical_id = GET_APIC_LOGICAL_ID(kvm_apic_get_reg(apic, APIC_LDR));
Eddie Dong97222cc2007-09-12 10:58:04 +0300534
Gleb Natapovc48f1492012-08-05 15:58:33 +0300535 switch (kvm_apic_get_reg(apic, APIC_DFR)) {
Eddie Dong97222cc2007-09-12 10:58:04 +0300536 case APIC_DFR_FLAT:
537 if (logical_id & mda)
538 result = 1;
539 break;
540 case APIC_DFR_CLUSTER:
541 if (((logical_id >> 4) == (mda >> 0x4))
542 && (logical_id & mda & 0xf))
543 result = 1;
544 break;
545 default:
Jan Kiszka7712de82011-09-12 11:25:51 +0200546 apic_debug("Bad DFR vcpu %d: %08x\n",
Gleb Natapovc48f1492012-08-05 15:58:33 +0300547 apic->vcpu->vcpu_id, kvm_apic_get_reg(apic, APIC_DFR));
Eddie Dong97222cc2007-09-12 10:58:04 +0300548 break;
549 }
550
551 return result;
552}
553
Gleb Natapov343f94f2009-03-05 16:34:54 +0200554int kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
Eddie Dong97222cc2007-09-12 10:58:04 +0300555 int short_hand, int dest, int dest_mode)
556{
557 int result = 0;
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800558 struct kvm_lapic *target = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +0300559
560 apic_debug("target %p, source %p, dest 0x%x, "
Gleb Natapov343f94f2009-03-05 16:34:54 +0200561 "dest_mode 0x%x, short_hand 0x%x\n",
Eddie Dong97222cc2007-09-12 10:58:04 +0300562 target, source, dest, dest_mode, short_hand);
563
Zachary Amsdenbd371392010-06-14 11:42:15 -1000564 ASSERT(target);
Eddie Dong97222cc2007-09-12 10:58:04 +0300565 switch (short_hand) {
566 case APIC_DEST_NOSHORT:
Gleb Natapov343f94f2009-03-05 16:34:54 +0200567 if (dest_mode == 0)
Eddie Dong97222cc2007-09-12 10:58:04 +0300568 /* Physical mode. */
Gleb Natapov343f94f2009-03-05 16:34:54 +0200569 result = kvm_apic_match_physical_addr(target, dest);
570 else
Eddie Dong97222cc2007-09-12 10:58:04 +0300571 /* Logical mode. */
572 result = kvm_apic_match_logical_addr(target, dest);
573 break;
574 case APIC_DEST_SELF:
Gleb Natapov343f94f2009-03-05 16:34:54 +0200575 result = (target == source);
Eddie Dong97222cc2007-09-12 10:58:04 +0300576 break;
577 case APIC_DEST_ALLINC:
578 result = 1;
579 break;
580 case APIC_DEST_ALLBUT:
Gleb Natapov343f94f2009-03-05 16:34:54 +0200581 result = (target != source);
Eddie Dong97222cc2007-09-12 10:58:04 +0300582 break;
583 default:
Jan Kiszka7712de82011-09-12 11:25:51 +0200584 apic_debug("kvm: apic: Bad dest shorthand value %x\n",
585 short_hand);
Eddie Dong97222cc2007-09-12 10:58:04 +0300586 break;
587 }
588
589 return result;
590}
591
Gleb Natapov1e08ec42012-09-13 17:19:24 +0300592bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
Yang Zhangb4f22252013-04-11 19:21:37 +0800593 struct kvm_lapic_irq *irq, int *r, unsigned long *dest_map)
Gleb Natapov1e08ec42012-09-13 17:19:24 +0300594{
595 struct kvm_apic_map *map;
596 unsigned long bitmap = 1;
597 struct kvm_lapic **dst;
598 int i;
599 bool ret = false;
600
601 *r = -1;
602
603 if (irq->shorthand == APIC_DEST_SELF) {
Yang Zhangb4f22252013-04-11 19:21:37 +0800604 *r = kvm_apic_set_irq(src->vcpu, irq, dest_map);
Gleb Natapov1e08ec42012-09-13 17:19:24 +0300605 return true;
606 }
607
608 if (irq->shorthand)
609 return false;
610
611 rcu_read_lock();
612 map = rcu_dereference(kvm->arch.apic_map);
613
614 if (!map)
615 goto out;
616
617 if (irq->dest_mode == 0) { /* physical mode */
618 if (irq->delivery_mode == APIC_DM_LOWEST ||
619 irq->dest_id == 0xff)
620 goto out;
621 dst = &map->phys_map[irq->dest_id & 0xff];
622 } else {
623 u32 mda = irq->dest_id << (32 - map->ldr_bits);
624
625 dst = map->logical_map[apic_cluster_id(map, mda)];
626
627 bitmap = apic_logical_id(map, mda);
628
629 if (irq->delivery_mode == APIC_DM_LOWEST) {
630 int l = -1;
631 for_each_set_bit(i, &bitmap, 16) {
632 if (!dst[i])
633 continue;
634 if (l < 0)
635 l = i;
636 else if (kvm_apic_compare_prio(dst[i]->vcpu, dst[l]->vcpu) < 0)
637 l = i;
638 }
639
640 bitmap = (l >= 0) ? 1 << l : 0;
641 }
642 }
643
644 for_each_set_bit(i, &bitmap, 16) {
645 if (!dst[i])
646 continue;
647 if (*r < 0)
648 *r = 0;
Yang Zhangb4f22252013-04-11 19:21:37 +0800649 *r += kvm_apic_set_irq(dst[i]->vcpu, irq, dest_map);
Gleb Natapov1e08ec42012-09-13 17:19:24 +0300650 }
651
652 ret = true;
653out:
654 rcu_read_unlock();
655 return ret;
656}
657
Eddie Dong97222cc2007-09-12 10:58:04 +0300658/*
659 * Add a pending IRQ into lapic.
660 * Return 1 if successfully added and 0 if discarded.
661 */
662static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
Yang Zhangb4f22252013-04-11 19:21:37 +0800663 int vector, int level, int trig_mode,
664 unsigned long *dest_map)
Eddie Dong97222cc2007-09-12 10:58:04 +0300665{
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200666 int result = 0;
He, Qingc5ec1532007-09-03 17:07:41 +0300667 struct kvm_vcpu *vcpu = apic->vcpu;
Eddie Dong97222cc2007-09-12 10:58:04 +0300668
669 switch (delivery_mode) {
Eddie Dong97222cc2007-09-12 10:58:04 +0300670 case APIC_DM_LOWEST:
Gleb Natapove1035712009-03-05 16:34:59 +0200671 vcpu->arch.apic_arb_prio++;
672 case APIC_DM_FIXED:
Eddie Dong97222cc2007-09-12 10:58:04 +0300673 /* FIXME add logic for vcpu on reset */
674 if (unlikely(!apic_enabled(apic)))
675 break;
676
Jan Kiszka11f5cc02013-07-25 09:58:45 +0200677 result = 1;
678
Yang Zhangb4f22252013-04-11 19:21:37 +0800679 if (dest_map)
680 __set_bit(vcpu->vcpu_id, dest_map);
Avi Kivitya5d36f82009-12-29 12:42:16 +0200681
Jan Kiszka11f5cc02013-07-25 09:58:45 +0200682 if (kvm_x86_ops->deliver_posted_interrupt)
Yang Zhang5a717852013-04-11 19:25:16 +0800683 kvm_x86_ops->deliver_posted_interrupt(vcpu, vector);
Jan Kiszka11f5cc02013-07-25 09:58:45 +0200684 else {
685 apic_set_irr(vector, apic);
Yang Zhang5a717852013-04-11 19:25:16 +0800686
687 kvm_make_request(KVM_REQ_EVENT, vcpu);
688 kvm_vcpu_kick(vcpu);
Eddie Dong97222cc2007-09-12 10:58:04 +0300689 }
Yang Zhang5a717852013-04-11 19:25:16 +0800690 trace_kvm_apic_accept_irq(vcpu->vcpu_id, delivery_mode,
Jan Kiszka11f5cc02013-07-25 09:58:45 +0200691 trig_mode, vector, false);
Eddie Dong97222cc2007-09-12 10:58:04 +0300692 break;
693
694 case APIC_DM_REMRD:
Raghavendra K T24d21662013-08-26 14:18:35 +0530695 result = 1;
696 vcpu->arch.pv.pv_unhalted = 1;
697 kvm_make_request(KVM_REQ_EVENT, vcpu);
698 kvm_vcpu_kick(vcpu);
Eddie Dong97222cc2007-09-12 10:58:04 +0300699 break;
700
701 case APIC_DM_SMI:
Jan Kiszka7712de82011-09-12 11:25:51 +0200702 apic_debug("Ignoring guest SMI\n");
Eddie Dong97222cc2007-09-12 10:58:04 +0300703 break;
Sheng Yang3419ffc2008-05-15 09:52:48 +0800704
Eddie Dong97222cc2007-09-12 10:58:04 +0300705 case APIC_DM_NMI:
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200706 result = 1;
Sheng Yang3419ffc2008-05-15 09:52:48 +0800707 kvm_inject_nmi(vcpu);
Jan Kiszka26df99c2008-09-26 09:30:54 +0200708 kvm_vcpu_kick(vcpu);
Eddie Dong97222cc2007-09-12 10:58:04 +0300709 break;
710
711 case APIC_DM_INIT:
Julian Stecklinaa52315e2012-01-16 14:02:20 +0100712 if (!trig_mode || level) {
Gleb Natapov6da7e3f2009-03-05 16:34:44 +0200713 result = 1;
Jan Kiszka66450a22013-03-13 12:42:34 +0100714 /* assumes that there are only KVM_APIC_INIT/SIPI */
715 apic->pending_events = (1UL << KVM_APIC_INIT);
716 /* make sure pending_events is visible before sending
717 * the request */
718 smp_wmb();
Avi Kivity3842d132010-07-27 12:30:24 +0300719 kvm_make_request(KVM_REQ_EVENT, vcpu);
He, Qingc5ec1532007-09-03 17:07:41 +0300720 kvm_vcpu_kick(vcpu);
721 } else {
Jan Kiszka1b10bf32008-09-30 10:41:06 +0200722 apic_debug("Ignoring de-assert INIT to vcpu %d\n",
723 vcpu->vcpu_id);
He, Qingc5ec1532007-09-03 17:07:41 +0300724 }
Eddie Dong97222cc2007-09-12 10:58:04 +0300725 break;
726
727 case APIC_DM_STARTUP:
Jan Kiszka1b10bf32008-09-30 10:41:06 +0200728 apic_debug("SIPI to vcpu %d vector 0x%02x\n",
729 vcpu->vcpu_id, vector);
Jan Kiszka66450a22013-03-13 12:42:34 +0100730 result = 1;
731 apic->sipi_vector = vector;
732 /* make sure sipi_vector is visible for the receiver */
733 smp_wmb();
734 set_bit(KVM_APIC_SIPI, &apic->pending_events);
735 kvm_make_request(KVM_REQ_EVENT, vcpu);
736 kvm_vcpu_kick(vcpu);
Eddie Dong97222cc2007-09-12 10:58:04 +0300737 break;
738
Jan Kiszka23930f92008-09-26 09:30:52 +0200739 case APIC_DM_EXTINT:
740 /*
741 * Should only be called by kvm_apic_local_deliver() with LVT0,
742 * before NMI watchdog was enabled. Already handled by
743 * kvm_apic_accept_pic_intr().
744 */
745 break;
746
Eddie Dong97222cc2007-09-12 10:58:04 +0300747 default:
748 printk(KERN_ERR "TODO: unsupported delivery mode %x\n",
749 delivery_mode);
750 break;
751 }
752 return result;
753}
754
Gleb Natapove1035712009-03-05 16:34:59 +0200755int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2)
Eddie Dong97222cc2007-09-12 10:58:04 +0300756{
Gleb Natapove1035712009-03-05 16:34:59 +0200757 return vcpu1->arch.apic_arb_prio - vcpu2->arch.apic_arb_prio;
Zhang Xiantao8be54532007-12-02 22:35:57 +0800758}
759
Yang Zhangc7c9c562013-01-25 10:18:51 +0800760static void kvm_ioapic_send_eoi(struct kvm_lapic *apic, int vector)
761{
762 if (!(kvm_apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI) &&
763 kvm_ioapic_handles_vector(apic->vcpu->kvm, vector)) {
764 int trigger_mode;
765 if (apic_test_vector(vector, apic->regs + APIC_TMR))
766 trigger_mode = IOAPIC_LEVEL_TRIG;
767 else
768 trigger_mode = IOAPIC_EDGE_TRIG;
Yang Zhang1fcc7892013-04-11 19:21:35 +0800769 kvm_ioapic_update_eoi(apic->vcpu, vector, trigger_mode);
Yang Zhangc7c9c562013-01-25 10:18:51 +0800770 }
771}
772
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +0300773static int apic_set_eoi(struct kvm_lapic *apic)
Eddie Dong97222cc2007-09-12 10:58:04 +0300774{
775 int vector = apic_find_highest_isr(apic);
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +0300776
777 trace_kvm_eoi(apic, vector);
778
Eddie Dong97222cc2007-09-12 10:58:04 +0300779 /*
780 * Not every write EOI will has corresponding ISR,
781 * one example is when Kernel check timer on setup_IO_APIC
782 */
783 if (vector == -1)
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +0300784 return vector;
Eddie Dong97222cc2007-09-12 10:58:04 +0300785
Michael S. Tsirkin8680b942012-06-24 19:24:26 +0300786 apic_clear_isr(vector, apic);
Eddie Dong97222cc2007-09-12 10:58:04 +0300787 apic_update_ppr(apic);
788
Yang Zhangc7c9c562013-01-25 10:18:51 +0800789 kvm_ioapic_send_eoi(apic, vector);
Avi Kivity3842d132010-07-27 12:30:24 +0300790 kvm_make_request(KVM_REQ_EVENT, apic->vcpu);
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +0300791 return vector;
Eddie Dong97222cc2007-09-12 10:58:04 +0300792}
793
Yang Zhangc7c9c562013-01-25 10:18:51 +0800794/*
795 * this interface assumes a trap-like exit, which has already finished
796 * desired side effect including vISR and vPPR update.
797 */
798void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector)
799{
800 struct kvm_lapic *apic = vcpu->arch.apic;
801
802 trace_kvm_eoi(apic, vector);
803
804 kvm_ioapic_send_eoi(apic, vector);
805 kvm_make_request(KVM_REQ_EVENT, apic->vcpu);
806}
807EXPORT_SYMBOL_GPL(kvm_apic_set_eoi_accelerated);
808
Eddie Dong97222cc2007-09-12 10:58:04 +0300809static void apic_send_ipi(struct kvm_lapic *apic)
810{
Gleb Natapovc48f1492012-08-05 15:58:33 +0300811 u32 icr_low = kvm_apic_get_reg(apic, APIC_ICR);
812 u32 icr_high = kvm_apic_get_reg(apic, APIC_ICR2);
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200813 struct kvm_lapic_irq irq;
Eddie Dong97222cc2007-09-12 10:58:04 +0300814
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200815 irq.vector = icr_low & APIC_VECTOR_MASK;
816 irq.delivery_mode = icr_low & APIC_MODE_MASK;
817 irq.dest_mode = icr_low & APIC_DEST_MASK;
818 irq.level = icr_low & APIC_INT_ASSERT;
819 irq.trig_mode = icr_low & APIC_INT_LEVELTRIG;
820 irq.shorthand = icr_low & APIC_SHORT_MASK;
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300821 if (apic_x2apic_mode(apic))
822 irq.dest_id = icr_high;
823 else
824 irq.dest_id = GET_APIC_DEST_FIELD(icr_high);
Eddie Dong97222cc2007-09-12 10:58:04 +0300825
Gleb Natapov1000ff82009-07-07 16:00:57 +0300826 trace_kvm_apic_ipi(icr_low, irq.dest_id);
827
Eddie Dong97222cc2007-09-12 10:58:04 +0300828 apic_debug("icr_high 0x%x, icr_low 0x%x, "
829 "short_hand 0x%x, dest 0x%x, trig_mode 0x%x, level 0x%x, "
830 "dest_mode 0x%x, delivery_mode 0x%x, vector 0x%x\n",
Glauber Costa9b5843d2009-04-29 17:29:09 -0400831 icr_high, icr_low, irq.shorthand, irq.dest_id,
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200832 irq.trig_mode, irq.level, irq.dest_mode, irq.delivery_mode,
833 irq.vector);
Eddie Dong97222cc2007-09-12 10:58:04 +0300834
Yang Zhangb4f22252013-04-11 19:21:37 +0800835 kvm_irq_delivery_to_apic(apic->vcpu->kvm, apic, &irq, NULL);
Eddie Dong97222cc2007-09-12 10:58:04 +0300836}
837
838static u32 apic_get_tmcct(struct kvm_lapic *apic)
839{
Marcelo Tosattib682b812009-02-10 20:41:41 -0200840 ktime_t remaining;
841 s64 ns;
Kevin Pedretti9da8f4e2007-10-21 08:55:50 +0200842 u32 tmcct;
Eddie Dong97222cc2007-09-12 10:58:04 +0300843
844 ASSERT(apic != NULL);
845
Kevin Pedretti9da8f4e2007-10-21 08:55:50 +0200846 /* if initial count is 0, current count should also be 0 */
Andy Honigb963a222013-11-19 14:12:18 -0800847 if (kvm_apic_get_reg(apic, APIC_TMICT) == 0 ||
848 apic->lapic_timer.period == 0)
Kevin Pedretti9da8f4e2007-10-21 08:55:50 +0200849 return 0;
850
Marcelo Tosattiace15462009-10-08 10:55:03 -0300851 remaining = hrtimer_get_remaining(&apic->lapic_timer.timer);
Marcelo Tosattib682b812009-02-10 20:41:41 -0200852 if (ktime_to_ns(remaining) < 0)
853 remaining = ktime_set(0, 0);
Eddie Dong97222cc2007-09-12 10:58:04 +0300854
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300855 ns = mod_64(ktime_to_ns(remaining), apic->lapic_timer.period);
856 tmcct = div64_u64(ns,
857 (APIC_BUS_CYCLE_NS * apic->divide_count));
Eddie Dong97222cc2007-09-12 10:58:04 +0300858
859 return tmcct;
860}
861
Avi Kivityb209749f2007-10-22 16:50:39 +0200862static void __report_tpr_access(struct kvm_lapic *apic, bool write)
863{
864 struct kvm_vcpu *vcpu = apic->vcpu;
865 struct kvm_run *run = vcpu->run;
866
Avi Kivitya8eeb042010-05-10 12:34:53 +0300867 kvm_make_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu);
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -0300868 run->tpr_access.rip = kvm_rip_read(vcpu);
Avi Kivityb209749f2007-10-22 16:50:39 +0200869 run->tpr_access.is_write = write;
870}
871
872static inline void report_tpr_access(struct kvm_lapic *apic, bool write)
873{
874 if (apic->vcpu->arch.tpr_access_reporting)
875 __report_tpr_access(apic, write);
876}
877
Eddie Dong97222cc2007-09-12 10:58:04 +0300878static u32 __apic_read(struct kvm_lapic *apic, unsigned int offset)
879{
880 u32 val = 0;
881
882 if (offset >= LAPIC_MMIO_LENGTH)
883 return 0;
884
885 switch (offset) {
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300886 case APIC_ID:
887 if (apic_x2apic_mode(apic))
888 val = kvm_apic_id(apic);
889 else
890 val = kvm_apic_id(apic) << 24;
891 break;
Eddie Dong97222cc2007-09-12 10:58:04 +0300892 case APIC_ARBPRI:
Jan Kiszka7712de82011-09-12 11:25:51 +0200893 apic_debug("Access APIC ARBPRI register which is for P6\n");
Eddie Dong97222cc2007-09-12 10:58:04 +0300894 break;
895
896 case APIC_TMCCT: /* Timer CCR */
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +0800897 if (apic_lvtt_tscdeadline(apic))
898 return 0;
899
Eddie Dong97222cc2007-09-12 10:58:04 +0300900 val = apic_get_tmcct(apic);
901 break;
Avi Kivity4a4541a2012-07-22 17:41:00 +0300902 case APIC_PROCPRI:
903 apic_update_ppr(apic);
Gleb Natapovc48f1492012-08-05 15:58:33 +0300904 val = kvm_apic_get_reg(apic, offset);
Avi Kivity4a4541a2012-07-22 17:41:00 +0300905 break;
Avi Kivityb209749f2007-10-22 16:50:39 +0200906 case APIC_TASKPRI:
907 report_tpr_access(apic, false);
908 /* fall thru */
Eddie Dong97222cc2007-09-12 10:58:04 +0300909 default:
Gleb Natapovc48f1492012-08-05 15:58:33 +0300910 val = kvm_apic_get_reg(apic, offset);
Eddie Dong97222cc2007-09-12 10:58:04 +0300911 break;
912 }
913
914 return val;
915}
916
Gregory Haskinsd76685c2009-06-01 12:54:50 -0400917static inline struct kvm_lapic *to_lapic(struct kvm_io_device *dev)
918{
919 return container_of(dev, struct kvm_lapic, dev);
920}
921
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300922static int apic_reg_read(struct kvm_lapic *apic, u32 offset, int len,
923 void *data)
Michael S. Tsirkinbda90202009-06-29 22:24:32 +0300924{
Eddie Dong97222cc2007-09-12 10:58:04 +0300925 unsigned char alignment = offset & 0xf;
926 u32 result;
Guo Chaod5b0b5b2012-06-28 15:22:57 +0800927 /* this bitmask has a bit cleared for each reserved register */
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300928 static const u64 rmask = 0x43ff01ffffffe70cULL;
Eddie Dong97222cc2007-09-12 10:58:04 +0300929
930 if ((alignment + len) > 4) {
Gleb Natapov4088bb32009-07-08 11:26:54 +0300931 apic_debug("KVM_APIC_READ: alignment error %x %d\n",
932 offset, len);
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300933 return 1;
Eddie Dong97222cc2007-09-12 10:58:04 +0300934 }
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300935
936 if (offset > 0x3f0 || !(rmask & (1ULL << (offset >> 4)))) {
Gleb Natapov4088bb32009-07-08 11:26:54 +0300937 apic_debug("KVM_APIC_READ: read reserved register %x\n",
938 offset);
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300939 return 1;
940 }
941
Eddie Dong97222cc2007-09-12 10:58:04 +0300942 result = __apic_read(apic, offset & ~0xf);
943
Marcelo Tosatti229456f2009-06-17 09:22:14 -0300944 trace_kvm_apic_read(offset, result);
945
Eddie Dong97222cc2007-09-12 10:58:04 +0300946 switch (len) {
947 case 1:
948 case 2:
949 case 4:
950 memcpy(data, (char *)&result + alignment, len);
951 break;
952 default:
953 printk(KERN_ERR "Local APIC read with len = %x, "
954 "should be 1,2, or 4 instead\n", len);
955 break;
956 }
Michael S. Tsirkinbda90202009-06-29 22:24:32 +0300957 return 0;
Eddie Dong97222cc2007-09-12 10:58:04 +0300958}
959
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300960static int apic_mmio_in_range(struct kvm_lapic *apic, gpa_t addr)
961{
Gleb Natapovc48f1492012-08-05 15:58:33 +0300962 return kvm_apic_hw_enabled(apic) &&
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300963 addr >= apic->base_address &&
964 addr < apic->base_address + LAPIC_MMIO_LENGTH;
965}
966
967static int apic_mmio_read(struct kvm_io_device *this,
968 gpa_t address, int len, void *data)
969{
970 struct kvm_lapic *apic = to_lapic(this);
971 u32 offset = address - apic->base_address;
972
973 if (!apic_mmio_in_range(apic, address))
974 return -EOPNOTSUPP;
975
976 apic_reg_read(apic, offset, len, data);
977
978 return 0;
979}
980
Eddie Dong97222cc2007-09-12 10:58:04 +0300981static void update_divide_count(struct kvm_lapic *apic)
982{
983 u32 tmp1, tmp2, tdcr;
984
Gleb Natapovc48f1492012-08-05 15:58:33 +0300985 tdcr = kvm_apic_get_reg(apic, APIC_TDCR);
Eddie Dong97222cc2007-09-12 10:58:04 +0300986 tmp1 = tdcr & 0xf;
987 tmp2 = ((tmp1 & 0x3) | ((tmp1 & 0x8) >> 1)) + 1;
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300988 apic->divide_count = 0x1 << (tmp2 & 0x7);
Eddie Dong97222cc2007-09-12 10:58:04 +0300989
990 apic_debug("timer divide count is 0x%x\n",
Glauber Costa9b5843d2009-04-29 17:29:09 -0400991 apic->divide_count);
Eddie Dong97222cc2007-09-12 10:58:04 +0300992}
993
994static void start_apic_timer(struct kvm_lapic *apic)
995{
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +0800996 ktime_t now;
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300997 atomic_set(&apic->lapic_timer.pending, 0);
Avi Kivity0b975a32008-02-24 14:37:50 +0200998
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +0800999 if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) {
Guo Chaod5b0b5b2012-06-28 15:22:57 +08001000 /* lapic timer in oneshot or periodic mode */
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001001 now = apic->lapic_timer.timer.base->get_time();
Gleb Natapovc48f1492012-08-05 15:58:33 +03001002 apic->lapic_timer.period = (u64)kvm_apic_get_reg(apic, APIC_TMICT)
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001003 * APIC_BUS_CYCLE_NS * apic->divide_count;
Jan Kiszka9bc57912011-09-12 14:10:22 +02001004
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001005 if (!apic->lapic_timer.period)
1006 return;
1007 /*
1008 * Do not allow the guest to program periodic timers with small
1009 * interval, since the hrtimers are not throttled by the host
1010 * scheduler.
1011 */
1012 if (apic_lvtt_period(apic)) {
1013 s64 min_period = min_timer_period_us * 1000LL;
1014
1015 if (apic->lapic_timer.period < min_period) {
1016 pr_info_ratelimited(
1017 "kvm: vcpu %i: requested %lld ns "
1018 "lapic timer period limited to %lld ns\n",
1019 apic->vcpu->vcpu_id,
1020 apic->lapic_timer.period, min_period);
1021 apic->lapic_timer.period = min_period;
1022 }
Jan Kiszka9bc57912011-09-12 14:10:22 +02001023 }
Avi Kivity0b975a32008-02-24 14:37:50 +02001024
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001025 hrtimer_start(&apic->lapic_timer.timer,
1026 ktime_add_ns(now, apic->lapic_timer.period),
1027 HRTIMER_MODE_ABS);
Eddie Dong97222cc2007-09-12 10:58:04 +03001028
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001029 apic_debug("%s: bus cycle is %" PRId64 "ns, now 0x%016"
Eddie Dong97222cc2007-09-12 10:58:04 +03001030 PRIx64 ", "
1031 "timer initial count 0x%x, period %lldns, "
Harvey Harrisonb8688d52008-03-03 12:59:56 -08001032 "expire @ 0x%016" PRIx64 ".\n", __func__,
Eddie Dong97222cc2007-09-12 10:58:04 +03001033 APIC_BUS_CYCLE_NS, ktime_to_ns(now),
Gleb Natapovc48f1492012-08-05 15:58:33 +03001034 kvm_apic_get_reg(apic, APIC_TMICT),
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001035 apic->lapic_timer.period,
Eddie Dong97222cc2007-09-12 10:58:04 +03001036 ktime_to_ns(ktime_add_ns(now,
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001037 apic->lapic_timer.period)));
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001038 } else if (apic_lvtt_tscdeadline(apic)) {
1039 /* lapic timer in tsc deadline mode */
1040 u64 guest_tsc, tscdeadline = apic->lapic_timer.tscdeadline;
1041 u64 ns = 0;
1042 struct kvm_vcpu *vcpu = apic->vcpu;
Zachary Amsdencc578282012-02-03 15:43:50 -02001043 unsigned long this_tsc_khz = vcpu->arch.virtual_tsc_khz;
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001044 unsigned long flags;
1045
1046 if (unlikely(!tscdeadline || !this_tsc_khz))
1047 return;
1048
1049 local_irq_save(flags);
1050
1051 now = apic->lapic_timer.timer.base->get_time();
Marcelo Tosatti886b4702012-11-27 23:28:58 -02001052 guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu, native_read_tsc());
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001053 if (likely(tscdeadline > guest_tsc)) {
1054 ns = (tscdeadline - guest_tsc) * 1000000ULL;
1055 do_div(ns, this_tsc_khz);
1056 }
1057 hrtimer_start(&apic->lapic_timer.timer,
1058 ktime_add_ns(now, ns), HRTIMER_MODE_ABS);
1059
1060 local_irq_restore(flags);
1061 }
Eddie Dong97222cc2007-09-12 10:58:04 +03001062}
1063
Jan Kiszkacc6e4622008-10-20 10:20:03 +02001064static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val)
1065{
Gleb Natapovc48f1492012-08-05 15:58:33 +03001066 int nmi_wd_enabled = apic_lvt_nmi_mode(kvm_apic_get_reg(apic, APIC_LVT0));
Jan Kiszkacc6e4622008-10-20 10:20:03 +02001067
1068 if (apic_lvt_nmi_mode(lvt0_val)) {
1069 if (!nmi_wd_enabled) {
1070 apic_debug("Receive NMI setting on APIC_LVT0 "
1071 "for cpu %d\n", apic->vcpu->vcpu_id);
1072 apic->vcpu->kvm->arch.vapics_in_nmi_mode++;
1073 }
1074 } else if (nmi_wd_enabled)
1075 apic->vcpu->kvm->arch.vapics_in_nmi_mode--;
1076}
1077
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001078static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
Eddie Dong97222cc2007-09-12 10:58:04 +03001079{
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001080 int ret = 0;
Eddie Dong97222cc2007-09-12 10:58:04 +03001081
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001082 trace_kvm_apic_write(reg, val);
Eddie Dong97222cc2007-09-12 10:58:04 +03001083
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001084 switch (reg) {
Eddie Dong97222cc2007-09-12 10:58:04 +03001085 case APIC_ID: /* Local APIC ID */
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001086 if (!apic_x2apic_mode(apic))
Gleb Natapov1e08ec42012-09-13 17:19:24 +03001087 kvm_apic_set_id(apic, val >> 24);
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001088 else
1089 ret = 1;
Eddie Dong97222cc2007-09-12 10:58:04 +03001090 break;
1091
1092 case APIC_TASKPRI:
Avi Kivityb209749f2007-10-22 16:50:39 +02001093 report_tpr_access(apic, true);
Eddie Dong97222cc2007-09-12 10:58:04 +03001094 apic_set_tpr(apic, val & 0xff);
1095 break;
1096
1097 case APIC_EOI:
1098 apic_set_eoi(apic);
1099 break;
1100
1101 case APIC_LDR:
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001102 if (!apic_x2apic_mode(apic))
Gleb Natapov1e08ec42012-09-13 17:19:24 +03001103 kvm_apic_set_ldr(apic, val & APIC_LDR_MASK);
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001104 else
1105 ret = 1;
Eddie Dong97222cc2007-09-12 10:58:04 +03001106 break;
1107
1108 case APIC_DFR:
Gleb Natapov1e08ec42012-09-13 17:19:24 +03001109 if (!apic_x2apic_mode(apic)) {
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001110 apic_set_reg(apic, APIC_DFR, val | 0x0FFFFFFF);
Gleb Natapov1e08ec42012-09-13 17:19:24 +03001111 recalculate_apic_map(apic->vcpu->kvm);
1112 } else
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001113 ret = 1;
Eddie Dong97222cc2007-09-12 10:58:04 +03001114 break;
1115
Gleb Natapovfc61b802009-07-05 17:39:35 +03001116 case APIC_SPIV: {
1117 u32 mask = 0x3ff;
Gleb Natapovc48f1492012-08-05 15:58:33 +03001118 if (kvm_apic_get_reg(apic, APIC_LVR) & APIC_LVR_DIRECTED_EOI)
Gleb Natapovfc61b802009-07-05 17:39:35 +03001119 mask |= APIC_SPIV_DIRECTED_EOI;
Gleb Natapovf8c1ea12012-08-05 15:58:31 +03001120 apic_set_spiv(apic, val & mask);
Eddie Dong97222cc2007-09-12 10:58:04 +03001121 if (!(val & APIC_SPIV_APIC_ENABLED)) {
1122 int i;
1123 u32 lvt_val;
1124
1125 for (i = 0; i < APIC_LVT_NUM; i++) {
Gleb Natapovc48f1492012-08-05 15:58:33 +03001126 lvt_val = kvm_apic_get_reg(apic,
Eddie Dong97222cc2007-09-12 10:58:04 +03001127 APIC_LVTT + 0x10 * i);
1128 apic_set_reg(apic, APIC_LVTT + 0x10 * i,
1129 lvt_val | APIC_LVT_MASKED);
1130 }
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001131 atomic_set(&apic->lapic_timer.pending, 0);
Eddie Dong97222cc2007-09-12 10:58:04 +03001132
1133 }
1134 break;
Gleb Natapovfc61b802009-07-05 17:39:35 +03001135 }
Eddie Dong97222cc2007-09-12 10:58:04 +03001136 case APIC_ICR:
1137 /* No delay here, so we always clear the pending bit */
1138 apic_set_reg(apic, APIC_ICR, val & ~(1 << 12));
1139 apic_send_ipi(apic);
1140 break;
1141
1142 case APIC_ICR2:
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001143 if (!apic_x2apic_mode(apic))
1144 val &= 0xff000000;
1145 apic_set_reg(apic, APIC_ICR2, val);
Eddie Dong97222cc2007-09-12 10:58:04 +03001146 break;
1147
Jan Kiszka23930f92008-09-26 09:30:52 +02001148 case APIC_LVT0:
Jan Kiszkacc6e4622008-10-20 10:20:03 +02001149 apic_manage_nmi_watchdog(apic, val);
Eddie Dong97222cc2007-09-12 10:58:04 +03001150 case APIC_LVTTHMR:
1151 case APIC_LVTPC:
Eddie Dong97222cc2007-09-12 10:58:04 +03001152 case APIC_LVT1:
1153 case APIC_LVTERR:
1154 /* TODO: Check vector */
Gleb Natapovc48f1492012-08-05 15:58:33 +03001155 if (!kvm_apic_sw_enabled(apic))
Eddie Dong97222cc2007-09-12 10:58:04 +03001156 val |= APIC_LVT_MASKED;
1157
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001158 val &= apic_lvt_mask[(reg - APIC_LVTT) >> 4];
1159 apic_set_reg(apic, reg, val);
Eddie Dong97222cc2007-09-12 10:58:04 +03001160
1161 break;
1162
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001163 case APIC_LVTT:
Gleb Natapovc48f1492012-08-05 15:58:33 +03001164 if ((kvm_apic_get_reg(apic, APIC_LVTT) &
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001165 apic->lapic_timer.timer_mode_mask) !=
1166 (val & apic->lapic_timer.timer_mode_mask))
1167 hrtimer_cancel(&apic->lapic_timer.timer);
1168
Gleb Natapovc48f1492012-08-05 15:58:33 +03001169 if (!kvm_apic_sw_enabled(apic))
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001170 val |= APIC_LVT_MASKED;
1171 val &= (apic_lvt_mask[0] | apic->lapic_timer.timer_mode_mask);
1172 apic_set_reg(apic, APIC_LVTT, val);
1173 break;
1174
Eddie Dong97222cc2007-09-12 10:58:04 +03001175 case APIC_TMICT:
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001176 if (apic_lvtt_tscdeadline(apic))
1177 break;
1178
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001179 hrtimer_cancel(&apic->lapic_timer.timer);
Eddie Dong97222cc2007-09-12 10:58:04 +03001180 apic_set_reg(apic, APIC_TMICT, val);
1181 start_apic_timer(apic);
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001182 break;
Eddie Dong97222cc2007-09-12 10:58:04 +03001183
1184 case APIC_TDCR:
1185 if (val & 4)
Jan Kiszka7712de82011-09-12 11:25:51 +02001186 apic_debug("KVM_WRITE:TDCR %x\n", val);
Eddie Dong97222cc2007-09-12 10:58:04 +03001187 apic_set_reg(apic, APIC_TDCR, val);
1188 update_divide_count(apic);
1189 break;
1190
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001191 case APIC_ESR:
1192 if (apic_x2apic_mode(apic) && val != 0) {
Jan Kiszka7712de82011-09-12 11:25:51 +02001193 apic_debug("KVM_WRITE:ESR not zero %x\n", val);
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001194 ret = 1;
1195 }
1196 break;
1197
1198 case APIC_SELF_IPI:
1199 if (apic_x2apic_mode(apic)) {
1200 apic_reg_write(apic, APIC_ICR, 0x40000 | (val & 0xff));
1201 } else
1202 ret = 1;
1203 break;
Eddie Dong97222cc2007-09-12 10:58:04 +03001204 default:
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001205 ret = 1;
Eddie Dong97222cc2007-09-12 10:58:04 +03001206 break;
1207 }
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001208 if (ret)
1209 apic_debug("Local APIC Write to read-only register %x\n", reg);
1210 return ret;
1211}
1212
1213static int apic_mmio_write(struct kvm_io_device *this,
1214 gpa_t address, int len, const void *data)
1215{
1216 struct kvm_lapic *apic = to_lapic(this);
1217 unsigned int offset = address - apic->base_address;
1218 u32 val;
1219
1220 if (!apic_mmio_in_range(apic, address))
1221 return -EOPNOTSUPP;
1222
1223 /*
1224 * APIC register must be aligned on 128-bits boundary.
1225 * 32/64/128 bits registers must be accessed thru 32 bits.
1226 * Refer SDM 8.4.1
1227 */
1228 if (len != 4 || (offset & 0xf)) {
1229 /* Don't shout loud, $infamous_os would cause only noise. */
1230 apic_debug("apic write: bad size=%d %lx\n", len, (long)address);
Sheng Yang756975b2009-07-06 11:05:39 +08001231 return 0;
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001232 }
1233
1234 val = *(u32*)data;
1235
1236 /* too common printing */
1237 if (offset != APIC_EOI)
1238 apic_debug("%s: offset 0x%x with length 0x%x, and value is "
1239 "0x%x\n", __func__, offset, len, val);
1240
1241 apic_reg_write(apic, offset & 0xff0, val);
1242
Michael S. Tsirkinbda90202009-06-29 22:24:32 +03001243 return 0;
Eddie Dong97222cc2007-09-12 10:58:04 +03001244}
1245
Kevin Tian58fbbf22011-08-30 13:56:17 +03001246void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu)
1247{
Gleb Natapovc48f1492012-08-05 15:58:33 +03001248 if (kvm_vcpu_has_lapic(vcpu))
Kevin Tian58fbbf22011-08-30 13:56:17 +03001249 apic_reg_write(vcpu->arch.apic, APIC_EOI, 0);
1250}
1251EXPORT_SYMBOL_GPL(kvm_lapic_set_eoi);
1252
Yang Zhang83d4c282013-01-25 10:18:49 +08001253/* emulate APIC access in a trap manner */
1254void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset)
1255{
1256 u32 val = 0;
1257
1258 /* hw has done the conditional check and inst decode */
1259 offset &= 0xff0;
1260
1261 apic_reg_read(vcpu->arch.apic, offset, 4, &val);
1262
1263 /* TODO: optimize to just emulate side effect w/o one more write */
1264 apic_reg_write(vcpu->arch.apic, offset, val);
1265}
1266EXPORT_SYMBOL_GPL(kvm_apic_write_nodecode);
1267
Rusty Russelld5894442007-10-08 10:48:30 +10001268void kvm_free_lapic(struct kvm_vcpu *vcpu)
Eddie Dong97222cc2007-09-12 10:58:04 +03001269{
Gleb Natapovf8c1ea12012-08-05 15:58:31 +03001270 struct kvm_lapic *apic = vcpu->arch.apic;
1271
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001272 if (!vcpu->arch.apic)
Eddie Dong97222cc2007-09-12 10:58:04 +03001273 return;
1274
Gleb Natapovf8c1ea12012-08-05 15:58:31 +03001275 hrtimer_cancel(&apic->lapic_timer.timer);
Eddie Dong97222cc2007-09-12 10:58:04 +03001276
Gleb Natapovc5cc4212012-08-05 15:58:30 +03001277 if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE))
1278 static_key_slow_dec_deferred(&apic_hw_disabled);
1279
Gleb Natapovc48f1492012-08-05 15:58:33 +03001280 if (!(kvm_apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_APIC_ENABLED))
Gleb Natapovf8c1ea12012-08-05 15:58:31 +03001281 static_key_slow_dec_deferred(&apic_sw_disabled);
Eddie Dong97222cc2007-09-12 10:58:04 +03001282
Gleb Natapovf8c1ea12012-08-05 15:58:31 +03001283 if (apic->regs)
1284 free_page((unsigned long)apic->regs);
1285
1286 kfree(apic);
Eddie Dong97222cc2007-09-12 10:58:04 +03001287}
1288
1289/*
1290 *----------------------------------------------------------------------
1291 * LAPIC interface
1292 *----------------------------------------------------------------------
1293 */
1294
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001295u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu)
1296{
1297 struct kvm_lapic *apic = vcpu->arch.apic;
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001298
Gleb Natapovc48f1492012-08-05 15:58:33 +03001299 if (!kvm_vcpu_has_lapic(vcpu) || apic_lvtt_oneshot(apic) ||
Gleb Natapov54e98182012-08-05 15:58:32 +03001300 apic_lvtt_period(apic))
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001301 return 0;
1302
1303 return apic->lapic_timer.tscdeadline;
1304}
1305
1306void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data)
1307{
1308 struct kvm_lapic *apic = vcpu->arch.apic;
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001309
Gleb Natapovc48f1492012-08-05 15:58:33 +03001310 if (!kvm_vcpu_has_lapic(vcpu) || apic_lvtt_oneshot(apic) ||
Gleb Natapov54e98182012-08-05 15:58:32 +03001311 apic_lvtt_period(apic))
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +08001312 return;
1313
1314 hrtimer_cancel(&apic->lapic_timer.timer);
1315 apic->lapic_timer.tscdeadline = data;
1316 start_apic_timer(apic);
1317}
1318
Eddie Dong97222cc2007-09-12 10:58:04 +03001319void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8)
1320{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001321 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001322
Gleb Natapovc48f1492012-08-05 15:58:33 +03001323 if (!kvm_vcpu_has_lapic(vcpu))
Eddie Dong97222cc2007-09-12 10:58:04 +03001324 return;
Gleb Natapov54e98182012-08-05 15:58:32 +03001325
Avi Kivityb93463a2007-10-25 16:52:32 +02001326 apic_set_tpr(apic, ((cr8 & 0x0f) << 4)
Gleb Natapovc48f1492012-08-05 15:58:33 +03001327 | (kvm_apic_get_reg(apic, APIC_TASKPRI) & 4));
Eddie Dong97222cc2007-09-12 10:58:04 +03001328}
1329
1330u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu)
1331{
Eddie Dong97222cc2007-09-12 10:58:04 +03001332 u64 tpr;
1333
Gleb Natapovc48f1492012-08-05 15:58:33 +03001334 if (!kvm_vcpu_has_lapic(vcpu))
Eddie Dong97222cc2007-09-12 10:58:04 +03001335 return 0;
Gleb Natapov54e98182012-08-05 15:58:32 +03001336
Gleb Natapovc48f1492012-08-05 15:58:33 +03001337 tpr = (u64) kvm_apic_get_reg(vcpu->arch.apic, APIC_TASKPRI);
Eddie Dong97222cc2007-09-12 10:58:04 +03001338
1339 return (tpr & 0xf0) >> 4;
1340}
1341
1342void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value)
1343{
Yang Zhang8d146952013-01-25 10:18:50 +08001344 u64 old_value = vcpu->arch.apic_base;
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001345 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001346
1347 if (!apic) {
1348 value |= MSR_IA32_APICBASE_BSP;
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001349 vcpu->arch.apic_base = value;
Eddie Dong97222cc2007-09-12 10:58:04 +03001350 return;
1351 }
Gleb Natapovc5af89b2009-06-09 15:56:26 +03001352
Gleb Natapovc5cc4212012-08-05 15:58:30 +03001353 /* update jump label if enable bit changes */
1354 if ((vcpu->arch.apic_base ^ value) & MSR_IA32_APICBASE_ENABLE) {
1355 if (value & MSR_IA32_APICBASE_ENABLE)
1356 static_key_slow_dec_deferred(&apic_hw_disabled);
1357 else
1358 static_key_slow_inc(&apic_hw_disabled.key);
Gleb Natapov1e08ec42012-09-13 17:19:24 +03001359 recalculate_apic_map(vcpu->kvm);
Gleb Natapovc5cc4212012-08-05 15:58:30 +03001360 }
1361
Gleb Natapovc5af89b2009-06-09 15:56:26 +03001362 if (!kvm_vcpu_is_bsp(apic->vcpu))
Eddie Dong97222cc2007-09-12 10:58:04 +03001363 value &= ~MSR_IA32_APICBASE_BSP;
1364
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001365 vcpu->arch.apic_base = value;
Yang Zhang8d146952013-01-25 10:18:50 +08001366 if ((old_value ^ value) & X2APIC_ENABLE) {
1367 if (value & X2APIC_ENABLE) {
1368 u32 id = kvm_apic_id(apic);
1369 u32 ldr = ((id >> 4) << 16) | (1 << (id & 0xf));
1370 kvm_apic_set_ldr(apic, ldr);
1371 kvm_x86_ops->set_virtual_x2apic_mode(vcpu, true);
1372 } else
1373 kvm_x86_ops->set_virtual_x2apic_mode(vcpu, false);
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001374 }
Yang Zhang8d146952013-01-25 10:18:50 +08001375
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001376 apic->base_address = apic->vcpu->arch.apic_base &
Eddie Dong97222cc2007-09-12 10:58:04 +03001377 MSR_IA32_APICBASE_BASE;
1378
1379 /* with FSB delivery interrupt, we can restart APIC functionality */
1380 apic_debug("apic base msr is 0x%016" PRIx64 ", and base address is "
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001381 "0x%lx.\n", apic->vcpu->arch.apic_base, apic->base_address);
Eddie Dong97222cc2007-09-12 10:58:04 +03001382
1383}
1384
He, Qingc5ec1532007-09-03 17:07:41 +03001385void kvm_lapic_reset(struct kvm_vcpu *vcpu)
Eddie Dong97222cc2007-09-12 10:58:04 +03001386{
1387 struct kvm_lapic *apic;
1388 int i;
1389
Harvey Harrisonb8688d52008-03-03 12:59:56 -08001390 apic_debug("%s\n", __func__);
Eddie Dong97222cc2007-09-12 10:58:04 +03001391
1392 ASSERT(vcpu);
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001393 apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001394 ASSERT(apic != NULL);
1395
1396 /* Stop the timer in case it's a reset to an active apic */
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001397 hrtimer_cancel(&apic->lapic_timer.timer);
Eddie Dong97222cc2007-09-12 10:58:04 +03001398
Gleb Natapov1e08ec42012-09-13 17:19:24 +03001399 kvm_apic_set_id(apic, vcpu->vcpu_id);
Gleb Natapovfc61b802009-07-05 17:39:35 +03001400 kvm_apic_set_version(apic->vcpu);
Eddie Dong97222cc2007-09-12 10:58:04 +03001401
1402 for (i = 0; i < APIC_LVT_NUM; i++)
1403 apic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED);
Qing He40487c62007-09-17 14:47:13 +08001404 apic_set_reg(apic, APIC_LVT0,
1405 SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT));
Eddie Dong97222cc2007-09-12 10:58:04 +03001406
1407 apic_set_reg(apic, APIC_DFR, 0xffffffffU);
Gleb Natapovf8c1ea12012-08-05 15:58:31 +03001408 apic_set_spiv(apic, 0xff);
Eddie Dong97222cc2007-09-12 10:58:04 +03001409 apic_set_reg(apic, APIC_TASKPRI, 0);
Gleb Natapov1e08ec42012-09-13 17:19:24 +03001410 kvm_apic_set_ldr(apic, 0);
Eddie Dong97222cc2007-09-12 10:58:04 +03001411 apic_set_reg(apic, APIC_ESR, 0);
1412 apic_set_reg(apic, APIC_ICR, 0);
1413 apic_set_reg(apic, APIC_ICR2, 0);
1414 apic_set_reg(apic, APIC_TDCR, 0);
1415 apic_set_reg(apic, APIC_TMICT, 0);
1416 for (i = 0; i < 8; i++) {
1417 apic_set_reg(apic, APIC_IRR + 0x10 * i, 0);
1418 apic_set_reg(apic, APIC_ISR + 0x10 * i, 0);
1419 apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);
1420 }
Yang Zhangc7c9c562013-01-25 10:18:51 +08001421 apic->irr_pending = kvm_apic_vid_enabled(vcpu->kvm);
1422 apic->isr_count = kvm_apic_vid_enabled(vcpu->kvm);
Michael S. Tsirkin8680b942012-06-24 19:24:26 +03001423 apic->highest_isr_cache = -1;
Kevin Pedrettib33ac882007-10-21 08:54:53 +02001424 update_divide_count(apic);
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001425 atomic_set(&apic->lapic_timer.pending, 0);
Gleb Natapovc5af89b2009-06-09 15:56:26 +03001426 if (kvm_vcpu_is_bsp(vcpu))
Gleb Natapov5dbc8f32012-08-05 15:58:27 +03001427 kvm_lapic_set_base(vcpu,
1428 vcpu->arch.apic_base | MSR_IA32_APICBASE_BSP);
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +03001429 vcpu->arch.pv_eoi.msr_val = 0;
Eddie Dong97222cc2007-09-12 10:58:04 +03001430 apic_update_ppr(apic);
1431
Gleb Natapove1035712009-03-05 16:34:59 +02001432 vcpu->arch.apic_arb_prio = 0;
Gleb Natapov41383772012-04-19 14:06:29 +03001433 vcpu->arch.apic_attention = 0;
Gleb Natapove1035712009-03-05 16:34:59 +02001434
Eddie Dong97222cc2007-09-12 10:58:04 +03001435 apic_debug(KERN_INFO "%s: vcpu=%p, id=%d, base_msr="
Harvey Harrisonb8688d52008-03-03 12:59:56 -08001436 "0x%016" PRIx64 ", base_address=0x%0lx.\n", __func__,
Eddie Dong97222cc2007-09-12 10:58:04 +03001437 vcpu, kvm_apic_id(apic),
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001438 vcpu->arch.apic_base, apic->base_address);
Eddie Dong97222cc2007-09-12 10:58:04 +03001439}
1440
Eddie Dong97222cc2007-09-12 10:58:04 +03001441/*
1442 *----------------------------------------------------------------------
1443 * timer interface
1444 *----------------------------------------------------------------------
1445 */
Eddie Dong1b9778d2007-09-03 16:56:58 +03001446
Avi Kivity2a6eac92012-07-26 18:01:51 +03001447static bool lapic_is_periodic(struct kvm_lapic *apic)
Eddie Dong97222cc2007-09-12 10:58:04 +03001448{
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001449 return apic_lvtt_period(apic);
Eddie Dong97222cc2007-09-12 10:58:04 +03001450}
1451
Marcelo Tosatti3d808402008-04-11 14:53:26 -03001452int apic_has_pending_timer(struct kvm_vcpu *vcpu)
1453{
Gleb Natapov54e98182012-08-05 15:58:32 +03001454 struct kvm_lapic *apic = vcpu->arch.apic;
Marcelo Tosatti3d808402008-04-11 14:53:26 -03001455
Gleb Natapovc48f1492012-08-05 15:58:33 +03001456 if (kvm_vcpu_has_lapic(vcpu) && apic_enabled(apic) &&
Gleb Natapov54e98182012-08-05 15:58:32 +03001457 apic_lvt_enabled(apic, APIC_LVTT))
1458 return atomic_read(&apic->lapic_timer.pending);
Marcelo Tosatti3d808402008-04-11 14:53:26 -03001459
1460 return 0;
1461}
1462
Avi Kivity89342082011-11-10 14:57:21 +02001463int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type)
Eddie Dong1b9778d2007-09-03 16:56:58 +03001464{
Gleb Natapovc48f1492012-08-05 15:58:33 +03001465 u32 reg = kvm_apic_get_reg(apic, lvt_type);
Jan Kiszka23930f92008-09-26 09:30:52 +02001466 int vector, mode, trig_mode;
Eddie Dong1b9778d2007-09-03 16:56:58 +03001467
Gleb Natapovc48f1492012-08-05 15:58:33 +03001468 if (kvm_apic_hw_enabled(apic) && !(reg & APIC_LVT_MASKED)) {
Jan Kiszka23930f92008-09-26 09:30:52 +02001469 vector = reg & APIC_VECTOR_MASK;
1470 mode = reg & APIC_MODE_MASK;
1471 trig_mode = reg & APIC_LVT_LEVEL_TRIGGER;
Yang Zhangb4f22252013-04-11 19:21:37 +08001472 return __apic_accept_irq(apic, mode, vector, 1, trig_mode,
1473 NULL);
Jan Kiszka23930f92008-09-26 09:30:52 +02001474 }
1475 return 0;
1476}
1477
Jan Kiszka8fdb2352008-10-20 10:20:02 +02001478void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu)
Jan Kiszka23930f92008-09-26 09:30:52 +02001479{
Jan Kiszka8fdb2352008-10-20 10:20:02 +02001480 struct kvm_lapic *apic = vcpu->arch.apic;
1481
1482 if (apic)
1483 kvm_apic_local_deliver(apic, APIC_LVT0);
Eddie Dong1b9778d2007-09-03 16:56:58 +03001484}
1485
Gregory Haskinsd76685c2009-06-01 12:54:50 -04001486static const struct kvm_io_device_ops apic_mmio_ops = {
1487 .read = apic_mmio_read,
1488 .write = apic_mmio_write,
Gregory Haskinsd76685c2009-06-01 12:54:50 -04001489};
1490
Avi Kivitye9d90d42012-07-26 18:01:50 +03001491static enum hrtimer_restart apic_timer_fn(struct hrtimer *data)
1492{
1493 struct kvm_timer *ktimer = container_of(data, struct kvm_timer, timer);
Avi Kivity2a6eac92012-07-26 18:01:51 +03001494 struct kvm_lapic *apic = container_of(ktimer, struct kvm_lapic, lapic_timer);
1495 struct kvm_vcpu *vcpu = apic->vcpu;
Avi Kivitye9d90d42012-07-26 18:01:50 +03001496 wait_queue_head_t *q = &vcpu->wq;
1497
1498 /*
1499 * There is a race window between reading and incrementing, but we do
1500 * not care about potentially losing timer events in the !reinject
1501 * case anyway. Note: KVM_REQ_PENDING_TIMER is implicitly checked
1502 * in vcpu_enter_guest.
1503 */
Avi Kivity2a6eac92012-07-26 18:01:51 +03001504 if (!atomic_read(&ktimer->pending)) {
Avi Kivitye9d90d42012-07-26 18:01:50 +03001505 atomic_inc(&ktimer->pending);
1506 /* FIXME: this code should not know anything about vcpus */
1507 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1508 }
1509
1510 if (waitqueue_active(q))
1511 wake_up_interruptible(q);
1512
Avi Kivity2a6eac92012-07-26 18:01:51 +03001513 if (lapic_is_periodic(apic)) {
Avi Kivitye9d90d42012-07-26 18:01:50 +03001514 hrtimer_add_expires_ns(&ktimer->timer, ktimer->period);
1515 return HRTIMER_RESTART;
1516 } else
1517 return HRTIMER_NORESTART;
1518}
1519
Eddie Dong97222cc2007-09-12 10:58:04 +03001520int kvm_create_lapic(struct kvm_vcpu *vcpu)
1521{
1522 struct kvm_lapic *apic;
1523
1524 ASSERT(vcpu != NULL);
1525 apic_debug("apic_init %d\n", vcpu->vcpu_id);
1526
1527 apic = kzalloc(sizeof(*apic), GFP_KERNEL);
1528 if (!apic)
1529 goto nomem;
1530
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001531 vcpu->arch.apic = apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001532
Takuya Yoshikawaafc20182011-03-05 12:40:20 +09001533 apic->regs = (void *)get_zeroed_page(GFP_KERNEL);
1534 if (!apic->regs) {
Eddie Dong97222cc2007-09-12 10:58:04 +03001535 printk(KERN_ERR "malloc apic regs error for vcpu %x\n",
1536 vcpu->vcpu_id);
Rusty Russelld5894442007-10-08 10:48:30 +10001537 goto nomem_free_apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001538 }
Eddie Dong97222cc2007-09-12 10:58:04 +03001539 apic->vcpu = vcpu;
1540
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001541 hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC,
1542 HRTIMER_MODE_ABS);
Avi Kivitye9d90d42012-07-26 18:01:50 +03001543 apic->lapic_timer.timer.function = apic_timer_fn;
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001544
Gleb Natapovc5cc4212012-08-05 15:58:30 +03001545 /*
1546 * APIC is created enabled. This will prevent kvm_lapic_set_base from
1547 * thinking that APIC satet has changed.
1548 */
1549 vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE;
Gleb Natapov6aed64a2012-08-05 15:58:28 +03001550 kvm_lapic_set_base(vcpu,
1551 APIC_DEFAULT_PHYS_BASE | MSR_IA32_APICBASE_ENABLE);
Eddie Dong97222cc2007-09-12 10:58:04 +03001552
Gleb Natapovf8c1ea12012-08-05 15:58:31 +03001553 static_key_slow_inc(&apic_sw_disabled.key); /* sw disabled at reset */
He, Qingc5ec1532007-09-03 17:07:41 +03001554 kvm_lapic_reset(vcpu);
Gregory Haskinsd76685c2009-06-01 12:54:50 -04001555 kvm_iodevice_init(&apic->dev, &apic_mmio_ops);
Eddie Dong97222cc2007-09-12 10:58:04 +03001556
1557 return 0;
Rusty Russelld5894442007-10-08 10:48:30 +10001558nomem_free_apic:
1559 kfree(apic);
Eddie Dong97222cc2007-09-12 10:58:04 +03001560nomem:
Eddie Dong97222cc2007-09-12 10:58:04 +03001561 return -ENOMEM;
1562}
Eddie Dong97222cc2007-09-12 10:58:04 +03001563
1564int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu)
1565{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001566 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001567 int highest_irr;
1568
Gleb Natapovc48f1492012-08-05 15:58:33 +03001569 if (!kvm_vcpu_has_lapic(vcpu) || !apic_enabled(apic))
Eddie Dong97222cc2007-09-12 10:58:04 +03001570 return -1;
1571
Yang, Sheng6e5d8652007-09-12 18:03:11 +08001572 apic_update_ppr(apic);
Eddie Dong97222cc2007-09-12 10:58:04 +03001573 highest_irr = apic_find_highest_irr(apic);
1574 if ((highest_irr == -1) ||
Gleb Natapovc48f1492012-08-05 15:58:33 +03001575 ((highest_irr & 0xF0) <= kvm_apic_get_reg(apic, APIC_PROCPRI)))
Eddie Dong97222cc2007-09-12 10:58:04 +03001576 return -1;
1577 return highest_irr;
1578}
1579
Qing He40487c62007-09-17 14:47:13 +08001580int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu)
1581{
Gleb Natapovc48f1492012-08-05 15:58:33 +03001582 u32 lvt0 = kvm_apic_get_reg(vcpu->arch.apic, APIC_LVT0);
Qing He40487c62007-09-17 14:47:13 +08001583 int r = 0;
1584
Gleb Natapovc48f1492012-08-05 15:58:33 +03001585 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
Chris Lalancettee7dca5c2010-06-16 17:11:12 -04001586 r = 1;
1587 if ((lvt0 & APIC_LVT_MASKED) == 0 &&
1588 GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT)
1589 r = 1;
Qing He40487c62007-09-17 14:47:13 +08001590 return r;
1591}
1592
Eddie Dong1b9778d2007-09-03 16:56:58 +03001593void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu)
1594{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001595 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong1b9778d2007-09-03 16:56:58 +03001596
Gleb Natapovc48f1492012-08-05 15:58:33 +03001597 if (!kvm_vcpu_has_lapic(vcpu))
Gleb Natapov54e98182012-08-05 15:58:32 +03001598 return;
1599
1600 if (atomic_read(&apic->lapic_timer.pending) > 0) {
Jan Kiszkaf1ed0452013-04-28 14:00:41 +02001601 kvm_apic_local_deliver(apic, APIC_LVTT);
1602 atomic_set(&apic->lapic_timer.pending, 0);
Eddie Dong1b9778d2007-09-03 16:56:58 +03001603 }
1604}
1605
Eddie Dong97222cc2007-09-12 10:58:04 +03001606int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu)
1607{
1608 int vector = kvm_apic_has_interrupt(vcpu);
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001609 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong97222cc2007-09-12 10:58:04 +03001610
1611 if (vector == -1)
1612 return -1;
1613
Michael S. Tsirkin8680b942012-06-24 19:24:26 +03001614 apic_set_isr(vector, apic);
Eddie Dong97222cc2007-09-12 10:58:04 +03001615 apic_update_ppr(apic);
1616 apic_clear_irr(vector, apic);
1617 return vector;
1618}
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001619
Gleb Natapov64eb0622012-08-08 15:24:36 +03001620void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
1621 struct kvm_lapic_state *s)
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001622{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08001623 struct kvm_lapic *apic = vcpu->arch.apic;
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001624
Gleb Natapov5dbc8f32012-08-05 15:58:27 +03001625 kvm_lapic_set_base(vcpu, vcpu->arch.apic_base);
Gleb Natapov64eb0622012-08-08 15:24:36 +03001626 /* set SPIV separately to get count of SW disabled APICs right */
1627 apic_set_spiv(apic, *((u32 *)(s->regs + APIC_SPIV)));
1628 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
Gleb Natapov1e08ec42012-09-13 17:19:24 +03001629 /* call kvm_apic_set_id() to put apic into apic_map */
1630 kvm_apic_set_id(apic, kvm_apic_id(apic));
Gleb Natapovfc61b802009-07-05 17:39:35 +03001631 kvm_apic_set_version(vcpu);
1632
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001633 apic_update_ppr(apic);
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03001634 hrtimer_cancel(&apic->lapic_timer.timer);
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001635 update_divide_count(apic);
1636 start_apic_timer(apic);
Marcelo Tosatti6e24a6e2009-12-14 17:37:35 -02001637 apic->irr_pending = true;
Yang Zhangc7c9c562013-01-25 10:18:51 +08001638 apic->isr_count = kvm_apic_vid_enabled(vcpu->kvm) ?
1639 1 : count_vectors(apic->regs + APIC_ISR);
Michael S. Tsirkin8680b942012-06-24 19:24:26 +03001640 apic->highest_isr_cache = -1;
Yang Zhangc7c9c562013-01-25 10:18:51 +08001641 kvm_x86_ops->hwapic_isr_update(vcpu->kvm, apic_find_highest_isr(apic));
Avi Kivity3842d132010-07-27 12:30:24 +03001642 kvm_make_request(KVM_REQ_EVENT, vcpu);
Yang Zhang10606912013-04-11 19:21:38 +08001643 kvm_rtc_eoi_tracking_restore_one(vcpu);
Eddie Dong96ad2cc2007-09-06 12:22:56 +03001644}
Eddie Donga3d7f852007-09-03 16:15:12 +03001645
Avi Kivity2f52d582008-01-16 12:49:30 +02001646void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu)
Eddie Donga3d7f852007-09-03 16:15:12 +03001647{
Eddie Donga3d7f852007-09-03 16:15:12 +03001648 struct hrtimer *timer;
1649
Gleb Natapovc48f1492012-08-05 15:58:33 +03001650 if (!kvm_vcpu_has_lapic(vcpu))
Eddie Donga3d7f852007-09-03 16:15:12 +03001651 return;
1652
Gleb Natapov54e98182012-08-05 15:58:32 +03001653 timer = &vcpu->arch.apic->lapic_timer.timer;
Eddie Donga3d7f852007-09-03 16:15:12 +03001654 if (hrtimer_cancel(timer))
Arjan van de Venbeb20d522008-09-01 14:55:57 -07001655 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
Eddie Donga3d7f852007-09-03 16:15:12 +03001656}
Avi Kivityb93463a2007-10-25 16:52:32 +02001657
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +03001658/*
1659 * apic_sync_pv_eoi_from_guest - called on vmexit or cancel interrupt
1660 *
1661 * Detect whether guest triggered PV EOI since the
1662 * last entry. If yes, set EOI on guests's behalf.
1663 * Clear PV EOI in guest memory in any case.
1664 */
1665static void apic_sync_pv_eoi_from_guest(struct kvm_vcpu *vcpu,
1666 struct kvm_lapic *apic)
1667{
1668 bool pending;
1669 int vector;
1670 /*
1671 * PV EOI state is derived from KVM_APIC_PV_EOI_PENDING in host
1672 * and KVM_PV_EOI_ENABLED in guest memory as follows:
1673 *
1674 * KVM_APIC_PV_EOI_PENDING is unset:
1675 * -> host disabled PV EOI.
1676 * KVM_APIC_PV_EOI_PENDING is set, KVM_PV_EOI_ENABLED is set:
1677 * -> host enabled PV EOI, guest did not execute EOI yet.
1678 * KVM_APIC_PV_EOI_PENDING is set, KVM_PV_EOI_ENABLED is unset:
1679 * -> host enabled PV EOI, guest executed EOI.
1680 */
1681 BUG_ON(!pv_eoi_enabled(vcpu));
1682 pending = pv_eoi_get_pending(vcpu);
1683 /*
1684 * Clear pending bit in any case: it will be set again on vmentry.
1685 * While this might not be ideal from performance point of view,
1686 * this makes sure pv eoi is only enabled when we know it's safe.
1687 */
1688 pv_eoi_clr_pending(vcpu);
1689 if (pending)
1690 return;
1691 vector = apic_set_eoi(apic);
1692 trace_kvm_pv_eoi(apic, vector);
1693}
1694
Avi Kivityb93463a2007-10-25 16:52:32 +02001695void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu)
1696{
1697 u32 data;
Avi Kivityb93463a2007-10-25 16:52:32 +02001698
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +03001699 if (test_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention))
1700 apic_sync_pv_eoi_from_guest(vcpu, vcpu->arch.apic);
1701
Gleb Natapov41383772012-04-19 14:06:29 +03001702 if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention))
Avi Kivityb93463a2007-10-25 16:52:32 +02001703 return;
1704
Andy Honigfda4e2e82013-11-20 10:23:22 -08001705 kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data,
1706 sizeof(u32));
Avi Kivityb93463a2007-10-25 16:52:32 +02001707
1708 apic_set_tpr(vcpu->arch.apic, data & 0xff);
1709}
1710
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +03001711/*
1712 * apic_sync_pv_eoi_to_guest - called before vmentry
1713 *
1714 * Detect whether it's safe to enable PV EOI and
1715 * if yes do so.
1716 */
1717static void apic_sync_pv_eoi_to_guest(struct kvm_vcpu *vcpu,
1718 struct kvm_lapic *apic)
1719{
1720 if (!pv_eoi_enabled(vcpu) ||
1721 /* IRR set or many bits in ISR: could be nested. */
1722 apic->irr_pending ||
1723 /* Cache not set: could be safe but we don't bother. */
1724 apic->highest_isr_cache == -1 ||
1725 /* Need EOI to update ioapic. */
1726 kvm_ioapic_handles_vector(vcpu->kvm, apic->highest_isr_cache)) {
1727 /*
1728 * PV EOI was disabled by apic_sync_pv_eoi_from_guest
1729 * so we need not do anything here.
1730 */
1731 return;
1732 }
1733
1734 pv_eoi_set_pending(apic->vcpu);
1735}
1736
Avi Kivityb93463a2007-10-25 16:52:32 +02001737void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu)
1738{
1739 u32 data, tpr;
1740 int max_irr, max_isr;
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +03001741 struct kvm_lapic *apic = vcpu->arch.apic;
Avi Kivityb93463a2007-10-25 16:52:32 +02001742
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +03001743 apic_sync_pv_eoi_to_guest(vcpu, apic);
1744
Gleb Natapov41383772012-04-19 14:06:29 +03001745 if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention))
Avi Kivityb93463a2007-10-25 16:52:32 +02001746 return;
1747
Gleb Natapovc48f1492012-08-05 15:58:33 +03001748 tpr = kvm_apic_get_reg(apic, APIC_TASKPRI) & 0xff;
Avi Kivityb93463a2007-10-25 16:52:32 +02001749 max_irr = apic_find_highest_irr(apic);
1750 if (max_irr < 0)
1751 max_irr = 0;
1752 max_isr = apic_find_highest_isr(apic);
1753 if (max_isr < 0)
1754 max_isr = 0;
1755 data = (tpr & 0xff) | ((max_isr & 0xf0) << 8) | (max_irr << 24);
1756
Andy Honigfda4e2e82013-11-20 10:23:22 -08001757 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data,
1758 sizeof(u32));
Avi Kivityb93463a2007-10-25 16:52:32 +02001759}
1760
Andy Honigfda4e2e82013-11-20 10:23:22 -08001761int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr)
Avi Kivityb93463a2007-10-25 16:52:32 +02001762{
Andy Honigfda4e2e82013-11-20 10:23:22 -08001763 if (vapic_addr) {
1764 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1765 &vcpu->arch.apic->vapic_cache,
1766 vapic_addr, sizeof(u32)))
1767 return -EINVAL;
Gleb Natapov41383772012-04-19 14:06:29 +03001768 __set_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention);
Andy Honigfda4e2e82013-11-20 10:23:22 -08001769 } else {
Gleb Natapov41383772012-04-19 14:06:29 +03001770 __clear_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention);
Andy Honigfda4e2e82013-11-20 10:23:22 -08001771 }
1772
1773 vcpu->arch.apic->vapic_addr = vapic_addr;
1774 return 0;
Avi Kivityb93463a2007-10-25 16:52:32 +02001775}
Gleb Natapov0105d1a2009-07-05 17:39:36 +03001776
1777int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1778{
1779 struct kvm_lapic *apic = vcpu->arch.apic;
1780 u32 reg = (msr - APIC_BASE_MSR) << 4;
1781
1782 if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
1783 return 1;
1784
1785 /* if this is ICR write vector before command */
1786 if (msr == 0x830)
1787 apic_reg_write(apic, APIC_ICR2, (u32)(data >> 32));
1788 return apic_reg_write(apic, reg, (u32)data);
1789}
1790
1791int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)
1792{
1793 struct kvm_lapic *apic = vcpu->arch.apic;
1794 u32 reg = (msr - APIC_BASE_MSR) << 4, low, high = 0;
1795
1796 if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
1797 return 1;
1798
1799 if (apic_reg_read(apic, reg, 4, &low))
1800 return 1;
1801 if (msr == 0x830)
1802 apic_reg_read(apic, APIC_ICR2, 4, &high);
1803
1804 *data = (((u64)high) << 32) | low;
1805
1806 return 0;
1807}
Gleb Natapov10388a02010-01-17 15:51:23 +02001808
1809int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 reg, u64 data)
1810{
1811 struct kvm_lapic *apic = vcpu->arch.apic;
1812
Gleb Natapovc48f1492012-08-05 15:58:33 +03001813 if (!kvm_vcpu_has_lapic(vcpu))
Gleb Natapov10388a02010-01-17 15:51:23 +02001814 return 1;
1815
1816 /* if this is ICR write vector before command */
1817 if (reg == APIC_ICR)
1818 apic_reg_write(apic, APIC_ICR2, (u32)(data >> 32));
1819 return apic_reg_write(apic, reg, (u32)data);
1820}
1821
1822int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 reg, u64 *data)
1823{
1824 struct kvm_lapic *apic = vcpu->arch.apic;
1825 u32 low, high = 0;
1826
Gleb Natapovc48f1492012-08-05 15:58:33 +03001827 if (!kvm_vcpu_has_lapic(vcpu))
Gleb Natapov10388a02010-01-17 15:51:23 +02001828 return 1;
1829
1830 if (apic_reg_read(apic, reg, 4, &low))
1831 return 1;
1832 if (reg == APIC_ICR)
1833 apic_reg_read(apic, APIC_ICR2, 4, &high);
1834
1835 *data = (((u64)high) << 32) | low;
1836
1837 return 0;
1838}
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +03001839
1840int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data)
1841{
1842 u64 addr = data & ~KVM_MSR_ENABLED;
1843 if (!IS_ALIGNED(addr, 4))
1844 return 1;
1845
1846 vcpu->arch.pv_eoi.msr_val = data;
1847 if (!pv_eoi_enabled(vcpu))
1848 return 0;
1849 return kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.pv_eoi.data,
Andrew Honig8f964522013-03-29 09:35:21 -07001850 addr, sizeof(u8));
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +03001851}
Gleb Natapovc5cc4212012-08-05 15:58:30 +03001852
Jan Kiszka66450a22013-03-13 12:42:34 +01001853void kvm_apic_accept_events(struct kvm_vcpu *vcpu)
1854{
1855 struct kvm_lapic *apic = vcpu->arch.apic;
1856 unsigned int sipi_vector;
Gleb Natapov299018f2013-06-03 11:30:02 +03001857 unsigned long pe;
Jan Kiszka66450a22013-03-13 12:42:34 +01001858
Gleb Natapov299018f2013-06-03 11:30:02 +03001859 if (!kvm_vcpu_has_lapic(vcpu) || !apic->pending_events)
Jan Kiszka66450a22013-03-13 12:42:34 +01001860 return;
1861
Gleb Natapov299018f2013-06-03 11:30:02 +03001862 pe = xchg(&apic->pending_events, 0);
1863
1864 if (test_bit(KVM_APIC_INIT, &pe)) {
Jan Kiszka66450a22013-03-13 12:42:34 +01001865 kvm_lapic_reset(vcpu);
1866 kvm_vcpu_reset(vcpu);
1867 if (kvm_vcpu_is_bsp(apic->vcpu))
1868 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
1869 else
1870 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
1871 }
Gleb Natapov299018f2013-06-03 11:30:02 +03001872 if (test_bit(KVM_APIC_SIPI, &pe) &&
Jan Kiszka66450a22013-03-13 12:42:34 +01001873 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
1874 /* evaluate pending_events before reading the vector */
1875 smp_rmb();
1876 sipi_vector = apic->sipi_vector;
1877 pr_debug("vcpu %d received sipi with vector # %x\n",
1878 vcpu->vcpu_id, sipi_vector);
1879 kvm_vcpu_deliver_sipi_vector(vcpu, sipi_vector);
1880 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
1881 }
1882}
1883
Gleb Natapovc5cc4212012-08-05 15:58:30 +03001884void kvm_lapic_init(void)
1885{
1886 /* do not patch jump label more than once per second */
1887 jump_label_rate_limit(&apic_hw_disabled, HZ);
Gleb Natapovf8c1ea12012-08-05 15:58:31 +03001888 jump_label_rate_limit(&apic_sw_disabled, HZ);
Gleb Natapovc5cc4212012-08-05 15:58:30 +03001889}