Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 1 | /* |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 2 | * Copyright (C) 2010 Google, Inc. |
Danny Huang | 7495b2e | 2013-03-18 19:17:34 +0800 | [diff] [blame] | 3 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 4 | * |
| 5 | * Author: |
| 6 | * Colin Cross <ccross@android.com> |
| 7 | * |
| 8 | * This software is licensed under the terms of the GNU General Public |
| 9 | * License version 2, as published by the Free Software Foundation, and |
| 10 | * may be copied, distributed, and modified under those terms. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | */ |
| 18 | |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 19 | #ifndef __MACH_TEGRA_FUSE_H |
| 20 | #define __MACH_TEGRA_FUSE_H |
| 21 | |
| 22 | enum tegra_revision { |
| 23 | TEGRA_REVISION_UNKNOWN = 0, |
| 24 | TEGRA_REVISION_A01, |
| 25 | TEGRA_REVISION_A02, |
| 26 | TEGRA_REVISION_A03, |
| 27 | TEGRA_REVISION_A03p, |
| 28 | TEGRA_REVISION_A04, |
| 29 | TEGRA_REVISION_MAX, |
| 30 | }; |
| 31 | |
| 32 | #define SKU_ID_T20 8 |
| 33 | #define SKU_ID_T25SE 20 |
| 34 | #define SKU_ID_AP25 23 |
| 35 | #define SKU_ID_T25 24 |
| 36 | #define SKU_ID_AP25E 27 |
| 37 | #define SKU_ID_T25E 28 |
| 38 | |
Peter De Schrijver | 35b1498 | 2012-02-10 01:47:41 +0200 | [diff] [blame] | 39 | #define TEGRA20 0x20 |
| 40 | #define TEGRA30 0x30 |
Hiroshi Doyu | 7b30d45 | 2013-01-24 01:10:22 +0000 | [diff] [blame] | 41 | #define TEGRA114 0x35 |
Peter De Schrijver | 35b1498 | 2012-02-10 01:47:41 +0200 | [diff] [blame] | 42 | |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 43 | extern int tegra_sku_id; |
| 44 | extern int tegra_cpu_process_id; |
| 45 | extern int tegra_core_process_id; |
Peter De Schrijver | 4c4ad66 | 2012-02-10 01:47:42 +0200 | [diff] [blame] | 46 | extern int tegra_chip_id; |
Danny Huang | f8ddda7 | 2012-11-15 15:42:34 +0800 | [diff] [blame] | 47 | extern int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */ |
Danny Huang | 25cd5a3 | 2012-11-15 15:42:33 +0800 | [diff] [blame] | 48 | extern int tegra_soc_speedo_id; |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 49 | extern enum tegra_revision tegra_revision; |
| 50 | |
Olof Johansson | dee4718 | 2011-10-17 16:39:24 -0700 | [diff] [blame] | 51 | extern int tegra_bct_strapping; |
| 52 | |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 53 | unsigned long long tegra_chip_uid(void); |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 54 | void tegra_init_fuse(void); |
Danny Huang | 1f851a2 | 2012-11-15 15:42:32 +0800 | [diff] [blame] | 55 | bool tegra_spare_fuse(int bit); |
| 56 | u32 tegra_fuse_readl(unsigned long offset); |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 57 | |
Danny Huang | 25cd5a3 | 2012-11-15 15:42:33 +0800 | [diff] [blame] | 58 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC |
| 59 | void tegra20_init_speedo_data(void); |
| 60 | #else |
| 61 | static inline void tegra20_init_speedo_data(void) {} |
| 62 | #endif |
| 63 | |
Danny Huang | f8ddda7 | 2012-11-15 15:42:34 +0800 | [diff] [blame] | 64 | #ifdef CONFIG_ARCH_TEGRA_3x_SOC |
| 65 | void tegra30_init_speedo_data(void); |
| 66 | #else |
| 67 | static inline void tegra30_init_speedo_data(void) {} |
| 68 | #endif |
| 69 | |
Danny Huang | 7495b2e | 2013-03-18 19:17:34 +0800 | [diff] [blame] | 70 | #ifdef CONFIG_ARCH_TEGRA_114_SOC |
| 71 | void tegra114_init_speedo_data(void); |
| 72 | #else |
| 73 | static inline void tegra114_init_speedo_data(void) {} |
| 74 | #endif |
| 75 | |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 76 | #endif |