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Paul Mundt91b91d02006-09-27 18:08:33 +09001/*
2 * Renesas Technology SH7710 VoIP Gateway
3 *
4 * Copyright (C) 2006 Ranjit Deshpande
5 * Kenati Technologies Inc.
6 *
7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information.
9 */
10#include <linux/init.h>
11#include <asm/machvec.h>
12#include <asm/irq.h>
13#include <asm/io.h>
14#include <asm/irq.h>
15
Jamie Lenehanbd71ab82006-10-31 12:35:02 +090016static struct ipr_data sh7710voipgw_ipr_map[] = {
17 { TIMER2_IRQ, TIMER2_IPR_ADDR, TIMER2_IPR_POS, TIMER2_PRIORITY },
18 { WDT_IRQ, WDT_IPR_ADDR, WDT_IPR_POS, WDT_PRIORITY },
19
20 /* SCIF0 */
21 { SCIF0_ERI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
22 { SCIF0_RXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
23 { SCIF0_BRI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
24 { SCIF0_TXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
25
26 /* DMAC-1 */
27 { DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
28 { DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
29 { DMTE2_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
30 { DMTE3_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
31
32 /* DMAC-2 */
33 { DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
34 { DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
35
36 /* IPSEC */
37 { IPSEC_IRQ, IPSEC_IPR_ADDR, IPSEC_IPR_POS, IPSEC_PRIORITY },
38
39 /* EDMAC */
40 { EDMAC0_IRQ, EDMAC0_IPR_ADDR, EDMAC0_IPR_POS, EDMAC0_PRIORITY },
41 { EDMAC1_IRQ, EDMAC1_IPR_ADDR, EDMAC1_IPR_POS, EDMAC1_PRIORITY },
42 { EDMAC2_IRQ, EDMAC2_IPR_ADDR, EDMAC2_IPR_POS, EDMAC2_PRIORITY },
43
44 /* SIOF0 */
45 { SIOF0_ERI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
46 { SIOF0_TXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
47 { SIOF0_RXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
48 { SIOF0_CCI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
49
50 /* SIOF1 */
51 { SIOF1_ERI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
52 { SIOF1_TXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
53 { SIOF1_RXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
54 { SIOF1_CCI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
55
56 /* SLIC IRQ's */
57 { IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY },
58 { IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY },
59};
60
Paul Mundt91b91d02006-09-27 18:08:33 +090061/*
62 * Initialize IRQ setting
63 */
64static void __init sh7710voipgw_init_irq(void)
65{
66 /* Disable all interrupts in IPR registers */
67 ctrl_outw(0x0, INTC_IPRA);
68 ctrl_outw(0x0, INTC_IPRB);
69 ctrl_outw(0x0, INTC_IPRC);
70 ctrl_outw(0x0, INTC_IPRD);
71 ctrl_outw(0x0, INTC_IPRE);
72 ctrl_outw(0x0, INTC_IPRF);
73 ctrl_outw(0x0, INTC_IPRG);
74 ctrl_outw(0x0, INTC_IPRH);
75 ctrl_outw(0x0, INTC_IPRI);
76
77 /* Ack all interrupt sources in the IRR0 register */
78 ctrl_outb(0x3f, INTC_IRR0);
79
80 /* Use IRQ0 - IRQ3 as active low interrupt lines i.e. disable
81 * IRL mode.
82 */
83 ctrl_outw(0x2aa, INTC_ICR1);
84
Jamie Lenehanbd71ab82006-10-31 12:35:02 +090085 make_ipr_irq(sh7710voipgw_ipr_map, ARRAY_SIZE(sh7710voipgw_ipr_map));
Paul Mundt91b91d02006-09-27 18:08:33 +090086}
87
88/*
89 * The Machine Vector
90 */
Paul Mundt82f81f42007-05-15 15:19:34 +090091static struct sh_machine_vector mv_sh7710voipgw __initmv = {
Paul Mundt91b91d02006-09-27 18:08:33 +090092 .mv_name = "SH7710 VoIP Gateway",
93 .mv_nr_irqs = 104,
94 .mv_init_irq = sh7710voipgw_init_irq,
95};