Suresh Siddha | dc1e35c | 2008-07-29 10:29:19 -0700 | [diff] [blame] | 1 | #ifndef __ASM_X86_XSAVE_H |
| 2 | #define __ASM_X86_XSAVE_H |
| 3 | |
H. Peter Anvin | 6152e4b | 2008-07-29 17:23:16 -0700 | [diff] [blame] | 4 | #include <linux/types.h> |
Suresh Siddha | dc1e35c | 2008-07-29 10:29:19 -0700 | [diff] [blame] | 5 | #include <asm/processor.h> |
Suresh Siddha | dc1e35c | 2008-07-29 10:29:19 -0700 | [diff] [blame] | 6 | |
Robert Richter | ee813d5 | 2010-07-21 19:03:54 +0200 | [diff] [blame] | 7 | #define XSTATE_CPUID 0x0000000d |
Suresh Siddha | dc1e35c | 2008-07-29 10:29:19 -0700 | [diff] [blame] | 8 | |
| 9 | #define XSTATE_FP 0x1 |
| 10 | #define XSTATE_SSE 0x2 |
Suresh Siddha | a30469e | 2009-04-10 15:21:24 -0700 | [diff] [blame] | 11 | #define XSTATE_YMM 0x4 |
Qiaowei Ren | e7d820a | 2013-12-05 17:15:34 +0800 | [diff] [blame^] | 12 | #define XSTATE_BNDREGS 0x8 |
| 13 | #define XSTATE_BNDCSR 0x10 |
Suresh Siddha | dc1e35c | 2008-07-29 10:29:19 -0700 | [diff] [blame] | 14 | |
| 15 | #define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE) |
| 16 | |
| 17 | #define FXSAVE_SIZE 512 |
| 18 | |
Sheng Yang | 2d5b5a6 | 2010-06-13 17:29:39 +0800 | [diff] [blame] | 19 | #define XSAVE_HDR_SIZE 64 |
| 20 | #define XSAVE_HDR_OFFSET FXSAVE_SIZE |
| 21 | |
| 22 | #define XSAVE_YMM_SIZE 256 |
| 23 | #define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET) |
Sheng Yang | 5ee481d | 2010-05-17 17:22:23 +0800 | [diff] [blame] | 24 | |
Qiaowei Ren | e7d820a | 2013-12-05 17:15:34 +0800 | [diff] [blame^] | 25 | /* Supported features which support lazy state saving */ |
| 26 | #define XSTATE_LAZY (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) |
| 27 | |
| 28 | /* Supported features which require eager state saving */ |
| 29 | #define XSTATE_EAGER (XSTATE_BNDREGS | XSTATE_BNDCSR) |
| 30 | |
| 31 | /* All currently supported features */ |
| 32 | #define XCNTXT_MASK (XSTATE_LAZY | XSTATE_EAGER) |
Suresh Siddha | dc1e35c | 2008-07-29 10:29:19 -0700 | [diff] [blame] | 33 | |
Suresh Siddha | b359e8a | 2008-07-29 10:29:20 -0700 | [diff] [blame] | 34 | #ifdef CONFIG_X86_64 |
| 35 | #define REX_PREFIX "0x48, " |
| 36 | #else |
| 37 | #define REX_PREFIX |
| 38 | #endif |
| 39 | |
H. Peter Anvin | 6152e4b | 2008-07-29 17:23:16 -0700 | [diff] [blame] | 40 | extern unsigned int xstate_size; |
| 41 | extern u64 pcntxt_mask; |
Suresh Siddha | 5b3efd5 | 2010-02-11 11:50:59 -0800 | [diff] [blame] | 42 | extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS]; |
Suresh Siddha | 304bced | 2012-08-24 14:13:02 -0700 | [diff] [blame] | 43 | extern struct xsave_struct *init_xstate_buf; |
Suresh Siddha | dc1e35c | 2008-07-29 10:29:19 -0700 | [diff] [blame] | 44 | |
Suresh Siddha | dc1e35c | 2008-07-29 10:29:19 -0700 | [diff] [blame] | 45 | extern void xsave_init(void); |
Suresh Siddha | 5b3efd5 | 2010-02-11 11:50:59 -0800 | [diff] [blame] | 46 | extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask); |
Suresh Siddha | b359e8a | 2008-07-29 10:29:20 -0700 | [diff] [blame] | 47 | extern int init_fpu(struct task_struct *child); |
Suresh Siddha | dc1e35c | 2008-07-29 10:29:19 -0700 | [diff] [blame] | 48 | |
Suresh Siddha | 0ca5bd0 | 2012-07-24 16:05:28 -0700 | [diff] [blame] | 49 | static inline int fpu_xrstor_checking(struct xsave_struct *fx) |
Suresh Siddha | b359e8a | 2008-07-29 10:29:20 -0700 | [diff] [blame] | 50 | { |
| 51 | int err; |
| 52 | |
| 53 | asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t" |
| 54 | "2:\n" |
| 55 | ".section .fixup,\"ax\"\n" |
| 56 | "3: movl $-1,%[err]\n" |
| 57 | " jmp 2b\n" |
| 58 | ".previous\n" |
| 59 | _ASM_EXTABLE(1b, 3b) |
| 60 | : [err] "=r" (err) |
| 61 | : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0) |
| 62 | : "memory"); |
| 63 | |
| 64 | return err; |
| 65 | } |
| 66 | |
Suresh Siddha | c37b5ef | 2008-07-29 10:29:25 -0700 | [diff] [blame] | 67 | static inline int xsave_user(struct xsave_struct __user *buf) |
Suresh Siddha | 9dc89c0 | 2008-07-29 10:29:23 -0700 | [diff] [blame] | 68 | { |
| 69 | int err; |
Suresh Siddha | 8e221b6 | 2010-06-22 16:23:37 -0700 | [diff] [blame] | 70 | |
| 71 | /* |
| 72 | * Clear the xsave header first, so that reserved fields are |
| 73 | * initialized to zero. |
| 74 | */ |
Suresh Siddha | 72a671c | 2012-07-24 16:05:29 -0700 | [diff] [blame] | 75 | err = __clear_user(&buf->xsave_hdr, sizeof(buf->xsave_hdr)); |
Suresh Siddha | 8e221b6 | 2010-06-22 16:23:37 -0700 | [diff] [blame] | 76 | if (unlikely(err)) |
| 77 | return -EFAULT; |
| 78 | |
H. Peter Anvin | 63bcff2 | 2012-09-21 12:43:12 -0700 | [diff] [blame] | 79 | __asm__ __volatile__(ASM_STAC "\n" |
| 80 | "1: .byte " REX_PREFIX "0x0f,0xae,0x27\n" |
| 81 | "2: " ASM_CLAC "\n" |
Suresh Siddha | 9dc89c0 | 2008-07-29 10:29:23 -0700 | [diff] [blame] | 82 | ".section .fixup,\"ax\"\n" |
| 83 | "3: movl $-1,%[err]\n" |
| 84 | " jmp 2b\n" |
| 85 | ".previous\n" |
H. Peter Anvin | 7a040a4 | 2012-04-20 13:42:25 -0700 | [diff] [blame] | 86 | _ASM_EXTABLE(1b,3b) |
Suresh Siddha | 9dc89c0 | 2008-07-29 10:29:23 -0700 | [diff] [blame] | 87 | : [err] "=r" (err) |
| 88 | : "D" (buf), "a" (-1), "d" (-1), "0" (0) |
| 89 | : "memory"); |
Suresh Siddha | 9dc89c0 | 2008-07-29 10:29:23 -0700 | [diff] [blame] | 90 | return err; |
| 91 | } |
| 92 | |
H. Peter Anvin | 6152e4b | 2008-07-29 17:23:16 -0700 | [diff] [blame] | 93 | static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask) |
Suresh Siddha | 9dc89c0 | 2008-07-29 10:29:23 -0700 | [diff] [blame] | 94 | { |
| 95 | int err; |
| 96 | struct xsave_struct *xstate = ((__force struct xsave_struct *)buf); |
H. Peter Anvin | 6152e4b | 2008-07-29 17:23:16 -0700 | [diff] [blame] | 97 | u32 lmask = mask; |
| 98 | u32 hmask = mask >> 32; |
Suresh Siddha | 9dc89c0 | 2008-07-29 10:29:23 -0700 | [diff] [blame] | 99 | |
H. Peter Anvin | 63bcff2 | 2012-09-21 12:43:12 -0700 | [diff] [blame] | 100 | __asm__ __volatile__(ASM_STAC "\n" |
| 101 | "1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n" |
| 102 | "2: " ASM_CLAC "\n" |
Suresh Siddha | 9dc89c0 | 2008-07-29 10:29:23 -0700 | [diff] [blame] | 103 | ".section .fixup,\"ax\"\n" |
| 104 | "3: movl $-1,%[err]\n" |
| 105 | " jmp 2b\n" |
| 106 | ".previous\n" |
H. Peter Anvin | 7a040a4 | 2012-04-20 13:42:25 -0700 | [diff] [blame] | 107 | _ASM_EXTABLE(1b,3b) |
Suresh Siddha | 9dc89c0 | 2008-07-29 10:29:23 -0700 | [diff] [blame] | 108 | : [err] "=r" (err) |
| 109 | : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0) |
| 110 | : "memory"); /* memory required? */ |
| 111 | return err; |
| 112 | } |
| 113 | |
H. Peter Anvin | 6152e4b | 2008-07-29 17:23:16 -0700 | [diff] [blame] | 114 | static inline void xrstor_state(struct xsave_struct *fx, u64 mask) |
Suresh Siddha | 9dc89c0 | 2008-07-29 10:29:23 -0700 | [diff] [blame] | 115 | { |
H. Peter Anvin | 6152e4b | 2008-07-29 17:23:16 -0700 | [diff] [blame] | 116 | u32 lmask = mask; |
| 117 | u32 hmask = mask >> 32; |
| 118 | |
Suresh Siddha | 9dc89c0 | 2008-07-29 10:29:23 -0700 | [diff] [blame] | 119 | asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t" |
| 120 | : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) |
| 121 | : "memory"); |
| 122 | } |
| 123 | |
Suresh Siddha | 29104e1 | 2010-07-19 16:05:49 -0700 | [diff] [blame] | 124 | static inline void xsave_state(struct xsave_struct *fx, u64 mask) |
| 125 | { |
| 126 | u32 lmask = mask; |
| 127 | u32 hmask = mask >> 32; |
| 128 | |
| 129 | asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x27\n\t" |
| 130 | : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) |
| 131 | : "memory"); |
| 132 | } |
| 133 | |
Avi Kivity | 8660328 | 2010-05-06 11:45:46 +0300 | [diff] [blame] | 134 | static inline void fpu_xsave(struct fpu *fpu) |
Suresh Siddha | b359e8a | 2008-07-29 10:29:20 -0700 | [diff] [blame] | 135 | { |
| 136 | /* This, however, we can work around by forcing the compiler to select |
| 137 | an addressing mode that doesn't require extended registers. */ |
Suresh Siddha | 6bad06b | 2010-07-19 16:05:52 -0700 | [diff] [blame] | 138 | alternative_input( |
| 139 | ".byte " REX_PREFIX "0x0f,0xae,0x27", |
| 140 | ".byte " REX_PREFIX "0x0f,0xae,0x37", |
| 141 | X86_FEATURE_XSAVEOPT, |
| 142 | [fx] "D" (&fpu->state->xsave), "a" (-1), "d" (-1) : |
| 143 | "memory"); |
Suresh Siddha | b359e8a | 2008-07-29 10:29:20 -0700 | [diff] [blame] | 144 | } |
Suresh Siddha | dc1e35c | 2008-07-29 10:29:19 -0700 | [diff] [blame] | 145 | #endif |