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Benjamin Krill5886188d2009-01-07 10:32:38 +01001/*
2 * Serial Port driver for a NWP uart device
3 *
4 * Copyright (C) 2008 IBM Corp., Benjamin Krill <ben@codiert.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 */
12#include <linux/init.h>
13#include <linux/console.h>
14#include <linux/serial.h>
15#include <linux/serial_reg.h>
16#include <linux/serial_core.h>
17#include <linux/tty.h>
18#include <linux/irqreturn.h>
19#include <linux/mutex.h>
20#include <linux/of_platform.h>
21#include <linux/of_device.h>
22#include <linux/nwpserial.h>
23#include <asm/prom.h>
24#include <asm/dcr.h>
25
26#define NWPSERIAL_NR 2
27
28#define NWPSERIAL_STATUS_RXVALID 0x1
29#define NWPSERIAL_STATUS_TXFULL 0x2
30
31struct nwpserial_port {
32 struct uart_port port;
33 dcr_host_t dcr_host;
34 unsigned int ier;
35 unsigned int mcr;
36};
37
38static DEFINE_MUTEX(nwpserial_mutex);
39static struct nwpserial_port nwpserial_ports[NWPSERIAL_NR];
40
41static void wait_for_bits(struct nwpserial_port *up, int bits)
42{
43 unsigned int status, tmout = 10000;
44
45 /* Wait up to 10ms for the character(s) to be sent. */
46 do {
47 status = dcr_read(up->dcr_host, UART_LSR);
48
49 if (--tmout == 0)
50 break;
51 udelay(1);
52 } while ((status & bits) != bits);
53}
54
55#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
56static void nwpserial_console_putchar(struct uart_port *port, int c)
57{
58 struct nwpserial_port *up;
59 up = container_of(port, struct nwpserial_port, port);
60 /* check if tx buffer is full */
61 wait_for_bits(up, UART_LSR_THRE);
62 dcr_write(up->dcr_host, UART_TX, c);
63 up->port.icount.tx++;
64}
65
66static void
67nwpserial_console_write(struct console *co, const char *s, unsigned int count)
68{
69 struct nwpserial_port *up = &nwpserial_ports[co->index];
70 unsigned long flags;
71 int locked = 1;
72
73 if (oops_in_progress)
74 locked = spin_trylock_irqsave(&up->port.lock, flags);
75 else
76 spin_lock_irqsave(&up->port.lock, flags);
77
78 /* save and disable interrupt */
79 up->ier = dcr_read(up->dcr_host, UART_IER);
80 dcr_write(up->dcr_host, UART_IER, up->ier & ~UART_IER_RDI);
81
82 uart_console_write(&up->port, s, count, nwpserial_console_putchar);
83
84 /* wait for transmitter to become emtpy */
85 while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0)
86 cpu_relax();
87
88 /* restore interrupt state */
89 dcr_write(up->dcr_host, UART_IER, up->ier);
90
91 if (locked)
92 spin_unlock_irqrestore(&up->port.lock, flags);
93}
94
95static struct uart_driver nwpserial_reg;
96static struct console nwpserial_console = {
97 .name = "ttySQ",
98 .write = nwpserial_console_write,
99 .device = uart_console_device,
100 .flags = CON_PRINTBUFFER,
101 .index = -1,
102 .data = &nwpserial_reg,
103};
104#define NWPSERIAL_CONSOLE (&nwpserial_console)
105#else
106#define NWPSERIAL_CONSOLE NULL
107#endif /* CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE */
108
109/**************************************************************************/
110
111static int nwpserial_request_port(struct uart_port *port)
112{
113 return 0;
114}
115
116static void nwpserial_release_port(struct uart_port *port)
117{
118 /* N/A */
119}
120
121static void nwpserial_config_port(struct uart_port *port, int flags)
122{
123 port->type = PORT_NWPSERIAL;
124}
125
126static irqreturn_t nwpserial_interrupt(int irq, void *dev_id)
127{
128 struct nwpserial_port *up = dev_id;
129 struct tty_struct *tty = up->port.info->port.tty;
130 irqreturn_t ret;
131 unsigned int iir;
132 unsigned char ch;
133
134 spin_lock(&up->port.lock);
135
136 /* check if the uart was the interrupt source. */
137 iir = dcr_read(up->dcr_host, UART_IIR);
138 if (!iir) {
139 ret = IRQ_NONE;
140 goto out;
141 }
142
143 do {
144 up->port.icount.rx++;
145 ch = dcr_read(up->dcr_host, UART_RX);
146 if (up->port.ignore_status_mask != NWPSERIAL_STATUS_RXVALID)
147 tty_insert_flip_char(tty, ch, TTY_NORMAL);
Benjamin Krill951c4df2009-05-13 05:56:54 +0000148 } while (dcr_read(up->dcr_host, UART_LSR) & UART_LSR_DR);
Benjamin Krill5886188d2009-01-07 10:32:38 +0100149
150 tty_flip_buffer_push(tty);
151 ret = IRQ_HANDLED;
152
Benjamin Krill951c4df2009-05-13 05:56:54 +0000153 /* clear interrupt */
154 dcr_write(up->dcr_host, UART_IIR, 1);
Benjamin Krill5886188d2009-01-07 10:32:38 +0100155out:
156 spin_unlock(&up->port.lock);
157 return ret;
158}
159
160static int nwpserial_startup(struct uart_port *port)
161{
162 struct nwpserial_port *up;
163 int err;
164
165 up = container_of(port, struct nwpserial_port, port);
166
167 /* disable flow control by default */
168 up->mcr = dcr_read(up->dcr_host, UART_MCR) & ~UART_MCR_AFE;
169 dcr_write(up->dcr_host, UART_MCR, up->mcr);
170
171 /* register interrupt handler */
172 err = request_irq(up->port.irq, nwpserial_interrupt,
173 IRQF_SHARED, "nwpserial", up);
174 if (err)
175 return err;
176
177 /* enable interrupts */
178 up->ier = UART_IER_RDI;
179 dcr_write(up->dcr_host, UART_IER, up->ier);
180
181 /* enable receiving */
182 up->port.ignore_status_mask &= ~NWPSERIAL_STATUS_RXVALID;
183
184 return 0;
185}
186
187static void nwpserial_shutdown(struct uart_port *port)
188{
189 struct nwpserial_port *up;
190 up = container_of(port, struct nwpserial_port, port);
191
192 /* disable receiving */
193 up->port.ignore_status_mask |= NWPSERIAL_STATUS_RXVALID;
194
195 /* disable interrupts from this port */
196 up->ier = 0;
197 dcr_write(up->dcr_host, UART_IER, up->ier);
198
199 /* free irq */
200 free_irq(up->port.irq, port);
201}
202
203static int nwpserial_verify_port(struct uart_port *port,
204 struct serial_struct *ser)
205{
206 return -EINVAL;
207}
208
209static const char *nwpserial_type(struct uart_port *port)
210{
211 return port->type == PORT_NWPSERIAL ? "nwpserial" : NULL;
212}
213
214static void nwpserial_set_termios(struct uart_port *port,
215 struct ktermios *termios, struct ktermios *old)
216{
217 struct nwpserial_port *up;
218 up = container_of(port, struct nwpserial_port, port);
219
220 up->port.read_status_mask = NWPSERIAL_STATUS_RXVALID
221 | NWPSERIAL_STATUS_TXFULL;
222
223 up->port.ignore_status_mask = 0;
224 /* ignore all characters if CREAD is not set */
225 if ((termios->c_cflag & CREAD) == 0)
226 up->port.ignore_status_mask |= NWPSERIAL_STATUS_RXVALID;
227
228 /* Copy back the old hardware settings */
229 if (old)
230 tty_termios_copy_hw(termios, old);
231}
232
233static void nwpserial_break_ctl(struct uart_port *port, int ctl)
234{
235 /* N/A */
236}
237
238static void nwpserial_enable_ms(struct uart_port *port)
239{
240 /* N/A */
241}
242
243static void nwpserial_stop_rx(struct uart_port *port)
244{
245 struct nwpserial_port *up;
246 up = container_of(port, struct nwpserial_port, port);
247 /* don't forward any more data (like !CREAD) */
248 up->port.ignore_status_mask = NWPSERIAL_STATUS_RXVALID;
249}
250
251static void nwpserial_putchar(struct nwpserial_port *up, unsigned char c)
252{
253 /* check if tx buffer is full */
254 wait_for_bits(up, UART_LSR_THRE);
255 dcr_write(up->dcr_host, UART_TX, c);
256 up->port.icount.tx++;
257}
258
259static void nwpserial_start_tx(struct uart_port *port)
260{
261 struct nwpserial_port *up;
262 struct circ_buf *xmit;
263 up = container_of(port, struct nwpserial_port, port);
264 xmit = &up->port.info->xmit;
265
266 if (port->x_char) {
267 nwpserial_putchar(up, up->port.x_char);
268 port->x_char = 0;
269 }
270
271 while (!(uart_circ_empty(xmit) || uart_tx_stopped(&up->port))) {
272 nwpserial_putchar(up, xmit->buf[xmit->tail]);
273 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
274 }
275}
276
277static unsigned int nwpserial_get_mctrl(struct uart_port *port)
278{
279 return 0;
280}
281
282static void nwpserial_set_mctrl(struct uart_port *port, unsigned int mctrl)
283{
284 /* N/A */
285}
286
287static void nwpserial_stop_tx(struct uart_port *port)
288{
289 /* N/A */
290}
291
292static unsigned int nwpserial_tx_empty(struct uart_port *port)
293{
294 struct nwpserial_port *up;
295 unsigned long flags;
296 int ret;
297 up = container_of(port, struct nwpserial_port, port);
298
299 spin_lock_irqsave(&up->port.lock, flags);
300 ret = dcr_read(up->dcr_host, UART_LSR);
301 spin_unlock_irqrestore(&up->port.lock, flags);
302
303 return ret & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
304}
305
306static struct uart_ops nwpserial_pops = {
307 .tx_empty = nwpserial_tx_empty,
308 .set_mctrl = nwpserial_set_mctrl,
309 .get_mctrl = nwpserial_get_mctrl,
310 .stop_tx = nwpserial_stop_tx,
311 .start_tx = nwpserial_start_tx,
312 .stop_rx = nwpserial_stop_rx,
313 .enable_ms = nwpserial_enable_ms,
314 .break_ctl = nwpserial_break_ctl,
315 .startup = nwpserial_startup,
316 .shutdown = nwpserial_shutdown,
317 .set_termios = nwpserial_set_termios,
318 .type = nwpserial_type,
319 .release_port = nwpserial_release_port,
320 .request_port = nwpserial_request_port,
321 .config_port = nwpserial_config_port,
322 .verify_port = nwpserial_verify_port,
323};
324
325static struct uart_driver nwpserial_reg = {
326 .owner = THIS_MODULE,
327 .driver_name = "nwpserial",
328 .dev_name = "ttySQ",
329 .major = TTY_MAJOR,
330 .minor = 68,
331 .nr = NWPSERIAL_NR,
332 .cons = NWPSERIAL_CONSOLE,
333};
334
335int nwpserial_register_port(struct uart_port *port)
336{
337 struct nwpserial_port *up = NULL;
338 int ret = -1;
339 int i;
340 static int first = 1;
341 int dcr_len;
342 int dcr_base;
343 struct device_node *dn;
344
345 mutex_lock(&nwpserial_mutex);
346
347 dn = to_of_device(port->dev)->node;
348 if (dn == NULL)
349 goto out;
350
351 /* get dcr base. */
352 dcr_base = dcr_resource_start(dn, 0);
353
354 /* find matching entry */
355 for (i = 0; i < NWPSERIAL_NR; i++)
356 if (nwpserial_ports[i].port.iobase == dcr_base) {
357 up = &nwpserial_ports[i];
358 break;
359 }
360
361 /* we didn't find a mtching entry, search for a free port */
362 if (up == NULL)
363 for (i = 0; i < NWPSERIAL_NR; i++)
364 if (nwpserial_ports[i].port.type == PORT_UNKNOWN &&
365 nwpserial_ports[i].port.iobase == 0) {
366 up = &nwpserial_ports[i];
367 break;
368 }
369
370 if (up == NULL) {
371 ret = -EBUSY;
372 goto out;
373 }
374
375 if (first)
376 uart_register_driver(&nwpserial_reg);
377 first = 0;
378
379 up->port.membase = port->membase;
380 up->port.irq = port->irq;
381 up->port.uartclk = port->uartclk;
382 up->port.fifosize = port->fifosize;
383 up->port.regshift = port->regshift;
384 up->port.iotype = port->iotype;
385 up->port.flags = port->flags;
386 up->port.mapbase = port->mapbase;
387 up->port.private_data = port->private_data;
388
389 if (port->dev)
390 up->port.dev = port->dev;
391
392 if (up->port.iobase != dcr_base) {
393 up->port.ops = &nwpserial_pops;
394 up->port.fifosize = 16;
395
396 spin_lock_init(&up->port.lock);
397
398 up->port.iobase = dcr_base;
399 dcr_len = dcr_resource_len(dn, 0);
400
401 up->dcr_host = dcr_map(dn, dcr_base, dcr_len);
402 if (!DCR_MAP_OK(up->dcr_host)) {
403 printk(KERN_ERR "Cannot map DCR resources for NWPSERIAL");
404 goto out;
405 }
406 }
407
408 ret = uart_add_one_port(&nwpserial_reg, &up->port);
409 if (ret == 0)
410 ret = up->port.line;
411
412out:
413 mutex_unlock(&nwpserial_mutex);
414
415 return ret;
416}
417EXPORT_SYMBOL(nwpserial_register_port);
418
419void nwpserial_unregister_port(int line)
420{
421 struct nwpserial_port *up = &nwpserial_ports[line];
422 mutex_lock(&nwpserial_mutex);
423 uart_remove_one_port(&nwpserial_reg, &up->port);
424
425 up->port.type = PORT_UNKNOWN;
426
427 mutex_unlock(&nwpserial_mutex);
428}
429EXPORT_SYMBOL(nwpserial_unregister_port);
430
431#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
432static int __init nwpserial_console_init(void)
433{
434 struct nwpserial_port *up = NULL;
435 struct device_node *dn;
436 const char *name;
437 int dcr_base;
438 int dcr_len;
439 int i;
440
441 /* search for a free port */
442 for (i = 0; i < NWPSERIAL_NR; i++)
443 if (nwpserial_ports[i].port.type == PORT_UNKNOWN) {
444 up = &nwpserial_ports[i];
445 break;
446 }
447
448 if (up == NULL)
449 return -1;
450
451 name = of_get_property(of_chosen, "linux,stdout-path", NULL);
452 if (name == NULL)
453 return -1;
454
455 dn = of_find_node_by_path(name);
456 if (!dn)
457 return -1;
458
459 spin_lock_init(&up->port.lock);
460 up->port.ops = &nwpserial_pops;
461 up->port.type = PORT_NWPSERIAL;
462 up->port.fifosize = 16;
463
464 dcr_base = dcr_resource_start(dn, 0);
465 dcr_len = dcr_resource_len(dn, 0);
466 up->port.iobase = dcr_base;
467
468 up->dcr_host = dcr_map(dn, dcr_base, dcr_len);
469 if (!DCR_MAP_OK(up->dcr_host)) {
470 printk("Cannot map DCR resources for SERIAL");
471 return -1;
472 }
473 register_console(&nwpserial_console);
474 return 0;
475}
476console_initcall(nwpserial_console_init);
477#endif /* CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE */