Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 3 | * Copyright (C) 2013, Intel Corporation |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; either version 2 of the License, or |
| 8 | * (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/device.h> |
| 19 | #include <linux/ioport.h> |
| 20 | #include <linux/errno.h> |
Sachin Kamat | cbfd6a2 | 2013-04-08 15:49:33 +0530 | [diff] [blame] | 21 | #include <linux/err.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 22 | #include <linux/interrupt.h> |
| 23 | #include <linux/platform_device.h> |
Sebastian Andrzej Siewior | 8348c25 | 2010-11-22 17:12:15 -0800 | [diff] [blame] | 24 | #include <linux/spi/pxa2xx_spi.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 25 | #include <linux/spi/spi.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 26 | #include <linux/delay.h> |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 27 | #include <linux/gpio.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 28 | #include <linux/slab.h> |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 29 | #include <linux/clk.h> |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 30 | #include <linux/pm_runtime.h> |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 31 | #include <linux/acpi.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 32 | |
| 33 | #include <asm/io.h> |
| 34 | #include <asm/irq.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 35 | #include <asm/delay.h> |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 36 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 37 | #include "spi-pxa2xx.h" |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 38 | |
| 39 | MODULE_AUTHOR("Stephen Street"); |
Will Newton | 037cdaf | 2007-12-10 15:49:25 -0800 | [diff] [blame] | 40 | MODULE_DESCRIPTION("PXA2xx SSP SPI Controller"); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 41 | MODULE_LICENSE("GPL"); |
Kay Sievers | 7e38c3c | 2008-04-10 21:29:20 -0700 | [diff] [blame] | 42 | MODULE_ALIAS("platform:pxa2xx-spi"); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 43 | |
Vernon Sauder | f1f640a | 2008-10-15 22:02:43 -0700 | [diff] [blame] | 44 | #define TIMOUT_DFLT 1000 |
| 45 | |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 46 | /* |
| 47 | * for testing SSCR1 changes that require SSP restart, basically |
| 48 | * everything except the service and interrupt enables, the pxa270 developer |
| 49 | * manual says only SSCR1_SCFR, SSCR1_SPH, SSCR1_SPO need to be in this |
| 50 | * list, but the PXA255 dev man says all bits without really meaning the |
| 51 | * service and interrupt enables |
| 52 | */ |
| 53 | #define SSCR1_CHANGE_MASK (SSCR1_TTELP | SSCR1_TTE | SSCR1_SCFR \ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 54 | | SSCR1_ECRA | SSCR1_ECRB | SSCR1_SCLKDIR \ |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 55 | | SSCR1_SFRMDIR | SSCR1_RWOT | SSCR1_TRAIL \ |
| 56 | | SSCR1_IFS | SSCR1_STRF | SSCR1_EFWR \ |
| 57 | | SSCR1_RFT | SSCR1_TFT | SSCR1_MWDS \ |
| 58 | | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 59 | |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 60 | #define QUARK_X1000_SSCR1_CHANGE_MASK (QUARK_X1000_SSCR1_STRF \ |
| 61 | | QUARK_X1000_SSCR1_EFWR \ |
| 62 | | QUARK_X1000_SSCR1_RFT \ |
| 63 | | QUARK_X1000_SSCR1_TFT \ |
| 64 | | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM) |
| 65 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 66 | #define LPSS_RX_THRESH_DFLT 64 |
| 67 | #define LPSS_TX_LOTHRESH_DFLT 160 |
| 68 | #define LPSS_TX_HITHRESH_DFLT 224 |
| 69 | |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 70 | struct quark_spi_rate { |
| 71 | u32 bitrate; |
| 72 | u32 dds_clk_rate; |
| 73 | u32 clk_div; |
| 74 | }; |
| 75 | |
| 76 | /* |
| 77 | * 'rate', 'dds', 'clk_div' lookup table, which is defined in |
| 78 | * the Quark SPI datasheet. |
| 79 | */ |
| 80 | static const struct quark_spi_rate quark_spi_rate_table[] = { |
| 81 | /* bitrate, dds_clk_rate, clk_div */ |
| 82 | {50000000, 0x800000, 0}, |
| 83 | {40000000, 0x666666, 0}, |
| 84 | {25000000, 0x400000, 0}, |
| 85 | {20000000, 0x666666, 1}, |
| 86 | {16667000, 0x800000, 2}, |
| 87 | {13333000, 0x666666, 2}, |
| 88 | {12500000, 0x200000, 0}, |
| 89 | {10000000, 0x800000, 4}, |
| 90 | {8000000, 0x666666, 4}, |
| 91 | {6250000, 0x400000, 3}, |
| 92 | {5000000, 0x400000, 4}, |
| 93 | {4000000, 0x666666, 9}, |
| 94 | {3125000, 0x80000, 0}, |
| 95 | {2500000, 0x400000, 9}, |
| 96 | {2000000, 0x666666, 19}, |
| 97 | {1563000, 0x40000, 0}, |
| 98 | {1250000, 0x200000, 9}, |
| 99 | {1000000, 0x400000, 24}, |
| 100 | {800000, 0x666666, 49}, |
| 101 | {781250, 0x20000, 0}, |
| 102 | {625000, 0x200000, 19}, |
| 103 | {500000, 0x400000, 49}, |
| 104 | {400000, 0x666666, 99}, |
| 105 | {390625, 0x10000, 0}, |
| 106 | {250000, 0x400000, 99}, |
| 107 | {200000, 0x666666, 199}, |
| 108 | {195313, 0x8000, 0}, |
| 109 | {125000, 0x100000, 49}, |
| 110 | {100000, 0x200000, 124}, |
| 111 | {50000, 0x100000, 124}, |
| 112 | {25000, 0x80000, 124}, |
| 113 | {10016, 0x20000, 77}, |
| 114 | {5040, 0x20000, 154}, |
| 115 | {1002, 0x8000, 194}, |
| 116 | }; |
| 117 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 118 | /* Offset from drv_data->lpss_base */ |
Mika Westerberg | 1de7061 | 2013-07-03 13:25:06 +0300 | [diff] [blame] | 119 | #define GENERAL_REG 0x08 |
| 120 | #define GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24) |
Mika Westerberg | 0054e28 | 2013-03-05 12:05:17 +0200 | [diff] [blame] | 121 | #define SSP_REG 0x0c |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 122 | #define SPI_CS_CONTROL 0x18 |
| 123 | #define SPI_CS_CONTROL_SW_MODE BIT(0) |
| 124 | #define SPI_CS_CONTROL_CS_HIGH BIT(1) |
| 125 | |
| 126 | static bool is_lpss_ssp(const struct driver_data *drv_data) |
| 127 | { |
| 128 | return drv_data->ssp_type == LPSS_SSP; |
| 129 | } |
| 130 | |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 131 | static bool is_quark_x1000_ssp(const struct driver_data *drv_data) |
| 132 | { |
| 133 | return drv_data->ssp_type == QUARK_X1000_SSP; |
| 134 | } |
| 135 | |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 136 | static u32 pxa2xx_spi_get_ssrc1_change_mask(const struct driver_data *drv_data) |
| 137 | { |
| 138 | switch (drv_data->ssp_type) { |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 139 | case QUARK_X1000_SSP: |
| 140 | return QUARK_X1000_SSCR1_CHANGE_MASK; |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 141 | default: |
| 142 | return SSCR1_CHANGE_MASK; |
| 143 | } |
| 144 | } |
| 145 | |
| 146 | static u32 |
| 147 | pxa2xx_spi_get_rx_default_thre(const struct driver_data *drv_data) |
| 148 | { |
| 149 | switch (drv_data->ssp_type) { |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 150 | case QUARK_X1000_SSP: |
| 151 | return RX_THRESH_QUARK_X1000_DFLT; |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 152 | default: |
| 153 | return RX_THRESH_DFLT; |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | static bool pxa2xx_spi_txfifo_full(const struct driver_data *drv_data) |
| 158 | { |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 159 | u32 mask; |
| 160 | |
| 161 | switch (drv_data->ssp_type) { |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 162 | case QUARK_X1000_SSP: |
| 163 | mask = QUARK_X1000_SSSR_TFL_MASK; |
| 164 | break; |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 165 | default: |
| 166 | mask = SSSR_TFL_MASK; |
| 167 | break; |
| 168 | } |
| 169 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 170 | return (pxa2xx_spi_read(drv_data, SSSR) & mask) == mask; |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 171 | } |
| 172 | |
| 173 | static void pxa2xx_spi_clear_rx_thre(const struct driver_data *drv_data, |
| 174 | u32 *sccr1_reg) |
| 175 | { |
| 176 | u32 mask; |
| 177 | |
| 178 | switch (drv_data->ssp_type) { |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 179 | case QUARK_X1000_SSP: |
| 180 | mask = QUARK_X1000_SSCR1_RFT; |
| 181 | break; |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 182 | default: |
| 183 | mask = SSCR1_RFT; |
| 184 | break; |
| 185 | } |
| 186 | *sccr1_reg &= ~mask; |
| 187 | } |
| 188 | |
| 189 | static void pxa2xx_spi_set_rx_thre(const struct driver_data *drv_data, |
| 190 | u32 *sccr1_reg, u32 threshold) |
| 191 | { |
| 192 | switch (drv_data->ssp_type) { |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 193 | case QUARK_X1000_SSP: |
| 194 | *sccr1_reg |= QUARK_X1000_SSCR1_RxTresh(threshold); |
| 195 | break; |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 196 | default: |
| 197 | *sccr1_reg |= SSCR1_RxTresh(threshold); |
| 198 | break; |
| 199 | } |
| 200 | } |
| 201 | |
| 202 | static u32 pxa2xx_configure_sscr0(const struct driver_data *drv_data, |
| 203 | u32 clk_div, u8 bits) |
| 204 | { |
| 205 | switch (drv_data->ssp_type) { |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 206 | case QUARK_X1000_SSP: |
| 207 | return clk_div |
| 208 | | QUARK_X1000_SSCR0_Motorola |
| 209 | | QUARK_X1000_SSCR0_DataSize(bits > 32 ? 8 : bits) |
| 210 | | SSCR0_SSE; |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 211 | default: |
| 212 | return clk_div |
| 213 | | SSCR0_Motorola |
| 214 | | SSCR0_DataSize(bits > 16 ? bits - 16 : bits) |
| 215 | | SSCR0_SSE |
| 216 | | (bits > 16 ? SSCR0_EDSS : 0); |
| 217 | } |
| 218 | } |
| 219 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 220 | /* |
| 221 | * Read and write LPSS SSP private registers. Caller must first check that |
| 222 | * is_lpss_ssp() returns true before these can be called. |
| 223 | */ |
| 224 | static u32 __lpss_ssp_read_priv(struct driver_data *drv_data, unsigned offset) |
| 225 | { |
| 226 | WARN_ON(!drv_data->lpss_base); |
| 227 | return readl(drv_data->lpss_base + offset); |
| 228 | } |
| 229 | |
| 230 | static void __lpss_ssp_write_priv(struct driver_data *drv_data, |
| 231 | unsigned offset, u32 value) |
| 232 | { |
| 233 | WARN_ON(!drv_data->lpss_base); |
| 234 | writel(value, drv_data->lpss_base + offset); |
| 235 | } |
| 236 | |
| 237 | /* |
| 238 | * lpss_ssp_setup - perform LPSS SSP specific setup |
| 239 | * @drv_data: pointer to the driver private data |
| 240 | * |
| 241 | * Perform LPSS SSP specific setup. This function must be called first if |
| 242 | * one is going to use LPSS SSP private registers. |
| 243 | */ |
| 244 | static void lpss_ssp_setup(struct driver_data *drv_data) |
| 245 | { |
| 246 | unsigned offset = 0x400; |
| 247 | u32 value, orig; |
| 248 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 249 | /* |
| 250 | * Perform auto-detection of the LPSS SSP private registers. They |
| 251 | * can be either at 1k or 2k offset from the base address. |
| 252 | */ |
| 253 | orig = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL); |
| 254 | |
Chew, Chiau Ee | e61f487 | 2014-06-13 23:57:25 +0800 | [diff] [blame] | 255 | /* Test SPI_CS_CONTROL_SW_MODE bit enabling */ |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 256 | value = orig | SPI_CS_CONTROL_SW_MODE; |
| 257 | writel(value, drv_data->ioaddr + offset + SPI_CS_CONTROL); |
| 258 | value = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL); |
| 259 | if (value != (orig | SPI_CS_CONTROL_SW_MODE)) { |
| 260 | offset = 0x800; |
| 261 | goto detection_done; |
| 262 | } |
| 263 | |
Chew, Chiau Ee | e61f487 | 2014-06-13 23:57:25 +0800 | [diff] [blame] | 264 | orig = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL); |
| 265 | |
| 266 | /* Test SPI_CS_CONTROL_SW_MODE bit disabling */ |
| 267 | value = orig & ~SPI_CS_CONTROL_SW_MODE; |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 268 | writel(value, drv_data->ioaddr + offset + SPI_CS_CONTROL); |
| 269 | value = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL); |
Chew, Chiau Ee | e61f487 | 2014-06-13 23:57:25 +0800 | [diff] [blame] | 270 | if (value != (orig & ~SPI_CS_CONTROL_SW_MODE)) { |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 271 | offset = 0x800; |
| 272 | goto detection_done; |
| 273 | } |
| 274 | |
| 275 | detection_done: |
| 276 | /* Now set the LPSS base */ |
| 277 | drv_data->lpss_base = drv_data->ioaddr + offset; |
| 278 | |
| 279 | /* Enable software chip select control */ |
| 280 | value = SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH; |
| 281 | __lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value); |
Mika Westerberg | 0054e28 | 2013-03-05 12:05:17 +0200 | [diff] [blame] | 282 | |
| 283 | /* Enable multiblock DMA transfers */ |
Mika Westerberg | 1de7061 | 2013-07-03 13:25:06 +0300 | [diff] [blame] | 284 | if (drv_data->master_info->enable_dma) { |
Mika Westerberg | 0054e28 | 2013-03-05 12:05:17 +0200 | [diff] [blame] | 285 | __lpss_ssp_write_priv(drv_data, SSP_REG, 1); |
Mika Westerberg | 1de7061 | 2013-07-03 13:25:06 +0300 | [diff] [blame] | 286 | |
| 287 | value = __lpss_ssp_read_priv(drv_data, GENERAL_REG); |
| 288 | value |= GENERAL_REG_RXTO_HOLDOFF_DISABLE; |
| 289 | __lpss_ssp_write_priv(drv_data, GENERAL_REG, value); |
| 290 | } |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 291 | } |
| 292 | |
| 293 | static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable) |
| 294 | { |
| 295 | u32 value; |
| 296 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 297 | value = __lpss_ssp_read_priv(drv_data, SPI_CS_CONTROL); |
| 298 | if (enable) |
| 299 | value &= ~SPI_CS_CONTROL_CS_HIGH; |
| 300 | else |
| 301 | value |= SPI_CS_CONTROL_CS_HIGH; |
| 302 | __lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value); |
| 303 | } |
| 304 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 305 | static void cs_assert(struct driver_data *drv_data) |
| 306 | { |
| 307 | struct chip_data *chip = drv_data->cur_chip; |
| 308 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 309 | if (drv_data->ssp_type == CE4100_SSP) { |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 310 | pxa2xx_spi_write(drv_data, SSSR, drv_data->cur_chip->frm); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 311 | return; |
| 312 | } |
| 313 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 314 | if (chip->cs_control) { |
| 315 | chip->cs_control(PXA2XX_CS_ASSERT); |
| 316 | return; |
| 317 | } |
| 318 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 319 | if (gpio_is_valid(chip->gpio_cs)) { |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 320 | gpio_set_value(chip->gpio_cs, chip->gpio_cs_inverted); |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 321 | return; |
| 322 | } |
| 323 | |
Jarkko Nikula | 7566bcc | 2014-12-18 15:04:20 +0200 | [diff] [blame] | 324 | if (is_lpss_ssp(drv_data)) |
| 325 | lpss_ssp_cs_control(drv_data, true); |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 326 | } |
| 327 | |
| 328 | static void cs_deassert(struct driver_data *drv_data) |
| 329 | { |
| 330 | struct chip_data *chip = drv_data->cur_chip; |
| 331 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 332 | if (drv_data->ssp_type == CE4100_SSP) |
| 333 | return; |
| 334 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 335 | if (chip->cs_control) { |
Daniel Ribeiro | 2b2562d | 2009-04-08 22:48:03 -0300 | [diff] [blame] | 336 | chip->cs_control(PXA2XX_CS_DEASSERT); |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 337 | return; |
| 338 | } |
| 339 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 340 | if (gpio_is_valid(chip->gpio_cs)) { |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 341 | gpio_set_value(chip->gpio_cs, !chip->gpio_cs_inverted); |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 342 | return; |
| 343 | } |
| 344 | |
Jarkko Nikula | 7566bcc | 2014-12-18 15:04:20 +0200 | [diff] [blame] | 345 | if (is_lpss_ssp(drv_data)) |
| 346 | lpss_ssp_cs_control(drv_data, false); |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 347 | } |
| 348 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 349 | int pxa2xx_spi_flush(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 350 | { |
| 351 | unsigned long limit = loops_per_jiffy << 1; |
| 352 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 353 | do { |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 354 | while (pxa2xx_spi_read(drv_data, SSSR) & SSSR_RNE) |
| 355 | pxa2xx_spi_read(drv_data, SSDR); |
| 356 | } while ((pxa2xx_spi_read(drv_data, SSSR) & SSSR_BSY) && --limit); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 357 | write_SSSR_CS(drv_data, SSSR_ROR); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 358 | |
| 359 | return limit; |
| 360 | } |
| 361 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 362 | static int null_writer(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 363 | { |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 364 | u8 n_bytes = drv_data->n_bytes; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 365 | |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 366 | if (pxa2xx_spi_txfifo_full(drv_data) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 367 | || (drv_data->tx == drv_data->tx_end)) |
| 368 | return 0; |
| 369 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 370 | pxa2xx_spi_write(drv_data, SSDR, 0); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 371 | drv_data->tx += n_bytes; |
| 372 | |
| 373 | return 1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 374 | } |
| 375 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 376 | static int null_reader(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 377 | { |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 378 | u8 n_bytes = drv_data->n_bytes; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 379 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 380 | while ((pxa2xx_spi_read(drv_data, SSSR) & SSSR_RNE) |
| 381 | && (drv_data->rx < drv_data->rx_end)) { |
| 382 | pxa2xx_spi_read(drv_data, SSDR); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 383 | drv_data->rx += n_bytes; |
| 384 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 385 | |
| 386 | return drv_data->rx == drv_data->rx_end; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 387 | } |
| 388 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 389 | static int u8_writer(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 390 | { |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 391 | if (pxa2xx_spi_txfifo_full(drv_data) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 392 | || (drv_data->tx == drv_data->tx_end)) |
| 393 | return 0; |
| 394 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 395 | pxa2xx_spi_write(drv_data, SSDR, *(u8 *)(drv_data->tx)); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 396 | ++drv_data->tx; |
| 397 | |
| 398 | return 1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 399 | } |
| 400 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 401 | static int u8_reader(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 402 | { |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 403 | while ((pxa2xx_spi_read(drv_data, SSSR) & SSSR_RNE) |
| 404 | && (drv_data->rx < drv_data->rx_end)) { |
| 405 | *(u8 *)(drv_data->rx) = pxa2xx_spi_read(drv_data, SSDR); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 406 | ++drv_data->rx; |
| 407 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 408 | |
| 409 | return drv_data->rx == drv_data->rx_end; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 410 | } |
| 411 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 412 | static int u16_writer(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 413 | { |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 414 | if (pxa2xx_spi_txfifo_full(drv_data) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 415 | || (drv_data->tx == drv_data->tx_end)) |
| 416 | return 0; |
| 417 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 418 | pxa2xx_spi_write(drv_data, SSDR, *(u16 *)(drv_data->tx)); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 419 | drv_data->tx += 2; |
| 420 | |
| 421 | return 1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 422 | } |
| 423 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 424 | static int u16_reader(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 425 | { |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 426 | while ((pxa2xx_spi_read(drv_data, SSSR) & SSSR_RNE) |
| 427 | && (drv_data->rx < drv_data->rx_end)) { |
| 428 | *(u16 *)(drv_data->rx) = pxa2xx_spi_read(drv_data, SSDR); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 429 | drv_data->rx += 2; |
| 430 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 431 | |
| 432 | return drv_data->rx == drv_data->rx_end; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 433 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 434 | |
| 435 | static int u32_writer(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 436 | { |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 437 | if (pxa2xx_spi_txfifo_full(drv_data) |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 438 | || (drv_data->tx == drv_data->tx_end)) |
| 439 | return 0; |
| 440 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 441 | pxa2xx_spi_write(drv_data, SSDR, *(u32 *)(drv_data->tx)); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 442 | drv_data->tx += 4; |
| 443 | |
| 444 | return 1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 445 | } |
| 446 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 447 | static int u32_reader(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 448 | { |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 449 | while ((pxa2xx_spi_read(drv_data, SSSR) & SSSR_RNE) |
| 450 | && (drv_data->rx < drv_data->rx_end)) { |
| 451 | *(u32 *)(drv_data->rx) = pxa2xx_spi_read(drv_data, SSDR); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 452 | drv_data->rx += 4; |
| 453 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 454 | |
| 455 | return drv_data->rx == drv_data->rx_end; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 456 | } |
| 457 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 458 | void *pxa2xx_spi_next_transfer(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 459 | { |
| 460 | struct spi_message *msg = drv_data->cur_msg; |
| 461 | struct spi_transfer *trans = drv_data->cur_transfer; |
| 462 | |
| 463 | /* Move to next transfer */ |
| 464 | if (trans->transfer_list.next != &msg->transfers) { |
| 465 | drv_data->cur_transfer = |
| 466 | list_entry(trans->transfer_list.next, |
| 467 | struct spi_transfer, |
| 468 | transfer_list); |
| 469 | return RUNNING_STATE; |
| 470 | } else |
| 471 | return DONE_STATE; |
| 472 | } |
| 473 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 474 | /* caller already set message->status; dma and pio irqs are blocked */ |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 475 | static void giveback(struct driver_data *drv_data) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 476 | { |
| 477 | struct spi_transfer* last_transfer; |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 478 | struct spi_message *msg; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 479 | |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 480 | msg = drv_data->cur_msg; |
| 481 | drv_data->cur_msg = NULL; |
| 482 | drv_data->cur_transfer = NULL; |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 483 | |
Axel Lin | 23e2c2a | 2014-02-12 22:13:27 +0800 | [diff] [blame] | 484 | last_transfer = list_last_entry(&msg->transfers, struct spi_transfer, |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 485 | transfer_list); |
| 486 | |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 487 | /* Delay if requested before any change in chip select */ |
| 488 | if (last_transfer->delay_usecs) |
| 489 | udelay(last_transfer->delay_usecs); |
| 490 | |
| 491 | /* Drop chip select UNLESS cs_change is true or we are returning |
| 492 | * a message with an error, or next message is for another chip |
| 493 | */ |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 494 | if (!last_transfer->cs_change) |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 495 | cs_deassert(drv_data); |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 496 | else { |
| 497 | struct spi_message *next_msg; |
| 498 | |
| 499 | /* Holding of cs was hinted, but we need to make sure |
| 500 | * the next message is for the same chip. Don't waste |
| 501 | * time with the following tests unless this was hinted. |
| 502 | * |
| 503 | * We cannot postpone this until pump_messages, because |
| 504 | * after calling msg->complete (below) the driver that |
| 505 | * sent the current message could be unloaded, which |
| 506 | * could invalidate the cs_control() callback... |
| 507 | */ |
| 508 | |
| 509 | /* get a pointer to the next message, if any */ |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 510 | next_msg = spi_get_next_queued_message(drv_data->master); |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 511 | |
| 512 | /* see if the next and current messages point |
| 513 | * to the same chip |
| 514 | */ |
| 515 | if (next_msg && next_msg->spi != msg->spi) |
| 516 | next_msg = NULL; |
| 517 | if (!next_msg || msg->state == ERROR_STATE) |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 518 | cs_deassert(drv_data); |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 519 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 520 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 521 | drv_data->cur_chip = NULL; |
Mika Westerberg | c957e8f | 2014-12-29 10:33:36 +0200 | [diff] [blame] | 522 | spi_finalize_current_message(drv_data->master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 523 | } |
| 524 | |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 525 | static void reset_sccr1(struct driver_data *drv_data) |
| 526 | { |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 527 | struct chip_data *chip = drv_data->cur_chip; |
| 528 | u32 sccr1_reg; |
| 529 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 530 | sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1; |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 531 | sccr1_reg &= ~SSCR1_RFT; |
| 532 | sccr1_reg |= chip->threshold; |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 533 | pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg); |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 534 | } |
| 535 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 536 | static void int_error_stop(struct driver_data *drv_data, const char* msg) |
| 537 | { |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 538 | /* Stop and reset SSP */ |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 539 | write_SSSR_CS(drv_data, drv_data->clear_sr); |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 540 | reset_sccr1(drv_data); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 541 | if (!pxa25x_ssp_comp(drv_data)) |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 542 | pxa2xx_spi_write(drv_data, SSTO, 0); |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 543 | pxa2xx_spi_flush(drv_data); |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 544 | pxa2xx_spi_write(drv_data, SSCR0, |
| 545 | pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 546 | |
| 547 | dev_err(&drv_data->pdev->dev, "%s\n", msg); |
| 548 | |
| 549 | drv_data->cur_msg->state = ERROR_STATE; |
| 550 | tasklet_schedule(&drv_data->pump_transfers); |
| 551 | } |
| 552 | |
| 553 | static void int_transfer_complete(struct driver_data *drv_data) |
| 554 | { |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 555 | /* Stop SSP */ |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 556 | write_SSSR_CS(drv_data, drv_data->clear_sr); |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 557 | reset_sccr1(drv_data); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 558 | if (!pxa25x_ssp_comp(drv_data)) |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 559 | pxa2xx_spi_write(drv_data, SSTO, 0); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 560 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 561 | /* Update total byte transferred return count actual bytes read */ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 562 | drv_data->cur_msg->actual_length += drv_data->len - |
| 563 | (drv_data->rx_end - drv_data->rx); |
| 564 | |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 565 | /* Transfer delays and chip select release are |
| 566 | * handled in pump_transfers or giveback |
| 567 | */ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 568 | |
| 569 | /* Move to next transfer */ |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 570 | drv_data->cur_msg->state = pxa2xx_spi_next_transfer(drv_data); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 571 | |
| 572 | /* Schedule transfer tasklet */ |
| 573 | tasklet_schedule(&drv_data->pump_transfers); |
| 574 | } |
| 575 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 576 | static irqreturn_t interrupt_transfer(struct driver_data *drv_data) |
| 577 | { |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 578 | u32 irq_mask = (pxa2xx_spi_read(drv_data, SSCR1) & SSCR1_TIE) ? |
| 579 | drv_data->mask_sr : drv_data->mask_sr & ~SSSR_TFS; |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 580 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 581 | u32 irq_status = pxa2xx_spi_read(drv_data, SSSR) & irq_mask; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 582 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 583 | if (irq_status & SSSR_ROR) { |
| 584 | int_error_stop(drv_data, "interrupt_transfer: fifo overrun"); |
| 585 | return IRQ_HANDLED; |
| 586 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 587 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 588 | if (irq_status & SSSR_TINT) { |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 589 | pxa2xx_spi_write(drv_data, SSSR, SSSR_TINT); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 590 | if (drv_data->read(drv_data)) { |
| 591 | int_transfer_complete(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 592 | return IRQ_HANDLED; |
| 593 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 594 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 595 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 596 | /* Drain rx fifo, Fill tx fifo and prevent overruns */ |
| 597 | do { |
| 598 | if (drv_data->read(drv_data)) { |
| 599 | int_transfer_complete(drv_data); |
| 600 | return IRQ_HANDLED; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 601 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 602 | } while (drv_data->write(drv_data)); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 603 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 604 | if (drv_data->read(drv_data)) { |
| 605 | int_transfer_complete(drv_data); |
| 606 | return IRQ_HANDLED; |
| 607 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 608 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 609 | if (drv_data->tx == drv_data->tx_end) { |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 610 | u32 bytes_left; |
| 611 | u32 sccr1_reg; |
| 612 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 613 | sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1); |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 614 | sccr1_reg &= ~SSCR1_TIE; |
| 615 | |
| 616 | /* |
| 617 | * PXA25x_SSP has no timeout, set up rx threshould for the |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 618 | * remaining RX bytes. |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 619 | */ |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 620 | if (pxa25x_ssp_comp(drv_data)) { |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 621 | u32 rx_thre; |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 622 | |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 623 | pxa2xx_spi_clear_rx_thre(drv_data, &sccr1_reg); |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 624 | |
| 625 | bytes_left = drv_data->rx_end - drv_data->rx; |
| 626 | switch (drv_data->n_bytes) { |
| 627 | case 4: |
| 628 | bytes_left >>= 1; |
| 629 | case 2: |
| 630 | bytes_left >>= 1; |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 631 | } |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 632 | |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 633 | rx_thre = pxa2xx_spi_get_rx_default_thre(drv_data); |
| 634 | if (rx_thre > bytes_left) |
| 635 | rx_thre = bytes_left; |
Sebastian Andrzej Siewior | 579d3bb | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 636 | |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 637 | pxa2xx_spi_set_rx_thre(drv_data, &sccr1_reg, rx_thre); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 638 | } |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 639 | pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 640 | } |
| 641 | |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 642 | /* We did something */ |
| 643 | return IRQ_HANDLED; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 644 | } |
| 645 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 646 | static irqreturn_t ssp_int(int irq, void *dev_id) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 647 | { |
Jeff Garzik | c7bec5a | 2006-10-06 15:00:58 -0400 | [diff] [blame] | 648 | struct driver_data *drv_data = dev_id; |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 649 | u32 sccr1_reg; |
Sebastian Andrzej Siewior | 49cbb1e | 2010-11-22 17:12:14 -0800 | [diff] [blame] | 650 | u32 mask = drv_data->mask_sr; |
| 651 | u32 status; |
| 652 | |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 653 | /* |
| 654 | * The IRQ might be shared with other peripherals so we must first |
| 655 | * check that are we RPM suspended or not. If we are we assume that |
| 656 | * the IRQ was not for us (we shouldn't be RPM suspended when the |
| 657 | * interrupt is enabled). |
| 658 | */ |
| 659 | if (pm_runtime_suspended(&drv_data->pdev->dev)) |
| 660 | return IRQ_NONE; |
| 661 | |
Mika Westerberg | 269e4a4 | 2013-09-04 13:37:43 +0300 | [diff] [blame] | 662 | /* |
| 663 | * If the device is not yet in RPM suspended state and we get an |
| 664 | * interrupt that is meant for another device, check if status bits |
| 665 | * are all set to one. That means that the device is already |
| 666 | * powered off. |
| 667 | */ |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 668 | status = pxa2xx_spi_read(drv_data, SSSR); |
Mika Westerberg | 269e4a4 | 2013-09-04 13:37:43 +0300 | [diff] [blame] | 669 | if (status == ~0) |
| 670 | return IRQ_NONE; |
| 671 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 672 | sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1); |
Sebastian Andrzej Siewior | 49cbb1e | 2010-11-22 17:12:14 -0800 | [diff] [blame] | 673 | |
| 674 | /* Ignore possible writes if we don't need to write */ |
| 675 | if (!(sccr1_reg & SSCR1_TIE)) |
| 676 | mask &= ~SSSR_TFS; |
| 677 | |
| 678 | if (!(status & mask)) |
| 679 | return IRQ_NONE; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 680 | |
| 681 | if (!drv_data->cur_msg) { |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 682 | |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 683 | pxa2xx_spi_write(drv_data, SSCR0, |
| 684 | pxa2xx_spi_read(drv_data, SSCR0) |
| 685 | & ~SSCR0_SSE); |
| 686 | pxa2xx_spi_write(drv_data, SSCR1, |
| 687 | pxa2xx_spi_read(drv_data, SSCR1) |
| 688 | & ~drv_data->int_cr1); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 689 | if (!pxa25x_ssp_comp(drv_data)) |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 690 | pxa2xx_spi_write(drv_data, SSTO, 0); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 691 | write_SSSR_CS(drv_data, drv_data->clear_sr); |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 692 | |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 693 | dev_err(&drv_data->pdev->dev, |
| 694 | "bad message state in interrupt handler\n"); |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 695 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 696 | /* Never fail */ |
| 697 | return IRQ_HANDLED; |
| 698 | } |
| 699 | |
| 700 | return drv_data->transfer_handler(drv_data); |
| 701 | } |
| 702 | |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 703 | /* |
| 704 | * The Quark SPI data sheet gives a table, and for the given 'rate', |
| 705 | * the 'dds' and 'clk_div' can be found in the table. |
| 706 | */ |
| 707 | static u32 quark_x1000_set_clk_regvals(u32 rate, u32 *dds, u32 *clk_div) |
| 708 | { |
| 709 | unsigned int i; |
| 710 | |
| 711 | for (i = 0; i < ARRAY_SIZE(quark_spi_rate_table); i++) { |
| 712 | if (rate >= quark_spi_rate_table[i].bitrate) { |
| 713 | *dds = quark_spi_rate_table[i].dds_clk_rate; |
| 714 | *clk_div = quark_spi_rate_table[i].clk_div; |
| 715 | return quark_spi_rate_table[i].bitrate; |
| 716 | } |
| 717 | } |
| 718 | |
| 719 | *dds = quark_spi_rate_table[i-1].dds_clk_rate; |
| 720 | *clk_div = quark_spi_rate_table[i-1].clk_div; |
| 721 | |
| 722 | return quark_spi_rate_table[i-1].bitrate; |
| 723 | } |
| 724 | |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 725 | static unsigned int ssp_get_clk_div(struct driver_data *drv_data, int rate) |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 726 | { |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 727 | unsigned long ssp_clk = drv_data->max_clk_rate; |
| 728 | const struct ssp_device *ssp = drv_data->ssp; |
| 729 | |
| 730 | rate = min_t(int, ssp_clk, rate); |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 731 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 732 | if (ssp->type == PXA25x_SSP || ssp->type == CE4100_SSP) |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 733 | return ((ssp_clk / (2 * rate) - 1) & 0xff) << 8; |
| 734 | else |
| 735 | return ((ssp_clk / rate - 1) & 0xfff) << 8; |
| 736 | } |
| 737 | |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 738 | static unsigned int pxa2xx_ssp_get_clk_div(struct driver_data *drv_data, |
| 739 | struct chip_data *chip, int rate) |
| 740 | { |
| 741 | u32 clk_div; |
| 742 | |
| 743 | switch (drv_data->ssp_type) { |
| 744 | case QUARK_X1000_SSP: |
| 745 | quark_x1000_set_clk_regvals(rate, &chip->dds_rate, &clk_div); |
| 746 | return clk_div << 8; |
| 747 | default: |
| 748 | return ssp_get_clk_div(drv_data, rate); |
| 749 | } |
| 750 | } |
| 751 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 752 | static void pump_transfers(unsigned long data) |
| 753 | { |
| 754 | struct driver_data *drv_data = (struct driver_data *)data; |
| 755 | struct spi_message *message = NULL; |
| 756 | struct spi_transfer *transfer = NULL; |
| 757 | struct spi_transfer *previous = NULL; |
| 758 | struct chip_data *chip = NULL; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 759 | u32 clk_div = 0; |
| 760 | u8 bits = 0; |
| 761 | u32 speed = 0; |
| 762 | u32 cr0; |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 763 | u32 cr1; |
| 764 | u32 dma_thresh = drv_data->cur_chip->dma_threshold; |
| 765 | u32 dma_burst = drv_data->cur_chip->dma_burst_size; |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 766 | u32 change_mask = pxa2xx_spi_get_ssrc1_change_mask(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 767 | |
| 768 | /* Get current state information */ |
| 769 | message = drv_data->cur_msg; |
| 770 | transfer = drv_data->cur_transfer; |
| 771 | chip = drv_data->cur_chip; |
| 772 | |
| 773 | /* Handle for abort */ |
| 774 | if (message->state == ERROR_STATE) { |
| 775 | message->status = -EIO; |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 776 | giveback(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 777 | return; |
| 778 | } |
| 779 | |
| 780 | /* Handle end of message */ |
| 781 | if (message->state == DONE_STATE) { |
| 782 | message->status = 0; |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 783 | giveback(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 784 | return; |
| 785 | } |
| 786 | |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 787 | /* Delay if requested at end of transfer before CS change */ |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 788 | if (message->state == RUNNING_STATE) { |
| 789 | previous = list_entry(transfer->transfer_list.prev, |
| 790 | struct spi_transfer, |
| 791 | transfer_list); |
| 792 | if (previous->delay_usecs) |
| 793 | udelay(previous->delay_usecs); |
Ned Forrester | 8423597 | 2008-09-13 02:33:17 -0700 | [diff] [blame] | 794 | |
| 795 | /* Drop chip select only if cs_change is requested */ |
| 796 | if (previous->cs_change) |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 797 | cs_deassert(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 798 | } |
| 799 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 800 | /* Check if we can DMA this transfer */ |
| 801 | if (!pxa2xx_spi_dma_is_possible(transfer->len) && chip->enable_dma) { |
Ned Forrester | 7e96445 | 2008-09-13 02:33:18 -0700 | [diff] [blame] | 802 | |
| 803 | /* reject already-mapped transfers; PIO won't always work */ |
| 804 | if (message->is_dma_mapped |
| 805 | || transfer->rx_dma || transfer->tx_dma) { |
| 806 | dev_err(&drv_data->pdev->dev, |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 807 | "pump_transfers: mapped transfer length of " |
| 808 | "%u is greater than %d\n", |
Ned Forrester | 7e96445 | 2008-09-13 02:33:18 -0700 | [diff] [blame] | 809 | transfer->len, MAX_DMA_LEN); |
| 810 | message->status = -EINVAL; |
| 811 | giveback(drv_data); |
| 812 | return; |
| 813 | } |
| 814 | |
| 815 | /* warn ... we force this to PIO mode */ |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 816 | dev_warn_ratelimited(&message->spi->dev, |
| 817 | "pump_transfers: DMA disabled for transfer length %ld " |
| 818 | "greater than %d\n", |
| 819 | (long)drv_data->len, MAX_DMA_LEN); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 820 | } |
| 821 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 822 | /* Setup the transfer state based on the type of transfer */ |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 823 | if (pxa2xx_spi_flush(drv_data) == 0) { |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 824 | dev_err(&drv_data->pdev->dev, "pump_transfers: flush failed\n"); |
| 825 | message->status = -EIO; |
Stephen Street | 5daa3ba | 2006-05-20 15:00:19 -0700 | [diff] [blame] | 826 | giveback(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 827 | return; |
| 828 | } |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 829 | drv_data->n_bytes = chip->n_bytes; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 830 | drv_data->tx = (void *)transfer->tx_buf; |
| 831 | drv_data->tx_end = drv_data->tx + transfer->len; |
| 832 | drv_data->rx = transfer->rx_buf; |
| 833 | drv_data->rx_end = drv_data->rx + transfer->len; |
| 834 | drv_data->rx_dma = transfer->rx_dma; |
| 835 | drv_data->tx_dma = transfer->tx_dma; |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 836 | drv_data->len = transfer->len; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 837 | drv_data->write = drv_data->tx ? chip->write : null_writer; |
| 838 | drv_data->read = drv_data->rx ? chip->read : null_reader; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 839 | |
| 840 | /* Change speed and bit per word on a per transfer */ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 841 | cr0 = chip->cr0; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 842 | if (transfer->speed_hz || transfer->bits_per_word) { |
| 843 | |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 844 | bits = chip->bits_per_word; |
| 845 | speed = chip->speed_hz; |
| 846 | |
| 847 | if (transfer->speed_hz) |
| 848 | speed = transfer->speed_hz; |
| 849 | |
| 850 | if (transfer->bits_per_word) |
| 851 | bits = transfer->bits_per_word; |
| 852 | |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 853 | clk_div = pxa2xx_ssp_get_clk_div(drv_data, chip, speed); |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 854 | |
| 855 | if (bits <= 8) { |
| 856 | drv_data->n_bytes = 1; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 857 | drv_data->read = drv_data->read != null_reader ? |
| 858 | u8_reader : null_reader; |
| 859 | drv_data->write = drv_data->write != null_writer ? |
| 860 | u8_writer : null_writer; |
| 861 | } else if (bits <= 16) { |
| 862 | drv_data->n_bytes = 2; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 863 | drv_data->read = drv_data->read != null_reader ? |
| 864 | u16_reader : null_reader; |
| 865 | drv_data->write = drv_data->write != null_writer ? |
| 866 | u16_writer : null_writer; |
| 867 | } else if (bits <= 32) { |
| 868 | drv_data->n_bytes = 4; |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 869 | drv_data->read = drv_data->read != null_reader ? |
| 870 | u32_reader : null_reader; |
| 871 | drv_data->write = drv_data->write != null_writer ? |
| 872 | u32_writer : null_writer; |
| 873 | } |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 874 | /* if bits/word is changed in dma mode, then must check the |
| 875 | * thresholds and burst also */ |
| 876 | if (chip->enable_dma) { |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 877 | if (pxa2xx_spi_set_dma_burst_and_threshold(chip, |
| 878 | message->spi, |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 879 | bits, &dma_burst, |
| 880 | &dma_thresh)) |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 881 | dev_warn_ratelimited(&message->spi->dev, |
| 882 | "pump_transfers: DMA burst size reduced to match bits_per_word\n"); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 883 | } |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 884 | |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 885 | cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, bits); |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 886 | } |
| 887 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 888 | message->state = RUNNING_STATE; |
| 889 | |
Ned Forrester | 7e96445 | 2008-09-13 02:33:18 -0700 | [diff] [blame] | 890 | drv_data->dma_mapped = 0; |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 891 | if (pxa2xx_spi_dma_is_possible(drv_data->len)) |
| 892 | drv_data->dma_mapped = pxa2xx_spi_map_dma_buffers(drv_data); |
Ned Forrester | 7e96445 | 2008-09-13 02:33:18 -0700 | [diff] [blame] | 893 | if (drv_data->dma_mapped) { |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 894 | |
| 895 | /* Ensure we have the correct interrupt handler */ |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 896 | drv_data->transfer_handler = pxa2xx_spi_dma_transfer; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 897 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 898 | pxa2xx_spi_dma_prepare(drv_data, dma_burst); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 899 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 900 | /* Clear status and start DMA engine */ |
| 901 | cr1 = chip->cr1 | dma_thresh | drv_data->dma_cr1; |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 902 | pxa2xx_spi_write(drv_data, SSSR, drv_data->clear_sr); |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 903 | |
| 904 | pxa2xx_spi_dma_start(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 905 | } else { |
| 906 | /* Ensure we have the correct interrupt handler */ |
| 907 | drv_data->transfer_handler = interrupt_transfer; |
| 908 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 909 | /* Clear status */ |
| 910 | cr1 = chip->cr1 | chip->threshold | drv_data->int_cr1; |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 911 | write_SSSR_CS(drv_data, drv_data->clear_sr); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 912 | } |
| 913 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 914 | if (is_lpss_ssp(drv_data)) { |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 915 | if ((pxa2xx_spi_read(drv_data, SSIRF) & 0xff) |
| 916 | != chip->lpss_rx_threshold) |
| 917 | pxa2xx_spi_write(drv_data, SSIRF, |
| 918 | chip->lpss_rx_threshold); |
| 919 | if ((pxa2xx_spi_read(drv_data, SSITF) & 0xffff) |
| 920 | != chip->lpss_tx_threshold) |
| 921 | pxa2xx_spi_write(drv_data, SSITF, |
| 922 | chip->lpss_tx_threshold); |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 923 | } |
| 924 | |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 925 | if (is_quark_x1000_ssp(drv_data) && |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 926 | (pxa2xx_spi_read(drv_data, DDS_RATE) != chip->dds_rate)) |
| 927 | pxa2xx_spi_write(drv_data, DDS_RATE, chip->dds_rate); |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 928 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 929 | /* see if we need to reload the config registers */ |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 930 | if ((pxa2xx_spi_read(drv_data, SSCR0) != cr0) |
| 931 | || (pxa2xx_spi_read(drv_data, SSCR1) & change_mask) |
| 932 | != (cr1 & change_mask)) { |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 933 | /* stop the SSP, and update the other bits */ |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 934 | pxa2xx_spi_write(drv_data, SSCR0, cr0 & ~SSCR0_SSE); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 935 | if (!pxa25x_ssp_comp(drv_data)) |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 936 | pxa2xx_spi_write(drv_data, SSTO, chip->timeout); |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 937 | /* first set CR1 without interrupt and service enables */ |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 938 | pxa2xx_spi_write(drv_data, SSCR1, cr1 & change_mask); |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 939 | /* restart the SSP */ |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 940 | pxa2xx_spi_write(drv_data, SSCR0, cr0); |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 941 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 942 | } else { |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 943 | if (!pxa25x_ssp_comp(drv_data)) |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 944 | pxa2xx_spi_write(drv_data, SSTO, chip->timeout); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 945 | } |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 946 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 947 | cs_assert(drv_data); |
Ned Forrester | b97c74b | 2008-02-23 15:23:40 -0800 | [diff] [blame] | 948 | |
| 949 | /* after chip select, release the data by enabling service |
| 950 | * requests and interrupts, without changing any mode bits */ |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 951 | pxa2xx_spi_write(drv_data, SSCR1, cr1); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 952 | } |
| 953 | |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 954 | static int pxa2xx_spi_transfer_one_message(struct spi_master *master, |
| 955 | struct spi_message *msg) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 956 | { |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 957 | struct driver_data *drv_data = spi_master_get_devdata(master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 958 | |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 959 | drv_data->cur_msg = msg; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 960 | /* Initial message state*/ |
| 961 | drv_data->cur_msg->state = START_STATE; |
| 962 | drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next, |
| 963 | struct spi_transfer, |
| 964 | transfer_list); |
| 965 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 966 | /* prepare to setup the SSP, in pump_transfers, using the per |
| 967 | * chip configuration */ |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 968 | drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 969 | |
| 970 | /* Mark as busy and launch transfers */ |
| 971 | tasklet_schedule(&drv_data->pump_transfers); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 972 | return 0; |
| 973 | } |
| 974 | |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 975 | static int pxa2xx_spi_unprepare_transfer(struct spi_master *master) |
| 976 | { |
| 977 | struct driver_data *drv_data = spi_master_get_devdata(master); |
| 978 | |
| 979 | /* Disable the SSP now */ |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 980 | pxa2xx_spi_write(drv_data, SSCR0, |
| 981 | pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE); |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 982 | |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 983 | return 0; |
| 984 | } |
| 985 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 986 | static int setup_cs(struct spi_device *spi, struct chip_data *chip, |
| 987 | struct pxa2xx_spi_chip *chip_info) |
| 988 | { |
| 989 | int err = 0; |
| 990 | |
| 991 | if (chip == NULL || chip_info == NULL) |
| 992 | return 0; |
| 993 | |
| 994 | /* NOTE: setup() can be called multiple times, possibly with |
| 995 | * different chip_info, release previously requested GPIO |
| 996 | */ |
| 997 | if (gpio_is_valid(chip->gpio_cs)) |
| 998 | gpio_free(chip->gpio_cs); |
| 999 | |
| 1000 | /* If (*cs_control) is provided, ignore GPIO chip select */ |
| 1001 | if (chip_info->cs_control) { |
| 1002 | chip->cs_control = chip_info->cs_control; |
| 1003 | return 0; |
| 1004 | } |
| 1005 | |
| 1006 | if (gpio_is_valid(chip_info->gpio_cs)) { |
| 1007 | err = gpio_request(chip_info->gpio_cs, "SPI_CS"); |
| 1008 | if (err) { |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 1009 | dev_err(&spi->dev, "failed to request chip select GPIO%d\n", |
| 1010 | chip_info->gpio_cs); |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 1011 | return err; |
| 1012 | } |
| 1013 | |
| 1014 | chip->gpio_cs = chip_info->gpio_cs; |
| 1015 | chip->gpio_cs_inverted = spi->mode & SPI_CS_HIGH; |
| 1016 | |
| 1017 | err = gpio_direction_output(chip->gpio_cs, |
| 1018 | !chip->gpio_cs_inverted); |
| 1019 | } |
| 1020 | |
| 1021 | return err; |
| 1022 | } |
| 1023 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1024 | static int setup(struct spi_device *spi) |
| 1025 | { |
| 1026 | struct pxa2xx_spi_chip *chip_info = NULL; |
| 1027 | struct chip_data *chip; |
| 1028 | struct driver_data *drv_data = spi_master_get_devdata(spi->master); |
| 1029 | unsigned int clk_div; |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 1030 | uint tx_thres, tx_hi_thres, rx_thres; |
| 1031 | |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1032 | switch (drv_data->ssp_type) { |
| 1033 | case QUARK_X1000_SSP: |
| 1034 | tx_thres = TX_THRESH_QUARK_X1000_DFLT; |
| 1035 | tx_hi_thres = 0; |
| 1036 | rx_thres = RX_THRESH_QUARK_X1000_DFLT; |
| 1037 | break; |
| 1038 | case LPSS_SSP: |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 1039 | tx_thres = LPSS_TX_LOTHRESH_DFLT; |
| 1040 | tx_hi_thres = LPSS_TX_HITHRESH_DFLT; |
| 1041 | rx_thres = LPSS_RX_THRESH_DFLT; |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1042 | break; |
| 1043 | default: |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 1044 | tx_thres = TX_THRESH_DFLT; |
| 1045 | tx_hi_thres = 0; |
| 1046 | rx_thres = RX_THRESH_DFLT; |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1047 | break; |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 1048 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1049 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 1050 | /* Only alloc on first setup */ |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1051 | chip = spi_get_ctldata(spi); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 1052 | if (!chip) { |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1053 | chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL); |
Jingoo Han | 9deae45 | 2014-04-29 17:19:38 +0900 | [diff] [blame] | 1054 | if (!chip) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1055 | return -ENOMEM; |
| 1056 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1057 | if (drv_data->ssp_type == CE4100_SSP) { |
| 1058 | if (spi->chip_select > 4) { |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 1059 | dev_err(&spi->dev, |
| 1060 | "failed setup: cs number must not be > 4.\n"); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1061 | kfree(chip); |
| 1062 | return -EINVAL; |
| 1063 | } |
| 1064 | |
| 1065 | chip->frm = spi->chip_select; |
| 1066 | } else |
| 1067 | chip->gpio_cs = -1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1068 | chip->enable_dma = 0; |
Vernon Sauder | f1f640a | 2008-10-15 22:02:43 -0700 | [diff] [blame] | 1069 | chip->timeout = TIMOUT_DFLT; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1070 | } |
| 1071 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 1072 | /* protocol drivers may change the chip settings, so... |
| 1073 | * if chip_info exists, use it */ |
| 1074 | chip_info = spi->controller_data; |
| 1075 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1076 | /* chip_info isn't always needed */ |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 1077 | chip->cr1 = 0; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1078 | if (chip_info) { |
Vernon Sauder | f1f640a | 2008-10-15 22:02:43 -0700 | [diff] [blame] | 1079 | if (chip_info->timeout) |
| 1080 | chip->timeout = chip_info->timeout; |
| 1081 | if (chip_info->tx_threshold) |
| 1082 | tx_thres = chip_info->tx_threshold; |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 1083 | if (chip_info->tx_hi_threshold) |
| 1084 | tx_hi_thres = chip_info->tx_hi_threshold; |
Vernon Sauder | f1f640a | 2008-10-15 22:02:43 -0700 | [diff] [blame] | 1085 | if (chip_info->rx_threshold) |
| 1086 | rx_thres = chip_info->rx_threshold; |
| 1087 | chip->enable_dma = drv_data->master_info->enable_dma; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1088 | chip->dma_threshold = 0; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1089 | if (chip_info->enable_loopback) |
| 1090 | chip->cr1 = SSCR1_LBM; |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1091 | } else if (ACPI_HANDLE(&spi->dev)) { |
| 1092 | /* |
| 1093 | * Slave devices enumerated from ACPI namespace don't |
| 1094 | * usually have chip_info but we still might want to use |
| 1095 | * DMA with them. |
| 1096 | */ |
| 1097 | chip->enable_dma = drv_data->master_info->enable_dma; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1098 | } |
| 1099 | |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 1100 | chip->lpss_rx_threshold = SSIRF_RxThresh(rx_thres); |
| 1101 | chip->lpss_tx_threshold = SSITF_TxLoThresh(tx_thres) |
| 1102 | | SSITF_TxHiThresh(tx_hi_thres); |
| 1103 | |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 1104 | /* set dma burst and threshold outside of chip_info path so that if |
| 1105 | * chip_info goes away after setting chip->enable_dma, the |
| 1106 | * burst and threshold can still respond to changes in bits_per_word */ |
| 1107 | if (chip->enable_dma) { |
| 1108 | /* set up legal burst and threshold for dma */ |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1109 | if (pxa2xx_spi_set_dma_burst_and_threshold(chip, spi, |
| 1110 | spi->bits_per_word, |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 1111 | &chip->dma_burst_size, |
| 1112 | &chip->dma_threshold)) { |
Jarkko Nikula | f6bd03a | 2013-10-11 13:54:00 +0300 | [diff] [blame] | 1113 | dev_warn(&spi->dev, |
| 1114 | "in setup: DMA burst size reduced to match bits_per_word\n"); |
Stephen Street | 8d94cc5 | 2006-12-10 02:18:54 -0800 | [diff] [blame] | 1115 | } |
| 1116 | } |
| 1117 | |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1118 | clk_div = pxa2xx_ssp_get_clk_div(drv_data, chip, spi->max_speed_hz); |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 1119 | chip->speed_hz = spi->max_speed_hz; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1120 | |
Weike Chen | 4fdb242 | 2014-10-08 08:50:22 -0700 | [diff] [blame] | 1121 | chip->cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, |
| 1122 | spi->bits_per_word); |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1123 | switch (drv_data->ssp_type) { |
| 1124 | case QUARK_X1000_SSP: |
| 1125 | chip->threshold = (QUARK_X1000_SSCR1_RxTresh(rx_thres) |
| 1126 | & QUARK_X1000_SSCR1_RFT) |
| 1127 | | (QUARK_X1000_SSCR1_TxTresh(tx_thres) |
| 1128 | & QUARK_X1000_SSCR1_TFT); |
| 1129 | break; |
| 1130 | default: |
| 1131 | chip->threshold = (SSCR1_RxTresh(rx_thres) & SSCR1_RFT) | |
| 1132 | (SSCR1_TxTresh(tx_thres) & SSCR1_TFT); |
| 1133 | break; |
| 1134 | } |
| 1135 | |
Justin Clacherty | 7f6ee1a | 2007-01-26 00:56:44 -0800 | [diff] [blame] | 1136 | chip->cr1 &= ~(SSCR1_SPO | SSCR1_SPH); |
| 1137 | chip->cr1 |= (((spi->mode & SPI_CPHA) != 0) ? SSCR1_SPH : 0) |
| 1138 | | (((spi->mode & SPI_CPOL) != 0) ? SSCR1_SPO : 0); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1139 | |
Mika Westerberg | b833172 | 2013-01-22 12:26:31 +0200 | [diff] [blame] | 1140 | if (spi->mode & SPI_LOOP) |
| 1141 | chip->cr1 |= SSCR1_LBM; |
| 1142 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1143 | /* NOTE: PXA25x_SSP _could_ use external clocking ... */ |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1144 | if (!pxa25x_ssp_comp(drv_data)) |
David Brownell | 7d07719 | 2009-06-17 16:26:03 -0700 | [diff] [blame] | 1145 | dev_dbg(&spi->dev, "%ld Hz actual, %s\n", |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 1146 | drv_data->max_clk_rate |
Eric Miao | c9840da | 2010-03-16 16:48:01 +0800 | [diff] [blame] | 1147 | / (1 + ((chip->cr0 & SSCR0_SCR(0xfff)) >> 8)), |
| 1148 | chip->enable_dma ? "DMA" : "PIO"); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1149 | else |
David Brownell | 7d07719 | 2009-06-17 16:26:03 -0700 | [diff] [blame] | 1150 | dev_dbg(&spi->dev, "%ld Hz actual, %s\n", |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 1151 | drv_data->max_clk_rate / 2 |
Eric Miao | c9840da | 2010-03-16 16:48:01 +0800 | [diff] [blame] | 1152 | / (1 + ((chip->cr0 & SSCR0_SCR(0x0ff)) >> 8)), |
| 1153 | chip->enable_dma ? "DMA" : "PIO"); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1154 | |
| 1155 | if (spi->bits_per_word <= 8) { |
| 1156 | chip->n_bytes = 1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1157 | chip->read = u8_reader; |
| 1158 | chip->write = u8_writer; |
| 1159 | } else if (spi->bits_per_word <= 16) { |
| 1160 | chip->n_bytes = 2; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1161 | chip->read = u16_reader; |
| 1162 | chip->write = u16_writer; |
| 1163 | } else if (spi->bits_per_word <= 32) { |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1164 | if (!is_quark_x1000_ssp(drv_data)) |
| 1165 | chip->cr0 |= SSCR0_EDSS; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1166 | chip->n_bytes = 4; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1167 | chip->read = u32_reader; |
| 1168 | chip->write = u32_writer; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1169 | } |
Stephen Street | 9708c12 | 2006-03-28 14:05:23 -0800 | [diff] [blame] | 1170 | chip->bits_per_word = spi->bits_per_word; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1171 | |
| 1172 | spi_set_ctldata(spi, chip); |
| 1173 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1174 | if (drv_data->ssp_type == CE4100_SSP) |
| 1175 | return 0; |
| 1176 | |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 1177 | return setup_cs(spi, chip, chip_info); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1178 | } |
| 1179 | |
Hans-Peter Nilsson | 0ffa028 | 2007-02-12 00:52:45 -0800 | [diff] [blame] | 1180 | static void cleanup(struct spi_device *spi) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1181 | { |
Hans-Peter Nilsson | 0ffa028 | 2007-02-12 00:52:45 -0800 | [diff] [blame] | 1182 | struct chip_data *chip = spi_get_ctldata(spi); |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1183 | struct driver_data *drv_data = spi_master_get_devdata(spi->master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1184 | |
Daniel Ribeiro | 7348d82 | 2009-05-12 13:19:36 -0700 | [diff] [blame] | 1185 | if (!chip) |
| 1186 | return; |
| 1187 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1188 | if (drv_data->ssp_type != CE4100_SSP && gpio_is_valid(chip->gpio_cs)) |
Eric Miao | a7bb390 | 2009-04-06 19:00:54 -0700 | [diff] [blame] | 1189 | gpio_free(chip->gpio_cs); |
| 1190 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1191 | kfree(chip); |
| 1192 | } |
| 1193 | |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1194 | #ifdef CONFIG_ACPI |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1195 | static struct pxa2xx_spi_master * |
| 1196 | pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev) |
| 1197 | { |
| 1198 | struct pxa2xx_spi_master *pdata; |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1199 | struct acpi_device *adev; |
| 1200 | struct ssp_device *ssp; |
| 1201 | struct resource *res; |
| 1202 | int devid; |
| 1203 | |
| 1204 | if (!ACPI_HANDLE(&pdev->dev) || |
| 1205 | acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev)) |
| 1206 | return NULL; |
| 1207 | |
Mika Westerberg | cc0ee98 | 2013-06-20 17:44:22 +0300 | [diff] [blame] | 1208 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
Jingoo Han | 9deae45 | 2014-04-29 17:19:38 +0900 | [diff] [blame] | 1209 | if (!pdata) |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1210 | return NULL; |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1211 | |
| 1212 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1213 | if (!res) |
| 1214 | return NULL; |
| 1215 | |
| 1216 | ssp = &pdata->ssp; |
| 1217 | |
| 1218 | ssp->phys_base = res->start; |
Sachin Kamat | cbfd6a2 | 2013-04-08 15:49:33 +0530 | [diff] [blame] | 1219 | ssp->mmio_base = devm_ioremap_resource(&pdev->dev, res); |
| 1220 | if (IS_ERR(ssp->mmio_base)) |
Mika Westerberg | 6dc81f6 | 2013-05-13 13:45:09 +0300 | [diff] [blame] | 1221 | return NULL; |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1222 | |
| 1223 | ssp->clk = devm_clk_get(&pdev->dev, NULL); |
| 1224 | ssp->irq = platform_get_irq(pdev, 0); |
| 1225 | ssp->type = LPSS_SSP; |
| 1226 | ssp->pdev = pdev; |
| 1227 | |
| 1228 | ssp->port_id = -1; |
| 1229 | if (adev->pnp.unique_id && !kstrtoint(adev->pnp.unique_id, 0, &devid)) |
| 1230 | ssp->port_id = devid; |
| 1231 | |
| 1232 | pdata->num_chipselect = 1; |
Mika Westerberg | cddb339 | 2013-05-13 13:45:10 +0300 | [diff] [blame] | 1233 | pdata->enable_dma = true; |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1234 | |
| 1235 | return pdata; |
| 1236 | } |
| 1237 | |
| 1238 | static struct acpi_device_id pxa2xx_spi_acpi_match[] = { |
| 1239 | { "INT33C0", 0 }, |
| 1240 | { "INT33C1", 0 }, |
Mika Westerberg | 54acbd9 | 2013-11-12 12:06:21 +0200 | [diff] [blame] | 1241 | { "INT3430", 0 }, |
| 1242 | { "INT3431", 0 }, |
Mika Westerberg | 4b30f2a | 2013-05-13 13:45:11 +0300 | [diff] [blame] | 1243 | { "80860F0E", 0 }, |
Alan Cox | aca2636 | 2014-08-20 13:57:26 +0300 | [diff] [blame] | 1244 | { "8086228E", 0 }, |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1245 | { }, |
| 1246 | }; |
| 1247 | MODULE_DEVICE_TABLE(acpi, pxa2xx_spi_acpi_match); |
| 1248 | #else |
| 1249 | static inline struct pxa2xx_spi_master * |
| 1250 | pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev) |
| 1251 | { |
| 1252 | return NULL; |
| 1253 | } |
| 1254 | #endif |
| 1255 | |
Grant Likely | fd4a319 | 2012-12-07 16:57:14 +0000 | [diff] [blame] | 1256 | static int pxa2xx_spi_probe(struct platform_device *pdev) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1257 | { |
| 1258 | struct device *dev = &pdev->dev; |
| 1259 | struct pxa2xx_spi_master *platform_info; |
| 1260 | struct spi_master *master; |
Guennadi Liakhovetski | 65a00a2 | 2008-10-15 22:02:42 -0700 | [diff] [blame] | 1261 | struct driver_data *drv_data; |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1262 | struct ssp_device *ssp; |
Guennadi Liakhovetski | 65a00a2 | 2008-10-15 22:02:42 -0700 | [diff] [blame] | 1263 | int status; |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 1264 | u32 tmp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1265 | |
Mika Westerberg | 851bacf | 2013-01-07 12:44:33 +0200 | [diff] [blame] | 1266 | platform_info = dev_get_platdata(dev); |
| 1267 | if (!platform_info) { |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1268 | platform_info = pxa2xx_spi_acpi_get_pdata(pdev); |
| 1269 | if (!platform_info) { |
| 1270 | dev_err(&pdev->dev, "missing platform data\n"); |
| 1271 | return -ENODEV; |
| 1272 | } |
Mika Westerberg | 851bacf | 2013-01-07 12:44:33 +0200 | [diff] [blame] | 1273 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1274 | |
Haojian Zhuang | baffe16 | 2010-05-05 10:11:15 -0400 | [diff] [blame] | 1275 | ssp = pxa_ssp_request(pdev->id, pdev->name); |
Mika Westerberg | 851bacf | 2013-01-07 12:44:33 +0200 | [diff] [blame] | 1276 | if (!ssp) |
| 1277 | ssp = &platform_info->ssp; |
| 1278 | |
| 1279 | if (!ssp->mmio_base) { |
| 1280 | dev_err(&pdev->dev, "failed to get ssp\n"); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1281 | return -ENODEV; |
| 1282 | } |
| 1283 | |
| 1284 | /* Allocate master with space for drv_data and null dma buffer */ |
| 1285 | master = spi_alloc_master(dev, sizeof(struct driver_data) + 16); |
| 1286 | if (!master) { |
Guennadi Liakhovetski | 65a00a2 | 2008-10-15 22:02:42 -0700 | [diff] [blame] | 1287 | dev_err(&pdev->dev, "cannot alloc spi_master\n"); |
Haojian Zhuang | baffe16 | 2010-05-05 10:11:15 -0400 | [diff] [blame] | 1288 | pxa_ssp_free(ssp); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1289 | return -ENOMEM; |
| 1290 | } |
| 1291 | drv_data = spi_master_get_devdata(master); |
| 1292 | drv_data->master = master; |
| 1293 | drv_data->master_info = platform_info; |
| 1294 | drv_data->pdev = pdev; |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1295 | drv_data->ssp = ssp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1296 | |
Sebastian Andrzej Siewior | 21486af | 2010-10-08 18:11:19 +0200 | [diff] [blame] | 1297 | master->dev.parent = &pdev->dev; |
Sebastian Andrzej Siewior | 21486af | 2010-10-08 18:11:19 +0200 | [diff] [blame] | 1298 | master->dev.of_node = pdev->dev.of_node; |
David Brownell | e7db06b | 2009-06-17 16:26:04 -0700 | [diff] [blame] | 1299 | /* the spi->mode bits understood by this driver: */ |
Mika Westerberg | b833172 | 2013-01-22 12:26:31 +0200 | [diff] [blame] | 1300 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; |
David Brownell | e7db06b | 2009-06-17 16:26:04 -0700 | [diff] [blame] | 1301 | |
Mika Westerberg | 851bacf | 2013-01-07 12:44:33 +0200 | [diff] [blame] | 1302 | master->bus_num = ssp->port_id; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1303 | master->num_chipselect = platform_info->num_chipselect; |
Mike Rapoport | 7ad0ba9 | 2009-04-06 19:00:57 -0700 | [diff] [blame] | 1304 | master->dma_alignment = DMA_ALIGNMENT; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1305 | master->cleanup = cleanup; |
| 1306 | master->setup = setup; |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 1307 | master->transfer_one_message = pxa2xx_spi_transfer_one_message; |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1308 | master->unprepare_transfer_hardware = pxa2xx_spi_unprepare_transfer; |
Mark Brown | 7dd6278 | 2013-07-28 15:35:21 +0100 | [diff] [blame] | 1309 | master->auto_runtime_pm = true; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1310 | |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1311 | drv_data->ssp_type = ssp->type; |
Mika Westerberg | 2b9b84f | 2013-01-22 12:26:25 +0200 | [diff] [blame] | 1312 | drv_data->null_dma_buf = (u32 *)PTR_ALIGN(&drv_data[1], DMA_ALIGNMENT); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1313 | |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1314 | drv_data->ioaddr = ssp->mmio_base; |
| 1315 | drv_data->ssdr_physical = ssp->phys_base + SSDR; |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1316 | if (pxa25x_ssp_comp(drv_data)) { |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1317 | switch (drv_data->ssp_type) { |
| 1318 | case QUARK_X1000_SSP: |
| 1319 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); |
| 1320 | break; |
| 1321 | default: |
| 1322 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); |
| 1323 | break; |
| 1324 | } |
| 1325 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1326 | drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE; |
| 1327 | drv_data->dma_cr1 = 0; |
| 1328 | drv_data->clear_sr = SSSR_ROR; |
| 1329 | drv_data->mask_sr = SSSR_RFS | SSSR_TFS | SSSR_ROR; |
| 1330 | } else { |
Stephen Warren | 24778be | 2013-05-21 20:36:35 -0600 | [diff] [blame] | 1331 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1332 | drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE; |
Mika Westerberg | 5928808 | 2013-01-22 12:26:29 +0200 | [diff] [blame] | 1333 | drv_data->dma_cr1 = DEFAULT_DMA_CR1; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1334 | drv_data->clear_sr = SSSR_ROR | SSSR_TINT; |
| 1335 | drv_data->mask_sr = SSSR_TINT | SSSR_RFS | SSSR_TFS | SSSR_ROR; |
| 1336 | } |
| 1337 | |
Sebastian Andrzej Siewior | 49cbb1e | 2010-11-22 17:12:14 -0800 | [diff] [blame] | 1338 | status = request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev), |
| 1339 | drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1340 | if (status < 0) { |
Guennadi Liakhovetski | 65a00a2 | 2008-10-15 22:02:42 -0700 | [diff] [blame] | 1341 | dev_err(&pdev->dev, "cannot get IRQ %d\n", ssp->irq); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1342 | goto out_error_master_alloc; |
| 1343 | } |
| 1344 | |
| 1345 | /* Setup DMA if requested */ |
| 1346 | drv_data->tx_channel = -1; |
| 1347 | drv_data->rx_channel = -1; |
| 1348 | if (platform_info->enable_dma) { |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1349 | status = pxa2xx_spi_dma_setup(drv_data); |
| 1350 | if (status) { |
Mika Westerberg | cddb339 | 2013-05-13 13:45:10 +0300 | [diff] [blame] | 1351 | dev_dbg(dev, "no DMA channels available, using PIO\n"); |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1352 | platform_info->enable_dma = false; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1353 | } |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1354 | } |
| 1355 | |
| 1356 | /* Enable SOC clock */ |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 1357 | clk_prepare_enable(ssp->clk); |
| 1358 | |
| 1359 | drv_data->max_clk_rate = clk_get_rate(ssp->clk); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1360 | |
| 1361 | /* Load default SSP configuration */ |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 1362 | pxa2xx_spi_write(drv_data, SSCR0, 0); |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1363 | switch (drv_data->ssp_type) { |
| 1364 | case QUARK_X1000_SSP: |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 1365 | tmp = QUARK_X1000_SSCR1_RxTresh(RX_THRESH_QUARK_X1000_DFLT) |
| 1366 | | QUARK_X1000_SSCR1_TxTresh(TX_THRESH_QUARK_X1000_DFLT); |
| 1367 | pxa2xx_spi_write(drv_data, SSCR1, tmp); |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1368 | |
| 1369 | /* using the Motorola SPI protocol and use 8 bit frame */ |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 1370 | pxa2xx_spi_write(drv_data, SSCR0, |
| 1371 | QUARK_X1000_SSCR0_Motorola |
| 1372 | | QUARK_X1000_SSCR0_DataSize(8)); |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1373 | break; |
| 1374 | default: |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 1375 | tmp = SSCR1_RxTresh(RX_THRESH_DFLT) | |
| 1376 | SSCR1_TxTresh(TX_THRESH_DFLT); |
| 1377 | pxa2xx_spi_write(drv_data, SSCR1, tmp); |
| 1378 | tmp = SSCR0_SCR(2) | SSCR0_Motorola | SSCR0_DataSize(8); |
| 1379 | pxa2xx_spi_write(drv_data, SSCR0, tmp); |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1380 | break; |
| 1381 | } |
| 1382 | |
Sebastian Andrzej Siewior | 2a8626a | 2010-11-22 17:12:17 -0800 | [diff] [blame] | 1383 | if (!pxa25x_ssp_comp(drv_data)) |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 1384 | pxa2xx_spi_write(drv_data, SSTO, 0); |
Weike Chen | e5262d0 | 2014-11-26 02:35:10 -0800 | [diff] [blame] | 1385 | |
| 1386 | if (!is_quark_x1000_ssp(drv_data)) |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 1387 | pxa2xx_spi_write(drv_data, SSPSP, 0); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1388 | |
Jarkko Nikula | 7566bcc | 2014-12-18 15:04:20 +0200 | [diff] [blame] | 1389 | if (is_lpss_ssp(drv_data)) |
| 1390 | lpss_ssp_setup(drv_data); |
Mika Westerberg | a0d2642 | 2013-01-22 12:26:32 +0200 | [diff] [blame] | 1391 | |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 1392 | tasklet_init(&drv_data->pump_transfers, pump_transfers, |
| 1393 | (unsigned long)drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1394 | |
Antonio Ospite | 836d1a2 | 2014-05-30 18:18:09 +0200 | [diff] [blame] | 1395 | pm_runtime_set_autosuspend_delay(&pdev->dev, 50); |
| 1396 | pm_runtime_use_autosuspend(&pdev->dev); |
| 1397 | pm_runtime_set_active(&pdev->dev); |
| 1398 | pm_runtime_enable(&pdev->dev); |
| 1399 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1400 | /* Register with the SPI framework */ |
| 1401 | platform_set_drvdata(pdev, drv_data); |
Jingoo Han | a807fcd | 2013-09-24 13:46:55 +0900 | [diff] [blame] | 1402 | status = devm_spi_register_master(&pdev->dev, master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1403 | if (status != 0) { |
| 1404 | dev_err(&pdev->dev, "problem registering spi master\n"); |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 1405 | goto out_error_clock_enabled; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1406 | } |
| 1407 | |
| 1408 | return status; |
| 1409 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1410 | out_error_clock_enabled: |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 1411 | clk_disable_unprepare(ssp->clk); |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1412 | pxa2xx_spi_dma_release(drv_data); |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1413 | free_irq(ssp->irq, drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1414 | |
| 1415 | out_error_master_alloc: |
| 1416 | spi_master_put(master); |
Haojian Zhuang | baffe16 | 2010-05-05 10:11:15 -0400 | [diff] [blame] | 1417 | pxa_ssp_free(ssp); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1418 | return status; |
| 1419 | } |
| 1420 | |
| 1421 | static int pxa2xx_spi_remove(struct platform_device *pdev) |
| 1422 | { |
| 1423 | struct driver_data *drv_data = platform_get_drvdata(pdev); |
Julia Lawall | 51e911e | 2009-01-06 14:41:45 -0800 | [diff] [blame] | 1424 | struct ssp_device *ssp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1425 | |
| 1426 | if (!drv_data) |
| 1427 | return 0; |
Julia Lawall | 51e911e | 2009-01-06 14:41:45 -0800 | [diff] [blame] | 1428 | ssp = drv_data->ssp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1429 | |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1430 | pm_runtime_get_sync(&pdev->dev); |
| 1431 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1432 | /* Disable the SSP at the peripheral and SOC level */ |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 1433 | pxa2xx_spi_write(drv_data, SSCR0, 0); |
Mika Westerberg | 3343b7a | 2013-01-22 12:26:27 +0200 | [diff] [blame] | 1434 | clk_disable_unprepare(ssp->clk); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1435 | |
| 1436 | /* Release DMA */ |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1437 | if (drv_data->master_info->enable_dma) |
| 1438 | pxa2xx_spi_dma_release(drv_data); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1439 | |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1440 | pm_runtime_put_noidle(&pdev->dev); |
| 1441 | pm_runtime_disable(&pdev->dev); |
| 1442 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1443 | /* Release IRQ */ |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1444 | free_irq(ssp->irq, drv_data); |
| 1445 | |
| 1446 | /* Release SSP */ |
Haojian Zhuang | baffe16 | 2010-05-05 10:11:15 -0400 | [diff] [blame] | 1447 | pxa_ssp_free(ssp); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1448 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1449 | return 0; |
| 1450 | } |
| 1451 | |
| 1452 | static void pxa2xx_spi_shutdown(struct platform_device *pdev) |
| 1453 | { |
| 1454 | int status = 0; |
| 1455 | |
| 1456 | if ((status = pxa2xx_spi_remove(pdev)) != 0) |
| 1457 | dev_err(&pdev->dev, "shutdown failed with %d\n", status); |
| 1458 | } |
| 1459 | |
Mika Westerberg | 382cebb | 2014-01-16 14:50:55 +0200 | [diff] [blame] | 1460 | #ifdef CONFIG_PM_SLEEP |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1461 | static int pxa2xx_spi_suspend(struct device *dev) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1462 | { |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1463 | struct driver_data *drv_data = dev_get_drvdata(dev); |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1464 | struct ssp_device *ssp = drv_data->ssp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1465 | int status = 0; |
| 1466 | |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 1467 | status = spi_master_suspend(drv_data->master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1468 | if (status != 0) |
| 1469 | return status; |
Jarkko Nikula | c039dd2 | 2014-12-18 15:04:23 +0200 | [diff] [blame] | 1470 | pxa2xx_spi_write(drv_data, SSCR0, 0); |
Dmitry Eremin-Solenikov | 2b9375b | 2014-11-06 14:08:29 +0300 | [diff] [blame] | 1471 | |
| 1472 | if (!pm_runtime_suspended(dev)) |
| 1473 | clk_disable_unprepare(ssp->clk); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1474 | |
| 1475 | return 0; |
| 1476 | } |
| 1477 | |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1478 | static int pxa2xx_spi_resume(struct device *dev) |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1479 | { |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1480 | struct driver_data *drv_data = dev_get_drvdata(dev); |
eric miao | 2f1a74e | 2007-11-21 18:50:53 +0800 | [diff] [blame] | 1481 | struct ssp_device *ssp = drv_data->ssp; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1482 | int status = 0; |
| 1483 | |
Mika Westerberg | cd7bed0 | 2013-01-22 12:26:28 +0200 | [diff] [blame] | 1484 | pxa2xx_spi_dma_resume(drv_data); |
Daniel Ribeiro | 148da33 | 2009-04-21 12:24:43 -0700 | [diff] [blame] | 1485 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1486 | /* Enable the SSP clock */ |
Dmitry Eremin-Solenikov | 2b9375b | 2014-11-06 14:08:29 +0300 | [diff] [blame] | 1487 | if (!pm_runtime_suspended(dev)) |
| 1488 | clk_prepare_enable(ssp->clk); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1489 | |
Chew, Chiau Ee | c50325f | 2013-11-29 02:13:11 +0800 | [diff] [blame] | 1490 | /* Restore LPSS private register bits */ |
Jarkko Nikula | 48421ad | 2015-01-28 10:09:42 +0200 | [diff] [blame] | 1491 | if (is_lpss_ssp(drv_data)) |
| 1492 | lpss_ssp_setup(drv_data); |
Chew, Chiau Ee | c50325f | 2013-11-29 02:13:11 +0800 | [diff] [blame] | 1493 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1494 | /* Start the queue running */ |
Mika Westerberg | 7f86bde | 2013-01-22 12:26:26 +0200 | [diff] [blame] | 1495 | status = spi_master_resume(drv_data->master); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1496 | if (status != 0) { |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1497 | dev_err(dev, "problem starting queue (%d)\n", status); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1498 | return status; |
| 1499 | } |
| 1500 | |
| 1501 | return 0; |
| 1502 | } |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1503 | #endif |
| 1504 | |
Rafael J. Wysocki | ec83305 | 2014-12-13 00:41:15 +0100 | [diff] [blame] | 1505 | #ifdef CONFIG_PM |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1506 | static int pxa2xx_spi_runtime_suspend(struct device *dev) |
| 1507 | { |
| 1508 | struct driver_data *drv_data = dev_get_drvdata(dev); |
| 1509 | |
| 1510 | clk_disable_unprepare(drv_data->ssp->clk); |
| 1511 | return 0; |
| 1512 | } |
| 1513 | |
| 1514 | static int pxa2xx_spi_runtime_resume(struct device *dev) |
| 1515 | { |
| 1516 | struct driver_data *drv_data = dev_get_drvdata(dev); |
| 1517 | |
| 1518 | clk_prepare_enable(drv_data->ssp->clk); |
| 1519 | return 0; |
| 1520 | } |
| 1521 | #endif |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1522 | |
Alexey Dobriyan | 4714521 | 2009-12-14 18:00:08 -0800 | [diff] [blame] | 1523 | static const struct dev_pm_ops pxa2xx_spi_pm_ops = { |
Mika Westerberg | 7d94a50 | 2013-01-22 12:26:30 +0200 | [diff] [blame] | 1524 | SET_SYSTEM_SLEEP_PM_OPS(pxa2xx_spi_suspend, pxa2xx_spi_resume) |
| 1525 | SET_RUNTIME_PM_OPS(pxa2xx_spi_runtime_suspend, |
| 1526 | pxa2xx_spi_runtime_resume, NULL) |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1527 | }; |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1528 | |
| 1529 | static struct platform_driver driver = { |
| 1530 | .driver = { |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1531 | .name = "pxa2xx-spi", |
Mike Rapoport | 86d2593 | 2009-07-21 17:50:16 +0300 | [diff] [blame] | 1532 | .pm = &pxa2xx_spi_pm_ops, |
Mika Westerberg | a349685 | 2013-01-22 12:26:33 +0200 | [diff] [blame] | 1533 | .acpi_match_table = ACPI_PTR(pxa2xx_spi_acpi_match), |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1534 | }, |
Sebastian Andrzej Siewior | fbd29a1 | 2010-11-19 09:00:11 -0800 | [diff] [blame] | 1535 | .probe = pxa2xx_spi_probe, |
David Brownell | d1e44d9 | 2007-10-16 01:27:46 -0700 | [diff] [blame] | 1536 | .remove = pxa2xx_spi_remove, |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1537 | .shutdown = pxa2xx_spi_shutdown, |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1538 | }; |
| 1539 | |
| 1540 | static int __init pxa2xx_spi_init(void) |
| 1541 | { |
Sebastian Andrzej Siewior | fbd29a1 | 2010-11-19 09:00:11 -0800 | [diff] [blame] | 1542 | return platform_driver_register(&driver); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1543 | } |
Antonio Ospite | 5b61a74 | 2009-09-22 16:46:10 -0700 | [diff] [blame] | 1544 | subsys_initcall(pxa2xx_spi_init); |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 1545 | |
| 1546 | static void __exit pxa2xx_spi_exit(void) |
| 1547 | { |
| 1548 | platform_driver_unregister(&driver); |
| 1549 | } |
| 1550 | module_exit(pxa2xx_spi_exit); |