Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) ST-Ericsson SA 2010 |
| 3 | * |
| 4 | * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> |
| 5 | * License terms: GNU General Public License (GPL) version 2 |
| 6 | */ |
| 7 | |
| 8 | #include <linux/kernel.h> |
| 9 | #include <linux/gpio.h> |
| 10 | #include <linux/amba/bus.h> |
| 11 | #include <linux/amba/mmci.h> |
| 12 | #include <linux/mmc/host.h> |
| 13 | #include <linux/platform_device.h> |
| 14 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 15 | #include <asm/mach-types.h> |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 16 | #include <plat/ste_dma40.h> |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 17 | #include <mach/devices.h> |
| 18 | #include <mach/hardware.h> |
| 19 | |
Rabin Vincent | fbf1eadf | 2010-09-29 19:46:32 +0530 | [diff] [blame] | 20 | #include "devices-db8500.h" |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 21 | #include "board-mop500.h" |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 22 | #include "ste-dma40-db8500.h" |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 23 | |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 24 | /* |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 25 | * SDI 0 (MicroSD slot) |
| 26 | */ |
| 27 | |
| 28 | /* MMCIPOWER bits */ |
| 29 | #define MCI_DATA2DIREN (1 << 2) |
| 30 | #define MCI_CMDDIREN (1 << 3) |
| 31 | #define MCI_DATA0DIREN (1 << 4) |
| 32 | #define MCI_DATA31DIREN (1 << 5) |
| 33 | #define MCI_FBCLKEN (1 << 7) |
| 34 | |
Linus Walleij | f727a05 | 2011-04-27 12:55:37 +0200 | [diff] [blame] | 35 | /* GPIO pins used by the sdi0 level shifter */ |
| 36 | static int sdi0_en = -1; |
| 37 | static int sdi0_vsel = -1; |
| 38 | |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 39 | static u32 mop500_sdi0_vdd_handler(struct device *dev, unsigned int vdd, |
| 40 | unsigned char power_mode) |
| 41 | { |
Linus Walleij | f727a05 | 2011-04-27 12:55:37 +0200 | [diff] [blame] | 42 | switch (power_mode) { |
| 43 | case MMC_POWER_UP: |
| 44 | case MMC_POWER_ON: |
| 45 | /* |
| 46 | * Level shifter voltage should depend on vdd to when deciding |
| 47 | * on either 1.8V or 2.9V. Once the decision has been made the |
| 48 | * level shifter must be disabled and re-enabled with a changed |
| 49 | * select signal in order to switch the voltage. Since there is |
| 50 | * no framework support yet for indicating 1.8V in vdd, use the |
| 51 | * default 2.9V. |
| 52 | */ |
| 53 | gpio_direction_output(sdi0_vsel, 0); |
| 54 | gpio_direction_output(sdi0_en, 1); |
| 55 | break; |
| 56 | case MMC_POWER_OFF: |
| 57 | gpio_direction_output(sdi0_vsel, 0); |
| 58 | gpio_direction_output(sdi0_en, 0); |
| 59 | break; |
| 60 | } |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 61 | |
| 62 | return MCI_FBCLKEN | MCI_CMDDIREN | MCI_DATA0DIREN | |
| 63 | MCI_DATA2DIREN | MCI_DATA31DIREN; |
| 64 | } |
| 65 | |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 66 | #ifdef CONFIG_STE_DMA40 |
| 67 | struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = { |
| 68 | .mode = STEDMA40_MODE_LOGICAL, |
| 69 | .dir = STEDMA40_PERIPH_TO_MEM, |
| 70 | .src_dev_type = DB8500_DMA_DEV29_SD_MM0_RX, |
| 71 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, |
| 72 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 73 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 74 | }; |
| 75 | |
| 76 | static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = { |
| 77 | .mode = STEDMA40_MODE_LOGICAL, |
| 78 | .dir = STEDMA40_MEM_TO_PERIPH, |
| 79 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, |
| 80 | .dst_dev_type = DB8500_DMA_DEV29_SD_MM0_TX, |
| 81 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 82 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 83 | }; |
| 84 | #endif |
| 85 | |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 86 | static struct mmci_platform_data mop500_sdi0_data = { |
| 87 | .vdd_handler = mop500_sdi0_vdd_handler, |
| 88 | .ocr_mask = MMC_VDD_29_30, |
Linus Walleij | 02a7343 | 2011-03-30 16:00:39 +0200 | [diff] [blame] | 89 | .f_max = 50000000, |
| 90 | .capabilities = MMC_CAP_4_BIT_DATA | |
| 91 | MMC_CAP_SD_HIGHSPEED | |
| 92 | MMC_CAP_MMC_HIGHSPEED, |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 93 | .gpio_wp = -1, |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 94 | #ifdef CONFIG_STE_DMA40 |
| 95 | .dma_filter = stedma40_filter, |
| 96 | .dma_rx_param = &mop500_sdi0_dma_cfg_rx, |
| 97 | .dma_tx_param = &mop500_sdi0_dma_cfg_tx, |
| 98 | #endif |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 99 | }; |
| 100 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 101 | static void sdi0_configure(void) |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 102 | { |
| 103 | int ret; |
| 104 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 105 | ret = gpio_request(sdi0_en, "level shifter enable"); |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 106 | if (!ret) |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 107 | ret = gpio_request(sdi0_vsel, |
| 108 | "level shifter 1v8-3v select"); |
| 109 | |
| 110 | if (ret) { |
| 111 | pr_warning("unable to config sdi0 gpios for level shifter.\n"); |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 112 | return; |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 113 | } |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 114 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 115 | /* Select the default 2.9V and enable level shifter */ |
| 116 | gpio_direction_output(sdi0_vsel, 0); |
| 117 | gpio_direction_output(sdi0_en, 1); |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 118 | |
Linus Walleij | 7293031 | 2011-03-24 16:13:13 +0100 | [diff] [blame] | 119 | /* Add the device, force v2 to subrevision 1 */ |
| 120 | if (cpu_is_u8500v2()) |
| 121 | db8500_add_sdi0(&mop500_sdi0_data, 0x10480180); |
| 122 | else |
| 123 | db8500_add_sdi0(&mop500_sdi0_data, 0); |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 124 | } |
| 125 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 126 | void mop500_sdi_tc35892_init(void) |
| 127 | { |
| 128 | mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD; |
| 129 | sdi0_en = GPIO_SDMMC_EN; |
| 130 | sdi0_vsel = GPIO_SDMMC_1V8_3V_SEL; |
| 131 | sdi0_configure(); |
| 132 | } |
| 133 | |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 134 | /* |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 135 | * SDI 2 (POP eMMC, not on DB8500ed) |
| 136 | */ |
| 137 | |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 138 | #ifdef CONFIG_STE_DMA40 |
| 139 | struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = { |
| 140 | .mode = STEDMA40_MODE_LOGICAL, |
| 141 | .dir = STEDMA40_PERIPH_TO_MEM, |
| 142 | .src_dev_type = DB8500_DMA_DEV28_SD_MM2_RX, |
| 143 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, |
| 144 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 145 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 146 | }; |
| 147 | |
| 148 | static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = { |
| 149 | .mode = STEDMA40_MODE_LOGICAL, |
| 150 | .dir = STEDMA40_MEM_TO_PERIPH, |
| 151 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, |
| 152 | .dst_dev_type = DB8500_DMA_DEV28_SD_MM2_TX, |
| 153 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 154 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 155 | }; |
| 156 | #endif |
| 157 | |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 158 | static struct mmci_platform_data mop500_sdi2_data = { |
| 159 | .ocr_mask = MMC_VDD_165_195, |
Linus Walleij | 02a7343 | 2011-03-30 16:00:39 +0200 | [diff] [blame] | 160 | .f_max = 50000000, |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 161 | .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
| 162 | .gpio_cd = -1, |
| 163 | .gpio_wp = -1, |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 164 | #ifdef CONFIG_STE_DMA40 |
| 165 | .dma_filter = stedma40_filter, |
| 166 | .dma_rx_param = &mop500_sdi2_dma_cfg_rx, |
| 167 | .dma_tx_param = &mop500_sdi2_dma_cfg_tx, |
| 168 | #endif |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 169 | }; |
| 170 | |
| 171 | /* |
| 172 | * SDI 4 (on-board eMMC) |
| 173 | */ |
| 174 | |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 175 | #ifdef CONFIG_STE_DMA40 |
| 176 | struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = { |
| 177 | .mode = STEDMA40_MODE_LOGICAL, |
| 178 | .dir = STEDMA40_PERIPH_TO_MEM, |
| 179 | .src_dev_type = DB8500_DMA_DEV42_SD_MM4_RX, |
| 180 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, |
| 181 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 182 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 183 | }; |
| 184 | |
| 185 | static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = { |
| 186 | .mode = STEDMA40_MODE_LOGICAL, |
| 187 | .dir = STEDMA40_MEM_TO_PERIPH, |
| 188 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, |
| 189 | .dst_dev_type = DB8500_DMA_DEV42_SD_MM4_TX, |
| 190 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 191 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 192 | }; |
| 193 | #endif |
| 194 | |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 195 | static struct mmci_platform_data mop500_sdi4_data = { |
| 196 | .ocr_mask = MMC_VDD_29_30, |
Linus Walleij | 02a7343 | 2011-03-30 16:00:39 +0200 | [diff] [blame] | 197 | .f_max = 50000000, |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 198 | .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA | |
| 199 | MMC_CAP_MMC_HIGHSPEED, |
| 200 | .gpio_cd = -1, |
| 201 | .gpio_wp = -1, |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 202 | #ifdef CONFIG_STE_DMA40 |
| 203 | .dma_filter = stedma40_filter, |
| 204 | .dma_rx_param = &mop500_sdi4_dma_cfg_rx, |
| 205 | .dma_tx_param = &mop500_sdi4_dma_cfg_tx, |
| 206 | #endif |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 207 | }; |
| 208 | |
Linus Walleij | edaa86a | 2010-12-02 12:05:18 +0100 | [diff] [blame] | 209 | void __init mop500_sdi_init(void) |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 210 | { |
Linus Walleij | 7293031 | 2011-03-24 16:13:13 +0100 | [diff] [blame] | 211 | u32 periphid = 0; |
| 212 | |
| 213 | /* v2 has a new version of this block that need to be forced */ |
| 214 | if (cpu_is_u8500v2()) |
| 215 | periphid = 0x10480180; |
Bibek Basu | 4bc3a69 | 2011-02-15 10:46:59 +0100 | [diff] [blame] | 216 | /* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */ |
| 217 | if (!cpu_is_u8500v10()) |
| 218 | mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED; |
Mathieu J. Poirier | 885d0fe | 2011-03-25 09:28:58 -0600 | [diff] [blame] | 219 | /* sdi2 on snowball is in ATL_B mode for FSMC (LAN) */ |
| 220 | if (!machine_is_snowball()) |
| 221 | db8500_add_sdi2(&mop500_sdi2_data, periphid); |
Bibek Basu | 4bc3a69 | 2011-02-15 10:46:59 +0100 | [diff] [blame] | 222 | |
| 223 | /* On-board eMMC */ |
Linus Walleij | 7293031 | 2011-03-24 16:13:13 +0100 | [diff] [blame] | 224 | db8500_add_sdi4(&mop500_sdi4_data, periphid); |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 225 | |
Mathieu J. Poirier | 885d0fe | 2011-03-25 09:28:58 -0600 | [diff] [blame] | 226 | if (machine_is_hrefv60() || machine_is_snowball()) { |
| 227 | if (machine_is_hrefv60()) { |
| 228 | mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO; |
| 229 | sdi0_en = HREFV60_SDMMC_EN_GPIO; |
| 230 | sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO; |
| 231 | } else if (machine_is_snowball()) { |
| 232 | mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO; |
| 233 | mop500_sdi0_data.cd_invert = true; |
| 234 | sdi0_en = SNOWBALL_SDMMC_EN_GPIO; |
| 235 | sdi0_vsel = SNOWBALL_SDMMC_1V8_3V_GPIO; |
| 236 | } |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 237 | sdi0_configure(); |
| 238 | } |
Linus Walleij | f727a05 | 2011-04-27 12:55:37 +0200 | [diff] [blame] | 239 | |
Linus Walleij | edaa86a | 2010-12-02 12:05:18 +0100 | [diff] [blame] | 240 | /* |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 241 | * On boards with the TC35892 GPIO expander, sdi0 will finally |
| 242 | * be added when the TC35892 initializes and calls |
Linus Walleij | edaa86a | 2010-12-02 12:05:18 +0100 | [diff] [blame] | 243 | * mop500_sdi_tc35892_init() above. |
| 244 | */ |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 245 | } |