blob: 4932e3449fe145fc4e27f422df1d1816d7cb99c2 [file] [log] [blame]
Sascha Hauer295c08b2009-08-19 01:43:50 +02001/*
2 * Regulator Driver for Freescale MC13783 PMIC
3 *
Yong Shen167e3d82010-12-14 14:00:54 +08004 * Copyright 2010 Yong Shen <yong.shen@linaro.org>
Sascha Hauer295c08b2009-08-19 01:43:50 +02005 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
Alberto Panizzo1bd588f2009-12-14 18:26:38 +01006 * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
Sascha Hauer295c08b2009-08-19 01:43:50 +02007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010013#include <linux/mfd/mc13783.h>
Sascha Hauer295c08b2009-08-19 01:43:50 +020014#include <linux/regulator/machine.h>
15#include <linux/regulator/driver.h>
16#include <linux/platform_device.h>
Sascha Hauer295c08b2009-08-19 01:43:50 +020017#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090018#include <linux/slab.h>
Sascha Hauer295c08b2009-08-19 01:43:50 +020019#include <linux/init.h>
20#include <linux/err.h>
Paul Gortmaker65602c32011-07-17 16:28:23 -040021#include <linux/module.h>
Yong Shen167e3d82010-12-14 14:00:54 +080022#include "mc13xxx.h"
Sascha Hauer295c08b2009-08-19 01:43:50 +020023
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010024#define MC13783_REG_SWITCHERS5 29
25#define MC13783_REG_SWITCHERS5_SW3EN (1 << 20)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +010026#define MC13783_REG_SWITCHERS5_SW3VSEL 18
27#define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18)
28
29#define MC13783_REG_REGULATORSETTING0 30
30#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2
31#define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4
32#define MC13783_REG_REGULATORSETTING0_VGENVSEL 6
33#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9
34#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11
35#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13
36#define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14
37#define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15
38#define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16
39
40#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2)
41#define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4)
42#define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6)
43#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9)
44#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11)
45#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13)
46#define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14)
47#define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15)
48#define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16)
49
50#define MC13783_REG_REGULATORSETTING1 31
51#define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0
52#define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2
53#define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4
54#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6
55#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9
56
57#define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0)
58#define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2)
59#define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4)
60#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6)
61#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9)
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010062
63#define MC13783_REG_REGULATORMODE0 32
64#define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0)
65#define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3)
66#define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6)
67#define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9)
68#define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12)
69#define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15)
70#define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18)
71#define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21)
72
73#define MC13783_REG_REGULATORMODE1 33
74#define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0)
75#define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3)
76#define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6)
77#define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9)
78#define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11)
79#define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12)
80#define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15)
81#define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18)
82#define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21)
83
84#define MC13783_REG_POWERMISC 34
85#define MC13783_REG_POWERMISC_GPO1EN (1 << 6)
86#define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
87#define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
88#define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
Alberto Panizzof4b97b32010-01-19 12:48:54 +010089#define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15)
90#define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16)
91
92#define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15)
93
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010094
Alberto Panizzo1bd588f2009-12-14 18:26:38 +010095/* Voltage Values */
Axel Lin34e74f32012-06-08 15:41:48 +080096static const unsigned int mc13783_sw3_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +010097 5000000, 5000000, 5000000, 5500000,
98};
99
Axel Lin34e74f32012-06-08 15:41:48 +0800100static const unsigned int mc13783_vaudio_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100101 2775000,
102};
103
Axel Lin34e74f32012-06-08 15:41:48 +0800104static const unsigned int mc13783_viohi_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100105 2775000,
106};
107
Axel Lin34e74f32012-06-08 15:41:48 +0800108static const unsigned int mc13783_violo_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100109 1200000, 1300000, 1500000, 1800000,
110};
111
Axel Lin34e74f32012-06-08 15:41:48 +0800112static const unsigned int mc13783_vdig_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100113 1200000, 1300000, 1500000, 1800000,
114};
115
Axel Lin34e74f32012-06-08 15:41:48 +0800116static const unsigned int mc13783_vgen_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100117 1200000, 1300000, 1500000, 1800000,
118 1100000, 2000000, 2775000, 2400000,
119};
120
Axel Lin34e74f32012-06-08 15:41:48 +0800121static const unsigned int mc13783_vrfdig_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100122 1200000, 1500000, 1800000, 1875000,
123};
124
Axel Lin34e74f32012-06-08 15:41:48 +0800125static const unsigned int mc13783_vrfref_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100126 2475000, 2600000, 2700000, 2775000,
127};
128
Axel Lin34e74f32012-06-08 15:41:48 +0800129static const unsigned int mc13783_vrfcp_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100130 2700000, 2775000,
131};
132
Axel Lin34e74f32012-06-08 15:41:48 +0800133static const unsigned int mc13783_vsim_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100134 1800000, 2900000, 3000000,
135};
136
Axel Lin34e74f32012-06-08 15:41:48 +0800137static const unsigned int mc13783_vesim_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100138 1800000, 2900000,
139};
140
Axel Lin34e74f32012-06-08 15:41:48 +0800141static const unsigned int mc13783_vcam_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100142 1500000, 1800000, 2500000, 2550000,
143 2600000, 2750000, 2800000, 3000000,
144};
145
Axel Lin34e74f32012-06-08 15:41:48 +0800146static const unsigned int mc13783_vrfbg_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100147 1250000,
148};
149
Axel Lin34e74f32012-06-08 15:41:48 +0800150static const unsigned int mc13783_vvib_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100151 1300000, 1800000, 2000000, 3000000,
152};
153
Axel Lin34e74f32012-06-08 15:41:48 +0800154static const unsigned int mc13783_vmmc_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100155 1600000, 1800000, 2000000, 2600000,
156 2700000, 2800000, 2900000, 3000000,
157};
158
Axel Lin34e74f32012-06-08 15:41:48 +0800159static const unsigned int mc13783_vrf_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100160 1500000, 1875000, 2700000, 2775000,
Sascha Hauer295c08b2009-08-19 01:43:50 +0200161};
162
Axel Lin34e74f32012-06-08 15:41:48 +0800163static const unsigned int mc13783_gpo_val[] = {
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100164 3100000,
165};
166
Axel Lin34e74f32012-06-08 15:41:48 +0800167static const unsigned int mc13783_pwgtdrv_val[] = {
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100168 5500000,
169};
170
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100171static struct regulator_ops mc13783_gpo_regulator_ops;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200172
Yong Shen167e3d82010-12-14 14:00:54 +0800173#define MC13783_DEFINE(prefix, name, reg, vsel_reg, voltages) \
174 MC13xxx_DEFINE(MC13783_REG_, name, reg, vsel_reg, voltages, \
175 mc13xxx_regulator_ops)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100176
Yong Shen167e3d82010-12-14 14:00:54 +0800177#define MC13783_FIXED_DEFINE(prefix, name, reg, voltages) \
178 MC13xxx_FIXED_DEFINE(MC13783_REG_, name, reg, voltages, \
179 mc13xxx_fixed_regulator_ops)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100180
Yong Shen167e3d82010-12-14 14:00:54 +0800181#define MC13783_GPO_DEFINE(prefix, name, reg, voltages) \
182 MC13xxx_GPO_DEFINE(MC13783_REG_, name, reg, voltages, \
183 mc13783_gpo_regulator_ops)
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100184
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100185#define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \
Yong Shen57c78e32010-12-14 14:00:53 +0800186 MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100187#define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \
Yong Shen57c78e32010-12-14 14:00:53 +0800188 MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100189
Yong Shen167e3d82010-12-14 14:00:54 +0800190static struct mc13xxx_regulator mc13783_regulators[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100191 MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100192
Yong Shen57c78e32010-12-14 14:00:53 +0800193 MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val),
194 MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val),
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100195 MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0, \
196 mc13783_violo_val),
197 MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, \
198 mc13783_vdig_val),
199 MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0, \
200 mc13783_vgen_val),
201 MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0, \
202 mc13783_vrfdig_val),
203 MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0, \
204 mc13783_vrfref_val),
205 MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0, \
206 mc13783_vrfcp_val),
207 MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0, \
208 mc13783_vsim_val),
209 MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0, \
210 mc13783_vesim_val),
211 MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0, \
212 mc13783_vcam_val),
Yong Shen57c78e32010-12-14 14:00:53 +0800213 MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val),
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100214 MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1, \
215 mc13783_vvib_val),
216 MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1, \
217 mc13783_vrf_val),
218 MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1, \
219 mc13783_vrf_val),
220 MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1, \
221 mc13783_vmmc_val),
222 MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, \
223 mc13783_vmmc_val),
Yong Shen57c78e32010-12-14 14:00:53 +0800224 MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val),
225 MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val),
226 MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val),
227 MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val),
228 MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val),
229 MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val),
Sascha Hauer295c08b2009-08-19 01:43:50 +0200230};
231
Yong Shen167e3d82010-12-14 14:00:54 +0800232static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
233 u32 val)
Sascha Hauer295c08b2009-08-19 01:43:50 +0200234{
Yong Shen167e3d82010-12-14 14:00:54 +0800235 struct mc13xxx *mc13783 = priv->mc13xxx;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100236 int ret;
237 u32 valread;
238
239 BUG_ON(val & ~mask);
240
Yong Shen167e3d82010-12-14 14:00:54 +0800241 ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread);
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100242 if (ret)
243 return ret;
244
245 /* Update the stored state for Power Gates. */
246 priv->powermisc_pwgt_state =
247 (priv->powermisc_pwgt_state & ~mask) | val;
248 priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M;
249
250 /* Construct the new register value */
251 valread = (valread & ~mask) | val;
252 /* Overwrite the PWGTxEN with the stored version */
253 valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
254 priv->powermisc_pwgt_state;
255
Yong Shen167e3d82010-12-14 14:00:54 +0800256 return mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread);
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100257}
258
259static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev)
260{
Yong Shen167e3d82010-12-14 14:00:54 +0800261 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
262 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100263 int id = rdev_get_id(rdev);
264 int ret;
Yong Shen167e3d82010-12-14 14:00:54 +0800265 u32 en_val = mc13xxx_regulators[id].enable_bit;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100266
267 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
268
269 /* Power Gate enable value is 0 */
Yong Shen57c78e32010-12-14 14:00:53 +0800270 if (id == MC13783_REG_PWGT1SPI ||
271 id == MC13783_REG_PWGT2SPI)
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100272 en_val = 0;
273
Yong Shen167e3d82010-12-14 14:00:54 +0800274 mc13xxx_lock(priv->mc13xxx);
275 ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100276 en_val);
Yong Shen167e3d82010-12-14 14:00:54 +0800277 mc13xxx_unlock(priv->mc13xxx);
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100278
279 return ret;
280}
281
282static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev)
283{
Yong Shen167e3d82010-12-14 14:00:54 +0800284 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
285 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100286 int id = rdev_get_id(rdev);
287 int ret;
288 u32 dis_val = 0;
289
290 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
291
292 /* Power Gate disable value is 1 */
Yong Shen57c78e32010-12-14 14:00:53 +0800293 if (id == MC13783_REG_PWGT1SPI ||
294 id == MC13783_REG_PWGT2SPI)
Yong Shen167e3d82010-12-14 14:00:54 +0800295 dis_val = mc13xxx_regulators[id].enable_bit;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100296
Yong Shen167e3d82010-12-14 14:00:54 +0800297 mc13xxx_lock(priv->mc13xxx);
298 ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100299 dis_val);
Yong Shen167e3d82010-12-14 14:00:54 +0800300 mc13xxx_unlock(priv->mc13xxx);
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100301
302 return ret;
303}
304
305static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev)
306{
Yong Shen167e3d82010-12-14 14:00:54 +0800307 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
308 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100309 int ret, id = rdev_get_id(rdev);
310 unsigned int val;
311
Yong Shen167e3d82010-12-14 14:00:54 +0800312 mc13xxx_lock(priv->mc13xxx);
313 ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val);
314 mc13xxx_unlock(priv->mc13xxx);
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100315
316 if (ret)
317 return ret;
318
319 /* Power Gates state is stored in powermisc_pwgt_state
320 * where the meaning of bits is negated */
321 val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
322 (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M);
323
Yong Shen167e3d82010-12-14 14:00:54 +0800324 return (val & mc13xxx_regulators[id].enable_bit) != 0;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100325}
326
327static struct regulator_ops mc13783_gpo_regulator_ops = {
328 .enable = mc13783_gpo_regulator_enable,
329 .disable = mc13783_gpo_regulator_disable,
330 .is_enabled = mc13783_gpo_regulator_is_enabled,
Axel Lin34e74f32012-06-08 15:41:48 +0800331 .list_voltage = regulator_list_voltage_table,
Yong Shen167e3d82010-12-14 14:00:54 +0800332 .set_voltage = mc13xxx_fixed_regulator_set_voltage,
333 .get_voltage = mc13xxx_fixed_regulator_get_voltage,
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100334};
335
Sascha Hauer295c08b2009-08-19 01:43:50 +0200336static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
337{
Yong Shen167e3d82010-12-14 14:00:54 +0800338 struct mc13xxx_regulator_priv *priv;
339 struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent);
Samuel Ortiz8f1585a2011-09-19 11:33:17 +0200340 struct mc13xxx_regulator_platform_data *pdata =
Samuel Ortizc8a03c962011-04-08 01:55:01 +0200341 dev_get_platdata(&pdev->dev);
Samuel Ortiz8f1585a2011-09-19 11:33:17 +0200342 struct mc13xxx_regulator_init_data *init_data;
Axel Lina9d58012012-04-10 13:51:06 +0800343 struct regulator_config config = { };
Sascha Hauer295c08b2009-08-19 01:43:50 +0200344 int i, ret;
345
Wanlong Gaoc7198642011-04-17 08:53:57 +0800346 dev_dbg(&pdev->dev, "%s id %d\n", __func__, pdev->id);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200347
Sascha Hauer0757b602012-02-29 09:01:40 +0100348 if (!pdata)
349 return -EINVAL;
350
Fabio Estevamcbe10a32011-12-29 13:56:02 -0200351 priv = devm_kzalloc(&pdev->dev, sizeof(*priv) +
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100352 pdata->num_regulators * sizeof(priv->regulators[0]),
Sascha Hauer295c08b2009-08-19 01:43:50 +0200353 GFP_KERNEL);
354 if (!priv)
355 return -ENOMEM;
356
Yong Shen167e3d82010-12-14 14:00:54 +0800357 priv->mc13xxx_regulators = mc13783_regulators;
358 priv->mc13xxx = mc13783;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200359
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100360 for (i = 0; i < pdata->num_regulators; i++) {
Axel Lina9d58012012-04-10 13:51:06 +0800361 struct regulator_desc *desc;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200362
Axel Lina9d58012012-04-10 13:51:06 +0800363 init_data = &pdata->regulators[i];
364 desc = &mc13783_regulators[init_data->id].desc;
365
366 config.dev = &pdev->dev;
367 config.init_data = init_data->init_data;
368 config.driver_data = priv;
369
370 priv->regulators[i] = regulator_register(desc, &config);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200371 if (IS_ERR(priv->regulators[i])) {
372 dev_err(&pdev->dev, "failed to register regulator %s\n",
373 mc13783_regulators[i].desc.name);
374 ret = PTR_ERR(priv->regulators[i]);
375 goto err;
376 }
377 }
378
379 platform_set_drvdata(pdev, priv);
380
381 return 0;
382err:
383 while (--i >= 0)
384 regulator_unregister(priv->regulators[i]);
385
Sascha Hauer295c08b2009-08-19 01:43:50 +0200386 return ret;
387}
388
389static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
390{
Yong Shen167e3d82010-12-14 14:00:54 +0800391 struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev);
Samuel Ortiz8f1585a2011-09-19 11:33:17 +0200392 struct mc13xxx_regulator_platform_data *pdata =
Samuel Ortizc8a03c962011-04-08 01:55:01 +0200393 dev_get_platdata(&pdev->dev);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200394 int i;
395
Axel Lin58d57652010-04-19 09:58:02 +0800396 platform_set_drvdata(pdev, NULL);
397
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100398 for (i = 0; i < pdata->num_regulators; i++)
Sascha Hauer295c08b2009-08-19 01:43:50 +0200399 regulator_unregister(priv->regulators[i]);
400
401 return 0;
402}
403
404static struct platform_driver mc13783_regulator_driver = {
405 .driver = {
406 .name = "mc13783-regulator",
407 .owner = THIS_MODULE,
408 },
409 .remove = __devexit_p(mc13783_regulator_remove),
Alberto Panizzo735eb932009-12-14 18:53:35 +0100410 .probe = mc13783_regulator_probe,
Sascha Hauer295c08b2009-08-19 01:43:50 +0200411};
412
413static int __init mc13783_regulator_init(void)
414{
Alberto Panizzo735eb932009-12-14 18:53:35 +0100415 return platform_driver_register(&mc13783_regulator_driver);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200416}
417subsys_initcall(mc13783_regulator_init);
418
419static void __exit mc13783_regulator_exit(void)
420{
421 platform_driver_unregister(&mc13783_regulator_driver);
422}
423module_exit(mc13783_regulator_exit);
424
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100425MODULE_LICENSE("GPL v2");
Axel Lin1dcc4342010-05-06 11:33:36 +0800426MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
Sascha Hauer295c08b2009-08-19 01:43:50 +0200427MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
428MODULE_ALIAS("platform:mc13783-regulator");