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Amit Kucheriaebf0bd32009-08-31 18:32:18 +02001/*
2 * linux/drivers/i2c/chips/twl4030-power.c
3 *
4 * Handle TWL4030 Power initialization
5 *
6 * Copyright (C) 2008 Nokia Corporation
7 * Copyright (C) 2006 Texas Instruments, Inc
8 *
9 * Written by Kalle Jokiniemi
10 * Peter De Schrijver <peter.de-schrijver@nokia.com>
11 * Several fixes by Amit Kucheria <amit.kucheria@verdurent.com>
12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file "COPYING" in the main directory of this
15 * archive for more details.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <linux/module.h>
28#include <linux/pm.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010029#include <linux/i2c/twl.h>
Amit Kucheriaebf0bd32009-08-31 18:32:18 +020030#include <linux/platform_device.h>
Florian Vaussardb0fc1da2013-06-18 15:17:58 +020031#include <linux/of.h>
Amit Kucheriaebf0bd32009-08-31 18:32:18 +020032
33#include <asm/mach-types.h>
34
35static u8 twl4030_start_script_address = 0x2b;
36
37#define PWR_P1_SW_EVENTS 0x10
Igor Grinberg26cc3ab2011-11-13 11:49:50 +020038#define PWR_DEVOFF (1 << 0)
39#define SEQ_OFFSYNC (1 << 0)
Amit Kucheriaebf0bd32009-08-31 18:32:18 +020040
41#define PHY_TO_OFF_PM_MASTER(p) (p - 0x36)
42#define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b)
43
44/* resource - hfclk */
45#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6)
46
47/* PM events */
48#define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46)
49#define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47)
50#define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48)
51#define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36)
52#define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37)
53#define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38)
54
55#define LVL_WAKEUP 0x08
56
57#define ENABLE_WARMRESET (1<<4)
58
59#define END_OF_SCRIPT 0x3f
60
61#define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55)
62#define R_SEQ_ADD_S2A12 PHY_TO_OFF_PM_MASTER(0x56)
63#define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57)
64#define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58)
65#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
66#define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
67
Amit Kucheria890463f2009-10-19 15:10:48 +030068/* resource configuration registers
69 <RESOURCE>_DEV_GRP at address 'n+0'
70 <RESOURCE>_TYPE at address 'n+1'
71 <RESOURCE>_REMAP at address 'n+2'
72 <RESOURCE>_DEDICATED at address 'n+3'
73*/
Amit Kucheriae97d1542009-10-19 15:10:44 +030074#define DEV_GRP_OFFSET 0
Amit Kucheriaebf0bd32009-08-31 18:32:18 +020075#define TYPE_OFFSET 1
Amit Kucheriab4ead612009-10-19 15:11:00 +030076#define REMAP_OFFSET 2
77#define DEDICATED_OFFSET 3
Amit Kucheriaebf0bd32009-08-31 18:32:18 +020078
Amit Kucheriae97d1542009-10-19 15:10:44 +030079/* Bit positions in the registers */
Amit Kucheria890463f2009-10-19 15:10:48 +030080
81/* <RESOURCE>_DEV_GRP */
Amit Kucheriae97d1542009-10-19 15:10:44 +030082#define DEV_GRP_SHIFT 5
83#define DEV_GRP_MASK (7 << DEV_GRP_SHIFT)
Amit Kucheria890463f2009-10-19 15:10:48 +030084
85/* <RESOURCE>_TYPE */
Amit Kucheriaebf0bd32009-08-31 18:32:18 +020086#define TYPE_SHIFT 0
87#define TYPE_MASK (7 << TYPE_SHIFT)
88#define TYPE2_SHIFT 3
89#define TYPE2_MASK (3 << TYPE2_SHIFT)
90
Amit Kucheriab4ead612009-10-19 15:11:00 +030091/* <RESOURCE>_REMAP */
92#define SLEEP_STATE_SHIFT 0
93#define SLEEP_STATE_MASK (0xf << SLEEP_STATE_SHIFT)
94#define OFF_STATE_SHIFT 4
95#define OFF_STATE_MASK (0xf << OFF_STATE_SHIFT)
96
Amit Kucheriaebf0bd32009-08-31 18:32:18 +020097static u8 res_config_addrs[] = {
98 [RES_VAUX1] = 0x17,
99 [RES_VAUX2] = 0x1b,
100 [RES_VAUX3] = 0x1f,
101 [RES_VAUX4] = 0x23,
102 [RES_VMMC1] = 0x27,
103 [RES_VMMC2] = 0x2b,
104 [RES_VPLL1] = 0x2f,
105 [RES_VPLL2] = 0x33,
106 [RES_VSIM] = 0x37,
107 [RES_VDAC] = 0x3b,
108 [RES_VINTANA1] = 0x3f,
109 [RES_VINTANA2] = 0x43,
110 [RES_VINTDIG] = 0x47,
111 [RES_VIO] = 0x4b,
112 [RES_VDD1] = 0x55,
113 [RES_VDD2] = 0x63,
114 [RES_VUSB_1V5] = 0x71,
115 [RES_VUSB_1V8] = 0x74,
116 [RES_VUSB_3V1] = 0x77,
117 [RES_VUSBCP] = 0x7a,
118 [RES_REGEN] = 0x7f,
119 [RES_NRES_PWRON] = 0x82,
120 [RES_CLKEN] = 0x85,
121 [RES_SYSEN] = 0x88,
122 [RES_HFCLKOUT] = 0x8b,
123 [RES_32KCLKOUT] = 0x8e,
124 [RES_RESET] = 0x91,
Lesly A Md7ac8292011-04-14 17:57:51 +0530125 [RES_MAIN_REF] = 0x94,
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200126};
127
Bill Pembertonf791be42012-11-19 13:23:04 -0500128static int twl4030_write_script_byte(u8 address, u8 byte)
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200129{
130 int err;
131
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100132 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_MEMORY_ADDRESS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200133 if (err)
134 goto out;
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100135 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, byte, R_MEMORY_DATA);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200136out:
137 return err;
138}
139
Bill Pembertonf791be42012-11-19 13:23:04 -0500140static int twl4030_write_script_ins(u8 address, u16 pmb_message,
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200141 u8 delay, u8 next)
142{
143 int err;
144
145 address *= 4;
146 err = twl4030_write_script_byte(address++, pmb_message >> 8);
147 if (err)
148 goto out;
149 err = twl4030_write_script_byte(address++, pmb_message & 0xff);
150 if (err)
151 goto out;
152 err = twl4030_write_script_byte(address++, delay);
153 if (err)
154 goto out;
155 err = twl4030_write_script_byte(address++, next);
156out:
157 return err;
158}
159
Bill Pembertonf791be42012-11-19 13:23:04 -0500160static int twl4030_write_script(u8 address, struct twl4030_ins *script,
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200161 int len)
162{
Arnd Bergmannf65e9ea2013-01-25 14:14:26 +0000163 int err = -EINVAL;
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200164
165 for (; len; len--, address++, script++) {
166 if (len == 1) {
167 err = twl4030_write_script_ins(address,
168 script->pmb_message,
169 script->delay,
170 END_OF_SCRIPT);
171 if (err)
172 break;
173 } else {
174 err = twl4030_write_script_ins(address,
175 script->pmb_message,
176 script->delay,
177 address + 1);
178 if (err)
179 break;
180 }
181 }
182 return err;
183}
184
Bill Pembertonf791be42012-11-19 13:23:04 -0500185static int twl4030_config_wakeup3_sequence(u8 address)
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200186{
187 int err;
188 u8 data;
189
190 /* Set SLEEP to ACTIVE SEQ address for P3 */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100191 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A3);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200192 if (err)
193 goto out;
194
195 /* P3 LVL_WAKEUP should be on LEVEL */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100196 err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P3_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200197 if (err)
198 goto out;
199 data |= LVL_WAKEUP;
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100200 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P3_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200201out:
202 if (err)
203 pr_err("TWL4030 wakeup sequence for P3 config error\n");
204 return err;
205}
206
Bill Pembertonf791be42012-11-19 13:23:04 -0500207static int twl4030_config_wakeup12_sequence(u8 address)
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200208{
209 int err = 0;
210 u8 data;
211
212 /* Set SLEEP to ACTIVE SEQ address for P1 and P2 */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100213 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A12);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200214 if (err)
215 goto out;
216
217 /* P1/P2 LVL_WAKEUP should be on LEVEL */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100218 err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P1_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200219 if (err)
220 goto out;
221
222 data |= LVL_WAKEUP;
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100223 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P1_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200224 if (err)
225 goto out;
226
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100227 err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P2_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200228 if (err)
229 goto out;
230
231 data |= LVL_WAKEUP;
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100232 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P2_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200233 if (err)
234 goto out;
235
236 if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) {
237 /* Disabling AC charger effect on sleep-active transitions */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100238 err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data,
239 R_CFG_P1_TRANSITION);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200240 if (err)
241 goto out;
242 data &= ~(1<<1);
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100243 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data,
244 R_CFG_P1_TRANSITION);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200245 if (err)
246 goto out;
247 }
248
249out:
250 if (err)
251 pr_err("TWL4030 wakeup sequence for P1 and P2" \
252 "config error\n");
253 return err;
254}
255
Bill Pembertonf791be42012-11-19 13:23:04 -0500256static int twl4030_config_sleep_sequence(u8 address)
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200257{
258 int err;
259
260 /* Set ACTIVE to SLEEP SEQ address in T2 memory*/
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100261 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_A2S);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200262
263 if (err)
264 pr_err("TWL4030 sleep sequence config error\n");
265
266 return err;
267}
268
Bill Pembertonf791be42012-11-19 13:23:04 -0500269static int twl4030_config_warmreset_sequence(u8 address)
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200270{
271 int err;
272 u8 rd_data;
273
274 /* Set WARM RESET SEQ address for P1 */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100275 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_WARM);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200276 if (err)
277 goto out;
278
279 /* P1/P2/P3 enable WARMRESET */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100280 err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P1_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200281 if (err)
282 goto out;
283
284 rd_data |= ENABLE_WARMRESET;
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100285 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P1_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200286 if (err)
287 goto out;
288
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100289 err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P2_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200290 if (err)
291 goto out;
292
293 rd_data |= ENABLE_WARMRESET;
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100294 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P2_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200295 if (err)
296 goto out;
297
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100298 err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P3_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200299 if (err)
300 goto out;
301
302 rd_data |= ENABLE_WARMRESET;
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100303 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P3_SW_EVENTS);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200304out:
305 if (err)
306 pr_err("TWL4030 warmreset seq config error\n");
307 return err;
308}
309
Bill Pembertonf791be42012-11-19 13:23:04 -0500310static int twl4030_configure_resource(struct twl4030_resconfig *rconfig)
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200311{
312 int rconfig_addr;
313 int err;
314 u8 type;
315 u8 grp;
Amit Kucheriab4ead612009-10-19 15:11:00 +0300316 u8 remap;
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200317
318 if (rconfig->resource > TOTAL_RESOURCES) {
319 pr_err("TWL4030 Resource %d does not exist\n",
320 rconfig->resource);
321 return -EINVAL;
322 }
323
324 rconfig_addr = res_config_addrs[rconfig->resource];
325
326 /* Set resource group */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100327 err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &grp,
Balaji T Kfc7b92f2009-12-13 21:23:33 +0100328 rconfig_addr + DEV_GRP_OFFSET);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200329 if (err) {
330 pr_err("TWL4030 Resource %d group could not be read\n",
331 rconfig->resource);
332 return err;
333 }
334
Aaro Koskinen56baa662009-10-19 21:24:02 +0200335 if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) {
Amit Kucheriae97d1542009-10-19 15:10:44 +0300336 grp &= ~DEV_GRP_MASK;
337 grp |= rconfig->devgroup << DEV_GRP_SHIFT;
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100338 err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
Balaji T Kfc7b92f2009-12-13 21:23:33 +0100339 grp, rconfig_addr + DEV_GRP_OFFSET);
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200340 if (err < 0) {
341 pr_err("TWL4030 failed to program devgroup\n");
342 return err;
343 }
344 }
345
346 /* Set resource types */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100347 err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &type,
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200348 rconfig_addr + TYPE_OFFSET);
349 if (err < 0) {
350 pr_err("TWL4030 Resource %d type could not be read\n",
351 rconfig->resource);
352 return err;
353 }
354
Aaro Koskinen56baa662009-10-19 21:24:02 +0200355 if (rconfig->type != TWL4030_RESCONFIG_UNDEF) {
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200356 type &= ~TYPE_MASK;
357 type |= rconfig->type << TYPE_SHIFT;
358 }
359
Aaro Koskinen56baa662009-10-19 21:24:02 +0200360 if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) {
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200361 type &= ~TYPE2_MASK;
362 type |= rconfig->type2 << TYPE2_SHIFT;
363 }
364
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100365 err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200366 type, rconfig_addr + TYPE_OFFSET);
367 if (err < 0) {
368 pr_err("TWL4030 failed to program resource type\n");
369 return err;
370 }
371
Amit Kucheriab4ead612009-10-19 15:11:00 +0300372 /* Set remap states */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100373 err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &remap,
Balaji T Kfc7b92f2009-12-13 21:23:33 +0100374 rconfig_addr + REMAP_OFFSET);
Amit Kucheriab4ead612009-10-19 15:11:00 +0300375 if (err < 0) {
376 pr_err("TWL4030 Resource %d remap could not be read\n",
377 rconfig->resource);
378 return err;
379 }
380
Amit Kucheria53cf9a62009-10-21 14:49:22 +0300381 if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) {
Amit Kucheriab4ead612009-10-19 15:11:00 +0300382 remap &= ~OFF_STATE_MASK;
383 remap |= rconfig->remap_off << OFF_STATE_SHIFT;
384 }
385
Amit Kucheria53cf9a62009-10-21 14:49:22 +0300386 if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) {
Amit Kucheriab4ead612009-10-19 15:11:00 +0300387 remap &= ~SLEEP_STATE_MASK;
Mike Turquette1ea933f2010-02-05 09:51:37 +0100388 remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT;
Amit Kucheriab4ead612009-10-19 15:11:00 +0300389 }
390
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100391 err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
Balaji T Kfc7b92f2009-12-13 21:23:33 +0100392 remap,
393 rconfig_addr + REMAP_OFFSET);
Amit Kucheriab4ead612009-10-19 15:11:00 +0300394 if (err < 0) {
395 pr_err("TWL4030 failed to program remap\n");
396 return err;
397 }
398
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200399 return 0;
400}
401
Bill Pembertonf791be42012-11-19 13:23:04 -0500402static int load_twl4030_script(struct twl4030_script *tscript,
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200403 u8 address)
404{
405 int err;
Amit Kucheria75a74562009-08-17 17:01:56 +0300406 static int order;
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200407
408 /* Make sure the script isn't going beyond last valid address (0x3f) */
409 if ((address + tscript->size) > END_OF_SCRIPT) {
410 pr_err("TWL4030 scripts too big error\n");
411 return -EINVAL;
412 }
413
414 err = twl4030_write_script(address, tscript->script, tscript->size);
415 if (err)
416 goto out;
417
418 if (tscript->flags & TWL4030_WRST_SCRIPT) {
419 err = twl4030_config_warmreset_sequence(address);
420 if (err)
421 goto out;
422 }
423 if (tscript->flags & TWL4030_WAKEUP12_SCRIPT) {
424 err = twl4030_config_wakeup12_sequence(address);
425 if (err)
426 goto out;
Amit Kucheria75a74562009-08-17 17:01:56 +0300427 order = 1;
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200428 }
429 if (tscript->flags & TWL4030_WAKEUP3_SCRIPT) {
430 err = twl4030_config_wakeup3_sequence(address);
431 if (err)
432 goto out;
433 }
Lesly A Mc62dd362011-04-14 17:57:49 +0530434 if (tscript->flags & TWL4030_SLEEP_SCRIPT) {
Lesly A M1f968ff2011-04-14 17:57:50 +0530435 if (!order)
Amit Kucheria75a74562009-08-17 17:01:56 +0300436 pr_warning("TWL4030: Bad order of scripts (sleep "\
437 "script before wakeup) Leads to boot"\
438 "failure on some boards\n");
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200439 err = twl4030_config_sleep_sequence(address);
Lesly A Mc62dd362011-04-14 17:57:49 +0530440 }
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200441out:
442 return err;
443}
444
Mike Turquette11a441c2010-02-22 11:16:30 -0600445int twl4030_remove_script(u8 flags)
446{
447 int err = 0;
448
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100449 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
450 TWL4030_PM_MASTER_PROTECT_KEY);
Mike Turquette11a441c2010-02-22 11:16:30 -0600451 if (err) {
452 pr_err("twl4030: unable to unlock PROTECT_KEY\n");
453 return err;
454 }
455
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100456 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
457 TWL4030_PM_MASTER_PROTECT_KEY);
Mike Turquette11a441c2010-02-22 11:16:30 -0600458 if (err) {
459 pr_err("twl4030: unable to unlock PROTECT_KEY\n");
460 return err;
461 }
462
463 if (flags & TWL4030_WRST_SCRIPT) {
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100464 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
465 R_SEQ_ADD_WARM);
Mike Turquette11a441c2010-02-22 11:16:30 -0600466 if (err)
467 return err;
468 }
469 if (flags & TWL4030_WAKEUP12_SCRIPT) {
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100470 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
471 R_SEQ_ADD_S2A12);
Lesly A Meac78a22011-05-04 17:38:53 +0530472 if (err)
Mike Turquette11a441c2010-02-22 11:16:30 -0600473 return err;
474 }
475 if (flags & TWL4030_WAKEUP3_SCRIPT) {
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100476 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
477 R_SEQ_ADD_S2A3);
Mike Turquette11a441c2010-02-22 11:16:30 -0600478 if (err)
479 return err;
480 }
481 if (flags & TWL4030_SLEEP_SCRIPT) {
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100482 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
483 R_SEQ_ADD_A2S);
Mike Turquette11a441c2010-02-22 11:16:30 -0600484 if (err)
485 return err;
486 }
487
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100488 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
489 TWL4030_PM_MASTER_PROTECT_KEY);
Mike Turquette11a441c2010-02-22 11:16:30 -0600490 if (err)
491 pr_err("TWL4030 Unable to relock registers\n");
492
493 return err;
494}
495
Florian Vaussardf58cb402013-06-18 15:17:57 +0200496int twl4030_power_configure_scripts(struct twl4030_power_data *pdata)
497{
498 int err;
499 int i;
500 u8 address = twl4030_start_script_address;
501
502 for (i = 0; i < pdata->num; i++) {
503 err = load_twl4030_script(pdata->scripts[i], address);
504 if (err)
505 return err;
506 address += pdata->scripts[i]->size;
507 }
508
509 return 0;
510}
511
512int twl4030_power_configure_resources(struct twl4030_power_data *pdata)
513{
514 struct twl4030_resconfig *resconfig = pdata->resource_config;
515 int err;
516
517 if (resconfig) {
518 while (resconfig->resource) {
519 err = twl4030_configure_resource(resconfig);
520 if (err)
521 return err;
522 resconfig++;
523 }
524 }
525
526 return 0;
527}
528
Igor Grinberg26cc3ab2011-11-13 11:49:50 +0200529/*
530 * In master mode, start the power off sequence.
531 * After a successful execution, TWL shuts down the power to the SoC
532 * and all peripherals connected to it.
533 */
534void twl4030_power_off(void)
535{
536 int err;
537
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100538 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, PWR_DEVOFF,
Igor Grinberg26cc3ab2011-11-13 11:49:50 +0200539 TWL4030_PM_MASTER_P1_SW_EVENTS);
540 if (err)
541 pr_err("TWL4030 Unable to power off\n");
542}
543
Florian Vaussardb0fc1da2013-06-18 15:17:58 +0200544static bool twl4030_power_use_poweroff(struct twl4030_power_data *pdata,
545 struct device_node *node)
546{
547 if (pdata && pdata->use_poweroff)
548 return true;
549
550 if (of_property_read_bool(node, "ti,use_poweroff"))
551 return true;
552
553 return false;
554}
555
Florian Vaussard637d6892013-06-18 15:17:56 +0200556int twl4030_power_probe(struct platform_device *pdev)
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200557{
Florian Vaussard637d6892013-06-18 15:17:56 +0200558 struct twl4030_power_data *pdata = pdev->dev.platform_data;
Florian Vaussardb0fc1da2013-06-18 15:17:58 +0200559 struct device_node *node = pdev->dev.of_node;
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200560 int err = 0;
Florian Vaussardcb3cabd2013-06-18 15:18:00 +0200561 int err2 = 0;
Florian Vaussardf58cb402013-06-18 15:17:57 +0200562 u8 val;
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200563
Florian Vaussardb0fc1da2013-06-18 15:17:58 +0200564 if (!pdata && !node) {
565 dev_err(&pdev->dev, "Platform data is missing\n");
566 return -EINVAL;
567 }
568
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100569 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
570 TWL4030_PM_MASTER_PROTECT_KEY);
Florian Vaussarde77a4c22013-06-18 15:17:59 +0200571 err |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
572 TWL4030_PM_MASTER_KEY_CFG2,
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100573 TWL4030_PM_MASTER_PROTECT_KEY);
Florian Vaussarde77a4c22013-06-18 15:17:59 +0200574
575 if (err) {
576 pr_err("TWL4030 Unable to unlock registers\n");
577 return err;
578 }
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200579
Florian Vaussardb0fc1da2013-06-18 15:17:58 +0200580 if (pdata) {
581 /* TODO: convert to device tree */
582 err = twl4030_power_configure_scripts(pdata);
Florian Vaussarde77a4c22013-06-18 15:17:59 +0200583 if (err) {
584 pr_err("TWL4030 failed to load scripts\n");
Florian Vaussardcb3cabd2013-06-18 15:18:00 +0200585 goto relock;
Florian Vaussarde77a4c22013-06-18 15:17:59 +0200586 }
Florian Vaussardb0fc1da2013-06-18 15:17:58 +0200587 err = twl4030_power_configure_resources(pdata);
Florian Vaussarde77a4c22013-06-18 15:17:59 +0200588 if (err) {
589 pr_err("TWL4030 failed to configure resource\n");
Florian Vaussardcb3cabd2013-06-18 15:18:00 +0200590 goto relock;
Florian Vaussarde77a4c22013-06-18 15:17:59 +0200591 }
Florian Vaussardb0fc1da2013-06-18 15:17:58 +0200592 }
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200593
Igor Grinberg26cc3ab2011-11-13 11:49:50 +0200594 /* Board has to be wired properly to use this feature */
Florian Vaussardb0fc1da2013-06-18 15:17:58 +0200595 if (twl4030_power_use_poweroff(pdata, node) && !pm_power_off) {
Igor Grinberg26cc3ab2011-11-13 11:49:50 +0200596 /* Default for SEQ_OFFSYNC is set, lets ensure this */
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100597 err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
Igor Grinberg26cc3ab2011-11-13 11:49:50 +0200598 TWL4030_PM_MASTER_CFG_P123_TRANSITION);
599 if (err) {
600 pr_warning("TWL4030 Unable to read registers\n");
601
602 } else if (!(val & SEQ_OFFSYNC)) {
603 val |= SEQ_OFFSYNC;
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100604 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val,
Igor Grinberg26cc3ab2011-11-13 11:49:50 +0200605 TWL4030_PM_MASTER_CFG_P123_TRANSITION);
606 if (err) {
607 pr_err("TWL4030 Unable to setup SEQ_OFFSYNC\n");
608 goto relock;
609 }
610 }
611
612 pm_power_off = twl4030_power_off;
613 }
614
615relock:
Florian Vaussardcb3cabd2013-06-18 15:18:00 +0200616 err2 = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
Peter Ujfalusi4850f122012-11-13 09:28:52 +0100617 TWL4030_PM_MASTER_PROTECT_KEY);
Florian Vaussardcb3cabd2013-06-18 15:18:00 +0200618 if (err2) {
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200619 pr_err("TWL4030 Unable to relock registers\n");
Florian Vaussardcb3cabd2013-06-18 15:18:00 +0200620 return err2;
621 }
622
Florian Vaussard637d6892013-06-18 15:17:56 +0200623 return err;
Amit Kucheriaebf0bd32009-08-31 18:32:18 +0200624}
Florian Vaussard637d6892013-06-18 15:17:56 +0200625
626static int twl4030_power_remove(struct platform_device *pdev)
627{
628 return 0;
629}
630
Florian Vaussardb0fc1da2013-06-18 15:17:58 +0200631#ifdef CONFIG_OF
632static const struct of_device_id twl4030_power_of_match[] = {
633 {.compatible = "ti,twl4030-power", },
634 { },
635};
636MODULE_DEVICE_TABLE(of, twl4030_power_of_match);
637#endif
638
Florian Vaussard637d6892013-06-18 15:17:56 +0200639static struct platform_driver twl4030_power_driver = {
640 .driver = {
641 .name = "twl4030_power",
642 .owner = THIS_MODULE,
Florian Vaussardb0fc1da2013-06-18 15:17:58 +0200643 .of_match_table = of_match_ptr(twl4030_power_of_match),
Florian Vaussard637d6892013-06-18 15:17:56 +0200644 },
645 .probe = twl4030_power_probe,
646 .remove = twl4030_power_remove,
647};
648
649module_platform_driver(twl4030_power_driver);
650
651MODULE_AUTHOR("Nokia Corporation");
652MODULE_AUTHOR("Texas Instruments, Inc.");
653MODULE_DESCRIPTION("Power management for TWL4030");
654MODULE_LICENSE("GPL");
655MODULE_ALIAS("platform:twl4030_power");