blob: 02a55f50f03fa47eb84fea89f62a68cdd52d9961 [file] [log] [blame]
Mingkai Hu8b60d6c2010-10-12 18:18:32 +08001/*
2 * Freescale eSPI controller driver.
3 *
4 * Copyright 2010 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080011#include <linux/delay.h>
Xiubo Lia3108362014-09-29 10:57:06 +080012#include <linux/err.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080013#include <linux/fsl_devices.h>
Xiubo Lia3108362014-09-29 10:57:06 +080014#include <linux/interrupt.h>
Xiubo Lia3108362014-09-29 10:57:06 +080015#include <linux/module.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080016#include <linux/mm.h>
17#include <linux/of.h>
Rob Herring5af50732013-09-17 14:28:33 -050018#include <linux/of_address.h>
19#include <linux/of_irq.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080020#include <linux/of_platform.h>
Xiubo Lia3108362014-09-29 10:57:06 +080021#include <linux/platform_device.h>
22#include <linux/spi/spi.h>
Heiner Kallweite9abb4d2015-08-26 21:21:55 +020023#include <linux/pm_runtime.h>
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080024#include <sysdev/fsl_soc.h>
25
Grant Likelyca632f52011-06-06 01:16:30 -060026#include "spi-fsl-lib.h"
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080027
28/* eSPI Controller registers */
29struct fsl_espi_reg {
30 __be32 mode; /* 0x000 - eSPI mode register */
31 __be32 event; /* 0x004 - eSPI event register */
32 __be32 mask; /* 0x008 - eSPI mask register */
33 __be32 command; /* 0x00c - eSPI command register */
34 __be32 transmit; /* 0x010 - eSPI transmit FIFO access register*/
35 __be32 receive; /* 0x014 - eSPI receive FIFO access register*/
36 u8 res[8]; /* 0x018 - 0x01c reserved */
37 __be32 csmode[4]; /* 0x020 - 0x02c eSPI cs mode register */
38};
39
40struct fsl_espi_transfer {
41 const void *tx_buf;
42 void *rx_buf;
43 unsigned len;
44 unsigned n_tx;
45 unsigned n_rx;
46 unsigned actual_length;
47 int status;
48};
49
50/* eSPI Controller mode register definitions */
51#define SPMODE_ENABLE (1 << 31)
52#define SPMODE_LOOP (1 << 30)
53#define SPMODE_TXTHR(x) ((x) << 8)
54#define SPMODE_RXTHR(x) ((x) << 0)
55
56/* eSPI Controller CS mode register definitions */
57#define CSMODE_CI_INACTIVEHIGH (1 << 31)
58#define CSMODE_CP_BEGIN_EDGECLK (1 << 30)
59#define CSMODE_REV (1 << 29)
60#define CSMODE_DIV16 (1 << 28)
61#define CSMODE_PM(x) ((x) << 24)
62#define CSMODE_POL_1 (1 << 20)
63#define CSMODE_LEN(x) ((x) << 16)
64#define CSMODE_BEF(x) ((x) << 12)
65#define CSMODE_AFT(x) ((x) << 8)
66#define CSMODE_CG(x) ((x) << 3)
67
68/* Default mode/csmode for eSPI controller */
69#define SPMODE_INIT_VAL (SPMODE_TXTHR(4) | SPMODE_RXTHR(3))
70#define CSMODE_INIT_VAL (CSMODE_POL_1 | CSMODE_BEF(0) \
71 | CSMODE_AFT(0) | CSMODE_CG(1))
72
73/* SPIE register values */
74#define SPIE_NE 0x00000200 /* Not empty */
75#define SPIE_NF 0x00000100 /* Not full */
76
77/* SPIM register values */
78#define SPIM_NE 0x00000200 /* Not empty */
79#define SPIM_NF 0x00000100 /* Not full */
80#define SPIE_RXCNT(reg) ((reg >> 24) & 0x3F)
81#define SPIE_TXCNT(reg) ((reg >> 16) & 0x3F)
82
83/* SPCOM register values */
84#define SPCOM_CS(x) ((x) << 30)
85#define SPCOM_TRANLEN(x) ((x) << 0)
Hou Zhiqiang5cfa1e42016-01-22 18:58:26 +080086#define SPCOM_TRANLEN_MAX 0x10000 /* Max transaction length */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080087
Heiner Kallweite9abb4d2015-08-26 21:21:55 +020088#define AUTOSUSPEND_TIMEOUT 2000
89
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080090static void fsl_espi_change_mode(struct spi_device *spi)
91{
92 struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
93 struct spi_mpc8xxx_cs *cs = spi->controller_state;
94 struct fsl_espi_reg *reg_base = mspi->reg_base;
95 __be32 __iomem *mode = &reg_base->csmode[spi->chip_select];
96 __be32 __iomem *espi_mode = &reg_base->mode;
97 u32 tmp;
98 unsigned long flags;
99
100 /* Turn off IRQs locally to minimize time that SPI is disabled. */
101 local_irq_save(flags);
102
103 /* Turn off SPI unit prior changing mode */
104 tmp = mpc8xxx_spi_read_reg(espi_mode);
105 mpc8xxx_spi_write_reg(espi_mode, tmp & ~SPMODE_ENABLE);
106 mpc8xxx_spi_write_reg(mode, cs->hw_mode);
107 mpc8xxx_spi_write_reg(espi_mode, tmp);
108
109 local_irq_restore(flags);
110}
111
112static u32 fsl_espi_tx_buf_lsb(struct mpc8xxx_spi *mpc8xxx_spi)
113{
114 u32 data;
115 u16 data_h;
116 u16 data_l;
117 const u32 *tx = mpc8xxx_spi->tx;
118
119 if (!tx)
120 return 0;
121
122 data = *tx++ << mpc8xxx_spi->tx_shift;
123 data_l = data & 0xffff;
124 data_h = (data >> 16) & 0xffff;
125 swab16s(&data_l);
126 swab16s(&data_h);
127 data = data_h | data_l;
128
129 mpc8xxx_spi->tx = tx;
130 return data;
131}
132
Heiner Kallweitea616ee2016-08-25 06:44:42 +0200133static void fsl_espi_setup_transfer(struct spi_device *spi,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800134 struct spi_transfer *t)
135{
136 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
137 int bits_per_word = 0;
138 u8 pm;
139 u32 hz = 0;
140 struct spi_mpc8xxx_cs *cs = spi->controller_state;
141
142 if (t) {
143 bits_per_word = t->bits_per_word;
144 hz = t->speed_hz;
145 }
146
147 /* spi_transfer level calls that work per-word */
148 if (!bits_per_word)
149 bits_per_word = spi->bits_per_word;
150
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800151 if (!hz)
152 hz = spi->max_speed_hz;
153
154 cs->rx_shift = 0;
155 cs->tx_shift = 0;
156 cs->get_rx = mpc8xxx_spi_rx_buf_u32;
157 cs->get_tx = mpc8xxx_spi_tx_buf_u32;
158 if (bits_per_word <= 8) {
159 cs->rx_shift = 8 - bits_per_word;
Stephen Warren51faed62013-05-30 09:59:41 -0600160 } else {
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800161 cs->rx_shift = 16 - bits_per_word;
162 if (spi->mode & SPI_LSB_FIRST)
163 cs->get_tx = fsl_espi_tx_buf_lsb;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800164 }
165
166 mpc8xxx_spi->rx_shift = cs->rx_shift;
167 mpc8xxx_spi->tx_shift = cs->tx_shift;
168 mpc8xxx_spi->get_rx = cs->get_rx;
169 mpc8xxx_spi->get_tx = cs->get_tx;
170
171 bits_per_word = bits_per_word - 1;
172
173 /* mask out bits we are going to set */
174 cs->hw_mode &= ~(CSMODE_LEN(0xF) | CSMODE_DIV16 | CSMODE_PM(0xF));
175
176 cs->hw_mode |= CSMODE_LEN(bits_per_word);
177
178 if ((mpc8xxx_spi->spibrg / hz) > 64) {
179 cs->hw_mode |= CSMODE_DIV16;
Sebastian Andrzej Siewior35faa552012-03-15 18:42:31 +0100180 pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 16 * 4);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800181
Sebastian Andrzej Siewior87bf5ab2012-03-15 18:42:32 +0100182 WARN_ONCE(pm > 33, "%s: Requested speed is too low: %d Hz. "
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800183 "Will use %d Hz instead.\n", dev_name(&spi->dev),
Sebastian Andrzej Siewior87bf5ab2012-03-15 18:42:32 +0100184 hz, mpc8xxx_spi->spibrg / (4 * 16 * (32 + 1)));
185 if (pm > 33)
186 pm = 33;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800187 } else {
Sebastian Andrzej Siewior35faa552012-03-15 18:42:31 +0100188 pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 4);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800189 }
190 if (pm)
191 pm--;
Sebastian Andrzej Siewior87bf5ab2012-03-15 18:42:32 +0100192 if (pm < 2)
193 pm = 2;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800194
195 cs->hw_mode |= CSMODE_PM(pm);
196
197 fsl_espi_change_mode(spi);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800198}
199
200static int fsl_espi_cpu_bufs(struct mpc8xxx_spi *mspi, struct spi_transfer *t,
201 unsigned int len)
202{
203 u32 word;
204 struct fsl_espi_reg *reg_base = mspi->reg_base;
205
206 mspi->count = len;
207
208 /* enable rx ints */
209 mpc8xxx_spi_write_reg(&reg_base->mask, SPIM_NE);
210
211 /* transmit word */
212 word = mspi->get_tx(mspi);
213 mpc8xxx_spi_write_reg(&reg_base->transmit, word);
214
215 return 0;
216}
217
218static int fsl_espi_bufs(struct spi_device *spi, struct spi_transfer *t)
219{
220 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
221 struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;
222 unsigned int len = t->len;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800223 int ret;
224
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800225 mpc8xxx_spi->len = t->len;
226 len = roundup(len, 4) / 4;
227
228 mpc8xxx_spi->tx = t->tx_buf;
229 mpc8xxx_spi->rx = t->rx_buf;
230
Wolfram Sang16735d02013-11-14 14:32:02 -0800231 reinit_completion(&mpc8xxx_spi->done);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800232
233 /* Set SPCOM[CS] and SPCOM[TRANLEN] field */
Hou Zhiqiang5cfa1e42016-01-22 18:58:26 +0800234 if (t->len > SPCOM_TRANLEN_MAX) {
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800235 dev_err(mpc8xxx_spi->dev, "Transaction length (%d)"
236 " beyond the SPCOM[TRANLEN] field\n", t->len);
237 return -EINVAL;
238 }
239 mpc8xxx_spi_write_reg(&reg_base->command,
240 (SPCOM_CS(spi->chip_select) | SPCOM_TRANLEN(t->len - 1)));
241
242 ret = fsl_espi_cpu_bufs(mpc8xxx_spi, t, len);
243 if (ret)
244 return ret;
245
Nobuteru Hayashiaa70e562016-03-18 11:35:21 +0000246 /* Won't hang up forever, SPI bus sometimes got lost interrupts... */
247 ret = wait_for_completion_timeout(&mpc8xxx_spi->done, 2 * HZ);
248 if (ret == 0)
249 dev_err(mpc8xxx_spi->dev,
250 "Transaction hanging up (left %d bytes)\n",
251 mpc8xxx_spi->count);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800252
253 /* disable rx ints */
254 mpc8xxx_spi_write_reg(&reg_base->mask, 0);
255
256 return mpc8xxx_spi->count;
257}
258
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800259static void fsl_espi_do_trans(struct spi_message *m,
260 struct fsl_espi_transfer *tr)
261{
262 struct spi_device *spi = m->spi;
263 struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
264 struct fsl_espi_transfer *espi_trans = tr;
265 struct spi_message message;
266 struct spi_transfer *t, *first, trans;
267 int status = 0;
268
269 spi_message_init(&message);
270 memset(&trans, 0, sizeof(trans));
271
272 first = list_first_entry(&m->transfers, struct spi_transfer,
273 transfer_list);
274 list_for_each_entry(t, &m->transfers, transfer_list) {
275 if ((first->bits_per_word != t->bits_per_word) ||
276 (first->speed_hz != t->speed_hz)) {
277 espi_trans->status = -EINVAL;
Jarkko Nikulaf6bd03a2013-10-11 13:54:00 +0300278 dev_err(mspi->dev,
279 "bits_per_word/speed_hz should be same for the same SPI transfer\n");
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800280 return;
281 }
282
283 trans.speed_hz = t->speed_hz;
284 trans.bits_per_word = t->bits_per_word;
285 trans.delay_usecs = max(first->delay_usecs, t->delay_usecs);
286 }
287
288 trans.len = espi_trans->len;
289 trans.tx_buf = espi_trans->tx_buf;
290 trans.rx_buf = espi_trans->rx_buf;
291 spi_message_add_tail(&trans, &message);
292
293 list_for_each_entry(t, &message.transfers, transfer_list) {
Heiner Kallweitea616ee2016-08-25 06:44:42 +0200294 if (t->bits_per_word || t->speed_hz)
295 fsl_espi_setup_transfer(spi, t);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800296
297 if (t->len)
298 status = fsl_espi_bufs(spi, t);
299
300 if (status) {
301 status = -EMSGSIZE;
302 break;
303 }
304
305 if (t->delay_usecs)
306 udelay(t->delay_usecs);
307 }
308
309 espi_trans->status = status;
310 fsl_espi_setup_transfer(spi, NULL);
311}
312
313static void fsl_espi_cmd_trans(struct spi_message *m,
314 struct fsl_espi_transfer *trans, u8 *rx_buff)
315{
316 struct spi_transfer *t;
317 u8 *local_buf;
318 int i = 0;
319 struct fsl_espi_transfer *espi_trans = trans;
320
321 local_buf = kzalloc(SPCOM_TRANLEN_MAX, GFP_KERNEL);
322 if (!local_buf) {
323 espi_trans->status = -ENOMEM;
324 return;
325 }
326
327 list_for_each_entry(t, &m->transfers, transfer_list) {
328 if (t->tx_buf) {
329 memcpy(local_buf + i, t->tx_buf, t->len);
330 i += t->len;
331 }
332 }
333
334 espi_trans->tx_buf = local_buf;
Valentin Longchampa2cb1be2014-05-16 16:46:21 +0200335 espi_trans->rx_buf = local_buf;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800336 fsl_espi_do_trans(m, espi_trans);
337
338 espi_trans->actual_length = espi_trans->len;
339 kfree(local_buf);
340}
341
342static void fsl_espi_rw_trans(struct spi_message *m,
343 struct fsl_espi_transfer *trans, u8 *rx_buff)
344{
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800345 struct spi_transfer *t;
346 u8 *local_buf;
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200347 unsigned int tx_only = 0;
348 int i = 0;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800349
350 local_buf = kzalloc(SPCOM_TRANLEN_MAX, GFP_KERNEL);
351 if (!local_buf) {
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200352 trans->status = -ENOMEM;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800353 return;
354 }
355
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200356 list_for_each_entry(t, &m->transfers, transfer_list) {
357 if (t->tx_buf) {
358 memcpy(local_buf + i, t->tx_buf, t->len);
359 i += t->len;
360 if (!t->rx_buf)
361 tx_only += t->len;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800362 }
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200363 }
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800364
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200365 trans->tx_buf = local_buf;
366 trans->rx_buf = local_buf;
367 fsl_espi_do_trans(m, trans);
Jonatas Rech20000582015-04-15 12:23:18 -0300368
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200369 if (!trans->status) {
370 /* If there is at least one RX byte then copy it to rx_buff */
371 if (trans->len > tx_only)
372 memcpy(rx_buff, trans->rx_buf + tx_only,
373 trans->len - tx_only);
374 trans->actual_length += trans->len;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800375 }
376
377 kfree(local_buf);
378}
379
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100380static int fsl_espi_do_one_msg(struct spi_master *master,
381 struct spi_message *m)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800382{
383 struct spi_transfer *t;
384 u8 *rx_buf = NULL;
385 unsigned int n_tx = 0;
386 unsigned int n_rx = 0;
Jonatas Rech20000582015-04-15 12:23:18 -0300387 unsigned int xfer_len = 0;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800388 struct fsl_espi_transfer espi_trans;
389
390 list_for_each_entry(t, &m->transfers, transfer_list) {
391 if (t->tx_buf)
392 n_tx += t->len;
393 if (t->rx_buf) {
394 n_rx += t->len;
395 rx_buf = t->rx_buf;
396 }
Jonatas Rech20000582015-04-15 12:23:18 -0300397 if ((t->tx_buf) || (t->rx_buf))
398 xfer_len += t->len;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800399 }
400
401 espi_trans.n_tx = n_tx;
402 espi_trans.n_rx = n_rx;
Jonatas Rech20000582015-04-15 12:23:18 -0300403 espi_trans.len = xfer_len;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800404 espi_trans.actual_length = 0;
405 espi_trans.status = 0;
406
407 if (!rx_buf)
408 fsl_espi_cmd_trans(m, &espi_trans, NULL);
409 else
410 fsl_espi_rw_trans(m, &espi_trans, rx_buf);
411
412 m->actual_length = espi_trans.actual_length;
413 m->status = espi_trans.status;
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100414 spi_finalize_current_message(master);
415 return 0;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800416}
417
418static int fsl_espi_setup(struct spi_device *spi)
419{
420 struct mpc8xxx_spi *mpc8xxx_spi;
421 struct fsl_espi_reg *reg_base;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800422 u32 hw_mode;
423 u32 loop_mode;
Axel Lind9f26742014-08-31 12:44:09 +0800424 struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800425
426 if (!spi->max_speed_hz)
427 return -EINVAL;
428
429 if (!cs) {
Axel Lind9f26742014-08-31 12:44:09 +0800430 cs = kzalloc(sizeof(*cs), GFP_KERNEL);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800431 if (!cs)
432 return -ENOMEM;
Axel Lind9f26742014-08-31 12:44:09 +0800433 spi_set_ctldata(spi, cs);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800434 }
435
436 mpc8xxx_spi = spi_master_get_devdata(spi->master);
437 reg_base = mpc8xxx_spi->reg_base;
438
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200439 pm_runtime_get_sync(mpc8xxx_spi->dev);
440
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300441 hw_mode = cs->hw_mode; /* Save original settings */
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800442 cs->hw_mode = mpc8xxx_spi_read_reg(
443 &reg_base->csmode[spi->chip_select]);
444 /* mask out bits we are going to set */
445 cs->hw_mode &= ~(CSMODE_CP_BEGIN_EDGECLK | CSMODE_CI_INACTIVEHIGH
446 | CSMODE_REV);
447
448 if (spi->mode & SPI_CPHA)
449 cs->hw_mode |= CSMODE_CP_BEGIN_EDGECLK;
450 if (spi->mode & SPI_CPOL)
451 cs->hw_mode |= CSMODE_CI_INACTIVEHIGH;
452 if (!(spi->mode & SPI_LSB_FIRST))
453 cs->hw_mode |= CSMODE_REV;
454
455 /* Handle the loop mode */
456 loop_mode = mpc8xxx_spi_read_reg(&reg_base->mode);
457 loop_mode &= ~SPMODE_LOOP;
458 if (spi->mode & SPI_LOOP)
459 loop_mode |= SPMODE_LOOP;
460 mpc8xxx_spi_write_reg(&reg_base->mode, loop_mode);
461
Heiner Kallweitea616ee2016-08-25 06:44:42 +0200462 fsl_espi_setup_transfer(spi, NULL);
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200463
464 pm_runtime_mark_last_busy(mpc8xxx_spi->dev);
465 pm_runtime_put_autosuspend(mpc8xxx_spi->dev);
466
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800467 return 0;
468}
469
Axel Lind9f26742014-08-31 12:44:09 +0800470static void fsl_espi_cleanup(struct spi_device *spi)
471{
472 struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi);
473
474 kfree(cs);
475 spi_set_ctldata(spi, NULL);
476}
477
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800478void fsl_espi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events)
479{
480 struct fsl_espi_reg *reg_base = mspi->reg_base;
481
482 /* We need handle RX first */
483 if (events & SPIE_NE) {
Mingkai Hue6289d62010-12-21 09:26:07 +0800484 u32 rx_data, tmp;
485 u8 rx_data_8;
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000486 int rx_nr_bytes = 4;
Nobuteru Hayashia12ddd62016-03-18 11:35:21 +0000487 int ret;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800488
489 /* Spin until RX is done */
Nobuteru Hayashia12ddd62016-03-18 11:35:21 +0000490 if (SPIE_RXCNT(events) < min(4, mspi->len)) {
491 ret = spin_event_timeout(
492 !(SPIE_RXCNT(events =
493 mpc8xxx_spi_read_reg(&reg_base->event)) <
494 min(4, mspi->len)),
495 10000, 0); /* 10 msec */
496 if (!ret)
497 dev_err(mspi->dev,
498 "tired waiting for SPIE_RXCNT\n");
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800499 }
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800500
Mingkai Hue6289d62010-12-21 09:26:07 +0800501 if (mspi->len >= 4) {
502 rx_data = mpc8xxx_spi_read_reg(&reg_base->receive);
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000503 } else if (mspi->len <= 0) {
504 dev_err(mspi->dev,
505 "unexpected RX(SPIE_NE) interrupt occurred,\n"
506 "(local rxlen %d bytes, reg rxlen %d bytes)\n",
507 min(4, mspi->len), SPIE_RXCNT(events));
508 rx_nr_bytes = 0;
Mingkai Hue6289d62010-12-21 09:26:07 +0800509 } else {
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000510 rx_nr_bytes = mspi->len;
Mingkai Hue6289d62010-12-21 09:26:07 +0800511 tmp = mspi->len;
512 rx_data = 0;
513 while (tmp--) {
514 rx_data_8 = in_8((u8 *)&reg_base->receive);
515 rx_data |= (rx_data_8 << (tmp * 8));
516 }
517
518 rx_data <<= (4 - mspi->len) * 8;
519 }
520
Nobuteru Hayashi6319a682016-03-18 11:35:21 +0000521 mspi->len -= rx_nr_bytes;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800522
523 if (mspi->rx)
524 mspi->get_rx(rx_data, mspi);
525 }
526
527 if (!(events & SPIE_NF)) {
528 int ret;
529
530 /* spin until TX is done */
531 ret = spin_event_timeout(((events = mpc8xxx_spi_read_reg(
Jane Wan7a0a1752015-05-01 16:37:42 -0700532 &reg_base->event)) & SPIE_NF), 1000, 0);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800533 if (!ret) {
534 dev_err(mspi->dev, "tired waiting for SPIE_NF\n");
Jane Wan7a0a1752015-05-01 16:37:42 -0700535
536 /* Clear the SPIE bits */
537 mpc8xxx_spi_write_reg(&reg_base->event, events);
538 complete(&mspi->done);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800539 return;
540 }
541 }
542
543 /* Clear the events */
544 mpc8xxx_spi_write_reg(&reg_base->event, events);
545
546 mspi->count -= 1;
547 if (mspi->count) {
548 u32 word = mspi->get_tx(mspi);
549
550 mpc8xxx_spi_write_reg(&reg_base->transmit, word);
551 } else {
552 complete(&mspi->done);
553 }
554}
555
556static irqreturn_t fsl_espi_irq(s32 irq, void *context_data)
557{
558 struct mpc8xxx_spi *mspi = context_data;
559 struct fsl_espi_reg *reg_base = mspi->reg_base;
560 irqreturn_t ret = IRQ_NONE;
561 u32 events;
562
563 /* Get interrupt events(tx/rx) */
564 events = mpc8xxx_spi_read_reg(&reg_base->event);
565 if (events)
566 ret = IRQ_HANDLED;
567
568 dev_vdbg(mspi->dev, "%s: events %x\n", __func__, events);
569
570 fsl_espi_cpu_irq(mspi, events);
571
572 return ret;
573}
574
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200575#ifdef CONFIG_PM
576static int fsl_espi_runtime_suspend(struct device *dev)
Heiner Kallweit75506d02014-12-03 07:56:19 +0100577{
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200578 struct spi_master *master = dev_get_drvdata(dev);
579 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);
580 struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;
Heiner Kallweit75506d02014-12-03 07:56:19 +0100581 u32 regval;
582
Heiner Kallweit75506d02014-12-03 07:56:19 +0100583 regval = mpc8xxx_spi_read_reg(&reg_base->mode);
584 regval &= ~SPMODE_ENABLE;
585 mpc8xxx_spi_write_reg(&reg_base->mode, regval);
586
587 return 0;
588}
589
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200590static int fsl_espi_runtime_resume(struct device *dev)
Heiner Kallweit75506d02014-12-03 07:56:19 +0100591{
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200592 struct spi_master *master = dev_get_drvdata(dev);
593 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);
594 struct fsl_espi_reg *reg_base = mpc8xxx_spi->reg_base;
Heiner Kallweit75506d02014-12-03 07:56:19 +0100595 u32 regval;
596
Heiner Kallweit75506d02014-12-03 07:56:19 +0100597 regval = mpc8xxx_spi_read_reg(&reg_base->mode);
598 regval |= SPMODE_ENABLE;
599 mpc8xxx_spi_write_reg(&reg_base->mode, regval);
600
601 return 0;
602}
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200603#endif
Heiner Kallweit75506d02014-12-03 07:56:19 +0100604
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200605static size_t fsl_espi_max_message_size(struct spi_device *spi)
Michal Suchanekb541eef2015-12-02 10:38:21 +0000606{
607 return SPCOM_TRANLEN_MAX;
608}
609
Grant Likelyfd4a3192012-12-07 16:57:14 +0000610static struct spi_master * fsl_espi_probe(struct device *dev,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800611 struct resource *mem, unsigned int irq)
612{
Jingoo Han8074cf02013-07-30 16:58:59 +0900613 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800614 struct spi_master *master;
615 struct mpc8xxx_spi *mpc8xxx_spi;
616 struct fsl_espi_reg *reg_base;
Jane Wand0fb47a52014-04-16 13:09:39 -0700617 struct device_node *nc;
618 const __be32 *prop;
619 u32 regval, csmode;
620 int i, len, ret = 0;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800621
622 master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));
623 if (!master) {
624 ret = -ENOMEM;
625 goto err;
626 }
627
628 dev_set_drvdata(dev, master);
629
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100630 mpc8xxx_spi_probe(dev, mem, irq);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800631
Stephen Warren24778be2013-05-21 20:36:35 -0600632 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800633 master->setup = fsl_espi_setup;
Axel Lind9f26742014-08-31 12:44:09 +0800634 master->cleanup = fsl_espi_cleanup;
Heiner Kallweitc592bec2014-12-03 07:56:17 +0100635 master->transfer_one_message = fsl_espi_do_one_msg;
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200636 master->auto_runtime_pm = true;
Heiner Kallweit02a595d2016-08-17 21:11:01 +0200637 master->max_message_size = fsl_espi_max_message_size;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800638
639 mpc8xxx_spi = spi_master_get_devdata(master);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800640
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200641 mpc8xxx_spi->reg_base = devm_ioremap_resource(dev, mem);
Axel Lin37c5db72015-08-30 18:35:51 +0800642 if (IS_ERR(mpc8xxx_spi->reg_base)) {
643 ret = PTR_ERR(mpc8xxx_spi->reg_base);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800644 goto err_probe;
645 }
646
647 reg_base = mpc8xxx_spi->reg_base;
648
649 /* Register for SPI Interrupt */
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200650 ret = devm_request_irq(dev, mpc8xxx_spi->irq, fsl_espi_irq,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800651 0, "fsl_espi", mpc8xxx_spi);
652 if (ret)
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200653 goto err_probe;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800654
655 if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
656 mpc8xxx_spi->rx_shift = 16;
657 mpc8xxx_spi->tx_shift = 24;
658 }
659
660 /* SPI controller initializations */
661 mpc8xxx_spi_write_reg(&reg_base->mode, 0);
662 mpc8xxx_spi_write_reg(&reg_base->mask, 0);
663 mpc8xxx_spi_write_reg(&reg_base->command, 0);
664 mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);
665
666 /* Init eSPI CS mode register */
Jane Wand0fb47a52014-04-16 13:09:39 -0700667 for_each_available_child_of_node(master->dev.of_node, nc) {
668 /* get chip select */
669 prop = of_get_property(nc, "reg", &len);
670 if (!prop || len < sizeof(*prop))
671 continue;
672 i = be32_to_cpup(prop);
673 if (i < 0 || i >= pdata->max_chipselect)
674 continue;
675
676 csmode = CSMODE_INIT_VAL;
677 /* check if CSBEF is set in device tree */
678 prop = of_get_property(nc, "fsl,csbef", &len);
679 if (prop && len >= sizeof(*prop)) {
680 csmode &= ~(CSMODE_BEF(0xf));
681 csmode |= CSMODE_BEF(be32_to_cpup(prop));
682 }
683 /* check if CSAFT is set in device tree */
684 prop = of_get_property(nc, "fsl,csaft", &len);
685 if (prop && len >= sizeof(*prop)) {
686 csmode &= ~(CSMODE_AFT(0xf));
687 csmode |= CSMODE_AFT(be32_to_cpup(prop));
688 }
689 mpc8xxx_spi_write_reg(&reg_base->csmode[i], csmode);
690
691 dev_info(dev, "cs=%d, init_csmode=0x%x\n", i, csmode);
692 }
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800693
694 /* Enable SPI interface */
695 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
696
697 mpc8xxx_spi_write_reg(&reg_base->mode, regval);
698
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200699 pm_runtime_set_autosuspend_delay(dev, AUTOSUSPEND_TIMEOUT);
700 pm_runtime_use_autosuspend(dev);
701 pm_runtime_set_active(dev);
702 pm_runtime_enable(dev);
703 pm_runtime_get_sync(dev);
704
Heiner Kallweit4178b6b2015-08-26 21:21:50 +0200705 ret = devm_spi_register_master(dev, master);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800706 if (ret < 0)
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200707 goto err_pm;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800708
709 dev_info(dev, "at 0x%p (irq = %d)\n", reg_base, mpc8xxx_spi->irq);
710
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200711 pm_runtime_mark_last_busy(dev);
712 pm_runtime_put_autosuspend(dev);
713
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800714 return master;
715
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200716err_pm:
717 pm_runtime_put_noidle(dev);
718 pm_runtime_disable(dev);
719 pm_runtime_set_suspended(dev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800720err_probe:
721 spi_master_put(master);
722err:
723 return ERR_PTR(ret);
724}
725
726static int of_fsl_espi_get_chipselects(struct device *dev)
727{
728 struct device_node *np = dev->of_node;
Jingoo Han8074cf02013-07-30 16:58:59 +0900729 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800730 const u32 *prop;
731 int len;
732
733 prop = of_get_property(np, "fsl,espi-num-chipselects", &len);
734 if (!prop || len < sizeof(*prop)) {
735 dev_err(dev, "No 'fsl,espi-num-chipselects' property\n");
736 return -EINVAL;
737 }
738
739 pdata->max_chipselect = *prop;
740 pdata->cs_control = NULL;
741
742 return 0;
743}
744
Grant Likelyfd4a3192012-12-07 16:57:14 +0000745static int of_fsl_espi_probe(struct platform_device *ofdev)
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800746{
747 struct device *dev = &ofdev->dev;
748 struct device_node *np = ofdev->dev.of_node;
749 struct spi_master *master;
750 struct resource mem;
Thierry Redingf7578492013-09-18 15:24:44 +0200751 unsigned int irq;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800752 int ret = -ENOMEM;
753
Grant Likely18d306d2011-02-22 21:02:43 -0700754 ret = of_mpc8xxx_spi_probe(ofdev);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800755 if (ret)
756 return ret;
757
758 ret = of_fsl_espi_get_chipselects(dev);
759 if (ret)
760 goto err;
761
762 ret = of_address_to_resource(np, 0, &mem);
763 if (ret)
764 goto err;
765
Thierry Redingf7578492013-09-18 15:24:44 +0200766 irq = irq_of_parse_and_map(np, 0);
Hou Zhiqiang7227cd12013-12-11 13:09:40 +0800767 if (!irq) {
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800768 ret = -EINVAL;
769 goto err;
770 }
771
Thierry Redingf7578492013-09-18 15:24:44 +0200772 master = fsl_espi_probe(dev, &mem, irq);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800773 if (IS_ERR(master)) {
774 ret = PTR_ERR(master);
775 goto err;
776 }
777
778 return 0;
779
780err:
781 return ret;
782}
783
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200784static int of_fsl_espi_remove(struct platform_device *dev)
785{
786 pm_runtime_disable(&dev->dev);
787
788 return 0;
789}
790
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800791#ifdef CONFIG_PM_SLEEP
792static int of_fsl_espi_suspend(struct device *dev)
793{
794 struct spi_master *master = dev_get_drvdata(dev);
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800795 int ret;
796
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800797 ret = spi_master_suspend(master);
798 if (ret) {
799 dev_warn(dev, "cannot suspend master\n");
800 return ret;
801 }
802
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200803 ret = pm_runtime_force_suspend(dev);
804 if (ret < 0)
805 return ret;
806
807 return 0;
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800808}
809
810static int of_fsl_espi_resume(struct device *dev)
811{
812 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
813 struct spi_master *master = dev_get_drvdata(dev);
814 struct mpc8xxx_spi *mpc8xxx_spi;
815 struct fsl_espi_reg *reg_base;
816 u32 regval;
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200817 int i, ret;
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800818
819 mpc8xxx_spi = spi_master_get_devdata(master);
820 reg_base = mpc8xxx_spi->reg_base;
821
822 /* SPI controller initializations */
823 mpc8xxx_spi_write_reg(&reg_base->mode, 0);
824 mpc8xxx_spi_write_reg(&reg_base->mask, 0);
825 mpc8xxx_spi_write_reg(&reg_base->command, 0);
826 mpc8xxx_spi_write_reg(&reg_base->event, 0xffffffff);
827
828 /* Init eSPI CS mode register */
829 for (i = 0; i < pdata->max_chipselect; i++)
830 mpc8xxx_spi_write_reg(&reg_base->csmode[i], CSMODE_INIT_VAL);
831
832 /* Enable SPI interface */
833 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
834
835 mpc8xxx_spi_write_reg(&reg_base->mode, regval);
836
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200837 ret = pm_runtime_force_resume(dev);
838 if (ret < 0)
839 return ret;
840
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800841 return spi_master_resume(master);
842}
843#endif /* CONFIG_PM_SLEEP */
844
845static const struct dev_pm_ops espi_pm = {
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200846 SET_RUNTIME_PM_OPS(fsl_espi_runtime_suspend,
847 fsl_espi_runtime_resume, NULL)
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800848 SET_SYSTEM_SLEEP_PM_OPS(of_fsl_espi_suspend, of_fsl_espi_resume)
849};
850
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800851static const struct of_device_id of_fsl_espi_match[] = {
852 { .compatible = "fsl,mpc8536-espi" },
853 {}
854};
855MODULE_DEVICE_TABLE(of, of_fsl_espi_match);
856
Grant Likely18d306d2011-02-22 21:02:43 -0700857static struct platform_driver fsl_espi_driver = {
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800858 .driver = {
859 .name = "fsl_espi",
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800860 .of_match_table = of_fsl_espi_match,
Hou Zhiqiang714bb652013-12-12 12:53:52 +0800861 .pm = &espi_pm,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800862 },
863 .probe = of_fsl_espi_probe,
Heiner Kallweite9abb4d2015-08-26 21:21:55 +0200864 .remove = of_fsl_espi_remove,
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800865};
Grant Likely940ab882011-10-05 11:29:49 -0600866module_platform_driver(fsl_espi_driver);
Mingkai Hu8b60d6c2010-10-12 18:18:32 +0800867
868MODULE_AUTHOR("Mingkai Hu");
869MODULE_DESCRIPTION("Enhanced Freescale SPI Driver");
870MODULE_LICENSE("GPL");