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Andrew Victorc42dcb32007-05-11 19:24:18 +01001/*
2 * Copyright (C) 2005 SAN People
3 * Copyright (C) 2007 Atmel Corporation
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file COPYING in the main directory of this archive for
7 * more details.
8 */
9
10#include <linux/types.h>
11#include <linux/init.h>
12#include <linux/mm.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/spi/spi.h>
16#include <linux/fb.h>
17#include <linux/clk.h>
18
19#include <video/atmel_lcdc.h>
20
Andrew Victorc42dcb32007-05-11 19:24:18 +010021#include <asm/setup.h>
22#include <asm/mach-types.h>
23#include <asm/irq.h>
24
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h>
27#include <asm/mach/irq.h>
28
Andrew Victore5052402008-09-21 21:30:02 +010029#include <mach/hardware.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010030#include <mach/board.h>
31#include <mach/gpio.h>
Russell King80b02c12009-01-08 10:01:47 +000032#include <mach/at91sam9_smc.h>
Andrew Victor8cdae512008-10-06 20:05:35 +010033#include <mach/at91_shdwc.h>
Andrew Victorc42dcb32007-05-11 19:24:18 +010034
Andrew Victor8cdae512008-10-06 20:05:35 +010035#include "sam9_smc.h"
Andrew Victorc42dcb32007-05-11 19:24:18 +010036#include "generic.h"
37
38
Andrew Victorc42dcb32007-05-11 19:24:18 +010039static void __init ek_map_io(void)
40{
41 /* Initialize processor: 12.000 MHz crystal */
42 at91sam9rl_initialize(12000000);
43
Andrew Victora3da1222008-04-02 21:47:29 +010044 /* DGBU on ttyS0. (Rx & Tx only) */
45 at91_register_uart(0, 0, 0);
46
47 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
48 at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
49
50 /* set serial console to ttyS0 (ie, DBGU) */
51 at91_set_serial_console(0);
Andrew Victorc42dcb32007-05-11 19:24:18 +010052}
53
54static void __init ek_init_irq(void)
55{
56 at91sam9rl_init_interrupts(NULL);
57}
58
59
60/*
Nicolas Ferreba45ca42008-04-08 13:59:18 +010061 * USB HS Device port
62 */
63static struct usba_platform_data __initdata ek_usba_udc_data = {
64 .vbus_pin = AT91_PIN_PA8,
65};
66
67
68/*
Andrew Victorc42dcb32007-05-11 19:24:18 +010069 * MCI (SD/MMC)
70 */
71static struct at91_mmc_data __initdata ek_mmc_data = {
72 .wire4 = 1,
73 .det_pin = AT91_PIN_PA15,
74// .wp_pin = ... not connected
75// .vcc_pin = ... not connected
76};
77
78
79/*
80 * NAND flash
81 */
82static struct mtd_partition __initdata ek_nand_partition[] = {
83 {
84 .name = "Partition 1",
85 .offset = 0,
Andrew Victore5052402008-09-21 21:30:02 +010086 .size = SZ_256K,
Andrew Victorc42dcb32007-05-11 19:24:18 +010087 },
88 {
89 .name = "Partition 2",
Andrew Victore5052402008-09-21 21:30:02 +010090 .offset = MTDPART_OFS_NXTBLK,
Andrew Victorc42dcb32007-05-11 19:24:18 +010091 .size = MTDPART_SIZ_FULL,
92 },
93};
94
Russell Kingcdea4602007-05-30 17:48:45 +010095static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
Andrew Victorc42dcb32007-05-11 19:24:18 +010096{
97 *num_partitions = ARRAY_SIZE(ek_nand_partition);
98 return ek_nand_partition;
99}
100
HÃ¥vard Skinnemoen3c3796c2008-06-06 18:04:53 +0200101static struct atmel_nand_data __initdata ek_nand_data = {
Andrew Victorc42dcb32007-05-11 19:24:18 +0100102 .ale = 21,
103 .cle = 22,
104// .det_pin = ... not connected
105 .rdy_pin = AT91_PIN_PD17,
106 .enable_pin = AT91_PIN_PB6,
107 .partition_info = nand_partitions,
Andrew Victorc42dcb32007-05-11 19:24:18 +0100108};
109
Andrew Victor8cdae512008-10-06 20:05:35 +0100110static struct sam9_smc_config __initdata ek_nand_smc_config = {
111 .ncs_read_setup = 0,
112 .nrd_setup = 1,
113 .ncs_write_setup = 0,
114 .nwe_setup = 1,
115
116 .ncs_read_pulse = 3,
117 .nrd_pulse = 3,
118 .ncs_write_pulse = 3,
119 .nwe_pulse = 3,
120
121 .read_cycle = 5,
122 .write_cycle = 5,
123
124 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
125 .tdf_cycles = 2,
126};
127
128static void __init ek_add_device_nand(void)
129{
130 /* configure chip-select 3 (NAND) */
131 sam9_smc_configure(3, &ek_nand_smc_config);
132
133 at91_add_device_nand(&ek_nand_data);
134}
135
Andrew Victorc42dcb32007-05-11 19:24:18 +0100136
137/*
138 * SPI devices
139 */
140static struct spi_board_info ek_spi_devices[] = {
141 { /* DataFlash chip */
142 .modalias = "mtd_dataflash",
143 .chip_select = 0,
144 .max_speed_hz = 15 * 1000 * 1000,
145 .bus_num = 0,
146 },
147};
148
149
150/*
151 * LCD Controller
152 */
153#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
154static struct fb_videomode at91_tft_vga_modes[] = {
155 {
156 .name = "TX09D50VM1CCA @ 60",
157 .refresh = 60,
158 .xres = 240, .yres = 320,
159 .pixclock = KHZ2PICOS(4965),
160
161 .left_margin = 1, .right_margin = 33,
162 .upper_margin = 1, .lower_margin = 0,
163 .hsync_len = 5, .vsync_len = 1,
164
165 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
166 .vmode = FB_VMODE_NONINTERLACED,
167 },
168};
169
170static struct fb_monspecs at91fb_default_monspecs = {
171 .manufacturer = "HIT",
172 .monitor = "TX09D50VM1CCA",
173
174 .modedb = at91_tft_vga_modes,
175 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
176 .hfmin = 15000,
177 .hfmax = 64000,
178 .vfmin = 50,
179 .vfmax = 150,
180};
181
182#define AT91SAM9RL_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
183 | ATMEL_LCDC_DISTYPE_TFT \
184 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
185
186static void at91_lcdc_power_control(int on)
187{
188 if (on)
189 at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */
190 else
191 at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */
192}
193
194/* Driver datas */
195static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
196 .default_bpp = 16,
197 .default_dmacon = ATMEL_LCDC_DMAEN,
198 .default_lcdcon2 = AT91SAM9RL_DEFAULT_LCDCON2,
199 .default_monspecs = &at91fb_default_monspecs,
200 .atmel_lcdfb_power_control = at91_lcdc_power_control,
201 .guard_time = 1,
202};
203
204#else
205static struct atmel_lcdfb_info __initdata ek_lcdc_data;
206#endif
207
208
209static void __init ek_board_init(void)
210{
211 /* Serial */
212 at91_add_device_serial();
Nicolas Ferreba45ca42008-04-08 13:59:18 +0100213 /* USB HS */
214 at91_add_device_usba(&ek_usba_udc_data);
Andrew Victorc42dcb32007-05-11 19:24:18 +0100215 /* I2C */
Andrew Victorf230d3f2007-11-19 13:47:20 +0100216 at91_add_device_i2c(NULL, 0);
Andrew Victorc42dcb32007-05-11 19:24:18 +0100217 /* NAND */
Andrew Victor8cdae512008-10-06 20:05:35 +0100218 ek_add_device_nand();
Andrew Victorc42dcb32007-05-11 19:24:18 +0100219 /* SPI */
220 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
221 /* MMC */
222 at91_add_device_mmc(0, &ek_mmc_data);
223 /* LCD Controller */
224 at91_add_device_lcdc(&ek_lcdc_data);
Andrew Victorf7647e62008-09-18 19:45:35 +0100225 /* Touch Screen Controller */
226 at91_add_device_tsadcc();
Andrew Victorc42dcb32007-05-11 19:24:18 +0100227}
228
229MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
230 /* Maintainer: Atmel */
231 .phys_io = AT91_BASE_SYS,
232 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
233 .boot_params = AT91_SDRAM_BASE + 0x100,
234 .timer = &at91sam926x_timer,
235 .map_io = ek_map_io,
236 .init_irq = ek_init_irq,
237 .init_machine = ek_board_init,
238MACHINE_END