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Steven J. Hill778eeb12012-12-07 03:51:04 +00001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
Andrew Bresticker5b4e8452015-02-23 18:28:34 -08008#include <linux/clk.h>
Andrew Brestickera331ce62014-10-20 12:03:59 -07009#include <linux/clockchips.h>
Andrew Brestickere4752db2014-10-20 12:04:04 -070010#include <linux/cpu.h>
Steven J. Hill778eeb12012-12-07 03:51:04 +000011#include <linux/init.h>
Andrew Brestickera331ce62014-10-20 12:03:59 -070012#include <linux/interrupt.h>
Andrew Bresticker4060bbe2014-10-20 12:03:53 -070013#include <linux/irqchip/mips-gic.h>
Andrew Brestickere4752db2014-10-20 12:04:04 -070014#include <linux/notifier.h>
Andrew Brestickere12aa822014-11-12 11:43:39 -080015#include <linux/of_irq.h>
Andrew Brestickera331ce62014-10-20 12:03:59 -070016#include <linux/percpu.h>
17#include <linux/smp.h>
Steven J. Hilldfa762e2013-04-10 16:28:36 -050018#include <linux/time.h>
Steven J. Hill778eeb12012-12-07 03:51:04 +000019
Andrew Bresticker5fee56e2014-10-20 12:04:00 -070020static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
Andrew Brestickere4752db2014-10-20 12:04:04 -070021static int gic_timer_irq;
Andrew Brestickerb0854512014-10-20 12:04:01 -070022static unsigned int gic_frequency;
Andrew Brestickera331ce62014-10-20 12:03:59 -070023
24static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
25{
26 u64 cnt;
27 int res;
28
29 cnt = gic_read_count();
30 cnt += (u64)delta;
31 gic_write_cpu_compare(cnt, cpumask_first(evt->cpumask));
32 res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
33 return res;
34}
35
Andrew Bresticker5fee56e2014-10-20 12:04:00 -070036static void gic_set_clock_mode(enum clock_event_mode mode,
Andrew Brestickera331ce62014-10-20 12:03:59 -070037 struct clock_event_device *evt)
38{
39 /* Nothing to do ... */
40}
41
Andrew Bresticker5fee56e2014-10-20 12:04:00 -070042static irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
Andrew Brestickera331ce62014-10-20 12:03:59 -070043{
Andrew Brestickerf7ea3062014-10-20 12:04:03 -070044 struct clock_event_device *cd = dev_id;
Andrew Brestickera331ce62014-10-20 12:03:59 -070045
46 gic_write_compare(gic_read_compare());
Andrew Brestickera331ce62014-10-20 12:03:59 -070047 cd->event_handler(cd);
48 return IRQ_HANDLED;
49}
50
51struct irqaction gic_compare_irqaction = {
52 .handler = gic_compare_interrupt,
Andrew Brestickerf7ea3062014-10-20 12:04:03 -070053 .percpu_dev_id = &gic_clockevent_device,
Andrew Brestickera331ce62014-10-20 12:03:59 -070054 .flags = IRQF_PERCPU | IRQF_TIMER,
55 .name = "timer",
56};
57
Andrew Brestickere4752db2014-10-20 12:04:04 -070058static void gic_clockevent_cpu_init(struct clock_event_device *cd)
Andrew Brestickera331ce62014-10-20 12:03:59 -070059{
60 unsigned int cpu = smp_processor_id();
Andrew Brestickera331ce62014-10-20 12:03:59 -070061
62 cd->name = "MIPS GIC";
63 cd->features = CLOCK_EVT_FEAT_ONESHOT |
64 CLOCK_EVT_FEAT_C3STOP;
65
Andrew Brestickera45da562014-10-20 12:04:06 -070066 cd->rating = 350;
Andrew Brestickere4752db2014-10-20 12:04:04 -070067 cd->irq = gic_timer_irq;
Andrew Brestickera331ce62014-10-20 12:03:59 -070068 cd->cpumask = cpumask_of(cpu);
69 cd->set_next_event = gic_next_event;
70 cd->set_mode = gic_set_clock_mode;
Andrew Brestickera331ce62014-10-20 12:03:59 -070071
Andrew Brestickerb695d8e2014-10-20 12:04:05 -070072 clockevents_config_and_register(cd, gic_frequency, 0x300, 0x7fffffff);
Andrew Brestickera331ce62014-10-20 12:03:59 -070073
Andrew Brestickere4752db2014-10-20 12:04:04 -070074 enable_percpu_irq(gic_timer_irq, IRQ_TYPE_NONE);
75}
76
77static void gic_clockevent_cpu_exit(struct clock_event_device *cd)
78{
79 disable_percpu_irq(gic_timer_irq);
80}
81
82static int gic_cpu_notifier(struct notifier_block *nb, unsigned long action,
83 void *data)
84{
85 switch (action & ~CPU_TASKS_FROZEN) {
86 case CPU_STARTING:
87 gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device));
88 break;
89 case CPU_DYING:
90 gic_clockevent_cpu_exit(this_cpu_ptr(&gic_clockevent_device));
91 break;
Andrew Brestickera331ce62014-10-20 12:03:59 -070092 }
93
Andrew Brestickere4752db2014-10-20 12:04:04 -070094 return NOTIFY_OK;
95}
96
97static struct notifier_block gic_cpu_nb = {
98 .notifier_call = gic_cpu_notifier,
99};
100
101static int gic_clockevent_init(void)
102{
103 if (!cpu_has_counter || !gic_frequency)
104 return -ENXIO;
105
Andrew Brestickere4752db2014-10-20 12:04:04 -0700106 setup_percpu_irq(gic_timer_irq, &gic_compare_irqaction);
107
108 register_cpu_notifier(&gic_cpu_nb);
109
110 gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device));
Andrew Brestickera331ce62014-10-20 12:03:59 -0700111
112 return 0;
113}
114
Steven J. Hill778eeb12012-12-07 03:51:04 +0000115static cycle_t gic_hpt_read(struct clocksource *cs)
116{
Steven J. Hilldfa762e2013-04-10 16:28:36 -0500117 return gic_read_count();
Steven J. Hill778eeb12012-12-07 03:51:04 +0000118}
119
120static struct clocksource gic_clocksource = {
121 .name = "GIC",
122 .read = gic_hpt_read,
123 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
124};
125
Andrew Brestickere12aa822014-11-12 11:43:39 -0800126static void __init __gic_clocksource_init(void)
Steven J. Hill778eeb12012-12-07 03:51:04 +0000127{
Steven J. Hill778eeb12012-12-07 03:51:04 +0000128 /* Set clocksource mask. */
Andrew Bresticker387904f2014-10-20 12:03:49 -0700129 gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width());
Steven J. Hill778eeb12012-12-07 03:51:04 +0000130
131 /* Calculate a somewhat reasonable rating value. */
Andrew Brestickere12aa822014-11-12 11:43:39 -0800132 gic_clocksource.rating = 200 + gic_frequency / 10000000;
Steven J. Hill778eeb12012-12-07 03:51:04 +0000133
Andrew Brestickere12aa822014-11-12 11:43:39 -0800134 clocksource_register_hz(&gic_clocksource, gic_frequency);
Andrew Brestickere4752db2014-10-20 12:04:04 -0700135
136 gic_clockevent_init();
Markos Chandras7d9cd1f2015-03-23 12:32:02 +0000137
138 /* And finally start the counter */
139 gic_start_count();
Steven J. Hill778eeb12012-12-07 03:51:04 +0000140}
Andrew Brestickere12aa822014-11-12 11:43:39 -0800141
142void __init gic_clocksource_init(unsigned int frequency)
143{
144 gic_frequency = frequency;
145 gic_timer_irq = MIPS_GIC_IRQ_BASE +
146 GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_COMPARE);
147
148 __gic_clocksource_init();
149}
150
151static void __init gic_clocksource_of_init(struct device_node *node)
152{
Andrew Bresticker5b4e8452015-02-23 18:28:34 -0800153 struct clk *clk;
154
Andrew Brestickere12aa822014-11-12 11:43:39 -0800155 if (WARN_ON(!gic_present || !node->parent ||
156 !of_device_is_compatible(node->parent, "mti,gic")))
157 return;
158
Andrew Bresticker5b4e8452015-02-23 18:28:34 -0800159 clk = of_clk_get(node, 0);
160 if (!IS_ERR(clk)) {
Ezequiel Garciaeb811c72015-07-27 15:00:12 +0100161 if (clk_prepare_enable(clk) < 0) {
162 pr_err("GIC failed to enable clock\n");
163 clk_put(clk);
164 return;
165 }
166
Andrew Bresticker5b4e8452015-02-23 18:28:34 -0800167 gic_frequency = clk_get_rate(clk);
Andrew Bresticker5b4e8452015-02-23 18:28:34 -0800168 } else if (of_property_read_u32(node, "clock-frequency",
169 &gic_frequency)) {
Andrew Brestickere12aa822014-11-12 11:43:39 -0800170 pr_err("GIC frequency not specified.\n");
171 return;
172 }
173 gic_timer_irq = irq_of_parse_and_map(node, 0);
174 if (!gic_timer_irq) {
175 pr_err("GIC timer IRQ not specified.\n");
176 return;
177 }
178
179 __gic_clocksource_init();
180}
181CLOCKSOURCE_OF_DECLARE(mips_gic_timer, "mti,gic-timer",
182 gic_clocksource_of_init);