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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata-cs5530.c - CS5530 PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
Jeff Garzik669a5db2006-08-29 18:12:40 -04004 *
5 * based upon cs5530.c by Mark Lord.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 * Loosely based on the piix & svwks drivers.
21 *
22 * Documentation:
23 * Available from AMD web site.
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/init.h>
30#include <linux/blkdev.h>
31#include <linux/delay.h>
32#include <scsi/scsi_host.h>
33#include <linux/libata.h>
34#include <linux/dmi.h>
35
36#define DRV_NAME "pata_cs5530"
Jeff Garzik2a3103c2007-08-31 04:54:06 -040037#define DRV_VERSION "0.7.4"
Jeff Garzik669a5db2006-08-29 18:12:40 -040038
Tejun Heo0d5ff562007-02-01 15:06:36 +090039static void __iomem *cs5530_port_base(struct ata_port *ap)
40{
41 unsigned long bmdma = (unsigned long)ap->ioaddr.bmdma_addr;
42
43 return (void __iomem *)((bmdma & ~0x0F) + 0x20 + 0x10 * ap->port_no);
44}
45
Jeff Garzik669a5db2006-08-29 18:12:40 -040046/**
47 * cs5530_set_piomode - PIO setup
48 * @ap: ATA interface
49 * @adev: device on the interface
50 *
51 * Set our PIO requirements. This is fairly simple on the CS5530
52 * chips.
53 */
54
55static void cs5530_set_piomode(struct ata_port *ap, struct ata_device *adev)
56{
57 static const unsigned int cs5530_pio_timings[2][5] = {
58 {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
59 {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
60 };
Tejun Heo0d5ff562007-02-01 15:06:36 +090061 void __iomem *base = cs5530_port_base(ap);
Jeff Garzik669a5db2006-08-29 18:12:40 -040062 u32 tuning;
63 int format;
64
65 /* Find out which table to use */
Tejun Heo0d5ff562007-02-01 15:06:36 +090066 tuning = ioread32(base + 0x04);
Jeff Garzik669a5db2006-08-29 18:12:40 -040067 format = (tuning & 0x80000000UL) ? 1 : 0;
68
69 /* Now load the right timing register */
70 if (adev->devno)
71 base += 0x08;
72
Tejun Heo0d5ff562007-02-01 15:06:36 +090073 iowrite32(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0], base);
Jeff Garzik669a5db2006-08-29 18:12:40 -040074}
75
76/**
77 * cs5530_set_dmamode - DMA timing setup
78 * @ap: ATA interface
79 * @adev: Device being configured
80 *
81 * We cannot mix MWDMA and UDMA without reloading timings each switch
82 * master to slave. We track the last DMA setup in order to minimise
83 * reloads.
84 */
85
86static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev)
87{
Tejun Heo0d5ff562007-02-01 15:06:36 +090088 void __iomem *base = cs5530_port_base(ap);
Jeff Garzik669a5db2006-08-29 18:12:40 -040089 u32 tuning, timing = 0;
90 u8 reg;
91
92 /* Find out which table to use */
Tejun Heo0d5ff562007-02-01 15:06:36 +090093 tuning = ioread32(base + 0x04);
Jeff Garzik669a5db2006-08-29 18:12:40 -040094
95 switch(adev->dma_mode) {
96 case XFER_UDMA_0:
97 timing = 0x00921250;break;
98 case XFER_UDMA_1:
99 timing = 0x00911140;break;
100 case XFER_UDMA_2:
101 timing = 0x00911030;break;
102 case XFER_MW_DMA_0:
103 timing = 0x00077771;break;
104 case XFER_MW_DMA_1:
105 timing = 0x00012121;break;
106 case XFER_MW_DMA_2:
107 timing = 0x00002020;break;
108 default:
109 BUG();
110 }
111 /* Merge in the PIO format bit */
112 timing |= (tuning & 0x80000000UL);
113 if (adev->devno == 0) /* Master */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900114 iowrite32(timing, base + 0x04);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400115 else {
116 if (timing & 0x00100000)
117 tuning |= 0x00100000; /* UDMA for both */
118 else
119 tuning &= ~0x00100000; /* MWDMA for both */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900120 iowrite32(tuning, base + 0x04);
121 iowrite32(timing, base + 0x0C);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400122 }
123
124 /* Set the DMA capable bit in the BMDMA area */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900125 reg = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400126 reg |= (1 << (5 + adev->devno));
Tejun Heo0d5ff562007-02-01 15:06:36 +0900127 iowrite8(reg, ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400128
129 /* Remember the last DMA setup we did */
130
131 ap->private_data = adev;
132}
133
134/**
Tejun Heo9363c382008-04-07 22:47:16 +0900135 * cs5530_qc_issue - command issue
Jeff Garzik669a5db2006-08-29 18:12:40 -0400136 * @qc: command pending
137 *
138 * Called when the libata layer is about to issue a command. We wrap
139 * this interface so that we can load the correct ATA timings if
Robert P. J. Day3a4fa0a2007-10-19 23:10:43 +0200140 * necessary. Specifically we have a problem that there is only
Jeff Garzik669a5db2006-08-29 18:12:40 -0400141 * one MWDMA/UDMA bit.
142 */
143
Tejun Heo9363c382008-04-07 22:47:16 +0900144static unsigned int cs5530_qc_issue(struct ata_queued_cmd *qc)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400145{
146 struct ata_port *ap = qc->ap;
147 struct ata_device *adev = qc->dev;
148 struct ata_device *prev = ap->private_data;
149
150 /* See if the DMA settings could be wrong */
Alan Coxb15b3eb2008-08-01 09:18:34 +0100151 if (ata_dma_enabled(adev) && adev != prev && prev != NULL) {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400152 /* Maybe, but do the channels match MWDMA/UDMA ? */
Alan Coxb15b3eb2008-08-01 09:18:34 +0100153 if ((ata_using_udma(adev) && !ata_using_udma(prev)) ||
154 (ata_using_udma(prev) && !ata_using_udma(adev)))
Jeff Garzik669a5db2006-08-29 18:12:40 -0400155 /* Switch the mode bits */
156 cs5530_set_dmamode(ap, adev);
157 }
158
Tejun Heo360ff782010-05-10 21:41:42 +0200159 return ata_bmdma_qc_issue(qc);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400160}
161
Jeff Garzik669a5db2006-08-29 18:12:40 -0400162static struct scsi_host_template cs5530_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900163 ATA_BMDMA_SHT(DRV_NAME),
164 .sg_tablesize = LIBATA_DUMB_MAX_PRD,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400165};
166
167static struct ata_port_operations cs5530_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900168 .inherits = &ata_bmdma_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400169
Tejun Heof47451c2010-05-10 21:41:40 +0200170 .qc_prep = ata_bmdma_dumb_qc_prep,
Tejun Heo9363c382008-04-07 22:47:16 +0900171 .qc_issue = cs5530_qc_issue,
Jeff Garzikbda30282006-09-27 05:41:13 -0400172
Tejun Heo029cfd62008-03-25 12:22:49 +0900173 .cable_detect = ata_cable_40wire,
174 .set_piomode = cs5530_set_piomode,
175 .set_dmamode = cs5530_set_dmamode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400176};
177
Jeff Garzik18552562007-10-03 15:15:40 -0400178static const struct dmi_system_id palmax_dmi_table[] = {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400179 {
180 .ident = "Palmax PD1100",
181 .matches = {
182 DMI_MATCH(DMI_SYS_VENDOR, "Cyrix"),
183 DMI_MATCH(DMI_PRODUCT_NAME, "Caddis"),
184 },
185 },
186 { }
187};
188
189static int cs5530_is_palmax(void)
190{
191 if (dmi_check_system(palmax_dmi_table)) {
192 printk(KERN_INFO "Palmax PD1100: Disabling DMA on docking port.\n");
193 return 1;
194 }
195 return 0;
196}
197
Alanf7e37ba2006-11-22 17:21:03 +0000198
Jeff Garzik669a5db2006-08-29 18:12:40 -0400199/**
Alanf7e37ba2006-11-22 17:21:03 +0000200 * cs5530_init_chip - Chipset init
Jeff Garzik669a5db2006-08-29 18:12:40 -0400201 *
Alanf7e37ba2006-11-22 17:21:03 +0000202 * Perform the chip initialisation work that is shared between both
203 * setup and resume paths
Jeff Garzik669a5db2006-08-29 18:12:40 -0400204 */
Jeff Garzikf20b16f2006-12-11 11:14:06 -0500205
Alanf7e37ba2006-11-22 17:21:03 +0000206static int cs5530_init_chip(void)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400207{
Alanf7e37ba2006-11-22 17:21:03 +0000208 struct pci_dev *master_0 = NULL, *cs5530_0 = NULL, *dev = NULL;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400209
Jeff Garzik669a5db2006-08-29 18:12:40 -0400210 while ((dev = pci_get_device(PCI_VENDOR_ID_CYRIX, PCI_ANY_ID, dev)) != NULL) {
211 switch (dev->device) {
212 case PCI_DEVICE_ID_CYRIX_PCI_MASTER:
213 master_0 = pci_dev_get(dev);
214 break;
215 case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
216 cs5530_0 = pci_dev_get(dev);
217 break;
218 }
219 }
220 if (!master_0) {
221 printk(KERN_ERR DRV_NAME ": unable to locate PCI MASTER function\n");
222 goto fail_put;
223 }
224 if (!cs5530_0) {
225 printk(KERN_ERR DRV_NAME ": unable to locate CS5530 LEGACY function\n");
226 goto fail_put;
227 }
228
229 pci_set_master(cs5530_0);
Randy Dunlap694625c2007-07-09 11:55:54 -0700230 pci_try_set_mwi(cs5530_0);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400231
232 /*
233 * Set PCI CacheLineSize to 16-bytes:
234 * --> Write 0x04 into 8-bit PCI CACHELINESIZE reg of function 0 of the cs5530
235 *
236 * Note: This value is constant because the 5530 is only a Geode companion
237 */
238
239 pci_write_config_byte(cs5530_0, PCI_CACHE_LINE_SIZE, 0x04);
240
241 /*
242 * Disable trapping of UDMA register accesses (Win98 hack):
243 * --> Write 0x5006 into 16-bit reg at offset 0xd0 of function 0 of the cs5530
244 */
245
246 pci_write_config_word(cs5530_0, 0xd0, 0x5006);
247
248 /*
249 * Bit-1 at 0x40 enables MemoryWriteAndInvalidate on internal X-bus:
250 * The other settings are what is necessary to get the register
251 * into a sane state for IDE DMA operation.
252 */
253
254 pci_write_config_byte(master_0, 0x40, 0x1e);
255
256 /*
257 * Set max PCI burst size (16-bytes seems to work best):
258 * 16bytes: set bit-1 at 0x41 (reg value of 0x16)
259 * all others: clear bit-1 at 0x41, and do:
260 * 128bytes: OR 0x00 at 0x41
261 * 256bytes: OR 0x04 at 0x41
262 * 512bytes: OR 0x08 at 0x41
263 * 1024bytes: OR 0x0c at 0x41
264 */
265
266 pci_write_config_byte(master_0, 0x41, 0x14);
267
268 /*
269 * These settings are necessary to get the chip
270 * into a sane state for IDE DMA operation.
271 */
272
273 pci_write_config_byte(master_0, 0x42, 0x00);
274 pci_write_config_byte(master_0, 0x43, 0xc1);
275
276 pci_dev_put(master_0);
277 pci_dev_put(cs5530_0);
Alanf7e37ba2006-11-22 17:21:03 +0000278 return 0;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400279fail_put:
280 if (master_0)
281 pci_dev_put(master_0);
282 if (cs5530_0)
283 pci_dev_put(cs5530_0);
284 return -ENODEV;
285}
286
Alanf7e37ba2006-11-22 17:21:03 +0000287/**
288 * cs5530_init_one - Initialise a CS5530
289 * @dev: PCI device
290 * @id: Entry in match table
291 *
292 * Install a driver for the newly found CS5530 companion chip. Most of
293 * this is just housekeeping. We have to set the chip up correctly and
294 * turn off various bits of emulation magic.
295 */
296
297static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
298{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200299 static const struct ata_port_info info = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400300 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100301 .pio_mask = ATA_PIO4,
302 .mwdma_mask = ATA_MWDMA2,
303 .udma_mask = ATA_UDMA2,
Alanf7e37ba2006-11-22 17:21:03 +0000304 .port_ops = &cs5530_port_ops
305 };
306 /* The docking connector doesn't do UDMA, and it seems not MWDMA */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200307 static const struct ata_port_info info_palmax_secondary = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400308 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100309 .pio_mask = ATA_PIO4,
Alanf7e37ba2006-11-22 17:21:03 +0000310 .port_ops = &cs5530_port_ops
311 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200312 const struct ata_port_info *ppi[] = { &info, NULL };
Tejun Heof08048e2008-03-25 12:22:47 +0900313 int rc;
314
315 rc = pcim_enable_device(pdev);
316 if (rc)
317 return rc;
Jeff Garzikf20b16f2006-12-11 11:14:06 -0500318
Alanf7e37ba2006-11-22 17:21:03 +0000319 /* Chip initialisation */
320 if (cs5530_init_chip())
321 return -ENODEV;
Jeff Garzikf20b16f2006-12-11 11:14:06 -0500322
Alanf7e37ba2006-11-22 17:21:03 +0000323 if (cs5530_is_palmax())
Tejun Heo1626aeb2007-05-04 12:43:58 +0200324 ppi[1] = &info_palmax_secondary;
Alanf7e37ba2006-11-22 17:21:03 +0000325
326 /* Now kick off ATA set up */
Tejun Heo1c5afdf2010-05-19 22:10:22 +0200327 return ata_pci_bmdma_init_one(pdev, ppi, &cs5530_sht, NULL, 0);
Alanf7e37ba2006-11-22 17:21:03 +0000328}
329
Tejun Heo438ac6d2007-03-02 17:31:26 +0900330#ifdef CONFIG_PM
Alanf7e37ba2006-11-22 17:21:03 +0000331static int cs5530_reinit_one(struct pci_dev *pdev)
332{
Tejun Heof08048e2008-03-25 12:22:47 +0900333 struct ata_host *host = dev_get_drvdata(&pdev->dev);
334 int rc;
335
336 rc = ata_pci_device_do_resume(pdev);
337 if (rc)
338 return rc;
339
Alanf7e37ba2006-11-22 17:21:03 +0000340 /* If we fail on resume we are doomed */
Andrew Morton01532602006-12-20 13:03:11 -0500341 if (cs5530_init_chip())
Tejun Heof08048e2008-03-25 12:22:47 +0900342 return -EIO;
343
344 ata_host_resume(host);
345 return 0;
Alanf7e37ba2006-11-22 17:21:03 +0000346}
Tejun Heo438ac6d2007-03-02 17:31:26 +0900347#endif /* CONFIG_PM */
Jeff Garzikf20b16f2006-12-11 11:14:06 -0500348
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400349static const struct pci_device_id cs5530[] = {
350 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE), },
351
352 { },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400353};
354
355static struct pci_driver cs5530_pci_driver = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400356 .name = DRV_NAME,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400357 .id_table = cs5530,
358 .probe = cs5530_init_one,
Alanf7e37ba2006-11-22 17:21:03 +0000359 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900360#ifdef CONFIG_PM
Alanf7e37ba2006-11-22 17:21:03 +0000361 .suspend = ata_pci_device_suspend,
362 .resume = cs5530_reinit_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900363#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400364};
365
366static int __init cs5530_init(void)
367{
368 return pci_register_driver(&cs5530_pci_driver);
369}
370
Jeff Garzik669a5db2006-08-29 18:12:40 -0400371static void __exit cs5530_exit(void)
372{
373 pci_unregister_driver(&cs5530_pci_driver);
374}
375
Jeff Garzik669a5db2006-08-29 18:12:40 -0400376MODULE_AUTHOR("Alan Cox");
377MODULE_DESCRIPTION("low-level driver for the Cyrix/NS/AMD 5530");
378MODULE_LICENSE("GPL");
379MODULE_DEVICE_TABLE(pci, cs5530);
380MODULE_VERSION(DRV_VERSION);
381
382module_init(cs5530_init);
383module_exit(cs5530_exit);