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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2/*
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
5
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
12
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
17
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 adapter.
20
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
23 or
24 http://www.parl.clemson.edu/~keithu/hamachi.html
25
26
27
28 Linux kernel changelog:
29
30 LK1.0.1:
31 - fix lack of pci_dev<->dev association
32 - ethtool support (jgarzik)
33
34*/
35
36#define DRV_NAME "hamachi"
37#define DRV_VERSION "1.01+LK1.0.1"
38#define DRV_RELDATE "5/18/2001"
39
40
41/* A few user-configurable values. */
42
43static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
44#define final_version
45#define hamachi_debug debug
46/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
47static int max_interrupt_work = 40;
48static int mtu;
49/* Default values selected by testing on a dual processor PIII-450 */
50/* These six interrupt control parameters may be set directly when loading the
51 * module, or through the rx_params and tx_params variables
52 */
53static int max_rx_latency = 0x11;
54static int max_rx_gap = 0x05;
55static int min_rx_pkt = 0x18;
56static int max_tx_latency = 0x00;
57static int max_tx_gap = 0x00;
58static int min_tx_pkt = 0x30;
59
60/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
61 -Setting to > 1518 causes all frames to be copied
62 -Setting to 0 disables copies
63*/
64static int rx_copybreak;
65
66/* An override for the hardware detection of bus width.
67 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
68 Add 2 to disable parity detection.
69*/
70static int force32;
71
72
73/* Used to pass the media type, etc.
74 These exist for driver interoperability.
75 No media types are currently defined.
76 - The lower 4 bits are reserved for the media type.
77 - The next three bits may be set to one of the following:
78 0x00000000 : Autodetect PCI bus
79 0x00000010 : Force 32 bit PCI bus
80 0x00000020 : Disable parity detection
81 0x00000040 : Force 64 bit PCI bus
82 Default is autodetect
83 - The next bit can be used to force half-duplex. This is a bad
84 idea since no known implementations implement half-duplex, and,
85 in general, half-duplex for gigabit ethernet is a bad idea.
86 0x00000080 : Force half-duplex
87 Default is full-duplex.
88 - In the original driver, the ninth bit could be used to force
89 full-duplex. Maintain that for compatibility
90 0x00000200 : Force full-duplex
91*/
92#define MAX_UNITS 8 /* More are supported, limit only on options */
93static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
94static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
95/* The Hamachi chipset supports 3 parameters each for Rx and Tx
96 * interruput management. Parameters will be loaded as specified into
97 * the TxIntControl and RxIntControl registers.
98 *
99 * The registers are arranged as follows:
100 * 23 - 16 15 - 8 7 - 0
101 * _________________________________
102 * | min_pkt | max_gap | max_latency |
103 * ---------------------------------
104 * min_pkt : The minimum number of packets processed between
105 * interrupts.
106 * max_gap : The maximum inter-packet gap in units of 8.192 us
107 * max_latency : The absolute time between interrupts in units of 8.192 us
108 *
109 */
110static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
111static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
112
113/* Operational parameters that are set at compile time. */
114
115/* Keep the ring sizes a power of two for compile efficiency.
116 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
117 Making the Tx ring too large decreases the effectiveness of channel
118 bonding and packet priority.
119 There are no ill effects from too-large receive rings, except for
120 excessive memory usage */
121/* Empirically it appears that the Tx ring needs to be a little bigger
122 for these Gbit adapters or you get into an overrun condition really
123 easily. Also, things appear to work a bit better in back-to-back
124 configurations if the Rx ring is 8 times the size of the Tx ring
125*/
126#define TX_RING_SIZE 64
127#define RX_RING_SIZE 512
128#define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
129#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
130
131/*
132 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
133 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
134 */
135
136/* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
137/* #define ADDRLEN 64 */
138
139/*
140 * RX_CHECKSUM turns on card-generated receive checksum generation for
141 * TCP and UDP packets. Otherwise the upper layers do the calculation.
142 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
143 * easy mechanism by which to tell the TCP/UDP stack that it need not
144 * generate checksums for this device. But if somebody can find a way
145 * to get that to work, most of the card work is in here already.
146 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
147 */
148#undef TX_CHECKSUM
149#define RX_CHECKSUM
150
151/* Operational parameters that usually are not changed. */
152/* Time in jiffies before concluding the transmitter is hung. */
153#define TX_TIMEOUT (5*HZ)
154
155#include <linux/module.h>
156#include <linux/kernel.h>
157#include <linux/string.h>
158#include <linux/timer.h>
159#include <linux/time.h>
160#include <linux/errno.h>
161#include <linux/ioport.h>
162#include <linux/slab.h>
163#include <linux/interrupt.h>
164#include <linux/pci.h>
165#include <linux/init.h>
166#include <linux/ethtool.h>
167#include <linux/mii.h>
168#include <linux/netdevice.h>
169#include <linux/etherdevice.h>
170#include <linux/skbuff.h>
171#include <linux/ip.h>
172#include <linux/delay.h>
173#include <linux/bitops.h>
174
175#include <asm/uaccess.h>
176#include <asm/processor.h> /* Processor type for cache alignment. */
177#include <asm/io.h>
178#include <asm/unaligned.h>
179#include <asm/cache.h>
180
181static char version[] __devinitdata =
182KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
183KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
184KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
185
186
187/* IP_MF appears to be only defined in <netinet/ip.h>, however,
188 we need it for hardware checksumming support. FYI... some of
189 the definitions in <netinet/ip.h> conflict/duplicate those in
190 other linux headers causing many compiler warnings.
191*/
192#ifndef IP_MF
193 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
194#endif
195
196/* Define IP_OFFSET to be IPOPT_OFFSET */
197#ifndef IP_OFFSET
198 #ifdef IPOPT_OFFSET
199 #define IP_OFFSET IPOPT_OFFSET
200 #else
201 #define IP_OFFSET 2
202 #endif
203#endif
204
205#define RUN_AT(x) (jiffies + (x))
206
viro@ZenIV.linux.org.ukf20badb2005-09-07 23:16:59 +0100207#ifndef ADDRLEN
208#define ADDRLEN 32
209#endif
210
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211/* Condensed bus+endian portability operations. */
212#if ADDRLEN == 64
213#define cpu_to_leXX(addr) cpu_to_le64(addr)
214#else
215#define cpu_to_leXX(addr) cpu_to_le32(addr)
216#endif
217
218
219/*
220 Theory of Operation
221
222I. Board Compatibility
223
224This device driver is designed for the Packet Engines "Hamachi"
225Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
22666Mhz PCI card.
227
228II. Board-specific settings
229
230No jumpers exist on the board. The chip supports software correction of
231various motherboard wiring errors, however this driver does not support
232that feature.
233
234III. Driver operation
235
236IIIa. Ring buffers
237
238The Hamachi uses a typical descriptor based bus-master architecture.
239The descriptor list is similar to that used by the Digital Tulip.
240This driver uses two statically allocated fixed-size descriptor lists
241formed into rings by a branch from the final descriptor to the beginning of
242the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
243
244This driver uses a zero-copy receive and transmit scheme similar my other
245network drivers.
246The driver allocates full frame size skbuffs for the Rx ring buffers at
247open() time and passes the skb->data field to the Hamachi as receive data
248buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
249a fresh skbuff is allocated and the frame is copied to the new skbuff.
250When the incoming frame is larger, the skbuff is passed directly up the
251protocol stack and replaced by a newly allocated skbuff.
252
253The RX_COPYBREAK value is chosen to trade-off the memory wasted by
254using a full-sized skbuff for small frames vs. the copying costs of larger
255frames. Gigabit cards are typically used on generously configured machines
256and the underfilled buffers have negligible impact compared to the benefit of
257a single allocation size, so the default value of zero results in never
258copying packets.
259
260IIIb/c. Transmit/Receive Structure
261
262The Rx and Tx descriptor structure are straight-forward, with no historical
263baggage that must be explained. Unlike the awkward DBDMA structure, there
264are no unused fields or option bits that had only one allowable setting.
265
266Two details should be noted about the descriptors: The chip supports both 32
267bit and 64 bit address structures, and the length field is overwritten on
268the receive descriptors. The descriptor length is set in the control word
269for each channel. The development driver uses 32 bit addresses only, however
27064 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
271
272IIId. Synchronization
273
274This driver is very similar to my other network drivers.
275The driver runs as two independent, single-threaded flows of control. One
276is the send-packet routine, which enforces single-threaded use by the
277dev->tbusy flag. The other thread is the interrupt handler, which is single
278threaded by the hardware and other software.
279
280The send packet thread has partial control over the Tx ring and 'dev->tbusy'
281flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
282queue slot is empty, it clears the tbusy flag when finished otherwise it sets
283the 'hmp->tx_full' flag.
284
285The interrupt handler has exclusive control over the Rx ring and records stats
286from the Tx ring. After reaping the stats, it marks the Tx queue entry as
287empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
288clears both the tx_full and tbusy flags.
289
290IV. Notes
291
292Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
293
294IVb. References
295
296Hamachi Engineering Design Specification, 5/15/97
297(Note: This version was marked "Confidential".)
298
299IVc. Errata
300
301None noted.
302
303V. Recent Changes
304
30501/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
306 to help avoid some stall conditions -- this needs further research.
307
30801/15/1999 EPK Creation of the hamachi_tx function. This function cleans
309 the Tx ring and is called from hamachi_start_xmit (this used to be
310 called from hamachi_interrupt but it tends to delay execution of the
311 interrupt handler and thus reduce bandwidth by reducing the latency
312 between hamachi_rx()'s). Notably, some modification has been made so
313 that the cleaning loop checks only to make sure that the DescOwn bit
314 isn't set in the status flag since the card is not required
315 to set the entire flag to zero after processing.
316
31701/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
318 checked before attempting to add a buffer to the ring. If the ring is full
319 an attempt is made to free any dirty buffers and thus find space for
320 the new buffer or the function returns non-zero which should case the
321 scheduler to reschedule the buffer later.
322
32301/15/1999 EPK Some adjustments were made to the chip initialization.
324 End-to-end flow control should now be fully active and the interrupt
325 algorithm vars have been changed. These could probably use further tuning.
326
32701/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
328 set the rx and tx latencies for the Hamachi interrupts. If you're having
329 problems with network stalls, try setting these to higher values.
330 Valid values are 0x00 through 0xff.
331
33201/15/1999 EPK In general, the overall bandwidth has increased and
333 latencies are better (sometimes by a factor of 2). Stalls are rare at
334 this point, however there still appears to be a bug somewhere between the
335 hardware and driver. TCP checksum errors under load also appear to be
336 eliminated at this point.
337
33801/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
339 Rx and Tx rings. This appears to have been affecting whether a particular
340 peer-to-peer connection would hang under high load. I believe the Rx
341 rings was typically getting set correctly, but the Tx ring wasn't getting
342 the DescEndRing bit set during initialization. ??? Does this mean the
343 hamachi card is using the DescEndRing in processing even if a particular
344 slot isn't in use -- hypothetically, the card might be searching the
345 entire Tx ring for slots with the DescOwn bit set and then processing
346 them. If the DescEndRing bit isn't set, then it might just wander off
347 through memory until it hits a chunk of data with that bit set
348 and then looping back.
349
35002/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
351 problem (TxCmd and RxCmd need only to be set when idle or stopped.
352
35302/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
354 (Michel Mueller pointed out the ``permanently busy'' potential
355 problem here).
356
35702/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
358
35902/23/1999 EPK Verified that the interrupt status field bits for Tx were
360 incorrectly defined and corrected (as per Michel Mueller).
361
36202/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
363 were available before reseting the tbusy and tx_full flags
364 (as per Michel Mueller).
365
36603/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
367
36812/31/1999 KDU Cleaned up assorted things and added Don's code to force
36932 bit.
370
37102/20/2000 KDU Some of the control was just plain odd. Cleaned up the
372hamachi_start_xmit() and hamachi_interrupt() code. There is still some
373re-structuring I would like to do.
374
37503/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
376parameters on a dual P3-450 setup yielded the new default interrupt
377mitigation parameters. Tx should interrupt VERY infrequently due to
378Eric's scheme. Rx should be more often...
379
38003/13/2000 KDU Added a patch to make the Rx Checksum code interact
381nicely with non-linux machines.
382
38303/13/2000 KDU Experimented with some of the configuration values:
384
385 -It seems that enabling PCI performance commands for descriptors
386 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
387 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
388 leave them that way until I hear further feedback.
389
390 -Increasing the PCI_LATENCY_TIMER to 130
391 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
392 degrade performance. Leaving default at 64 pending further information.
393
39403/14/2000 KDU Further tuning:
395
396 -adjusted boguscnt in hamachi_rx() to depend on interrupt
397 mitigation parameters chosen.
398
399 -Selected a set of interrupt parameters based on some extensive testing.
400 These may change with more testing.
401
402TO DO:
403
404-Consider borrowing from the acenic driver code to check PCI_COMMAND for
405PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
406that case.
407
408-fix the reset procedure. It doesn't quite work.
409*/
410
411/* A few values that may be tweaked. */
412/* Size of each temporary Rx buffer, calculated as:
413 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
414 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
415 * 2 more because we use skb_reserve.
416 */
417#define PKT_BUF_SZ 1538
418
419/* For now, this is going to be set to the maximum size of an ethernet
420 * packet. Eventually, we may want to make it a variable that is
421 * related to the MTU
422 */
423#define MAX_FRAME_SIZE 1518
424
425/* The rest of these values should never change. */
426
427static void hamachi_timer(unsigned long data);
428
429enum capability_flags {CanHaveMII=1, };
430static struct chip_info {
431 u16 vendor_id, device_id, device_id_mask, pad;
432 const char *name;
433 void (*media_timer)(unsigned long data);
434 int flags;
435} chip_tbl[] = {
436 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
437 {0,},
438};
439
440/* Offsets to the Hamachi registers. Various sizes. */
441enum hamachi_offsets {
442 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
443 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
444 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
445 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
446 TxChecksum=0x074, RxChecksum=0x076,
447 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
448 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
449 EventStatus=0x08C,
450 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
451 /* See enum MII_offsets below. */
452 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
453 AddrMode=0x0D0, StationAddr=0x0D2,
454 /* Gigabit AutoNegotiation. */
455 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
456 ANLinkPartnerAbility=0x0EA,
457 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
458 FIFOcfg=0x0F8,
459};
460
461/* Offsets to the MII-mode registers. */
462enum MII_offsets {
463 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
464 MII_Status=0xAE,
465};
466
467/* Bits in the interrupt status/mask registers. */
468enum intr_status_bits {
469 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
470 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
471 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
472
473/* The Hamachi Rx and Tx buffer descriptors. */
474struct hamachi_desc {
475 u32 status_n_length;
476#if ADDRLEN == 64
477 u32 pad;
478 u64 addr;
479#else
480 u32 addr;
481#endif
482};
483
484/* Bits in hamachi_desc.status_n_length */
485enum desc_status_bits {
486 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
487 DescIntr=0x10000000,
488};
489
490#define PRIV_ALIGN 15 /* Required alignment mask */
491#define MII_CNT 4
492struct hamachi_private {
493 /* Descriptor rings first for alignment. Tx requires a second descriptor
494 for status. */
495 struct hamachi_desc *rx_ring;
496 struct hamachi_desc *tx_ring;
497 struct sk_buff* rx_skbuff[RX_RING_SIZE];
498 struct sk_buff* tx_skbuff[TX_RING_SIZE];
499 dma_addr_t tx_ring_dma;
500 dma_addr_t rx_ring_dma;
501 struct net_device_stats stats;
502 struct timer_list timer; /* Media selection timer. */
503 /* Frequently used and paired value: keep adjacent for cache effect. */
504 spinlock_t lock;
505 int chip_id;
506 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
507 unsigned int cur_tx, dirty_tx;
508 unsigned int rx_buf_sz; /* Based on MTU+slack. */
509 unsigned int tx_full:1; /* The Tx queue is full. */
510 unsigned int duplex_lock:1;
511 unsigned int default_port:4; /* Last dev->if_port value. */
512 /* MII transceiver section. */
513 int mii_cnt; /* MII device addresses. */
514 struct mii_if_info mii_if; /* MII lib hooks/info */
515 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
516 u32 rx_int_var, tx_int_var; /* interrupt control variables */
517 u32 option; /* Hold on to a copy of the options */
518 struct pci_dev *pci_dev;
519 void __iomem *base;
520};
521
522MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
523MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
524MODULE_LICENSE("GPL");
525
526module_param(max_interrupt_work, int, 0);
527module_param(mtu, int, 0);
528module_param(debug, int, 0);
529module_param(min_rx_pkt, int, 0);
530module_param(max_rx_gap, int, 0);
531module_param(max_rx_latency, int, 0);
532module_param(min_tx_pkt, int, 0);
533module_param(max_tx_gap, int, 0);
534module_param(max_tx_latency, int, 0);
535module_param(rx_copybreak, int, 0);
536module_param_array(rx_params, int, NULL, 0);
537module_param_array(tx_params, int, NULL, 0);
538module_param_array(options, int, NULL, 0);
539module_param_array(full_duplex, int, NULL, 0);
540module_param(force32, int, 0);
541MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
542MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
543MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
544MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
545MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
546MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
547MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
548MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
549MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
550MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
551MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
552MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
553MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
554MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
555MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
556
557static int read_eeprom(void __iomem *ioaddr, int location);
558static int mdio_read(struct net_device *dev, int phy_id, int location);
559static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
560static int hamachi_open(struct net_device *dev);
561static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
562static void hamachi_timer(unsigned long data);
563static void hamachi_tx_timeout(struct net_device *dev);
564static void hamachi_init_ring(struct net_device *dev);
565static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
566static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
567static int hamachi_rx(struct net_device *dev);
568static inline int hamachi_tx(struct net_device *dev);
569static void hamachi_error(struct net_device *dev, int intr_status);
570static int hamachi_close(struct net_device *dev);
571static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
572static void set_rx_mode(struct net_device *dev);
573static struct ethtool_ops ethtool_ops;
574static struct ethtool_ops ethtool_ops_no_mii;
575
576static int __devinit hamachi_init_one (struct pci_dev *pdev,
577 const struct pci_device_id *ent)
578{
579 struct hamachi_private *hmp;
580 int option, i, rx_int_var, tx_int_var, boguscnt;
581 int chip_id = ent->driver_data;
582 int irq;
583 void __iomem *ioaddr;
584 unsigned long base;
585 static int card_idx;
586 struct net_device *dev;
587 void *ring_space;
588 dma_addr_t ring_dma;
589 int ret = -ENOMEM;
590
591/* when built into the kernel, we only print version if device is found */
592#ifndef MODULE
593 static int printed_version;
594 if (!printed_version++)
595 printk(version);
596#endif
597
598 if (pci_enable_device(pdev)) {
599 ret = -EIO;
600 goto err_out;
601 }
602
603 base = pci_resource_start(pdev, 0);
604#ifdef __alpha__ /* Really "64 bit addrs" */
605 base |= (pci_resource_start(pdev, 1) << 32);
606#endif
607
608 pci_set_master(pdev);
609
610 i = pci_request_regions(pdev, DRV_NAME);
611 if (i) return i;
612
613 irq = pdev->irq;
614 ioaddr = ioremap(base, 0x400);
615 if (!ioaddr)
616 goto err_out_release;
617
618 dev = alloc_etherdev(sizeof(struct hamachi_private));
619 if (!dev)
620 goto err_out_iounmap;
621
622 SET_MODULE_OWNER(dev);
623 SET_NETDEV_DEV(dev, &pdev->dev);
624
625#ifdef TX_CHECKSUM
626 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
627 dev->hard_header_len += 8; /* for cksum tag */
628#endif
629
630 for (i = 0; i < 6; i++)
631 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
632 : readb(ioaddr + StationAddr + i);
633
634#if ! defined(final_version)
635 if (hamachi_debug > 4)
636 for (i = 0; i < 0x10; i++)
637 printk("%2.2x%s",
638 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
639#endif
640
641 hmp = netdev_priv(dev);
642 spin_lock_init(&hmp->lock);
643
644 hmp->mii_if.dev = dev;
645 hmp->mii_if.mdio_read = mdio_read;
646 hmp->mii_if.mdio_write = mdio_write;
647 hmp->mii_if.phy_id_mask = 0x1f;
648 hmp->mii_if.reg_num_mask = 0x1f;
649
650 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
651 if (!ring_space)
652 goto err_out_cleardev;
653 hmp->tx_ring = (struct hamachi_desc *)ring_space;
654 hmp->tx_ring_dma = ring_dma;
655
656 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
657 if (!ring_space)
658 goto err_out_unmap_tx;
659 hmp->rx_ring = (struct hamachi_desc *)ring_space;
660 hmp->rx_ring_dma = ring_dma;
661
662 /* Check for options being passed in */
663 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
664 if (dev->mem_start)
665 option = dev->mem_start;
666
667 /* If the bus size is misidentified, do the following. */
668 force32 = force32 ? force32 :
669 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
670 if (force32)
671 writeb(force32, ioaddr + VirtualJumpers);
672
673 /* Hmmm, do we really need to reset the chip???. */
674 writeb(0x01, ioaddr + ChipReset);
675
676 /* After a reset, the clock speed measurement of the PCI bus will not
677 * be valid for a moment. Wait for a little while until it is. If
678 * it takes more than 10ms, forget it.
679 */
680 udelay(10);
681 i = readb(ioaddr + PCIClkMeas);
682 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
683 udelay(10);
684 i = readb(ioaddr + PCIClkMeas);
685 }
686
687 hmp->base = ioaddr;
688 dev->base_addr = (unsigned long)ioaddr;
689 dev->irq = irq;
690 pci_set_drvdata(pdev, dev);
691
692 hmp->chip_id = chip_id;
693 hmp->pci_dev = pdev;
694
695 /* The lower four bits are the media type. */
696 if (option > 0) {
697 hmp->option = option;
698 if (option & 0x200)
699 hmp->mii_if.full_duplex = 1;
700 else if (option & 0x080)
701 hmp->mii_if.full_duplex = 0;
702 hmp->default_port = option & 15;
703 if (hmp->default_port)
704 hmp->mii_if.force_media = 1;
705 }
706 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
707 hmp->mii_if.full_duplex = 1;
708
709 /* lock the duplex mode if someone specified a value */
710 if (hmp->mii_if.full_duplex || (option & 0x080))
711 hmp->duplex_lock = 1;
712
713 /* Set interrupt tuning parameters */
714 max_rx_latency = max_rx_latency & 0x00ff;
715 max_rx_gap = max_rx_gap & 0x00ff;
716 min_rx_pkt = min_rx_pkt & 0x00ff;
717 max_tx_latency = max_tx_latency & 0x00ff;
718 max_tx_gap = max_tx_gap & 0x00ff;
719 min_tx_pkt = min_tx_pkt & 0x00ff;
720
721 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
722 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
723 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
724 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
725 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
726 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
727
728
729 /* The Hamachi-specific entries in the device structure. */
730 dev->open = &hamachi_open;
731 dev->hard_start_xmit = &hamachi_start_xmit;
732 dev->stop = &hamachi_close;
733 dev->get_stats = &hamachi_get_stats;
734 dev->set_multicast_list = &set_rx_mode;
735 dev->do_ioctl = &netdev_ioctl;
736 if (chip_tbl[hmp->chip_id].flags & CanHaveMII)
737 SET_ETHTOOL_OPS(dev, &ethtool_ops);
738 else
739 SET_ETHTOOL_OPS(dev, &ethtool_ops_no_mii);
740 dev->tx_timeout = &hamachi_tx_timeout;
741 dev->watchdog_timeo = TX_TIMEOUT;
742 if (mtu)
743 dev->mtu = mtu;
744
745 i = register_netdev(dev);
746 if (i) {
747 ret = i;
748 goto err_out_unmap_rx;
749 }
750
751 printk(KERN_INFO "%s: %s type %x at %p, ",
752 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
753 ioaddr);
754 for (i = 0; i < 5; i++)
755 printk("%2.2x:", dev->dev_addr[i]);
756 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
757 i = readb(ioaddr + PCIClkMeas);
758 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
759 "%2.2x, LPA %4.4x.\n",
760 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
761 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
762 readw(ioaddr + ANLinkPartnerAbility));
763
764 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
765 int phy, phy_idx = 0;
766 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
767 int mii_status = mdio_read(dev, phy, MII_BMSR);
768 if (mii_status != 0xffff &&
769 mii_status != 0x0000) {
770 hmp->phys[phy_idx++] = phy;
771 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
772 printk(KERN_INFO "%s: MII PHY found at address %d, status "
773 "0x%4.4x advertising %4.4x.\n",
774 dev->name, phy, mii_status, hmp->mii_if.advertising);
775 }
776 }
777 hmp->mii_cnt = phy_idx;
778 if (hmp->mii_cnt > 0)
779 hmp->mii_if.phy_id = hmp->phys[0];
780 else
781 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
782 }
783 /* Configure gigabit autonegotiation. */
784 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
785 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
786 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
787
788 card_idx++;
789 return 0;
790
791err_out_unmap_rx:
792 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
793 hmp->rx_ring_dma);
794err_out_unmap_tx:
795 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
796 hmp->tx_ring_dma);
797err_out_cleardev:
798 free_netdev (dev);
799err_out_iounmap:
800 iounmap(ioaddr);
801err_out_release:
802 pci_release_regions(pdev);
803err_out:
804 return ret;
805}
806
807static int __devinit read_eeprom(void __iomem *ioaddr, int location)
808{
809 int bogus_cnt = 1000;
810
811 /* We should check busy first - per docs -KDU */
812 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
813 writew(location, ioaddr + EEAddr);
814 writeb(0x02, ioaddr + EECmdStatus);
815 bogus_cnt = 1000;
816 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
817 if (hamachi_debug > 5)
818 printk(" EEPROM status is %2.2x after %d ticks.\n",
819 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
820 return readb(ioaddr + EEData);
821}
822
823/* MII Managemen Data I/O accesses.
824 These routines assume the MDIO controller is idle, and do not exit until
825 the command is finished. */
826
827static int mdio_read(struct net_device *dev, int phy_id, int location)
828{
829 struct hamachi_private *hmp = netdev_priv(dev);
830 void __iomem *ioaddr = hmp->base;
831 int i;
832
833 /* We should check busy first - per docs -KDU */
834 for (i = 10000; i >= 0; i--)
835 if ((readw(ioaddr + MII_Status) & 1) == 0)
836 break;
837 writew((phy_id<<8) + location, ioaddr + MII_Addr);
838 writew(0x0001, ioaddr + MII_Cmd);
839 for (i = 10000; i >= 0; i--)
840 if ((readw(ioaddr + MII_Status) & 1) == 0)
841 break;
842 return readw(ioaddr + MII_Rd_Data);
843}
844
845static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
846{
847 struct hamachi_private *hmp = netdev_priv(dev);
848 void __iomem *ioaddr = hmp->base;
849 int i;
850
851 /* We should check busy first - per docs -KDU */
852 for (i = 10000; i >= 0; i--)
853 if ((readw(ioaddr + MII_Status) & 1) == 0)
854 break;
855 writew((phy_id<<8) + location, ioaddr + MII_Addr);
856 writew(value, ioaddr + MII_Wr_Data);
857
858 /* Wait for the command to finish. */
859 for (i = 10000; i >= 0; i--)
860 if ((readw(ioaddr + MII_Status) & 1) == 0)
861 break;
862 return;
863}
864
865
866static int hamachi_open(struct net_device *dev)
867{
868 struct hamachi_private *hmp = netdev_priv(dev);
869 void __iomem *ioaddr = hmp->base;
870 int i;
871 u32 rx_int_var, tx_int_var;
872 u16 fifo_info;
873
874 i = request_irq(dev->irq, &hamachi_interrupt, SA_SHIRQ, dev->name, dev);
875 if (i)
876 return i;
877
878 if (hamachi_debug > 1)
879 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
880 dev->name, dev->irq);
881
882 hamachi_init_ring(dev);
883
884#if ADDRLEN == 64
885 /* writellll anyone ? */
886 writel(cpu_to_le64(hmp->rx_ring_dma), ioaddr + RxPtr);
887 writel(cpu_to_le64(hmp->rx_ring_dma) >> 32, ioaddr + RxPtr + 4);
888 writel(cpu_to_le64(hmp->tx_ring_dma), ioaddr + TxPtr);
889 writel(cpu_to_le64(hmp->tx_ring_dma) >> 32, ioaddr + TxPtr + 4);
890#else
891 writel(cpu_to_le32(hmp->rx_ring_dma), ioaddr + RxPtr);
892 writel(cpu_to_le32(hmp->tx_ring_dma), ioaddr + TxPtr);
893#endif
894
895 /* TODO: It would make sense to organize this as words since the card
896 * documentation does. -KDU
897 */
898 for (i = 0; i < 6; i++)
899 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
900
901 /* Initialize other registers: with so many this eventually this will
902 converted to an offset/value list. */
903
904 /* Configure the FIFO */
905 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
906 switch (fifo_info){
907 case 0 :
908 /* No FIFO */
909 writew(0x0000, ioaddr + FIFOcfg);
910 break;
911 case 1 :
912 /* Configure the FIFO for 512K external, 16K used for Tx. */
913 writew(0x0028, ioaddr + FIFOcfg);
914 break;
915 case 2 :
916 /* Configure the FIFO for 1024 external, 32K used for Tx. */
917 writew(0x004C, ioaddr + FIFOcfg);
918 break;
919 case 3 :
920 /* Configure the FIFO for 2048 external, 32K used for Tx. */
921 writew(0x006C, ioaddr + FIFOcfg);
922 break;
923 default :
924 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
925 dev->name);
926 /* Default to no FIFO */
927 writew(0x0000, ioaddr + FIFOcfg);
928 break;
929 }
930
931 if (dev->if_port == 0)
932 dev->if_port = hmp->default_port;
933
934
935 /* Setting the Rx mode will start the Rx process. */
936 /* If someone didn't choose a duplex, default to full-duplex */
937 if (hmp->duplex_lock != 1)
938 hmp->mii_if.full_duplex = 1;
939
940 /* always 1, takes no more time to do it */
941 writew(0x0001, ioaddr + RxChecksum);
942#ifdef TX_CHECKSUM
943 writew(0x0001, ioaddr + TxChecksum);
944#else
945 writew(0x0000, ioaddr + TxChecksum);
946#endif
947 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
948 writew(0x215F, ioaddr + MACCnfg);
949 writew(0x000C, ioaddr + FrameGap0);
950 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
951 writew(0x1018, ioaddr + FrameGap1);
952 /* Why do we enable receives/transmits here? -KDU */
953 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
954 /* Enable automatic generation of flow control frames, period 0xffff. */
955 writel(0x0030FFFF, ioaddr + FlowCtrl);
956 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
957
958 /* Enable legacy links. */
959 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
960 /* Initial Link LED to blinking red. */
961 writeb(0x03, ioaddr + LEDCtrl);
962
963 /* Configure interrupt mitigation. This has a great effect on
964 performance, so systems tuning should start here!. */
965
966 rx_int_var = hmp->rx_int_var;
967 tx_int_var = hmp->tx_int_var;
968
969 if (hamachi_debug > 1) {
970 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
971 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
972 (tx_int_var & 0x00ff0000) >> 16);
973 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
974 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
975 (rx_int_var & 0x00ff0000) >> 16);
976 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
977 }
978
979 writel(tx_int_var, ioaddr + TxIntrCtrl);
980 writel(rx_int_var, ioaddr + RxIntrCtrl);
981
982 set_rx_mode(dev);
983
984 netif_start_queue(dev);
985
986 /* Enable interrupts by setting the interrupt mask. */
987 writel(0x80878787, ioaddr + InterruptEnable);
988 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
989
990 /* Configure and start the DMA channels. */
991 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
992#if ADDRLEN == 64
993 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
994 writew(0x005D, ioaddr + TxDMACtrl);
995#else
996 writew(0x001D, ioaddr + RxDMACtrl);
997 writew(0x001D, ioaddr + TxDMACtrl);
998#endif
999 writew(0x0001, ioaddr + RxCmd);
1000
1001 if (hamachi_debug > 2) {
1002 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
1003 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
1004 }
1005 /* Set the timer to check for link beat. */
1006 init_timer(&hmp->timer);
1007 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
1008 hmp->timer.data = (unsigned long)dev;
1009 hmp->timer.function = &hamachi_timer; /* timer handler */
1010 add_timer(&hmp->timer);
1011
1012 return 0;
1013}
1014
1015static inline int hamachi_tx(struct net_device *dev)
1016{
1017 struct hamachi_private *hmp = netdev_priv(dev);
1018
1019 /* Update the dirty pointer until we find an entry that is
1020 still owned by the card */
1021 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1022 int entry = hmp->dirty_tx % TX_RING_SIZE;
1023 struct sk_buff *skb;
1024
1025 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1026 break;
1027 /* Free the original skb. */
1028 skb = hmp->tx_skbuff[entry];
1029 if (skb != 0) {
1030 pci_unmap_single(hmp->pci_dev,
1031 hmp->tx_ring[entry].addr, skb->len,
1032 PCI_DMA_TODEVICE);
1033 dev_kfree_skb(skb);
1034 hmp->tx_skbuff[entry] = NULL;
1035 }
1036 hmp->tx_ring[entry].status_n_length = 0;
1037 if (entry >= TX_RING_SIZE-1)
1038 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1039 cpu_to_le32(DescEndRing);
1040 hmp->stats.tx_packets++;
1041 }
1042
1043 return 0;
1044}
1045
1046static void hamachi_timer(unsigned long data)
1047{
1048 struct net_device *dev = (struct net_device *)data;
1049 struct hamachi_private *hmp = netdev_priv(dev);
1050 void __iomem *ioaddr = hmp->base;
1051 int next_tick = 10*HZ;
1052
1053 if (hamachi_debug > 2) {
1054 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1055 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1056 readw(ioaddr + ANLinkPartnerAbility));
1057 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1058 "%4.4x %4.4x %4.4x.\n", dev->name,
1059 readw(ioaddr + 0x0e0),
1060 readw(ioaddr + 0x0e2),
1061 readw(ioaddr + 0x0e4),
1062 readw(ioaddr + 0x0e6),
1063 readw(ioaddr + 0x0e8),
1064 readw(ioaddr + 0x0eA));
1065 }
1066 /* We could do something here... nah. */
1067 hmp->timer.expires = RUN_AT(next_tick);
1068 add_timer(&hmp->timer);
1069}
1070
1071static void hamachi_tx_timeout(struct net_device *dev)
1072{
1073 int i;
1074 struct hamachi_private *hmp = netdev_priv(dev);
1075 void __iomem *ioaddr = hmp->base;
1076
1077 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1078 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1079
1080 {
1081 int i;
1082 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1083 for (i = 0; i < RX_RING_SIZE; i++)
1084 printk(" %8.8x", (unsigned int)hmp->rx_ring[i].status_n_length);
1085 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1086 for (i = 0; i < TX_RING_SIZE; i++)
1087 printk(" %4.4x", hmp->tx_ring[i].status_n_length);
1088 printk("\n");
1089 }
1090
1091 /* Reinit the hardware and make sure the Rx and Tx processes
1092 are up and running.
1093 */
1094 dev->if_port = 0;
1095 /* The right way to do Reset. -KDU
1096 * -Clear OWN bit in all Rx/Tx descriptors
1097 * -Wait 50 uS for channels to go idle
1098 * -Turn off MAC receiver
1099 * -Issue Reset
1100 */
1101
1102 for (i = 0; i < RX_RING_SIZE; i++)
1103 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1104
1105 /* Presume that all packets in the Tx queue are gone if we have to
1106 * re-init the hardware.
1107 */
1108 for (i = 0; i < TX_RING_SIZE; i++){
1109 struct sk_buff *skb;
1110
1111 if (i >= TX_RING_SIZE - 1)
1112 hmp->tx_ring[i].status_n_length = cpu_to_le32(
1113 DescEndRing |
1114 (hmp->tx_ring[i].status_n_length & 0x0000FFFF));
1115 else
1116 hmp->tx_ring[i].status_n_length &= 0x0000ffff;
1117 skb = hmp->tx_skbuff[i];
1118 if (skb){
1119 pci_unmap_single(hmp->pci_dev, hmp->tx_ring[i].addr,
1120 skb->len, PCI_DMA_TODEVICE);
1121 dev_kfree_skb(skb);
1122 hmp->tx_skbuff[i] = NULL;
1123 }
1124 }
1125
1126 udelay(60); /* Sleep 60 us just for safety sake */
1127 writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1128
1129 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1130
1131 hmp->tx_full = 0;
1132 hmp->cur_rx = hmp->cur_tx = 0;
1133 hmp->dirty_rx = hmp->dirty_tx = 0;
1134 /* Rx packets are also presumed lost; however, we need to make sure a
1135 * ring of buffers is in tact. -KDU
1136 */
1137 for (i = 0; i < RX_RING_SIZE; i++){
1138 struct sk_buff *skb = hmp->rx_skbuff[i];
1139
1140 if (skb){
1141 pci_unmap_single(hmp->pci_dev, hmp->rx_ring[i].addr,
1142 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1143 dev_kfree_skb(skb);
1144 hmp->rx_skbuff[i] = NULL;
1145 }
1146 }
1147 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1148 for (i = 0; i < RX_RING_SIZE; i++) {
1149 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1150 hmp->rx_skbuff[i] = skb;
1151 if (skb == NULL)
1152 break;
1153 skb->dev = dev; /* Mark as being used by this device. */
1154 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1155 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -07001156 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001157 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1158 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1159 }
1160 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1161 /* Mark the last entry as wrapping the ring. */
1162 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1163
1164 /* Trigger an immediate transmit demand. */
1165 dev->trans_start = jiffies;
1166 hmp->stats.tx_errors++;
1167
1168 /* Restart the chip's Tx/Rx processes . */
1169 writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1170 writew(0x0001, ioaddr + TxCmd); /* START Tx */
1171 writew(0x0001, ioaddr + RxCmd); /* START Rx */
1172
1173 netif_wake_queue(dev);
1174}
1175
1176
1177/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1178static void hamachi_init_ring(struct net_device *dev)
1179{
1180 struct hamachi_private *hmp = netdev_priv(dev);
1181 int i;
1182
1183 hmp->tx_full = 0;
1184 hmp->cur_rx = hmp->cur_tx = 0;
1185 hmp->dirty_rx = hmp->dirty_tx = 0;
1186
1187#if 0
1188 /* This is wrong. I'm not sure what the original plan was, but this
1189 * is wrong. An MTU of 1 gets you a buffer of 1536, while an MTU
1190 * of 1501 gets a buffer of 1533? -KDU
1191 */
1192 hmp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1193#endif
1194 /* My attempt at a reasonable correction */
1195 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1196 * card needs room to do 8 byte alignment, +2 so we can reserve
1197 * the first 2 bytes, and +16 gets room for the status word from the
1198 * card. -KDU
1199 */
1200 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1201 (((dev->mtu+26+7) & ~7) + 2 + 16));
1202
1203 /* Initialize all Rx descriptors. */
1204 for (i = 0; i < RX_RING_SIZE; i++) {
1205 hmp->rx_ring[i].status_n_length = 0;
1206 hmp->rx_skbuff[i] = NULL;
1207 }
1208 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1209 for (i = 0; i < RX_RING_SIZE; i++) {
1210 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1211 hmp->rx_skbuff[i] = skb;
1212 if (skb == NULL)
1213 break;
1214 skb->dev = dev; /* Mark as being used by this device. */
1215 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1216 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -07001217 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001218 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1219 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1220 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1221 }
1222 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1223 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1224
1225 for (i = 0; i < TX_RING_SIZE; i++) {
1226 hmp->tx_skbuff[i] = NULL;
1227 hmp->tx_ring[i].status_n_length = 0;
1228 }
1229 /* Mark the last entry of the ring */
1230 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1231
1232 return;
1233}
1234
1235
1236#ifdef TX_CHECKSUM
1237#define csum_add(it, val) \
1238do { \
1239 it += (u16) (val); \
1240 if (it & 0xffff0000) { \
1241 it &= 0xffff; \
1242 ++it; \
1243 } \
1244} while (0)
1245 /* printk("add %04x --> %04x\n", val, it); \ */
1246
1247/* uh->len already network format, do not swap */
1248#define pseudo_csum_udp(sum,ih,uh) do { \
1249 sum = 0; \
1250 csum_add(sum, (ih)->saddr >> 16); \
1251 csum_add(sum, (ih)->saddr & 0xffff); \
1252 csum_add(sum, (ih)->daddr >> 16); \
1253 csum_add(sum, (ih)->daddr & 0xffff); \
1254 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1255 csum_add(sum, (uh)->len); \
1256} while (0)
1257
1258/* swap len */
1259#define pseudo_csum_tcp(sum,ih,len) do { \
1260 sum = 0; \
1261 csum_add(sum, (ih)->saddr >> 16); \
1262 csum_add(sum, (ih)->saddr & 0xffff); \
1263 csum_add(sum, (ih)->daddr >> 16); \
1264 csum_add(sum, (ih)->daddr & 0xffff); \
1265 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1266 csum_add(sum, htons(len)); \
1267} while (0)
1268#endif
1269
1270static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1271{
1272 struct hamachi_private *hmp = netdev_priv(dev);
1273 unsigned entry;
1274 u16 status;
1275
1276 /* Ok, now make sure that the queue has space before trying to
1277 add another skbuff. if we return non-zero the scheduler
1278 should interpret this as a queue full and requeue the buffer
1279 for later.
1280 */
1281 if (hmp->tx_full) {
1282 /* We should NEVER reach this point -KDU */
1283 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1284
1285 /* Wake the potentially-idle transmit channel. */
1286 /* If we don't need to read status, DON'T -KDU */
1287 status=readw(hmp->base + TxStatus);
1288 if( !(status & 0x0001) || (status & 0x0002))
1289 writew(0x0001, hmp->base + TxCmd);
1290 return 1;
1291 }
1292
1293 /* Caution: the write order is important here, set the field
1294 with the "ownership" bits last. */
1295
1296 /* Calculate the next Tx descriptor entry. */
1297 entry = hmp->cur_tx % TX_RING_SIZE;
1298
1299 hmp->tx_skbuff[entry] = skb;
1300
1301#ifdef TX_CHECKSUM
1302 {
1303 /* tack on checksum tag */
1304 u32 tagval = 0;
1305 struct ethhdr *eh = (struct ethhdr *)skb->data;
1306 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1307 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1308 if (ih->protocol == IPPROTO_UDP) {
1309 struct udphdr *uh
1310 = (struct udphdr *)((char *)ih + ih->ihl*4);
1311 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1312 u32 pseudo;
1313 pseudo_csum_udp(pseudo, ih, uh);
1314 pseudo = htons(pseudo);
1315 printk("udp cksum was %04x, sending pseudo %04x\n",
1316 uh->check, pseudo);
1317 uh->check = 0; /* zero out uh->check before card calc */
1318 /*
1319 * start at 14 (skip ethhdr), store at offset (uh->check),
1320 * use pseudo value given.
1321 */
1322 tagval = (14 << 24) | (offset << 16) | pseudo;
1323 } else if (ih->protocol == IPPROTO_TCP) {
1324 printk("tcp, no auto cksum\n");
1325 }
1326 }
1327 *(u32 *)skb_push(skb, 8) = tagval;
1328 }
1329#endif
1330
1331 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1332 skb->data, skb->len, PCI_DMA_TODEVICE));
1333
1334 /* Hmmmm, could probably put a DescIntr on these, but the way
1335 the driver is currently coded makes Tx interrupts unnecessary
1336 since the clearing of the Tx ring is handled by the start_xmit
1337 routine. This organization helps mitigate the interrupts a
1338 bit and probably renders the max_tx_latency param useless.
1339
1340 Update: Putting a DescIntr bit on all of the descriptors and
1341 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1342 */
1343 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1344 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1345 DescEndPacket | DescEndRing | DescIntr | skb->len);
1346 else
1347 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1348 DescEndPacket | DescIntr | skb->len);
1349 hmp->cur_tx++;
1350
1351 /* Non-x86 Todo: explicitly flush cache lines here. */
1352
1353 /* Wake the potentially-idle transmit channel. */
1354 /* If we don't need to read status, DON'T -KDU */
1355 status=readw(hmp->base + TxStatus);
1356 if( !(status & 0x0001) || (status & 0x0002))
1357 writew(0x0001, hmp->base + TxCmd);
1358
1359 /* Immediately before returning, let's clear as many entries as we can. */
1360 hamachi_tx(dev);
1361
1362 /* We should kick the bottom half here, since we are not accepting
1363 * interrupts with every packet. i.e. realize that Gigabit ethernet
1364 * can transmit faster than ordinary machines can load packets;
1365 * hence, any packet that got put off because we were in the transmit
1366 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1367 */
1368 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1369 netif_wake_queue(dev); /* Typical path */
1370 else {
1371 hmp->tx_full = 1;
1372 netif_stop_queue(dev);
1373 }
1374 dev->trans_start = jiffies;
1375
1376 if (hamachi_debug > 4) {
1377 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1378 dev->name, hmp->cur_tx, entry);
1379 }
1380 return 0;
1381}
1382
1383/* The interrupt handler does all of the Rx thread work and cleans up
1384 after the Tx thread. */
1385static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *rgs)
1386{
1387 struct net_device *dev = dev_instance;
1388 struct hamachi_private *hmp = netdev_priv(dev);
1389 void __iomem *ioaddr = hmp->base;
1390 long boguscnt = max_interrupt_work;
1391 int handled = 0;
1392
1393#ifndef final_version /* Can never occur. */
1394 if (dev == NULL) {
1395 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1396 return IRQ_NONE;
1397 }
1398#endif
1399
1400 spin_lock(&hmp->lock);
1401
1402 do {
1403 u32 intr_status = readl(ioaddr + InterruptClear);
1404
1405 if (hamachi_debug > 4)
1406 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1407 dev->name, intr_status);
1408
1409 if (intr_status == 0)
1410 break;
1411
1412 handled = 1;
1413
1414 if (intr_status & IntrRxDone)
1415 hamachi_rx(dev);
1416
1417 if (intr_status & IntrTxDone){
1418 /* This code should RARELY need to execute. After all, this is
1419 * a gigabit link, it should consume packets as fast as we put
1420 * them in AND we clear the Tx ring in hamachi_start_xmit().
1421 */
1422 if (hmp->tx_full){
1423 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1424 int entry = hmp->dirty_tx % TX_RING_SIZE;
1425 struct sk_buff *skb;
1426
1427 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1428 break;
1429 skb = hmp->tx_skbuff[entry];
1430 /* Free the original skb. */
1431 if (skb){
1432 pci_unmap_single(hmp->pci_dev,
1433 hmp->tx_ring[entry].addr,
1434 skb->len,
1435 PCI_DMA_TODEVICE);
1436 dev_kfree_skb_irq(skb);
1437 hmp->tx_skbuff[entry] = NULL;
1438 }
1439 hmp->tx_ring[entry].status_n_length = 0;
1440 if (entry >= TX_RING_SIZE-1)
1441 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1442 cpu_to_le32(DescEndRing);
1443 hmp->stats.tx_packets++;
1444 }
1445 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1446 /* The ring is no longer full */
1447 hmp->tx_full = 0;
1448 netif_wake_queue(dev);
1449 }
1450 } else {
1451 netif_wake_queue(dev);
1452 }
1453 }
1454
1455
1456 /* Abnormal error summary/uncommon events handlers. */
1457 if (intr_status &
1458 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1459 LinkChange | NegotiationChange | StatsMax))
1460 hamachi_error(dev, intr_status);
1461
1462 if (--boguscnt < 0) {
1463 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1464 dev->name, intr_status);
1465 break;
1466 }
1467 } while (1);
1468
1469 if (hamachi_debug > 3)
1470 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1471 dev->name, readl(ioaddr + IntrStatus));
1472
1473#ifndef final_version
1474 /* Code that should never be run! Perhaps remove after testing.. */
1475 {
1476 static int stopit = 10;
1477 if (dev->start == 0 && --stopit < 0) {
1478 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1479 dev->name);
1480 free_irq(irq, dev);
1481 }
1482 }
1483#endif
1484
1485 spin_unlock(&hmp->lock);
1486 return IRQ_RETVAL(handled);
1487}
1488
1489/* This routine is logically part of the interrupt handler, but separated
1490 for clarity and better register allocation. */
1491static int hamachi_rx(struct net_device *dev)
1492{
1493 struct hamachi_private *hmp = netdev_priv(dev);
1494 int entry = hmp->cur_rx % RX_RING_SIZE;
1495 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1496
1497 if (hamachi_debug > 4) {
1498 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1499 entry, hmp->rx_ring[entry].status_n_length);
1500 }
1501
1502 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1503 while (1) {
1504 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1505 u32 desc_status = le32_to_cpu(desc->status_n_length);
1506 u16 data_size = desc_status; /* Implicit truncate */
1507 u8 *buf_addr;
1508 s32 frame_status;
1509
1510 if (desc_status & DescOwn)
1511 break;
1512 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1513 desc->addr,
1514 hmp->rx_buf_sz,
1515 PCI_DMA_FROMDEVICE);
David S. Miller689be432005-06-28 15:25:31 -07001516 buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001517 frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12])));
1518 if (hamachi_debug > 4)
1519 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1520 frame_status);
1521 if (--boguscnt < 0)
1522 break;
1523 if ( ! (desc_status & DescEndPacket)) {
1524 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1525 "multiple buffers, entry %#x length %d status %4.4x!\n",
1526 dev->name, hmp->cur_rx, data_size, desc_status);
1527 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1528 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1529 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1530 dev->name,
1531 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0xffff0000,
1532 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0x0000ffff,
1533 hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length);
1534 hmp->stats.rx_length_errors++;
1535 } /* else Omit for prototype errata??? */
1536 if (frame_status & 0x00380000) {
1537 /* There was an error. */
1538 if (hamachi_debug > 2)
1539 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1540 frame_status);
1541 hmp->stats.rx_errors++;
1542 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1543 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1544 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1545 if (frame_status < 0) hmp->stats.rx_dropped++;
1546 } else {
1547 struct sk_buff *skb;
1548 /* Omit CRC */
1549 u16 pkt_len = (frame_status & 0x07ff) - 4;
1550#ifdef RX_CHECKSUM
1551 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1552#endif
1553
1554
1555#ifndef final_version
1556 if (hamachi_debug > 4)
1557 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1558 " of %d, bogus_cnt %d.\n",
1559 pkt_len, data_size, boguscnt);
1560 if (hamachi_debug > 5)
1561 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1562 dev->name,
1563 *(s32*)&(buf_addr[data_size - 20]),
1564 *(s32*)&(buf_addr[data_size - 16]),
1565 *(s32*)&(buf_addr[data_size - 12]),
1566 *(s32*)&(buf_addr[data_size - 8]),
1567 *(s32*)&(buf_addr[data_size - 4]));
1568#endif
1569 /* Check if the packet is long enough to accept without copying
1570 to a minimally-sized skbuff. */
1571 if (pkt_len < rx_copybreak
1572 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1573#ifdef RX_CHECKSUM
1574 printk(KERN_ERR "%s: rx_copybreak non-zero "
1575 "not good with RX_CHECKSUM\n", dev->name);
1576#endif
1577 skb->dev = dev;
1578 skb_reserve(skb, 2); /* 16 byte align the IP header */
1579 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1580 hmp->rx_ring[entry].addr,
1581 hmp->rx_buf_sz,
1582 PCI_DMA_FROMDEVICE);
1583 /* Call copy + cksum if available. */
1584#if 1 || USE_IP_COPYSUM
1585 eth_copy_and_sum(skb,
1586 hmp->rx_skbuff[entry]->data, pkt_len, 0);
1587 skb_put(skb, pkt_len);
1588#else
1589 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1590 + entry*sizeof(*desc), pkt_len);
1591#endif
1592 pci_dma_sync_single_for_device(hmp->pci_dev,
1593 hmp->rx_ring[entry].addr,
1594 hmp->rx_buf_sz,
1595 PCI_DMA_FROMDEVICE);
1596 } else {
1597 pci_unmap_single(hmp->pci_dev,
1598 hmp->rx_ring[entry].addr,
1599 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1600 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1601 hmp->rx_skbuff[entry] = NULL;
1602 }
1603 skb->protocol = eth_type_trans(skb, dev);
1604
1605
1606#ifdef RX_CHECKSUM
1607 /* TCP or UDP on ipv4, DIX encoding */
1608 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1609 struct iphdr *ih = (struct iphdr *) skb->data;
1610 /* Check that IP packet is at least 46 bytes, otherwise,
1611 * there may be pad bytes included in the hardware checksum.
1612 * This wouldn't happen if everyone padded with 0.
1613 */
1614 if (ntohs(ih->tot_len) >= 46){
1615 /* don't worry about frags */
1616 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1617 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1618 u32 *p = (u32 *) &buf_addr[data_size - 20];
1619 register u32 crc, p_r, p_r1;
1620
1621 if (inv & 4) {
1622 inv &= ~4;
1623 --p;
1624 }
1625 p_r = *p;
1626 p_r1 = *(p-1);
1627 switch (inv) {
1628 case 0:
1629 crc = (p_r & 0xffff) + (p_r >> 16);
1630 break;
1631 case 1:
1632 crc = (p_r >> 16) + (p_r & 0xffff)
1633 + (p_r1 >> 16 & 0xff00);
1634 break;
1635 case 2:
1636 crc = p_r + (p_r1 >> 16);
1637 break;
1638 case 3:
1639 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1640 break;
1641 default: /*NOTREACHED*/ crc = 0;
1642 }
1643 if (crc & 0xffff0000) {
1644 crc &= 0xffff;
1645 ++crc;
1646 }
1647 /* tcp/udp will add in pseudo */
1648 skb->csum = ntohs(pfck & 0xffff);
1649 if (skb->csum > crc)
1650 skb->csum -= crc;
1651 else
1652 skb->csum += (~crc & 0xffff);
1653 /*
1654 * could do the pseudo myself and return
1655 * CHECKSUM_UNNECESSARY
1656 */
1657 skb->ip_summed = CHECKSUM_HW;
1658 }
1659 }
1660 }
1661#endif /* RX_CHECKSUM */
1662
1663 netif_rx(skb);
1664 dev->last_rx = jiffies;
1665 hmp->stats.rx_packets++;
1666 }
1667 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1668 }
1669
1670 /* Refill the Rx ring buffers. */
1671 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1672 struct hamachi_desc *desc;
1673
1674 entry = hmp->dirty_rx % RX_RING_SIZE;
1675 desc = &(hmp->rx_ring[entry]);
1676 if (hmp->rx_skbuff[entry] == NULL) {
1677 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1678
1679 hmp->rx_skbuff[entry] = skb;
1680 if (skb == NULL)
1681 break; /* Better luck next round. */
1682 skb->dev = dev; /* Mark as being used by this device. */
1683 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1684 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -07001685 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001686 }
1687 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1688 if (entry >= RX_RING_SIZE-1)
1689 desc->status_n_length |= cpu_to_le32(DescOwn |
1690 DescEndPacket | DescEndRing | DescIntr);
1691 else
1692 desc->status_n_length |= cpu_to_le32(DescOwn |
1693 DescEndPacket | DescIntr);
1694 }
1695
1696 /* Restart Rx engine if stopped. */
1697 /* If we don't need to check status, don't. -KDU */
1698 if (readw(hmp->base + RxStatus) & 0x0002)
1699 writew(0x0001, hmp->base + RxCmd);
1700
1701 return 0;
1702}
1703
1704/* This is more properly named "uncommon interrupt events", as it covers more
1705 than just errors. */
1706static void hamachi_error(struct net_device *dev, int intr_status)
1707{
1708 struct hamachi_private *hmp = netdev_priv(dev);
1709 void __iomem *ioaddr = hmp->base;
1710
1711 if (intr_status & (LinkChange|NegotiationChange)) {
1712 if (hamachi_debug > 1)
1713 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1714 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1715 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1716 readw(ioaddr + ANLinkPartnerAbility),
1717 readl(ioaddr + IntrStatus));
1718 if (readw(ioaddr + ANStatus) & 0x20)
1719 writeb(0x01, ioaddr + LEDCtrl);
1720 else
1721 writeb(0x03, ioaddr + LEDCtrl);
1722 }
1723 if (intr_status & StatsMax) {
1724 hamachi_get_stats(dev);
1725 /* Read the overflow bits to clear. */
1726 readl(ioaddr + 0x370);
1727 readl(ioaddr + 0x3F0);
1728 }
1729 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1730 && hamachi_debug)
1731 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1732 dev->name, intr_status);
1733 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1734 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1735 hmp->stats.tx_fifo_errors++;
1736 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1737 hmp->stats.rx_fifo_errors++;
1738}
1739
1740static int hamachi_close(struct net_device *dev)
1741{
1742 struct hamachi_private *hmp = netdev_priv(dev);
1743 void __iomem *ioaddr = hmp->base;
1744 struct sk_buff *skb;
1745 int i;
1746
1747 netif_stop_queue(dev);
1748
1749 if (hamachi_debug > 1) {
1750 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1751 dev->name, readw(ioaddr + TxStatus),
1752 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1753 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1754 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1755 }
1756
1757 /* Disable interrupts by clearing the interrupt mask. */
1758 writel(0x0000, ioaddr + InterruptEnable);
1759
1760 /* Stop the chip's Tx and Rx processes. */
1761 writel(2, ioaddr + RxCmd);
1762 writew(2, ioaddr + TxCmd);
1763
1764#ifdef __i386__
1765 if (hamachi_debug > 2) {
1766 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1767 (int)hmp->tx_ring_dma);
1768 for (i = 0; i < TX_RING_SIZE; i++)
1769 printk(" %c #%d desc. %8.8x %8.8x.\n",
1770 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1771 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1772 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1773 (int)hmp->rx_ring_dma);
1774 for (i = 0; i < RX_RING_SIZE; i++) {
1775 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1776 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1777 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1778 if (hamachi_debug > 6) {
David S. Miller689be432005-06-28 15:25:31 -07001779 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001780 u16 *addr = (u16 *)
David S. Miller689be432005-06-28 15:25:31 -07001781 hmp->rx_skbuff[i]->data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001782 int j;
1783
1784 for (j = 0; j < 0x50; j++)
1785 printk(" %4.4x", addr[j]);
1786 printk("\n");
1787 }
1788 }
1789 }
1790 }
1791#endif /* __i386__ debugging only */
1792
1793 free_irq(dev->irq, dev);
1794
1795 del_timer_sync(&hmp->timer);
1796
1797 /* Free all the skbuffs in the Rx queue. */
1798 for (i = 0; i < RX_RING_SIZE; i++) {
1799 skb = hmp->rx_skbuff[i];
1800 hmp->rx_ring[i].status_n_length = 0;
1801 hmp->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
1802 if (skb) {
1803 pci_unmap_single(hmp->pci_dev,
1804 hmp->rx_ring[i].addr, hmp->rx_buf_sz,
1805 PCI_DMA_FROMDEVICE);
1806 dev_kfree_skb(skb);
1807 hmp->rx_skbuff[i] = NULL;
1808 }
1809 }
1810 for (i = 0; i < TX_RING_SIZE; i++) {
1811 skb = hmp->tx_skbuff[i];
1812 if (skb) {
1813 pci_unmap_single(hmp->pci_dev,
1814 hmp->tx_ring[i].addr, skb->len,
1815 PCI_DMA_TODEVICE);
1816 dev_kfree_skb(skb);
1817 hmp->tx_skbuff[i] = NULL;
1818 }
1819 }
1820
1821 writeb(0x00, ioaddr + LEDCtrl);
1822
1823 return 0;
1824}
1825
1826static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1827{
1828 struct hamachi_private *hmp = netdev_priv(dev);
1829 void __iomem *ioaddr = hmp->base;
1830
1831 /* We should lock this segment of code for SMP eventually, although
1832 the vulnerability window is very small and statistics are
1833 non-critical. */
1834 /* Ok, what goes here? This appears to be stuck at 21 packets
1835 according to ifconfig. It does get incremented in hamachi_tx(),
1836 so I think I'll comment it out here and see if better things
1837 happen.
1838 */
1839 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1840
1841 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1842 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1843 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1844
1845 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1846 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1847 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1848 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1849 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1850
1851 return &hmp->stats;
1852}
1853
1854static void set_rx_mode(struct net_device *dev)
1855{
1856 struct hamachi_private *hmp = netdev_priv(dev);
1857 void __iomem *ioaddr = hmp->base;
1858
1859 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1860 /* Unconditionally log net taps. */
1861 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1862 writew(0x000F, ioaddr + AddrMode);
1863 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1864 /* Too many to match, or accept all multicasts. */
1865 writew(0x000B, ioaddr + AddrMode);
1866 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1867 struct dev_mc_list *mclist;
1868 int i;
1869 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1870 i++, mclist = mclist->next) {
1871 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1872 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1873 ioaddr + 0x104 + i*8);
1874 }
1875 /* Clear remaining entries. */
1876 for (; i < 64; i++)
1877 writel(0, ioaddr + 0x104 + i*8);
1878 writew(0x0003, ioaddr + AddrMode);
1879 } else { /* Normal, unicast/broadcast-only mode. */
1880 writew(0x0001, ioaddr + AddrMode);
1881 }
1882}
1883
1884static int check_if_running(struct net_device *dev)
1885{
1886 if (!netif_running(dev))
1887 return -EINVAL;
1888 return 0;
1889}
1890
1891static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1892{
1893 struct hamachi_private *np = netdev_priv(dev);
1894 strcpy(info->driver, DRV_NAME);
1895 strcpy(info->version, DRV_VERSION);
1896 strcpy(info->bus_info, pci_name(np->pci_dev));
1897}
1898
1899static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1900{
1901 struct hamachi_private *np = netdev_priv(dev);
1902 spin_lock_irq(&np->lock);
1903 mii_ethtool_gset(&np->mii_if, ecmd);
1904 spin_unlock_irq(&np->lock);
1905 return 0;
1906}
1907
1908static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1909{
1910 struct hamachi_private *np = netdev_priv(dev);
1911 int res;
1912 spin_lock_irq(&np->lock);
1913 res = mii_ethtool_sset(&np->mii_if, ecmd);
1914 spin_unlock_irq(&np->lock);
1915 return res;
1916}
1917
1918static int hamachi_nway_reset(struct net_device *dev)
1919{
1920 struct hamachi_private *np = netdev_priv(dev);
1921 return mii_nway_restart(&np->mii_if);
1922}
1923
1924static u32 hamachi_get_link(struct net_device *dev)
1925{
1926 struct hamachi_private *np = netdev_priv(dev);
1927 return mii_link_ok(&np->mii_if);
1928}
1929
1930static struct ethtool_ops ethtool_ops = {
1931 .begin = check_if_running,
1932 .get_drvinfo = hamachi_get_drvinfo,
1933 .get_settings = hamachi_get_settings,
1934 .set_settings = hamachi_set_settings,
1935 .nway_reset = hamachi_nway_reset,
1936 .get_link = hamachi_get_link,
1937};
1938
1939static struct ethtool_ops ethtool_ops_no_mii = {
1940 .begin = check_if_running,
1941 .get_drvinfo = hamachi_get_drvinfo,
1942};
1943
1944static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1945{
1946 struct hamachi_private *np = netdev_priv(dev);
1947 struct mii_ioctl_data *data = if_mii(rq);
1948 int rc;
1949
1950 if (!netif_running(dev))
1951 return -EINVAL;
1952
1953 if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1954 u32 *d = (u32 *)&rq->ifr_ifru;
1955 /* Should add this check here or an ordinary user can do nasty
1956 * things. -KDU
1957 *
1958 * TODO: Shut down the Rx and Tx engines while doing this.
1959 */
1960 if (!capable(CAP_NET_ADMIN))
1961 return -EPERM;
1962 writel(d[0], np->base + TxIntrCtrl);
1963 writel(d[1], np->base + RxIntrCtrl);
1964 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1965 (u32) readl(np->base + TxIntrCtrl),
1966 (u32) readl(np->base + RxIntrCtrl));
1967 rc = 0;
1968 }
1969
1970 else {
1971 spin_lock_irq(&np->lock);
1972 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1973 spin_unlock_irq(&np->lock);
1974 }
1975
1976 return rc;
1977}
1978
1979
1980static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1981{
1982 struct net_device *dev = pci_get_drvdata(pdev);
1983
1984 if (dev) {
1985 struct hamachi_private *hmp = netdev_priv(dev);
1986
1987 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1988 hmp->rx_ring_dma);
1989 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1990 hmp->tx_ring_dma);
1991 unregister_netdev(dev);
1992 iounmap(hmp->base);
1993 free_netdev(dev);
1994 pci_release_regions(pdev);
1995 pci_set_drvdata(pdev, NULL);
1996 }
1997}
1998
1999static struct pci_device_id hamachi_pci_tbl[] = {
2000 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
2001 { 0, }
2002};
2003MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
2004
2005static struct pci_driver hamachi_driver = {
2006 .name = DRV_NAME,
2007 .id_table = hamachi_pci_tbl,
2008 .probe = hamachi_init_one,
2009 .remove = __devexit_p(hamachi_remove_one),
2010};
2011
2012static int __init hamachi_init (void)
2013{
2014/* when a module, this is printed whether or not devices are found in probe */
2015#ifdef MODULE
2016 printk(version);
2017#endif
2018 return pci_register_driver(&hamachi_driver);
2019}
2020
2021static void __exit hamachi_exit (void)
2022{
2023 pci_unregister_driver(&hamachi_driver);
2024}
2025
2026
2027module_init(hamachi_init);
2028module_exit(hamachi_exit);