Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 1 | #include <linux/kernel.h> |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 2 | #include <linux/sched.h> |
| 3 | #include <linux/init.h> |
| 4 | #include <linux/module.h> |
| 5 | #include <linux/timer.h> |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 6 | #include <linux/acpi_pmtmr.h> |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 7 | #include <linux/cpufreq.h> |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 8 | #include <linux/dmi.h> |
| 9 | #include <linux/delay.h> |
| 10 | #include <linux/clocksource.h> |
| 11 | #include <linux/percpu.h> |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 12 | |
| 13 | #include <asm/hpet.h> |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 14 | #include <asm/timer.h> |
| 15 | #include <asm/vgtod.h> |
| 16 | #include <asm/time.h> |
| 17 | #include <asm/delay.h> |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 18 | |
| 19 | unsigned int cpu_khz; /* TSC clocks / usec, not used here */ |
| 20 | EXPORT_SYMBOL(cpu_khz); |
| 21 | unsigned int tsc_khz; |
| 22 | EXPORT_SYMBOL(tsc_khz); |
| 23 | |
| 24 | /* |
| 25 | * TSC can be unstable due to cpufreq or due to unsynced TSCs |
| 26 | */ |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 27 | static int tsc_unstable; |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 28 | |
| 29 | /* native_sched_clock() is called before tsc_init(), so |
| 30 | we must start with the TSC soft disabled to prevent |
| 31 | erroneous rdtsc usage on !cpu_has_tsc processors */ |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 32 | static int tsc_disabled = -1; |
Alok Kataria | 0ef9553 | 2008-07-01 11:43:18 -0700 | [diff] [blame] | 33 | |
| 34 | /* |
| 35 | * Scheduler clock - returns current time in nanosec units. |
| 36 | */ |
| 37 | u64 native_sched_clock(void) |
| 38 | { |
| 39 | u64 this_offset; |
| 40 | |
| 41 | /* |
| 42 | * Fall back to jiffies if there's no TSC available: |
| 43 | * ( But note that we still use it if the TSC is marked |
| 44 | * unstable. We do this because unlike Time Of Day, |
| 45 | * the scheduler clock tolerates small errors and it's |
| 46 | * very important for it to be as fast as the platform |
| 47 | * can achive it. ) |
| 48 | */ |
| 49 | if (unlikely(tsc_disabled)) { |
| 50 | /* No locking but a rare wrong value is not a big deal: */ |
| 51 | return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ); |
| 52 | } |
| 53 | |
| 54 | /* read the Time Stamp Counter: */ |
| 55 | rdtscll(this_offset); |
| 56 | |
| 57 | /* return the value in ns */ |
| 58 | return cycles_2_ns(this_offset); |
| 59 | } |
| 60 | |
| 61 | /* We need to define a real function for sched_clock, to override the |
| 62 | weak default version */ |
| 63 | #ifdef CONFIG_PARAVIRT |
| 64 | unsigned long long sched_clock(void) |
| 65 | { |
| 66 | return paravirt_sched_clock(); |
| 67 | } |
| 68 | #else |
| 69 | unsigned long long |
| 70 | sched_clock(void) __attribute__((alias("native_sched_clock"))); |
| 71 | #endif |
| 72 | |
| 73 | int check_tsc_unstable(void) |
| 74 | { |
| 75 | return tsc_unstable; |
| 76 | } |
| 77 | EXPORT_SYMBOL_GPL(check_tsc_unstable); |
| 78 | |
| 79 | #ifdef CONFIG_X86_TSC |
| 80 | int __init notsc_setup(char *str) |
| 81 | { |
| 82 | printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, " |
| 83 | "cannot disable TSC completely.\n"); |
| 84 | tsc_disabled = 1; |
| 85 | return 1; |
| 86 | } |
| 87 | #else |
| 88 | /* |
| 89 | * disable flag for tsc. Takes effect by clearing the TSC cpu flag |
| 90 | * in cpu/common.c |
| 91 | */ |
| 92 | int __init notsc_setup(char *str) |
| 93 | { |
| 94 | setup_clear_cpu_cap(X86_FEATURE_TSC); |
| 95 | return 1; |
| 96 | } |
| 97 | #endif |
| 98 | |
| 99 | __setup("notsc", notsc_setup); |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 100 | |
| 101 | #define MAX_RETRIES 5 |
| 102 | #define SMI_TRESHOLD 50000 |
| 103 | |
| 104 | /* |
| 105 | * Read TSC and the reference counters. Take care of SMI disturbance |
| 106 | */ |
Marcin Slusarz | d554d9a | 2008-08-11 00:07:44 +0200 | [diff] [blame] | 107 | static u64 tsc_read_refs(u64 *pm, u64 *hpet) |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 108 | { |
| 109 | u64 t1, t2; |
| 110 | int i; |
| 111 | |
| 112 | for (i = 0; i < MAX_RETRIES; i++) { |
| 113 | t1 = get_cycles(); |
| 114 | if (hpet) |
| 115 | *hpet = hpet_readl(HPET_COUNTER) & 0xFFFFFFFF; |
| 116 | else |
| 117 | *pm = acpi_pm_read_early(); |
| 118 | t2 = get_cycles(); |
| 119 | if ((t2 - t1) < SMI_TRESHOLD) |
| 120 | return t2; |
| 121 | } |
| 122 | return ULLONG_MAX; |
| 123 | } |
| 124 | |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame^] | 125 | /* |
| 126 | * Try to calibrate the TSC against the Programmable |
| 127 | * Interrupt Timer and return the frequency of the TSC |
| 128 | * in kHz. |
| 129 | * |
| 130 | * Return ULONG_MAX on failure to calibrate. |
| 131 | */ |
| 132 | static unsigned long pit_calibrate_tsc(void) |
| 133 | { |
| 134 | u64 tsc, t1, t2, delta; |
| 135 | unsigned long tscmin, tscmax; |
| 136 | int pitcnt; |
| 137 | |
| 138 | /* Set the Gate high, disable speaker */ |
| 139 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); |
| 140 | |
| 141 | /* |
| 142 | * Setup CTC channel 2* for mode 0, (interrupt on terminal |
| 143 | * count mode), binary count. Set the latch register to 50ms |
| 144 | * (LSB then MSB) to begin countdown. |
| 145 | */ |
| 146 | outb(0xb0, 0x43); |
| 147 | outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42); |
| 148 | outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42); |
| 149 | |
| 150 | tsc = t1 = t2 = get_cycles(); |
| 151 | |
| 152 | pitcnt = 0; |
| 153 | tscmax = 0; |
| 154 | tscmin = ULONG_MAX; |
| 155 | while ((inb(0x61) & 0x20) == 0) { |
| 156 | t2 = get_cycles(); |
| 157 | delta = t2 - tsc; |
| 158 | tsc = t2; |
| 159 | if ((unsigned long) delta < tscmin) |
| 160 | tscmin = (unsigned int) delta; |
| 161 | if ((unsigned long) delta > tscmax) |
| 162 | tscmax = (unsigned int) delta; |
| 163 | pitcnt++; |
| 164 | } |
| 165 | |
| 166 | /* |
| 167 | * Sanity checks: |
| 168 | * |
| 169 | * If we were not able to read the PIT more than 5000 |
| 170 | * times, then we have been hit by a massive SMI |
| 171 | * |
| 172 | * If the maximum is 10 times larger than the minimum, |
| 173 | * then we got hit by an SMI as well. |
| 174 | */ |
| 175 | if (pitcnt < 5000 || tscmax > 10 * tscmin) |
| 176 | return ULONG_MAX; |
| 177 | |
| 178 | /* Calculate the PIT value */ |
| 179 | delta = t2 - t1; |
| 180 | do_div(delta, 50); |
| 181 | return delta; |
| 182 | } |
| 183 | |
| 184 | |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 185 | /** |
Alok Kataria | e93ef94 | 2008-07-01 11:43:36 -0700 | [diff] [blame] | 186 | * native_calibrate_tsc - calibrate the tsc on boot |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 187 | */ |
Alok Kataria | e93ef94 | 2008-07-01 11:43:36 -0700 | [diff] [blame] | 188 | unsigned long native_calibrate_tsc(void) |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 189 | { |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame^] | 190 | u64 tsc1, tsc2, delta, pm1, pm2, hpet1, hpet2; |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 191 | unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX; |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame^] | 192 | unsigned long flags; |
| 193 | int hpet = is_hpet_enabled(), i; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 194 | |
| 195 | /* |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 196 | * Run 5 calibration loops to get the lowest frequency value |
| 197 | * (the best estimate). We use two different calibration modes |
| 198 | * here: |
| 199 | * |
| 200 | * 1) PIT loop. We set the PIT Channel 2 to oneshot mode and |
| 201 | * load a timeout of 50ms. We read the time right after we |
| 202 | * started the timer and wait until the PIT count down reaches |
| 203 | * zero. In each wait loop iteration we read the TSC and check |
| 204 | * the delta to the previous read. We keep track of the min |
| 205 | * and max values of that delta. The delta is mostly defined |
| 206 | * by the IO time of the PIT access, so we can detect when a |
| 207 | * SMI/SMM disturbance happend between the two reads. If the |
| 208 | * maximum time is significantly larger than the minimum time, |
| 209 | * then we discard the result and have another try. |
| 210 | * |
| 211 | * 2) Reference counter. If available we use the HPET or the |
| 212 | * PMTIMER as a reference to check the sanity of that value. |
| 213 | * We use separate TSC readouts and check inside of the |
| 214 | * reference read for a SMI/SMM disturbance. We dicard |
| 215 | * disturbed values here as well. We do that around the PIT |
| 216 | * calibration delay loop as we have to wait for a certain |
| 217 | * amount of time anyway. |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 218 | */ |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 219 | for (i = 0; i < 5; i++) { |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame^] | 220 | unsigned long tsc_pit_khz; |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 221 | |
| 222 | /* |
| 223 | * Read the start value and the reference count of |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame^] | 224 | * hpet/pmtimer when available. Then do the PIT |
| 225 | * calibration, which will take at least 50ms, and |
| 226 | * read the end value. |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 227 | */ |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame^] | 228 | local_irq_save(flags); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 229 | tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL); |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame^] | 230 | tsc_pit_khz = pit_calibrate_tsc(); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 231 | tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 232 | local_irq_restore(flags); |
| 233 | |
Linus Torvalds | ec0c15a | 2008-09-03 07:30:13 -0700 | [diff] [blame^] | 234 | /* Pick the lowest PIT TSC calibration so far */ |
| 235 | tsc_pit_min = min(tsc_pit_min, tsc_pit_khz); |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 236 | |
| 237 | /* hpet or pmtimer available ? */ |
| 238 | if (!hpet && !pm1 && !pm2) |
| 239 | continue; |
| 240 | |
| 241 | /* Check, whether the sampling was disturbed by an SMI */ |
| 242 | if (tsc1 == ULLONG_MAX || tsc2 == ULLONG_MAX) |
| 243 | continue; |
| 244 | |
| 245 | tsc2 = (tsc2 - tsc1) * 1000000LL; |
| 246 | |
| 247 | if (hpet) { |
| 248 | if (hpet2 < hpet1) |
| 249 | hpet2 += 0x100000000ULL; |
| 250 | hpet2 -= hpet1; |
| 251 | tsc1 = ((u64)hpet2 * hpet_readl(HPET_PERIOD)); |
| 252 | do_div(tsc1, 1000000); |
| 253 | } else { |
| 254 | if (pm2 < pm1) |
| 255 | pm2 += (u64)ACPI_PM_OVRRUN; |
| 256 | pm2 -= pm1; |
| 257 | tsc1 = pm2 * 1000000000LL; |
| 258 | do_div(tsc1, PMTMR_TICKS_PER_SEC); |
| 259 | } |
| 260 | |
| 261 | do_div(tsc2, tsc1); |
| 262 | tsc_ref_min = min(tsc_ref_min, (unsigned long) tsc2); |
| 263 | } |
| 264 | |
| 265 | /* |
| 266 | * Now check the results. |
| 267 | */ |
| 268 | if (tsc_pit_min == ULONG_MAX) { |
| 269 | /* PIT gave no useful value */ |
| 270 | printk(KERN_WARNING "TSC: PIT calibration failed due to " |
| 271 | "SMI disturbance.\n"); |
| 272 | |
| 273 | /* We don't have an alternative source, disable TSC */ |
| 274 | if (!hpet && !pm1 && !pm2) { |
| 275 | printk("TSC: No reference (HPET/PMTIMER) available\n"); |
| 276 | return 0; |
| 277 | } |
| 278 | |
| 279 | /* The alternative source failed as well, disable TSC */ |
| 280 | if (tsc_ref_min == ULONG_MAX) { |
| 281 | printk(KERN_WARNING "TSC: HPET/PMTIMER calibration " |
| 282 | "failed due to SMI disturbance.\n"); |
| 283 | return 0; |
| 284 | } |
| 285 | |
| 286 | /* Use the alternative source */ |
| 287 | printk(KERN_INFO "TSC: using %s reference calibration\n", |
| 288 | hpet ? "HPET" : "PMTIMER"); |
| 289 | |
| 290 | return tsc_ref_min; |
| 291 | } |
| 292 | |
| 293 | /* We don't have an alternative source, use the PIT calibration value */ |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 294 | if (!hpet && !pm1 && !pm2) { |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 295 | printk(KERN_INFO "TSC: Using PIT calibration value\n"); |
| 296 | return tsc_pit_min; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 297 | } |
| 298 | |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 299 | /* The alternative source failed, use the PIT calibration value */ |
| 300 | if (tsc_ref_min == ULONG_MAX) { |
| 301 | printk(KERN_WARNING "TSC: HPET/PMTIMER calibration failed due " |
| 302 | "to SMI disturbance. Using PIT calibration\n"); |
| 303 | return tsc_pit_min; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 304 | } |
| 305 | |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 306 | /* Check the reference deviation */ |
| 307 | delta = ((u64) tsc_pit_min) * 100; |
| 308 | do_div(delta, tsc_ref_min); |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 309 | |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 310 | /* |
| 311 | * If both calibration results are inside a 5% window, the we |
| 312 | * use the lower frequency of those as it is probably the |
| 313 | * closest estimate. |
| 314 | */ |
| 315 | if (delta >= 95 && delta <= 105) { |
| 316 | printk(KERN_INFO "TSC: PIT calibration confirmed by %s.\n", |
| 317 | hpet ? "HPET" : "PMTIMER"); |
| 318 | printk(KERN_INFO "TSC: using %s calibration value\n", |
| 319 | tsc_pit_min <= tsc_ref_min ? "PIT" : |
| 320 | hpet ? "HPET" : "PMTIMER"); |
| 321 | return tsc_pit_min <= tsc_ref_min ? tsc_pit_min : tsc_ref_min; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 322 | } |
| 323 | |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 324 | printk(KERN_WARNING "TSC: PIT calibration deviates from %s: %lu %lu.\n", |
| 325 | hpet ? "HPET" : "PMTIMER", tsc_pit_min, tsc_ref_min); |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 326 | |
Thomas Gleixner | fbb16e2 | 2008-09-03 00:54:47 +0200 | [diff] [blame] | 327 | /* |
| 328 | * The calibration values differ too much. In doubt, we use |
| 329 | * the PIT value as we know that there are PMTIMERs around |
| 330 | * running at double speed. |
| 331 | */ |
| 332 | printk(KERN_INFO "TSC: Using PIT calibration value\n"); |
| 333 | return tsc_pit_min; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 334 | } |
| 335 | |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 336 | #ifdef CONFIG_X86_32 |
| 337 | /* Only called from the Powernow K7 cpu freq driver */ |
| 338 | int recalibrate_cpu_khz(void) |
| 339 | { |
| 340 | #ifndef CONFIG_SMP |
| 341 | unsigned long cpu_khz_old = cpu_khz; |
| 342 | |
| 343 | if (cpu_has_tsc) { |
Alok Kataria | e93ef94 | 2008-07-01 11:43:36 -0700 | [diff] [blame] | 344 | tsc_khz = calibrate_tsc(); |
| 345 | cpu_khz = tsc_khz; |
Alok Kataria | bfc0f59 | 2008-07-01 11:43:24 -0700 | [diff] [blame] | 346 | cpu_data(0).loops_per_jiffy = |
| 347 | cpufreq_scale(cpu_data(0).loops_per_jiffy, |
| 348 | cpu_khz_old, cpu_khz); |
| 349 | return 0; |
| 350 | } else |
| 351 | return -ENODEV; |
| 352 | #else |
| 353 | return -ENODEV; |
| 354 | #endif |
| 355 | } |
| 356 | |
| 357 | EXPORT_SYMBOL(recalibrate_cpu_khz); |
| 358 | |
| 359 | #endif /* CONFIG_X86_32 */ |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 360 | |
| 361 | /* Accelerators for sched_clock() |
| 362 | * convert from cycles(64bits) => nanoseconds (64bits) |
| 363 | * basic equation: |
| 364 | * ns = cycles / (freq / ns_per_sec) |
| 365 | * ns = cycles * (ns_per_sec / freq) |
| 366 | * ns = cycles * (10^9 / (cpu_khz * 10^3)) |
| 367 | * ns = cycles * (10^6 / cpu_khz) |
| 368 | * |
| 369 | * Then we use scaling math (suggested by george@mvista.com) to get: |
| 370 | * ns = cycles * (10^6 * SC / cpu_khz) / SC |
| 371 | * ns = cycles * cyc2ns_scale / SC |
| 372 | * |
| 373 | * And since SC is a constant power of two, we can convert the div |
| 374 | * into a shift. |
| 375 | * |
| 376 | * We can use khz divisor instead of mhz to keep a better precision, since |
| 377 | * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits. |
| 378 | * (mathieu.desnoyers@polymtl.ca) |
| 379 | * |
| 380 | * -johnstul@us.ibm.com "math is hard, lets go shopping!" |
| 381 | */ |
| 382 | |
| 383 | DEFINE_PER_CPU(unsigned long, cyc2ns); |
| 384 | |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 385 | static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu) |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 386 | { |
| 387 | unsigned long long tsc_now, ns_now; |
| 388 | unsigned long flags, *scale; |
| 389 | |
| 390 | local_irq_save(flags); |
| 391 | sched_clock_idle_sleep_event(); |
| 392 | |
| 393 | scale = &per_cpu(cyc2ns, cpu); |
| 394 | |
| 395 | rdtscll(tsc_now); |
| 396 | ns_now = __cycles_2_ns(tsc_now); |
| 397 | |
| 398 | if (cpu_khz) |
| 399 | *scale = (NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR)/cpu_khz; |
| 400 | |
| 401 | sched_clock_idle_wakeup_event(0); |
| 402 | local_irq_restore(flags); |
| 403 | } |
| 404 | |
| 405 | #ifdef CONFIG_CPU_FREQ |
| 406 | |
| 407 | /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency |
| 408 | * changes. |
| 409 | * |
| 410 | * RED-PEN: On SMP we assume all CPUs run with the same frequency. It's |
| 411 | * not that important because current Opteron setups do not support |
| 412 | * scaling on SMP anyroads. |
| 413 | * |
| 414 | * Should fix up last_tsc too. Currently gettimeofday in the |
| 415 | * first tick after the change will be slightly wrong. |
| 416 | */ |
| 417 | |
| 418 | static unsigned int ref_freq; |
| 419 | static unsigned long loops_per_jiffy_ref; |
| 420 | static unsigned long tsc_khz_ref; |
| 421 | |
| 422 | static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, |
| 423 | void *data) |
| 424 | { |
| 425 | struct cpufreq_freqs *freq = data; |
| 426 | unsigned long *lpj, dummy; |
| 427 | |
| 428 | if (cpu_has(&cpu_data(freq->cpu), X86_FEATURE_CONSTANT_TSC)) |
| 429 | return 0; |
| 430 | |
| 431 | lpj = &dummy; |
| 432 | if (!(freq->flags & CPUFREQ_CONST_LOOPS)) |
| 433 | #ifdef CONFIG_SMP |
| 434 | lpj = &cpu_data(freq->cpu).loops_per_jiffy; |
| 435 | #else |
| 436 | lpj = &boot_cpu_data.loops_per_jiffy; |
| 437 | #endif |
| 438 | |
| 439 | if (!ref_freq) { |
| 440 | ref_freq = freq->old; |
| 441 | loops_per_jiffy_ref = *lpj; |
| 442 | tsc_khz_ref = tsc_khz; |
| 443 | } |
| 444 | if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || |
| 445 | (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) || |
| 446 | (val == CPUFREQ_RESUMECHANGE)) { |
| 447 | *lpj = cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new); |
| 448 | |
| 449 | tsc_khz = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new); |
| 450 | if (!(freq->flags & CPUFREQ_CONST_LOOPS)) |
| 451 | mark_tsc_unstable("cpufreq changes"); |
| 452 | } |
| 453 | |
Peter Zijlstra | 52a8968 | 2008-08-25 13:35:06 +0200 | [diff] [blame] | 454 | set_cyc2ns_scale(tsc_khz, freq->cpu); |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 455 | |
| 456 | return 0; |
| 457 | } |
| 458 | |
| 459 | static struct notifier_block time_cpufreq_notifier_block = { |
| 460 | .notifier_call = time_cpufreq_notifier |
| 461 | }; |
| 462 | |
| 463 | static int __init cpufreq_tsc(void) |
| 464 | { |
Linus Torvalds | 060700b | 2008-08-24 11:52:06 -0700 | [diff] [blame] | 465 | if (!cpu_has_tsc) |
| 466 | return 0; |
| 467 | if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) |
| 468 | return 0; |
Alok Kataria | 2dbe06f | 2008-07-01 11:43:31 -0700 | [diff] [blame] | 469 | cpufreq_register_notifier(&time_cpufreq_notifier_block, |
| 470 | CPUFREQ_TRANSITION_NOTIFIER); |
| 471 | return 0; |
| 472 | } |
| 473 | |
| 474 | core_initcall(cpufreq_tsc); |
| 475 | |
| 476 | #endif /* CONFIG_CPU_FREQ */ |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 477 | |
| 478 | /* clocksource code */ |
| 479 | |
| 480 | static struct clocksource clocksource_tsc; |
| 481 | |
| 482 | /* |
| 483 | * We compare the TSC to the cycle_last value in the clocksource |
| 484 | * structure to avoid a nasty time-warp. This can be observed in a |
| 485 | * very small window right after one CPU updated cycle_last under |
| 486 | * xtime/vsyscall_gtod lock and the other CPU reads a TSC value which |
| 487 | * is smaller than the cycle_last reference value due to a TSC which |
| 488 | * is slighty behind. This delta is nowhere else observable, but in |
| 489 | * that case it results in a forward time jump in the range of hours |
| 490 | * due to the unsigned delta calculation of the time keeping core |
| 491 | * code, which is necessary to support wrapping clocksources like pm |
| 492 | * timer. |
| 493 | */ |
| 494 | static cycle_t read_tsc(void) |
| 495 | { |
| 496 | cycle_t ret = (cycle_t)get_cycles(); |
| 497 | |
| 498 | return ret >= clocksource_tsc.cycle_last ? |
| 499 | ret : clocksource_tsc.cycle_last; |
| 500 | } |
| 501 | |
Thomas Gleixner | 431ceb8 | 2008-07-15 22:08:04 +0200 | [diff] [blame] | 502 | #ifdef CONFIG_X86_64 |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 503 | static cycle_t __vsyscall_fn vread_tsc(void) |
| 504 | { |
| 505 | cycle_t ret = (cycle_t)vget_cycles(); |
| 506 | |
| 507 | return ret >= __vsyscall_gtod_data.clock.cycle_last ? |
| 508 | ret : __vsyscall_gtod_data.clock.cycle_last; |
| 509 | } |
Thomas Gleixner | 431ceb8 | 2008-07-15 22:08:04 +0200 | [diff] [blame] | 510 | #endif |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 511 | |
| 512 | static struct clocksource clocksource_tsc = { |
| 513 | .name = "tsc", |
| 514 | .rating = 300, |
| 515 | .read = read_tsc, |
| 516 | .mask = CLOCKSOURCE_MASK(64), |
| 517 | .shift = 22, |
| 518 | .flags = CLOCK_SOURCE_IS_CONTINUOUS | |
| 519 | CLOCK_SOURCE_MUST_VERIFY, |
| 520 | #ifdef CONFIG_X86_64 |
| 521 | .vread = vread_tsc, |
| 522 | #endif |
| 523 | }; |
| 524 | |
| 525 | void mark_tsc_unstable(char *reason) |
| 526 | { |
| 527 | if (!tsc_unstable) { |
| 528 | tsc_unstable = 1; |
| 529 | printk("Marking TSC unstable due to %s\n", reason); |
| 530 | /* Change only the rating, when not registered */ |
| 531 | if (clocksource_tsc.mult) |
| 532 | clocksource_change_rating(&clocksource_tsc, 0); |
| 533 | else |
| 534 | clocksource_tsc.rating = 0; |
| 535 | } |
| 536 | } |
| 537 | |
| 538 | EXPORT_SYMBOL_GPL(mark_tsc_unstable); |
| 539 | |
| 540 | static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d) |
| 541 | { |
| 542 | printk(KERN_NOTICE "%s detected: marking TSC unstable.\n", |
| 543 | d->ident); |
| 544 | tsc_unstable = 1; |
| 545 | return 0; |
| 546 | } |
| 547 | |
| 548 | /* List of systems that have known TSC problems */ |
| 549 | static struct dmi_system_id __initdata bad_tsc_dmi_table[] = { |
| 550 | { |
| 551 | .callback = dmi_mark_tsc_unstable, |
| 552 | .ident = "IBM Thinkpad 380XD", |
| 553 | .matches = { |
| 554 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), |
| 555 | DMI_MATCH(DMI_BOARD_NAME, "2635FA0"), |
| 556 | }, |
| 557 | }, |
| 558 | {} |
| 559 | }; |
| 560 | |
| 561 | /* |
| 562 | * Geode_LX - the OLPC CPU has a possibly a very reliable TSC |
| 563 | */ |
| 564 | #ifdef CONFIG_MGEODE_LX |
| 565 | /* RTSC counts during suspend */ |
| 566 | #define RTSC_SUSP 0x100 |
| 567 | |
| 568 | static void __init check_geode_tsc_reliable(void) |
| 569 | { |
| 570 | unsigned long res_low, res_high; |
| 571 | |
| 572 | rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high); |
| 573 | if (res_low & RTSC_SUSP) |
| 574 | clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY; |
| 575 | } |
| 576 | #else |
| 577 | static inline void check_geode_tsc_reliable(void) { } |
| 578 | #endif |
| 579 | |
| 580 | /* |
| 581 | * Make an educated guess if the TSC is trustworthy and synchronized |
| 582 | * over all CPUs. |
| 583 | */ |
| 584 | __cpuinit int unsynchronized_tsc(void) |
| 585 | { |
| 586 | if (!cpu_has_tsc || tsc_unstable) |
| 587 | return 1; |
| 588 | |
| 589 | #ifdef CONFIG_SMP |
| 590 | if (apic_is_clustered_box()) |
| 591 | return 1; |
| 592 | #endif |
| 593 | |
| 594 | if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) |
| 595 | return 0; |
| 596 | /* |
| 597 | * Intel systems are normally all synchronized. |
| 598 | * Exceptions must mark TSC as unstable: |
| 599 | */ |
| 600 | if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) { |
| 601 | /* assume multi socket systems are not synchronized: */ |
| 602 | if (num_possible_cpus() > 1) |
| 603 | tsc_unstable = 1; |
| 604 | } |
| 605 | |
| 606 | return tsc_unstable; |
| 607 | } |
| 608 | |
| 609 | static void __init init_tsc_clocksource(void) |
| 610 | { |
| 611 | clocksource_tsc.mult = clocksource_khz2mult(tsc_khz, |
| 612 | clocksource_tsc.shift); |
| 613 | /* lower the rating if we already know its unstable: */ |
| 614 | if (check_tsc_unstable()) { |
| 615 | clocksource_tsc.rating = 0; |
| 616 | clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS; |
| 617 | } |
| 618 | clocksource_register(&clocksource_tsc); |
| 619 | } |
| 620 | |
| 621 | void __init tsc_init(void) |
| 622 | { |
| 623 | u64 lpj; |
| 624 | int cpu; |
| 625 | |
| 626 | if (!cpu_has_tsc) |
| 627 | return; |
| 628 | |
Alok Kataria | e93ef94 | 2008-07-01 11:43:36 -0700 | [diff] [blame] | 629 | tsc_khz = calibrate_tsc(); |
| 630 | cpu_khz = tsc_khz; |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 631 | |
Alok Kataria | e93ef94 | 2008-07-01 11:43:36 -0700 | [diff] [blame] | 632 | if (!tsc_khz) { |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 633 | mark_tsc_unstable("could not calculate TSC khz"); |
| 634 | return; |
| 635 | } |
| 636 | |
| 637 | #ifdef CONFIG_X86_64 |
| 638 | if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) && |
| 639 | (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)) |
| 640 | cpu_khz = calibrate_cpu(); |
| 641 | #endif |
| 642 | |
| 643 | lpj = ((u64)tsc_khz * 1000); |
| 644 | do_div(lpj, HZ); |
| 645 | lpj_fine = lpj; |
| 646 | |
| 647 | printk("Detected %lu.%03lu MHz processor.\n", |
| 648 | (unsigned long)cpu_khz / 1000, |
| 649 | (unsigned long)cpu_khz % 1000); |
| 650 | |
| 651 | /* |
| 652 | * Secondary CPUs do not run through tsc_init(), so set up |
| 653 | * all the scale factors for all CPUs, assuming the same |
| 654 | * speed as the bootup CPU. (cpufreq notifiers will fix this |
| 655 | * up if their speed diverges) |
| 656 | */ |
| 657 | for_each_possible_cpu(cpu) |
| 658 | set_cyc2ns_scale(cpu_khz, cpu); |
| 659 | |
| 660 | if (tsc_disabled > 0) |
| 661 | return; |
| 662 | |
| 663 | /* now allow native_sched_clock() to use rdtsc */ |
| 664 | tsc_disabled = 0; |
| 665 | |
| 666 | use_tsc_delay(); |
| 667 | /* Check and install the TSC clocksource */ |
| 668 | dmi_check_system(bad_tsc_dmi_table); |
| 669 | |
| 670 | if (unsynchronized_tsc()) |
| 671 | mark_tsc_unstable("TSCs unsynchronized"); |
| 672 | |
| 673 | check_geode_tsc_reliable(); |
| 674 | init_tsc_clocksource(); |
| 675 | } |
| 676 | |