blob: 4cd23c3eab41ab5e028cabc0474425323b5b5686 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07006 Portions Copyright 2002 by Mylex (An IBM Business Unit)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17*/
18
19
Jesper Juhl07fb75a2006-05-14 00:39:38 +020020#define DAC960_DriverVersion "2.5.48"
21#define DAC960_DriverDate "14 May 2006"
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/bio.h>
29#include <linux/completion.h>
30#include <linux/delay.h>
31#include <linux/genhd.h>
32#include <linux/hdreg.h>
33#include <linux/blkpg.h>
34#include <linux/interrupt.h>
35#include <linux/ioport.h>
36#include <linux/mm.h>
37#include <linux/slab.h>
38#include <linux/proc_fs.h>
39#include <linux/reboot.h>
40#include <linux/spinlock.h>
41#include <linux/timer.h>
42#include <linux/pci.h>
43#include <linux/init.h>
Marcelo Feitoza Parisi50297cb2006-03-28 01:56:44 -080044#include <linux/jiffies.h>
Matt Mackall62287fb2006-03-07 21:55:47 -080045#include <linux/random.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#include <asm/io.h>
47#include <asm/uaccess.h>
48#include "DAC960.h"
49
50#define DAC960_GAM_MINOR 252
51
52
53static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
54static int DAC960_ControllerCount;
55static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
56
57static long disk_size(DAC960_Controller_T *p, int drive_nr)
58{
59 if (p->FirmwareType == DAC960_V1_Controller) {
60 if (drive_nr >= p->LogicalDriveCount)
61 return 0;
62 return p->V1.LogicalDriveInformation[drive_nr].
63 LogicalDriveSize;
64 } else {
65 DAC960_V2_LogicalDeviceInfo_T *i =
66 p->V2.LogicalDeviceInformation[drive_nr];
67 if (i == NULL)
68 return 0;
69 return i->ConfigurableDeviceSize;
70 }
71}
72
73static int DAC960_open(struct inode *inode, struct file *file)
74{
75 struct gendisk *disk = inode->i_bdev->bd_disk;
76 DAC960_Controller_T *p = disk->queue->queuedata;
77 int drive_nr = (long)disk->private_data;
78
79 if (p->FirmwareType == DAC960_V1_Controller) {
80 if (p->V1.LogicalDriveInformation[drive_nr].
81 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
82 return -ENXIO;
83 } else {
84 DAC960_V2_LogicalDeviceInfo_T *i =
85 p->V2.LogicalDeviceInformation[drive_nr];
86 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
87 return -ENXIO;
88 }
89
90 check_disk_change(inode->i_bdev);
91
92 if (!get_capacity(p->disks[drive_nr]))
93 return -ENXIO;
94 return 0;
95}
96
Christoph Hellwiga885c8c2006-01-08 01:02:50 -080097static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
Linus Torvalds1da177e2005-04-16 15:20:36 -070098{
Christoph Hellwiga885c8c2006-01-08 01:02:50 -080099 struct gendisk *disk = bdev->bd_disk;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100 DAC960_Controller_T *p = disk->queue->queuedata;
101 int drive_nr = (long)disk->private_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102
103 if (p->FirmwareType == DAC960_V1_Controller) {
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800104 geo->heads = p->V1.GeometryTranslationHeads;
105 geo->sectors = p->V1.GeometryTranslationSectors;
106 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
107 LogicalDriveSize / (geo->heads * geo->sectors);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108 } else {
109 DAC960_V2_LogicalDeviceInfo_T *i =
110 p->V2.LogicalDeviceInformation[drive_nr];
111 switch (i->DriveGeometry) {
112 case DAC960_V2_Geometry_128_32:
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800113 geo->heads = 128;
114 geo->sectors = 32;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115 break;
116 case DAC960_V2_Geometry_255_63:
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800117 geo->heads = 255;
118 geo->sectors = 63;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 break;
120 default:
121 DAC960_Error("Illegal Logical Device Geometry %d\n",
122 p, i->DriveGeometry);
123 return -EINVAL;
124 }
125
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800126 geo->cylinders = i->ConfigurableDeviceSize /
127 (geo->heads * geo->sectors);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128 }
129
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800130 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131}
132
133static int DAC960_media_changed(struct gendisk *disk)
134{
135 DAC960_Controller_T *p = disk->queue->queuedata;
136 int drive_nr = (long)disk->private_data;
137
138 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
139 return 1;
140 return 0;
141}
142
143static int DAC960_revalidate_disk(struct gendisk *disk)
144{
145 DAC960_Controller_T *p = disk->queue->queuedata;
146 int unit = (long)disk->private_data;
147
148 set_capacity(disk, disk_size(p, unit));
149 return 0;
150}
151
152static struct block_device_operations DAC960_BlockDeviceOperations = {
153 .owner = THIS_MODULE,
154 .open = DAC960_open,
Christoph Hellwiga885c8c2006-01-08 01:02:50 -0800155 .getgeo = DAC960_getgeo,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156 .media_changed = DAC960_media_changed,
157 .revalidate_disk = DAC960_revalidate_disk,
158};
159
160
161/*
162 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
163 Copyright Notice, and Electronic Mail Address.
164*/
165
166static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
167{
168 DAC960_Announce("***** DAC960 RAID Driver Version "
169 DAC960_DriverVersion " of "
170 DAC960_DriverDate " *****\n", Controller);
171 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
172 "<lnz@dandelion.com>\n", Controller);
173}
174
175
176/*
177 DAC960_Failure prints a standardized error message, and then returns false.
178*/
179
180static boolean DAC960_Failure(DAC960_Controller_T *Controller,
181 unsigned char *ErrorMessage)
182{
183 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
184 Controller);
185 if (Controller->IO_Address == 0)
186 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
187 "PCI Address 0x%X\n", Controller,
188 Controller->Bus, Controller->Device,
189 Controller->Function, Controller->PCI_Address);
190 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
191 "0x%X PCI Address 0x%X\n", Controller,
192 Controller->Bus, Controller->Device,
193 Controller->Function, Controller->IO_Address,
194 Controller->PCI_Address);
195 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
196 return false;
197}
198
199/*
200 init_dma_loaf() and slice_dma_loaf() are helper functions for
201 aggregating the dma-mapped memory for a well-known collection of
202 data structures that are of different lengths.
203
204 These routines don't guarantee any alignment. The caller must
205 include any space needed for alignment in the sizes of the structures
206 that are passed in.
207 */
208
209static boolean init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
210 size_t len)
211{
212 void *cpu_addr;
213 dma_addr_t dma_handle;
214
215 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
216 if (cpu_addr == NULL)
217 return false;
218
219 loaf->cpu_free = loaf->cpu_base = cpu_addr;
220 loaf->dma_free =loaf->dma_base = dma_handle;
221 loaf->length = len;
222 memset(cpu_addr, 0, len);
223 return true;
224}
225
226static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
227 dma_addr_t *dma_handle)
228{
229 void *cpu_end = loaf->cpu_free + len;
230 void *cpu_addr = loaf->cpu_free;
231
Eric Sesterhenn089fe1b2006-03-24 18:50:27 +0100232 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233 *dma_handle = loaf->dma_free;
234 loaf->cpu_free = cpu_end;
235 loaf->dma_free += len;
236 return cpu_addr;
237}
238
239static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
240{
241 if (loaf_handle->cpu_base != NULL)
242 pci_free_consistent(dev, loaf_handle->length,
243 loaf_handle->cpu_base, loaf_handle->dma_base);
244}
245
246
247/*
248 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
249 data structures for Controller. It returns true on success and false on
250 failure.
251*/
252
253static boolean DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
254{
255 int CommandAllocationLength, CommandAllocationGroupSize;
256 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
257 void *AllocationPointer = NULL;
258 void *ScatterGatherCPU = NULL;
259 dma_addr_t ScatterGatherDMA;
260 struct pci_pool *ScatterGatherPool;
261 void *RequestSenseCPU = NULL;
262 dma_addr_t RequestSenseDMA;
263 struct pci_pool *RequestSensePool = NULL;
264
265 if (Controller->FirmwareType == DAC960_V1_Controller)
266 {
267 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
268 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
269 ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
270 Controller->PCIDevice,
271 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
272 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
273 if (ScatterGatherPool == NULL)
274 return DAC960_Failure(Controller,
275 "AUXILIARY STRUCTURE CREATION (SG)");
276 Controller->ScatterGatherPool = ScatterGatherPool;
277 }
278 else
279 {
280 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
281 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
282 ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
283 Controller->PCIDevice,
284 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
285 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
286 if (ScatterGatherPool == NULL)
287 return DAC960_Failure(Controller,
288 "AUXILIARY STRUCTURE CREATION (SG)");
289 RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
290 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
291 sizeof(int), 0);
292 if (RequestSensePool == NULL) {
293 pci_pool_destroy(ScatterGatherPool);
294 return DAC960_Failure(Controller,
295 "AUXILIARY STRUCTURE CREATION (SG)");
296 }
297 Controller->ScatterGatherPool = ScatterGatherPool;
298 Controller->V2.RequestSensePool = RequestSensePool;
299 }
300 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
301 Controller->FreeCommands = NULL;
302 for (CommandIdentifier = 1;
303 CommandIdentifier <= Controller->DriverQueueDepth;
304 CommandIdentifier++)
305 {
306 DAC960_Command_T *Command;
307 if (--CommandsRemaining <= 0)
308 {
309 CommandsRemaining =
310 Controller->DriverQueueDepth - CommandIdentifier + 1;
311 if (CommandsRemaining > CommandAllocationGroupSize)
312 CommandsRemaining = CommandAllocationGroupSize;
313 CommandGroupByteCount =
314 CommandsRemaining * CommandAllocationLength;
Eric Sesterhenn06ff37f2006-03-08 11:21:52 +0100315 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316 if (AllocationPointer == NULL)
317 return DAC960_Failure(Controller,
318 "AUXILIARY STRUCTURE CREATION");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319 }
320 Command = (DAC960_Command_T *) AllocationPointer;
321 AllocationPointer += CommandAllocationLength;
322 Command->CommandIdentifier = CommandIdentifier;
323 Command->Controller = Controller;
324 Command->Next = Controller->FreeCommands;
325 Controller->FreeCommands = Command;
326 Controller->Commands[CommandIdentifier-1] = Command;
327 ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, SLAB_ATOMIC,
328 &ScatterGatherDMA);
329 if (ScatterGatherCPU == NULL)
330 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
331
332 if (RequestSensePool != NULL) {
333 RequestSenseCPU = pci_pool_alloc(RequestSensePool, SLAB_ATOMIC,
334 &RequestSenseDMA);
335 if (RequestSenseCPU == NULL) {
336 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
337 ScatterGatherDMA);
338 return DAC960_Failure(Controller,
339 "AUXILIARY STRUCTURE CREATION");
340 }
341 }
342 if (Controller->FirmwareType == DAC960_V1_Controller) {
343 Command->cmd_sglist = Command->V1.ScatterList;
344 Command->V1.ScatterGatherList =
345 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
346 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
347 } else {
348 Command->cmd_sglist = Command->V2.ScatterList;
349 Command->V2.ScatterGatherList =
350 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
351 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
352 Command->V2.RequestSense =
353 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
354 Command->V2.RequestSenseDMA = RequestSenseDMA;
355 }
356 }
357 return true;
358}
359
360
361/*
362 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
363 structures for Controller.
364*/
365
366static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
367{
368 int i;
369 struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
370 struct pci_pool *RequestSensePool = NULL;
371 void *ScatterGatherCPU;
372 dma_addr_t ScatterGatherDMA;
373 void *RequestSenseCPU;
374 dma_addr_t RequestSenseDMA;
375 DAC960_Command_T *CommandGroup = NULL;
376
377
378 if (Controller->FirmwareType == DAC960_V2_Controller)
379 RequestSensePool = Controller->V2.RequestSensePool;
380
381 Controller->FreeCommands = NULL;
382 for (i = 0; i < Controller->DriverQueueDepth; i++)
383 {
384 DAC960_Command_T *Command = Controller->Commands[i];
385
386 if (Command == NULL)
387 continue;
388
389 if (Controller->FirmwareType == DAC960_V1_Controller) {
390 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
391 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
392 RequestSenseCPU = NULL;
393 RequestSenseDMA = (dma_addr_t)0;
394 } else {
395 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
396 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
397 RequestSenseCPU = (void *)Command->V2.RequestSense;
398 RequestSenseDMA = Command->V2.RequestSenseDMA;
399 }
400 if (ScatterGatherCPU != NULL)
401 pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
402 if (RequestSenseCPU != NULL)
403 pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
404
405 if ((Command->CommandIdentifier
406 % Controller->CommandAllocationGroupSize) == 1) {
407 /*
408 * We can't free the group of commands until all of the
409 * request sense and scatter gather dma structures are free.
410 * Remember the beginning of the group, but don't free it
411 * until we've reached the beginning of the next group.
412 */
Jesper Juhl6044ec82005-11-07 01:01:32 -0800413 kfree(CommandGroup);
414 CommandGroup = Command;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415 }
416 Controller->Commands[i] = NULL;
417 }
Jesper Juhl6044ec82005-11-07 01:01:32 -0800418 kfree(CommandGroup);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419
420 if (Controller->CombinedStatusBuffer != NULL)
421 {
422 kfree(Controller->CombinedStatusBuffer);
423 Controller->CombinedStatusBuffer = NULL;
424 Controller->CurrentStatusBuffer = NULL;
425 }
426
427 if (ScatterGatherPool != NULL)
428 pci_pool_destroy(ScatterGatherPool);
Jesper Juhl6044ec82005-11-07 01:01:32 -0800429 if (Controller->FirmwareType == DAC960_V1_Controller)
430 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431
432 if (RequestSensePool != NULL)
433 pci_pool_destroy(RequestSensePool);
434
Jesper Juhl6044ec82005-11-07 01:01:32 -0800435 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700436 kfree(Controller->V2.LogicalDeviceInformation[i]);
437 Controller->V2.LogicalDeviceInformation[i] = NULL;
Jesper Juhl6044ec82005-11-07 01:01:32 -0800438 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439
440 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
441 {
Jesper Juhl6044ec82005-11-07 01:01:32 -0800442 kfree(Controller->V2.PhysicalDeviceInformation[i]);
443 Controller->V2.PhysicalDeviceInformation[i] = NULL;
444 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
445 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446 }
447}
448
449
450/*
451 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
452 Firmware Controllers.
453*/
454
455static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
456{
457 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
458 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
459 Command->V1.CommandStatus = 0;
460}
461
462
463/*
464 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
465 Firmware Controllers.
466*/
467
468static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
469{
470 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
471 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
472 Command->V2.CommandStatus = 0;
473}
474
475
476/*
477 DAC960_AllocateCommand allocates a Command structure from Controller's
478 free list. During driver initialization, a special initialization command
479 has been placed on the free list to guarantee that command allocation can
480 never fail.
481*/
482
483static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
484 *Controller)
485{
486 DAC960_Command_T *Command = Controller->FreeCommands;
487 if (Command == NULL) return NULL;
488 Controller->FreeCommands = Command->Next;
489 Command->Next = NULL;
490 return Command;
491}
492
493
494/*
495 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
496 free list.
497*/
498
499static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
500{
501 DAC960_Controller_T *Controller = Command->Controller;
502
503 Command->Request = NULL;
504 Command->Next = Controller->FreeCommands;
505 Controller->FreeCommands = Command;
506}
507
508
509/*
510 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
511*/
512
513static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
514{
515 spin_unlock_irq(&Controller->queue_lock);
516 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
517 spin_lock_irq(&Controller->queue_lock);
518}
519
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -0700520/*
521 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
522*/
523
524static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
525{
526 DAC960_Controller_T *Controller = Command->Controller;
527 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
528 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
529 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
530 Controller->V2.NextCommandMailbox;
531
532 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
533 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
534
535 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
536 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
537 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
538
539 Controller->V2.PreviousCommandMailbox2 =
540 Controller->V2.PreviousCommandMailbox1;
541 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
542
543 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
544 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
545
546 Controller->V2.NextCommandMailbox = NextCommandMailbox;
547}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700548
549/*
550 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
551*/
552
553static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
554{
555 DAC960_Controller_T *Controller = Command->Controller;
556 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
557 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
558 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
559 Controller->V2.NextCommandMailbox;
560 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
561 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
562 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
563 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
564 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
565 Controller->V2.PreviousCommandMailbox2 =
566 Controller->V2.PreviousCommandMailbox1;
567 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
568 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
569 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
570 Controller->V2.NextCommandMailbox = NextCommandMailbox;
571}
572
573
574/*
575 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
576*/
577
578static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
579{
580 DAC960_Controller_T *Controller = Command->Controller;
581 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
582 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
583 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
584 Controller->V2.NextCommandMailbox;
585 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
586 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
587 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
588 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
589 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
590 Controller->V2.PreviousCommandMailbox2 =
591 Controller->V2.PreviousCommandMailbox1;
592 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
593 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
594 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
595 Controller->V2.NextCommandMailbox = NextCommandMailbox;
596}
597
598
599/*
600 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
601 Controllers with Dual Mode Firmware.
602*/
603
604static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
605{
606 DAC960_Controller_T *Controller = Command->Controller;
607 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
608 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
609 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
610 Controller->V1.NextCommandMailbox;
611 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
612 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
613 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
614 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
615 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
616 Controller->V1.PreviousCommandMailbox2 =
617 Controller->V1.PreviousCommandMailbox1;
618 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
619 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
620 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
621 Controller->V1.NextCommandMailbox = NextCommandMailbox;
622}
623
624
625/*
626 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
627 Controllers with Single Mode Firmware.
628*/
629
630static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
631{
632 DAC960_Controller_T *Controller = Command->Controller;
633 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
634 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
635 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
636 Controller->V1.NextCommandMailbox;
637 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
638 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
639 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
640 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
641 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
642 Controller->V1.PreviousCommandMailbox2 =
643 Controller->V1.PreviousCommandMailbox1;
644 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
645 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
646 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
647 Controller->V1.NextCommandMailbox = NextCommandMailbox;
648}
649
650
651/*
652 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
653 Controllers with Dual Mode Firmware.
654*/
655
656static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
657{
658 DAC960_Controller_T *Controller = Command->Controller;
659 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
660 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
661 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
662 Controller->V1.NextCommandMailbox;
663 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
664 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
665 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
666 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
667 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
668 Controller->V1.PreviousCommandMailbox2 =
669 Controller->V1.PreviousCommandMailbox1;
670 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
671 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
672 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
673 Controller->V1.NextCommandMailbox = NextCommandMailbox;
674}
675
676
677/*
678 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
679 Controllers with Single Mode Firmware.
680*/
681
682static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
683{
684 DAC960_Controller_T *Controller = Command->Controller;
685 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
686 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
687 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
688 Controller->V1.NextCommandMailbox;
689 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
690 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
691 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
692 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
693 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
694 Controller->V1.PreviousCommandMailbox2 =
695 Controller->V1.PreviousCommandMailbox1;
696 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
697 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
698 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
699 Controller->V1.NextCommandMailbox = NextCommandMailbox;
700}
701
702
703/*
704 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
705*/
706
707static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
708{
709 DAC960_Controller_T *Controller = Command->Controller;
710 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
711 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
712 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
713 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
714 udelay(1);
715 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
716 DAC960_PD_NewCommand(ControllerBaseAddress);
717}
718
719
720/*
721 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
722*/
723
724static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
725{
726 DAC960_Controller_T *Controller = Command->Controller;
727 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
728 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
729 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
730 switch (CommandMailbox->Common.CommandOpcode)
731 {
732 case DAC960_V1_Enquiry:
733 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
734 break;
735 case DAC960_V1_GetDeviceState:
736 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
737 break;
738 case DAC960_V1_Read:
739 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
740 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
741 break;
742 case DAC960_V1_Write:
743 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
744 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
745 break;
746 case DAC960_V1_ReadWithScatterGather:
747 CommandMailbox->Common.CommandOpcode =
748 DAC960_V1_ReadWithScatterGather_Old;
749 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
750 break;
751 case DAC960_V1_WriteWithScatterGather:
752 CommandMailbox->Common.CommandOpcode =
753 DAC960_V1_WriteWithScatterGather_Old;
754 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
755 break;
756 default:
757 break;
758 }
759 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
760 udelay(1);
761 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
762 DAC960_PD_NewCommand(ControllerBaseAddress);
763}
764
765
766/*
767 DAC960_ExecuteCommand executes Command and waits for completion.
768*/
769
770static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
771{
772 DAC960_Controller_T *Controller = Command->Controller;
773 DECLARE_COMPLETION(Completion);
774 unsigned long flags;
775 Command->Completion = &Completion;
776
777 spin_lock_irqsave(&Controller->queue_lock, flags);
778 DAC960_QueueCommand(Command);
779 spin_unlock_irqrestore(&Controller->queue_lock, flags);
780
781 if (in_interrupt())
782 return;
783 wait_for_completion(&Completion);
784}
785
786
787/*
788 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
789 Command and waits for completion. It returns true on success and false
790 on failure.
791*/
792
793static boolean DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
794 DAC960_V1_CommandOpcode_T CommandOpcode,
795 dma_addr_t DataDMA)
796{
797 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
798 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
799 DAC960_V1_CommandStatus_T CommandStatus;
800 DAC960_V1_ClearCommand(Command);
801 Command->CommandType = DAC960_ImmediateCommand;
802 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
803 CommandMailbox->Type3.BusAddress = DataDMA;
804 DAC960_ExecuteCommand(Command);
805 CommandStatus = Command->V1.CommandStatus;
806 DAC960_DeallocateCommand(Command);
807 return (CommandStatus == DAC960_V1_NormalCompletion);
808}
809
810
811/*
812 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
813 Command and waits for completion. It returns true on success and false
814 on failure.
815*/
816
817static boolean DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
818 DAC960_V1_CommandOpcode_T CommandOpcode,
819 unsigned char CommandOpcode2,
820 dma_addr_t DataDMA)
821{
822 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
823 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
824 DAC960_V1_CommandStatus_T CommandStatus;
825 DAC960_V1_ClearCommand(Command);
826 Command->CommandType = DAC960_ImmediateCommand;
827 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
828 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
829 CommandMailbox->Type3B.BusAddress = DataDMA;
830 DAC960_ExecuteCommand(Command);
831 CommandStatus = Command->V1.CommandStatus;
832 DAC960_DeallocateCommand(Command);
833 return (CommandStatus == DAC960_V1_NormalCompletion);
834}
835
836
837/*
838 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
839 Command and waits for completion. It returns true on success and false
840 on failure.
841*/
842
843static boolean DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
844 DAC960_V1_CommandOpcode_T CommandOpcode,
845 unsigned char Channel,
846 unsigned char TargetID,
847 dma_addr_t DataDMA)
848{
849 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
850 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
851 DAC960_V1_CommandStatus_T CommandStatus;
852 DAC960_V1_ClearCommand(Command);
853 Command->CommandType = DAC960_ImmediateCommand;
854 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
855 CommandMailbox->Type3D.Channel = Channel;
856 CommandMailbox->Type3D.TargetID = TargetID;
857 CommandMailbox->Type3D.BusAddress = DataDMA;
858 DAC960_ExecuteCommand(Command);
859 CommandStatus = Command->V1.CommandStatus;
860 DAC960_DeallocateCommand(Command);
861 return (CommandStatus == DAC960_V1_NormalCompletion);
862}
863
864
865/*
866 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
867 Reading IOCTL Command and waits for completion. It returns true on success
868 and false on failure.
869
870 Return data in The controller's HealthStatusBuffer, which is dma-able memory
871*/
872
873static boolean DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
874{
875 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
876 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
877 DAC960_V2_CommandStatus_T CommandStatus;
878 DAC960_V2_ClearCommand(Command);
879 Command->CommandType = DAC960_ImmediateCommand;
880 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
881 CommandMailbox->Common.CommandControlBits
882 .DataTransferControllerToHost = true;
883 CommandMailbox->Common.CommandControlBits
884 .NoAutoRequestSense = true;
885 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
886 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
887 CommandMailbox->Common.DataTransferMemoryAddress
888 .ScatterGatherSegments[0]
889 .SegmentDataPointer =
890 Controller->V2.HealthStatusBufferDMA;
891 CommandMailbox->Common.DataTransferMemoryAddress
892 .ScatterGatherSegments[0]
893 .SegmentByteCount =
894 CommandMailbox->Common.DataTransferSize;
895 DAC960_ExecuteCommand(Command);
896 CommandStatus = Command->V2.CommandStatus;
897 DAC960_DeallocateCommand(Command);
898 return (CommandStatus == DAC960_V2_NormalCompletion);
899}
900
901
902/*
903 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
904 Information Reading IOCTL Command and waits for completion. It returns
905 true on success and false on failure.
906
907 Data is returned in the controller's V2.NewControllerInformation dma-able
908 memory buffer.
909*/
910
911static boolean DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
912{
913 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
914 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
915 DAC960_V2_CommandStatus_T CommandStatus;
916 DAC960_V2_ClearCommand(Command);
917 Command->CommandType = DAC960_ImmediateCommand;
918 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
919 CommandMailbox->ControllerInfo.CommandControlBits
920 .DataTransferControllerToHost = true;
921 CommandMailbox->ControllerInfo.CommandControlBits
922 .NoAutoRequestSense = true;
923 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
924 CommandMailbox->ControllerInfo.ControllerNumber = 0;
925 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
926 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
927 .ScatterGatherSegments[0]
928 .SegmentDataPointer =
929 Controller->V2.NewControllerInformationDMA;
930 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
931 .ScatterGatherSegments[0]
932 .SegmentByteCount =
933 CommandMailbox->ControllerInfo.DataTransferSize;
934 DAC960_ExecuteCommand(Command);
935 CommandStatus = Command->V2.CommandStatus;
936 DAC960_DeallocateCommand(Command);
937 return (CommandStatus == DAC960_V2_NormalCompletion);
938}
939
940
941/*
942 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
943 Device Information Reading IOCTL Command and waits for completion. It
944 returns true on success and false on failure.
945
946 Data is returned in the controller's V2.NewLogicalDeviceInformation
947*/
948
949static boolean DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
950 unsigned short LogicalDeviceNumber)
951{
952 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
953 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
954 DAC960_V2_CommandStatus_T CommandStatus;
955
956 DAC960_V2_ClearCommand(Command);
957 Command->CommandType = DAC960_ImmediateCommand;
958 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
959 DAC960_V2_IOCTL;
960 CommandMailbox->LogicalDeviceInfo.CommandControlBits
961 .DataTransferControllerToHost = true;
962 CommandMailbox->LogicalDeviceInfo.CommandControlBits
963 .NoAutoRequestSense = true;
964 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
965 sizeof(DAC960_V2_LogicalDeviceInfo_T);
966 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
967 LogicalDeviceNumber;
968 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
969 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
970 .ScatterGatherSegments[0]
971 .SegmentDataPointer =
972 Controller->V2.NewLogicalDeviceInformationDMA;
973 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
974 .ScatterGatherSegments[0]
975 .SegmentByteCount =
976 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
977 DAC960_ExecuteCommand(Command);
978 CommandStatus = Command->V2.CommandStatus;
979 DAC960_DeallocateCommand(Command);
980 return (CommandStatus == DAC960_V2_NormalCompletion);
981}
982
983
984/*
985 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
986 Physical Device Information" IOCTL Command and waits for completion. It
987 returns true on success and false on failure.
988
989 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
990 this function is called for a given controller. This will return data
991 for the "first" device on that controller. The returned data includes a
992 Channel, TargetID, LogicalUnit that can be passed in to this routine to
993 get data for the NEXT device on that controller.
994
995 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
996 memory buffer.
997
998*/
999
1000static boolean DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1001 unsigned char Channel,
1002 unsigned char TargetID,
1003 unsigned char LogicalUnit)
1004{
1005 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1006 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1007 DAC960_V2_CommandStatus_T CommandStatus;
1008
1009 DAC960_V2_ClearCommand(Command);
1010 Command->CommandType = DAC960_ImmediateCommand;
1011 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1012 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1013 .DataTransferControllerToHost = true;
1014 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1015 .NoAutoRequestSense = true;
1016 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1017 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1018 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1019 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1020 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1021 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1022 DAC960_V2_GetPhysicalDeviceInfoValid;
1023 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1024 .ScatterGatherSegments[0]
1025 .SegmentDataPointer =
1026 Controller->V2.NewPhysicalDeviceInformationDMA;
1027 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1028 .ScatterGatherSegments[0]
1029 .SegmentByteCount =
1030 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1031 DAC960_ExecuteCommand(Command);
1032 CommandStatus = Command->V2.CommandStatus;
1033 DAC960_DeallocateCommand(Command);
1034 return (CommandStatus == DAC960_V2_NormalCompletion);
1035}
1036
1037
1038static void DAC960_V2_ConstructNewUnitSerialNumber(
1039 DAC960_Controller_T *Controller,
1040 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1041 int LogicalUnit)
1042{
1043 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1044 CommandMailbox->SCSI_10.CommandControlBits
1045 .DataTransferControllerToHost = true;
1046 CommandMailbox->SCSI_10.CommandControlBits
1047 .NoAutoRequestSense = true;
1048 CommandMailbox->SCSI_10.DataTransferSize =
1049 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1050 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1051 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1052 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1053 CommandMailbox->SCSI_10.CDBLength = 6;
1054 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1055 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1056 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1057 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1058 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1059 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1060 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1061 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1062 .ScatterGatherSegments[0]
1063 .SegmentDataPointer =
1064 Controller->V2.NewInquiryUnitSerialNumberDMA;
1065 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1066 .ScatterGatherSegments[0]
1067 .SegmentByteCount =
1068 CommandMailbox->SCSI_10.DataTransferSize;
1069}
1070
1071
1072/*
1073 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1074 Inquiry command to a SCSI device identified by Channel number,
1075 Target id, Logical Unit Number. This function Waits for completion
1076 of the command.
1077
1078 The return data includes Unit Serial Number information for the
1079 specified device.
1080
1081 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1082 memory buffer.
1083*/
1084
1085static boolean DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1086 int Channel, int TargetID, int LogicalUnit)
1087{
1088 DAC960_Command_T *Command;
1089 DAC960_V2_CommandMailbox_T *CommandMailbox;
1090 DAC960_V2_CommandStatus_T CommandStatus;
1091
1092 Command = DAC960_AllocateCommand(Controller);
1093 CommandMailbox = &Command->V2.CommandMailbox;
1094 DAC960_V2_ClearCommand(Command);
1095 Command->CommandType = DAC960_ImmediateCommand;
1096
1097 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1098 Channel, TargetID, LogicalUnit);
1099
1100 DAC960_ExecuteCommand(Command);
1101 CommandStatus = Command->V2.CommandStatus;
1102 DAC960_DeallocateCommand(Command);
1103 return (CommandStatus == DAC960_V2_NormalCompletion);
1104}
1105
1106
1107/*
1108 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1109 Operation IOCTL Command and waits for completion. It returns true on
1110 success and false on failure.
1111*/
1112
1113static boolean DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1114 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1115 DAC960_V2_OperationDevice_T
1116 OperationDevice)
1117{
1118 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1119 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1120 DAC960_V2_CommandStatus_T CommandStatus;
1121 DAC960_V2_ClearCommand(Command);
1122 Command->CommandType = DAC960_ImmediateCommand;
1123 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1124 CommandMailbox->DeviceOperation.CommandControlBits
1125 .DataTransferControllerToHost = true;
1126 CommandMailbox->DeviceOperation.CommandControlBits
1127 .NoAutoRequestSense = true;
1128 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1129 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1130 DAC960_ExecuteCommand(Command);
1131 CommandStatus = Command->V2.CommandStatus;
1132 DAC960_DeallocateCommand(Command);
1133 return (CommandStatus == DAC960_V2_NormalCompletion);
1134}
1135
1136
1137/*
1138 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1139 for DAC960 V1 Firmware Controllers.
1140
1141 PD and P controller types have no memory mailbox, but still need the
1142 other dma mapped memory.
1143*/
1144
1145static boolean DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1146 *Controller)
1147{
1148 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1149 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1150 struct pci_dev *PCI_Device = Controller->PCIDevice;
1151 struct dma_loaf *DmaPages = &Controller->DmaPages;
1152 size_t DmaPagesSize;
1153 size_t CommandMailboxesSize;
1154 size_t StatusMailboxesSize;
1155
1156 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1157 dma_addr_t CommandMailboxesMemoryDMA;
1158
1159 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1160 dma_addr_t StatusMailboxesMemoryDMA;
1161
1162 DAC960_V1_CommandMailbox_T CommandMailbox;
1163 DAC960_V1_CommandStatus_T CommandStatus;
1164 int TimeoutCounter;
1165 int i;
1166
1167
1168 if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V1_PciDmaMask))
1169 return DAC960_Failure(Controller, "DMA mask out of range");
1170 Controller->BounceBufferLimit = DAC690_V1_PciDmaMask;
1171
1172 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1173 CommandMailboxesSize = 0;
1174 StatusMailboxesSize = 0;
1175 } else {
1176 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1177 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1178 }
1179 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1180 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1181 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1182 sizeof(DAC960_V1_RebuildProgress_T) +
1183 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1184 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1185 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1186 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1187
1188 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1189 return false;
1190
1191
1192 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1193 goto skip_mailboxes;
1194
1195 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1196 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1197
1198 /* These are the base addresses for the command memory mailbox array */
1199 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1200 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1201
1202 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1203 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1204 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1205 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1206 Controller->V1.PreviousCommandMailbox2 =
1207 Controller->V1.LastCommandMailbox - 1;
1208
1209 /* These are the base addresses for the status memory mailbox array */
1210 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1211 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1212
1213 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1214 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1215 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1216 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1217 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1218
1219skip_mailboxes:
1220 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1221 sizeof(DAC960_V1_DCDB_T),
1222 &Controller->V1.MonitoringDCDB_DMA);
1223
1224 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1225 sizeof(DAC960_V1_Enquiry_T),
1226 &Controller->V1.NewEnquiryDMA);
1227
1228 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1229 sizeof(DAC960_V1_ErrorTable_T),
1230 &Controller->V1.NewErrorTableDMA);
1231
1232 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1233 sizeof(DAC960_V1_EventLogEntry_T),
1234 &Controller->V1.EventLogEntryDMA);
1235
1236 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1237 sizeof(DAC960_V1_RebuildProgress_T),
1238 &Controller->V1.RebuildProgressDMA);
1239
1240 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1241 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1242 &Controller->V1.NewLogicalDriveInformationDMA);
1243
1244 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1245 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1246 &Controller->V1.BackgroundInitializationStatusDMA);
1247
1248 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1249 sizeof(DAC960_V1_DeviceState_T),
1250 &Controller->V1.NewDeviceStateDMA);
1251
1252 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1253 sizeof(DAC960_SCSI_Inquiry_T),
1254 &Controller->V1.NewInquiryStandardDataDMA);
1255
1256 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1257 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1258 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1259
1260 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1261 return true;
1262
1263 /* Enable the Memory Mailbox Interface. */
1264 Controller->V1.DualModeMemoryMailboxInterface = true;
1265 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1266 CommandMailbox.TypeX.CommandIdentifier = 0;
1267 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1268 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1269 Controller->V1.FirstCommandMailboxDMA;
1270 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1271 Controller->V1.FirstStatusMailboxDMA;
1272#define TIMEOUT_COUNT 1000000
1273
1274 for (i = 0; i < 2; i++)
1275 switch (Controller->HardwareType)
1276 {
1277 case DAC960_LA_Controller:
1278 TimeoutCounter = TIMEOUT_COUNT;
1279 while (--TimeoutCounter >= 0)
1280 {
1281 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1282 break;
1283 udelay(10);
1284 }
1285 if (TimeoutCounter < 0) return false;
1286 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1287 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1288 TimeoutCounter = TIMEOUT_COUNT;
1289 while (--TimeoutCounter >= 0)
1290 {
1291 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1292 ControllerBaseAddress))
1293 break;
1294 udelay(10);
1295 }
1296 if (TimeoutCounter < 0) return false;
1297 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1298 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1299 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1300 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1301 Controller->V1.DualModeMemoryMailboxInterface = false;
1302 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1303 break;
1304 case DAC960_PG_Controller:
1305 TimeoutCounter = TIMEOUT_COUNT;
1306 while (--TimeoutCounter >= 0)
1307 {
1308 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1309 break;
1310 udelay(10);
1311 }
1312 if (TimeoutCounter < 0) return false;
1313 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1314 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1315
1316 TimeoutCounter = TIMEOUT_COUNT;
1317 while (--TimeoutCounter >= 0)
1318 {
1319 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1320 ControllerBaseAddress))
1321 break;
1322 udelay(10);
1323 }
1324 if (TimeoutCounter < 0) return false;
1325 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1326 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1327 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1328 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1329 Controller->V1.DualModeMemoryMailboxInterface = false;
1330 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1331 break;
1332 default:
1333 DAC960_Failure(Controller, "Unknown Controller Type\n");
1334 break;
1335 }
1336 return false;
1337}
1338
1339
1340/*
1341 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1342 for DAC960 V2 Firmware Controllers.
1343
1344 Aggregate the space needed for the controller's memory mailbox and
1345 the other data structures that will be targets of dma transfers with
1346 the controller. Allocate a dma-mapped region of memory to hold these
1347 structures. Then, save CPU pointers and dma_addr_t values to reference
1348 the structures that are contained in that region.
1349*/
1350
1351static boolean DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1352 *Controller)
1353{
1354 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1355 struct pci_dev *PCI_Device = Controller->PCIDevice;
1356 struct dma_loaf *DmaPages = &Controller->DmaPages;
1357 size_t DmaPagesSize;
1358 size_t CommandMailboxesSize;
1359 size_t StatusMailboxesSize;
1360
1361 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1362 dma_addr_t CommandMailboxesMemoryDMA;
1363
1364 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1365 dma_addr_t StatusMailboxesMemoryDMA;
1366
1367 DAC960_V2_CommandMailbox_T *CommandMailbox;
1368 dma_addr_t CommandMailboxDMA;
1369 DAC960_V2_CommandStatus_T CommandStatus;
1370
1371 if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V2_PciDmaMask))
1372 return DAC960_Failure(Controller, "DMA mask out of range");
1373 Controller->BounceBufferLimit = DAC690_V2_PciDmaMask;
1374
1375 /* This is a temporary dma mapping, used only in the scope of this function */
1376 CommandMailbox =
1377 (DAC960_V2_CommandMailbox_T *)pci_alloc_consistent( PCI_Device,
1378 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1379 if (CommandMailbox == NULL)
1380 return false;
1381
1382 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1383 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1384 DmaPagesSize =
1385 CommandMailboxesSize + StatusMailboxesSize +
1386 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1387 sizeof(DAC960_V2_ControllerInfo_T) +
1388 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1389 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1390 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1391 sizeof(DAC960_V2_Event_T) +
1392 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1393
1394 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1395 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1396 CommandMailbox, CommandMailboxDMA);
1397 return false;
1398 }
1399
1400 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1401 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1402
1403 /* These are the base addresses for the command memory mailbox array */
1404 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1405 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1406
1407 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1408 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1409 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1410 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1411 Controller->V2.PreviousCommandMailbox2 =
1412 Controller->V2.LastCommandMailbox - 1;
1413
1414 /* These are the base addresses for the status memory mailbox array */
1415 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1416 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1417
1418 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1419 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1420 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1421 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1422 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1423
1424 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1425 sizeof(DAC960_V2_HealthStatusBuffer_T),
1426 &Controller->V2.HealthStatusBufferDMA);
1427
1428 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1429 sizeof(DAC960_V2_ControllerInfo_T),
1430 &Controller->V2.NewControllerInformationDMA);
1431
1432 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1433 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1434 &Controller->V2.NewLogicalDeviceInformationDMA);
1435
1436 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1437 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1438 &Controller->V2.NewPhysicalDeviceInformationDMA);
1439
1440 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1441 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1442 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1443
1444 Controller->V2.Event = slice_dma_loaf(DmaPages,
1445 sizeof(DAC960_V2_Event_T),
1446 &Controller->V2.EventDMA);
1447
1448 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1449 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1450 &Controller->V2.PhysicalToLogicalDeviceDMA);
1451
1452 /*
1453 Enable the Memory Mailbox Interface.
1454
1455 I don't know why we can't just use one of the memory mailboxes
1456 we just allocated to do this, instead of using this temporary one.
1457 Try this change later.
1458 */
1459 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1460 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1461 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1462 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1463 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1464 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1465 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1466 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1467 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1468 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1469 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1470 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1471 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1472 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1473 Controller->V2.HealthStatusBufferDMA;
1474 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1475 Controller->V2.FirstCommandMailboxDMA;
1476 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1477 Controller->V2.FirstStatusMailboxDMA;
1478 switch (Controller->HardwareType)
1479 {
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07001480 case DAC960_GEM_Controller:
1481 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1482 udelay(1);
1483 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1484 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1485 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1486 udelay(1);
1487 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1488 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1489 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1490 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001491 case DAC960_BA_Controller:
1492 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1493 udelay(1);
1494 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1495 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1496 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1497 udelay(1);
1498 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1499 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1500 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1501 break;
1502 case DAC960_LP_Controller:
1503 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1504 udelay(1);
1505 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1506 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1507 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1508 udelay(1);
1509 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1510 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1511 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1512 break;
1513 default:
1514 DAC960_Failure(Controller, "Unknown Controller Type\n");
1515 CommandStatus = DAC960_V2_AbormalCompletion;
1516 break;
1517 }
1518 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1519 CommandMailbox, CommandMailboxDMA);
1520 return (CommandStatus == DAC960_V2_NormalCompletion);
1521}
1522
1523
1524/*
1525 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1526 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1527*/
1528
1529static boolean DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1530 *Controller)
1531{
1532 DAC960_V1_Enquiry2_T *Enquiry2;
1533 dma_addr_t Enquiry2DMA;
1534 DAC960_V1_Config2_T *Config2;
1535 dma_addr_t Config2DMA;
1536 int LogicalDriveNumber, Channel, TargetID;
1537 struct dma_loaf local_dma;
1538
1539 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1540 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1541 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1542
1543 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1544 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1545
1546 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1547 Controller->V1.NewEnquiryDMA)) {
1548 free_dma_loaf(Controller->PCIDevice, &local_dma);
1549 return DAC960_Failure(Controller, "ENQUIRY");
1550 }
1551 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1552 sizeof(DAC960_V1_Enquiry_T));
1553
1554 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1555 free_dma_loaf(Controller->PCIDevice, &local_dma);
1556 return DAC960_Failure(Controller, "ENQUIRY2");
1557 }
1558
1559 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1560 free_dma_loaf(Controller->PCIDevice, &local_dma);
1561 return DAC960_Failure(Controller, "READ CONFIG2");
1562 }
1563
1564 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1565 Controller->V1.NewLogicalDriveInformationDMA)) {
1566 free_dma_loaf(Controller->PCIDevice, &local_dma);
1567 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1568 }
1569 memcpy(&Controller->V1.LogicalDriveInformation,
1570 Controller->V1.NewLogicalDriveInformation,
1571 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1572
1573 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1574 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1575 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1576 Channel, TargetID,
1577 Controller->V1.NewDeviceStateDMA)) {
1578 free_dma_loaf(Controller->PCIDevice, &local_dma);
1579 return DAC960_Failure(Controller, "GET DEVICE STATE");
1580 }
1581 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1582 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1583 }
1584 /*
1585 Initialize the Controller Model Name and Full Model Name fields.
1586 */
1587 switch (Enquiry2->HardwareID.SubModel)
1588 {
1589 case DAC960_V1_P_PD_PU:
1590 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1591 strcpy(Controller->ModelName, "DAC960PU");
1592 else strcpy(Controller->ModelName, "DAC960PD");
1593 break;
1594 case DAC960_V1_PL:
1595 strcpy(Controller->ModelName, "DAC960PL");
1596 break;
1597 case DAC960_V1_PG:
1598 strcpy(Controller->ModelName, "DAC960PG");
1599 break;
1600 case DAC960_V1_PJ:
1601 strcpy(Controller->ModelName, "DAC960PJ");
1602 break;
1603 case DAC960_V1_PR:
1604 strcpy(Controller->ModelName, "DAC960PR");
1605 break;
1606 case DAC960_V1_PT:
1607 strcpy(Controller->ModelName, "DAC960PT");
1608 break;
1609 case DAC960_V1_PTL0:
1610 strcpy(Controller->ModelName, "DAC960PTL0");
1611 break;
1612 case DAC960_V1_PRL:
1613 strcpy(Controller->ModelName, "DAC960PRL");
1614 break;
1615 case DAC960_V1_PTL1:
1616 strcpy(Controller->ModelName, "DAC960PTL1");
1617 break;
1618 case DAC960_V1_1164P:
1619 strcpy(Controller->ModelName, "DAC1164P");
1620 break;
1621 default:
1622 free_dma_loaf(Controller->PCIDevice, &local_dma);
1623 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1624 }
1625 strcpy(Controller->FullModelName, "Mylex ");
1626 strcat(Controller->FullModelName, Controller->ModelName);
1627 /*
1628 Initialize the Controller Firmware Version field and verify that it
1629 is a supported firmware version. The supported firmware versions are:
1630
1631 DAC1164P 5.06 and above
1632 DAC960PTL/PRL/PJ/PG 4.06 and above
1633 DAC960PU/PD/PL 3.51 and above
1634 DAC960PU/PD/PL/P 2.73 and above
1635 */
1636#if defined(CONFIG_ALPHA)
1637 /*
1638 DEC Alpha machines were often equipped with DAC960 cards that were
1639 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1640 the last custom FW revision to be released by DEC for these older
1641 controllers, appears to work quite well with this driver.
1642
1643 Cards tested successfully were several versions each of the PD and
1644 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1645 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1646 back of the board, of:
1647
1648 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1649 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1650 */
1651# define FIRMWARE_27X "2.70"
1652#else
1653# define FIRMWARE_27X "2.73"
1654#endif
1655
1656 if (Enquiry2->FirmwareID.MajorVersion == 0)
1657 {
1658 Enquiry2->FirmwareID.MajorVersion =
1659 Controller->V1.Enquiry.MajorFirmwareVersion;
1660 Enquiry2->FirmwareID.MinorVersion =
1661 Controller->V1.Enquiry.MinorFirmwareVersion;
1662 Enquiry2->FirmwareID.FirmwareType = '0';
1663 Enquiry2->FirmwareID.TurnID = 0;
1664 }
1665 sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1666 Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
1667 Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
1668 if (!((Controller->FirmwareVersion[0] == '5' &&
1669 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1670 (Controller->FirmwareVersion[0] == '4' &&
1671 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1672 (Controller->FirmwareVersion[0] == '3' &&
1673 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1674 (Controller->FirmwareVersion[0] == '2' &&
1675 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1676 {
1677 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1678 DAC960_Error("Firmware Version = '%s'\n", Controller,
1679 Controller->FirmwareVersion);
1680 free_dma_loaf(Controller->PCIDevice, &local_dma);
1681 return false;
1682 }
1683 /*
1684 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1685 Enclosure Management Enabled fields.
1686 */
1687 Controller->Channels = Enquiry2->ActualChannels;
1688 Controller->Targets = Enquiry2->MaxTargets;
1689 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1690 Controller->V1.SAFTE_EnclosureManagementEnabled =
1691 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1692 /*
1693 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1694 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1695 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1696 less than the Controller Queue Depth to allow for an automatic drive
1697 rebuild operation.
1698 */
1699 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1700 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1701 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1702 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1703 Controller->LogicalDriveCount =
1704 Controller->V1.Enquiry.NumberOfLogicalDrives;
1705 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1706 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1707 Controller->DriverScatterGatherLimit =
1708 Controller->ControllerScatterGatherLimit;
1709 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1710 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1711 /*
1712 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1713 */
1714 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1715 >> (10 - DAC960_BlockSizeBits);
1716 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1717 >> (10 - DAC960_BlockSizeBits);
1718 switch (Config2->DriveGeometry)
1719 {
1720 case DAC960_V1_Geometry_128_32:
1721 Controller->V1.GeometryTranslationHeads = 128;
1722 Controller->V1.GeometryTranslationSectors = 32;
1723 break;
1724 case DAC960_V1_Geometry_255_63:
1725 Controller->V1.GeometryTranslationHeads = 255;
1726 Controller->V1.GeometryTranslationSectors = 63;
1727 break;
1728 default:
1729 free_dma_loaf(Controller->PCIDevice, &local_dma);
1730 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1731 }
1732 /*
1733 Initialize the Background Initialization Status.
1734 */
1735 if ((Controller->FirmwareVersion[0] == '4' &&
1736 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1737 (Controller->FirmwareVersion[0] == '5' &&
1738 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1739 {
1740 Controller->V1.BackgroundInitializationStatusSupported = true;
1741 DAC960_V1_ExecuteType3B(Controller,
1742 DAC960_V1_BackgroundInitializationControl, 0x20,
1743 Controller->
1744 V1.BackgroundInitializationStatusDMA);
1745 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1746 Controller->V1.BackgroundInitializationStatus,
1747 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1748 }
1749 /*
1750 Initialize the Logical Drive Initially Accessible flag.
1751 */
1752 for (LogicalDriveNumber = 0;
1753 LogicalDriveNumber < Controller->LogicalDriveCount;
1754 LogicalDriveNumber++)
1755 if (Controller->V1.LogicalDriveInformation
1756 [LogicalDriveNumber].LogicalDriveState !=
1757 DAC960_V1_LogicalDrive_Offline)
1758 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1759 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1760 free_dma_loaf(Controller->PCIDevice, &local_dma);
1761 return true;
1762}
1763
1764
1765/*
1766 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1767 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1768*/
1769
1770static boolean DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1771 *Controller)
1772{
1773 DAC960_V2_ControllerInfo_T *ControllerInfo =
1774 &Controller->V2.ControllerInformation;
1775 unsigned short LogicalDeviceNumber = 0;
1776 int ModelNameLength;
1777
1778 /* Get data into dma-able area, then copy into permanant location */
1779 if (!DAC960_V2_NewControllerInfo(Controller))
1780 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1781 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1782 sizeof(DAC960_V2_ControllerInfo_T));
1783
1784
1785 if (!DAC960_V2_GeneralInfo(Controller))
1786 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1787
1788 /*
1789 Initialize the Controller Model Name and Full Model Name fields.
1790 */
1791 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1792 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1793 ModelNameLength = sizeof(Controller->ModelName)-1;
1794 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1795 ModelNameLength);
1796 ModelNameLength--;
1797 while (Controller->ModelName[ModelNameLength] == ' ' ||
1798 Controller->ModelName[ModelNameLength] == '\0')
1799 ModelNameLength--;
1800 Controller->ModelName[++ModelNameLength] = '\0';
1801 strcpy(Controller->FullModelName, "Mylex ");
1802 strcat(Controller->FullModelName, Controller->ModelName);
1803 /*
1804 Initialize the Controller Firmware Version field.
1805 */
1806 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1807 ControllerInfo->FirmwareMajorVersion,
1808 ControllerInfo->FirmwareMinorVersion,
1809 ControllerInfo->FirmwareTurnNumber);
1810 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1811 ControllerInfo->FirmwareMinorVersion == 0 &&
1812 ControllerInfo->FirmwareTurnNumber < 1)
1813 {
1814 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1815 Controller, Controller->FirmwareVersion);
1816 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1817 Controller);
1818 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1819 Controller);
1820 }
1821 /*
1822 Initialize the Controller Channels, Targets, and Memory Size.
1823 */
1824 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1825 Controller->Targets =
1826 ControllerInfo->MaximumTargetsPerChannel
1827 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1828 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1829 /*
1830 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1831 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1832 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1833 less than the Controller Queue Depth to allow for an automatic drive
1834 rebuild operation.
1835 */
1836 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1837 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1838 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1839 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1840 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1841 Controller->MaxBlocksPerCommand =
1842 ControllerInfo->MaximumDataTransferSizeInBlocks;
1843 Controller->ControllerScatterGatherLimit =
1844 ControllerInfo->MaximumScatterGatherEntries;
1845 Controller->DriverScatterGatherLimit =
1846 Controller->ControllerScatterGatherLimit;
1847 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1848 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1849 /*
1850 Initialize the Logical Device Information.
1851 */
1852 while (true)
1853 {
1854 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1855 Controller->V2.NewLogicalDeviceInformation;
1856 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1857 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1858
1859 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1860 break;
1861 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1862 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1863 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1864 Controller, LogicalDeviceNumber);
1865 break;
1866 }
1867 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1868 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1869 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1870 LogicalDeviceNumber++;
1871 continue;
1872 }
1873 PhysicalDevice.Controller = 0;
1874 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1875 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1876 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1877 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1878 PhysicalDevice;
1879 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1880 DAC960_V2_LogicalDevice_Offline)
1881 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1882 LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *)
1883 kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC);
1884 if (LogicalDeviceInfo == NULL)
1885 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1886 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1887 LogicalDeviceInfo;
1888 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1889 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1890 LogicalDeviceNumber++;
1891 }
1892 return true;
1893}
1894
1895
1896/*
1897 DAC960_ReportControllerConfiguration reports the Configuration Information
1898 for Controller.
1899*/
1900
1901static boolean DAC960_ReportControllerConfiguration(DAC960_Controller_T
1902 *Controller)
1903{
1904 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1905 Controller, Controller->ModelName);
1906 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1907 Controller, Controller->FirmwareVersion,
1908 Controller->Channels, Controller->MemorySize);
1909 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1910 Controller, Controller->Bus,
1911 Controller->Device, Controller->Function);
1912 if (Controller->IO_Address == 0)
1913 DAC960_Info("Unassigned\n", Controller);
1914 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1915 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1916 Controller, Controller->PCI_Address,
1917 (unsigned long) Controller->BaseAddress,
1918 Controller->IRQ_Channel);
1919 DAC960_Info(" Controller Queue Depth: %d, "
1920 "Maximum Blocks per Command: %d\n",
1921 Controller, Controller->ControllerQueueDepth,
1922 Controller->MaxBlocksPerCommand);
1923 DAC960_Info(" Driver Queue Depth: %d, "
1924 "Scatter/Gather Limit: %d of %d Segments\n",
1925 Controller, Controller->DriverQueueDepth,
1926 Controller->DriverScatterGatherLimit,
1927 Controller->ControllerScatterGatherLimit);
1928 if (Controller->FirmwareType == DAC960_V1_Controller)
1929 {
1930 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1931 "BIOS Geometry: %d/%d\n", Controller,
1932 Controller->V1.StripeSize,
1933 Controller->V1.SegmentSize,
1934 Controller->V1.GeometryTranslationHeads,
1935 Controller->V1.GeometryTranslationSectors);
1936 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1937 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1938 }
1939 return true;
1940}
1941
1942
1943/*
1944 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1945 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1946 Inquiry Unit Serial Number information for each device connected to
1947 Controller.
1948*/
1949
1950static boolean DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1951 *Controller)
1952{
1953 struct dma_loaf local_dma;
1954
1955 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1956 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1957
1958 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1959 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1960
1961 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1962 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1963
1964 struct completion Completions[DAC960_V1_MaxChannels];
1965 unsigned long flags;
1966 int Channel, TargetID;
1967
1968 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1969 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1970 sizeof(DAC960_SCSI_Inquiry_T) +
1971 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1972 return DAC960_Failure(Controller,
1973 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1974
1975 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1976 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1977 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1978 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1979 sizeof(DAC960_SCSI_Inquiry_T),
1980 SCSI_Inquiry_dma + Channel);
1981 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1982 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1983 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1984 }
1985
1986 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1987 {
1988 /*
1989 * For each channel, submit a probe for a device on that channel.
1990 * The timeout interval for a device that is present is 10 seconds.
1991 * With this approach, the timeout periods can elapse in parallel
1992 * on each channel.
1993 */
1994 for (Channel = 0; Channel < Controller->Channels; Channel++)
1995 {
1996 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
1997 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
1998 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
1999 DAC960_Command_T *Command = Controller->Commands[Channel];
2000 struct completion *Completion = &Completions[Channel];
2001
2002 init_completion(Completion);
2003 DAC960_V1_ClearCommand(Command);
2004 Command->CommandType = DAC960_ImmediateCommand;
2005 Command->Completion = Completion;
2006 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2007 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2008 DCDB->Channel = Channel;
2009 DCDB->TargetID = TargetID;
2010 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2011 DCDB->EarlyStatus = false;
2012 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2013 DCDB->NoAutomaticRequestSense = false;
2014 DCDB->DisconnectPermitted = true;
2015 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2016 DCDB->BusAddress = NewInquiryStandardDataDMA;
2017 DCDB->CDBLength = 6;
2018 DCDB->TransferLengthHigh4 = 0;
2019 DCDB->SenseLength = sizeof(DCDB->SenseData);
2020 DCDB->CDB[0] = 0x12; /* INQUIRY */
2021 DCDB->CDB[1] = 0; /* EVPD = 0 */
2022 DCDB->CDB[2] = 0; /* Page Code */
2023 DCDB->CDB[3] = 0; /* Reserved */
2024 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2025 DCDB->CDB[5] = 0; /* Control */
2026
2027 spin_lock_irqsave(&Controller->queue_lock, flags);
2028 DAC960_QueueCommand(Command);
2029 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2030 }
2031 /*
2032 * Wait for the problems submitted in the previous loop
2033 * to complete. On the probes that are successful,
2034 * get the serial number of the device that was found.
2035 */
2036 for (Channel = 0; Channel < Controller->Channels; Channel++)
2037 {
2038 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2039 &Controller->V1.InquiryStandardData[Channel][TargetID];
2040 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2041 dma_addr_t NewInquiryUnitSerialNumberDMA =
2042 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2043 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2044 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2045 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2046 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2047 DAC960_Command_T *Command = Controller->Commands[Channel];
2048 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2049 struct completion *Completion = &Completions[Channel];
2050
2051 wait_for_completion(Completion);
2052
2053 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2054 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2055 InquiryStandardData->PeripheralDeviceType = 0x1F;
2056 continue;
2057 } else
2058 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2059
2060 /* Preserve Channel and TargetID values from the previous loop */
2061 Command->Completion = Completion;
2062 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2063 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2064 DCDB->SenseLength = sizeof(DCDB->SenseData);
2065 DCDB->CDB[0] = 0x12; /* INQUIRY */
2066 DCDB->CDB[1] = 1; /* EVPD = 1 */
2067 DCDB->CDB[2] = 0x80; /* Page Code */
2068 DCDB->CDB[3] = 0; /* Reserved */
2069 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2070 DCDB->CDB[5] = 0; /* Control */
2071
2072 spin_lock_irqsave(&Controller->queue_lock, flags);
2073 DAC960_QueueCommand(Command);
2074 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2075 wait_for_completion(Completion);
2076
2077 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2078 memset(InquiryUnitSerialNumber, 0,
2079 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2080 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2081 } else
2082 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2083 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2084 }
2085 }
2086 free_dma_loaf(Controller->PCIDevice, &local_dma);
2087 return true;
2088}
2089
2090
2091/*
2092 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2093 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2094 Information and SCSI Inquiry Unit Serial Number information for each
2095 device connected to Controller.
2096*/
2097
2098static boolean DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
2099 *Controller)
2100{
2101 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2102 unsigned short PhysicalDeviceIndex = 0;
2103
2104 while (true)
2105 {
2106 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2107 Controller->V2.NewPhysicalDeviceInformation;
2108 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2109 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2110 Controller->V2.NewInquiryUnitSerialNumber;
2111 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2112
2113 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2114 break;
2115
2116 PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *)
2117 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
2118 if (PhysicalDeviceInfo == NULL)
2119 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2120 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2121 PhysicalDeviceInfo;
2122 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2123 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2124
2125 InquiryUnitSerialNumber = (DAC960_SCSI_Inquiry_UnitSerialNumber_T *)
2126 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
2127 if (InquiryUnitSerialNumber == NULL) {
2128 kfree(PhysicalDeviceInfo);
2129 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2130 }
2131 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2132 InquiryUnitSerialNumber;
2133
2134 Channel = NewPhysicalDeviceInfo->Channel;
2135 TargetID = NewPhysicalDeviceInfo->TargetID;
2136 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2137
2138 /*
2139 Some devices do NOT have Unit Serial Numbers.
2140 This command fails for them. But, we still want to
2141 remember those devices are there. Construct a
2142 UnitSerialNumber structure for the failure case.
2143 */
2144 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2145 memset(InquiryUnitSerialNumber, 0,
2146 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2147 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2148 } else
2149 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2150 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2151
2152 PhysicalDeviceIndex++;
2153 LogicalUnit++;
2154 }
2155 return true;
2156}
2157
2158
2159/*
2160 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2161 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2162 Unit Serial Number structures.
2163*/
2164
2165static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2166 *InquiryStandardData,
2167 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2168 *InquiryUnitSerialNumber,
2169 unsigned char *Vendor,
2170 unsigned char *Model,
2171 unsigned char *Revision,
2172 unsigned char *SerialNumber)
2173{
2174 int SerialNumberLength, i;
2175 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2176 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2177 {
2178 unsigned char VendorCharacter =
2179 InquiryStandardData->VendorIdentification[i];
2180 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2181 ? VendorCharacter : ' ');
2182 }
2183 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2184 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2185 {
2186 unsigned char ModelCharacter =
2187 InquiryStandardData->ProductIdentification[i];
2188 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2189 ? ModelCharacter : ' ');
2190 }
2191 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2192 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2193 {
2194 unsigned char RevisionCharacter =
2195 InquiryStandardData->ProductRevisionLevel[i];
2196 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2197 ? RevisionCharacter : ' ');
2198 }
2199 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2200 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2201 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2202 if (SerialNumberLength >
2203 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2204 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2205 for (i = 0; i < SerialNumberLength; i++)
2206 {
2207 unsigned char SerialNumberCharacter =
2208 InquiryUnitSerialNumber->ProductSerialNumber[i];
2209 SerialNumber[i] =
2210 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2211 ? SerialNumberCharacter : ' ');
2212 }
2213 SerialNumber[SerialNumberLength] = '\0';
2214}
2215
2216
2217/*
2218 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2219 Information for DAC960 V1 Firmware Controllers.
2220*/
2221
2222static boolean DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
2223 *Controller)
2224{
2225 int LogicalDriveNumber, Channel, TargetID;
2226 DAC960_Info(" Physical Devices:\n", Controller);
2227 for (Channel = 0; Channel < Controller->Channels; Channel++)
2228 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2229 {
2230 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2231 &Controller->V1.InquiryStandardData[Channel][TargetID];
2232 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2233 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2234 DAC960_V1_DeviceState_T *DeviceState =
2235 &Controller->V1.DeviceState[Channel][TargetID];
2236 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2237 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2238 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2239 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2240 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2241 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2242 ->ProductSerialNumber)];
2243 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2244 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2245 Vendor, Model, Revision, SerialNumber);
2246 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2247 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2248 Vendor, Model, Revision);
2249 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2250 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2251 if (DeviceState->Present &&
2252 DeviceState->DeviceType == DAC960_V1_DiskType)
2253 {
2254 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2255 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2256 Controller,
2257 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2258 ? "Dead"
2259 : DeviceState->DeviceState
2260 == DAC960_V1_Device_WriteOnly
2261 ? "Write-Only"
2262 : DeviceState->DeviceState
2263 == DAC960_V1_Device_Online
2264 ? "Online" : "Standby"),
2265 DeviceState->DiskSize,
2266 Controller->V1.DeviceResetCount[Channel][TargetID]);
2267 else
2268 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2269 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2270 ? "Dead"
2271 : DeviceState->DeviceState
2272 == DAC960_V1_Device_WriteOnly
2273 ? "Write-Only"
2274 : DeviceState->DeviceState
2275 == DAC960_V1_Device_Online
2276 ? "Online" : "Standby"),
2277 DeviceState->DiskSize);
2278 }
2279 if (ErrorEntry->ParityErrorCount > 0 ||
2280 ErrorEntry->SoftErrorCount > 0 ||
2281 ErrorEntry->HardErrorCount > 0 ||
2282 ErrorEntry->MiscErrorCount > 0)
2283 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2284 "Hard: %d, Misc: %d\n", Controller,
2285 ErrorEntry->ParityErrorCount,
2286 ErrorEntry->SoftErrorCount,
2287 ErrorEntry->HardErrorCount,
2288 ErrorEntry->MiscErrorCount);
2289 }
2290 DAC960_Info(" Logical Drives:\n", Controller);
2291 for (LogicalDriveNumber = 0;
2292 LogicalDriveNumber < Controller->LogicalDriveCount;
2293 LogicalDriveNumber++)
2294 {
2295 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2296 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2297 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2298 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2299 LogicalDriveInformation->RAIDLevel,
2300 (LogicalDriveInformation->LogicalDriveState
2301 == DAC960_V1_LogicalDrive_Online
2302 ? "Online"
2303 : LogicalDriveInformation->LogicalDriveState
2304 == DAC960_V1_LogicalDrive_Critical
2305 ? "Critical" : "Offline"),
2306 LogicalDriveInformation->LogicalDriveSize,
2307 (LogicalDriveInformation->WriteBack
2308 ? "Write Back" : "Write Thru"));
2309 }
2310 return true;
2311}
2312
2313
2314/*
2315 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2316 Information for DAC960 V2 Firmware Controllers.
2317*/
2318
2319static boolean DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
2320 *Controller)
2321{
2322 int PhysicalDeviceIndex, LogicalDriveNumber;
2323 DAC960_Info(" Physical Devices:\n", Controller);
2324 for (PhysicalDeviceIndex = 0;
2325 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2326 PhysicalDeviceIndex++)
2327 {
2328 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2329 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2330 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2331 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2332 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2333 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2334 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2335 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2336 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2337 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2338 if (PhysicalDeviceInfo == NULL) break;
2339 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2340 Vendor, Model, Revision, SerialNumber);
2341 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2342 Controller,
2343 PhysicalDeviceInfo->Channel,
2344 PhysicalDeviceInfo->TargetID,
2345 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2346 Vendor, Model, Revision);
2347 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2348 DAC960_Info(" %sAsynchronous\n", Controller,
2349 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2350 ? "Wide " :""));
2351 else
2352 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2353 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2354 ? "Wide " :""),
2355 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2356 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2357 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2358 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2359 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2360 DAC960_V2_Device_Unconfigured)
2361 continue;
2362 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2363 (PhysicalDeviceInfo->PhysicalDeviceState
2364 == DAC960_V2_Device_Online
2365 ? "Online"
2366 : PhysicalDeviceInfo->PhysicalDeviceState
2367 == DAC960_V2_Device_Rebuild
2368 ? "Rebuild"
2369 : PhysicalDeviceInfo->PhysicalDeviceState
2370 == DAC960_V2_Device_Missing
2371 ? "Missing"
2372 : PhysicalDeviceInfo->PhysicalDeviceState
2373 == DAC960_V2_Device_Critical
2374 ? "Critical"
2375 : PhysicalDeviceInfo->PhysicalDeviceState
2376 == DAC960_V2_Device_Dead
2377 ? "Dead"
2378 : PhysicalDeviceInfo->PhysicalDeviceState
2379 == DAC960_V2_Device_SuspectedDead
2380 ? "Suspected-Dead"
2381 : PhysicalDeviceInfo->PhysicalDeviceState
2382 == DAC960_V2_Device_CommandedOffline
2383 ? "Commanded-Offline"
2384 : PhysicalDeviceInfo->PhysicalDeviceState
2385 == DAC960_V2_Device_Standby
2386 ? "Standby" : "Unknown"),
2387 PhysicalDeviceInfo->ConfigurableDeviceSize);
2388 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2389 PhysicalDeviceInfo->SoftErrors == 0 &&
2390 PhysicalDeviceInfo->HardErrors == 0 &&
2391 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2392 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2393 PhysicalDeviceInfo->Retries == 0 &&
2394 PhysicalDeviceInfo->Aborts == 0 &&
2395 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2396 continue;
2397 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2398 "Hard: %d, Misc: %d\n", Controller,
2399 PhysicalDeviceInfo->ParityErrors,
2400 PhysicalDeviceInfo->SoftErrors,
2401 PhysicalDeviceInfo->HardErrors,
2402 PhysicalDeviceInfo->MiscellaneousErrors);
2403 DAC960_Info(" Timeouts: %d, Retries: %d, "
2404 "Aborts: %d, Predicted: %d\n", Controller,
2405 PhysicalDeviceInfo->CommandTimeouts,
2406 PhysicalDeviceInfo->Retries,
2407 PhysicalDeviceInfo->Aborts,
2408 PhysicalDeviceInfo->PredictedFailuresDetected);
2409 }
2410 DAC960_Info(" Logical Drives:\n", Controller);
2411 for (LogicalDriveNumber = 0;
2412 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2413 LogicalDriveNumber++)
2414 {
2415 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2416 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2417 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2418 "Read Cache Enabled",
2419 "Read Ahead Enabled",
2420 "Intelligent Read Ahead Enabled",
2421 "-", "-", "-", "-" };
2422 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2423 "Logical Device Read Only",
2424 "Write Cache Enabled",
2425 "Intelligent Write Cache Enabled",
2426 "-", "-", "-", "-" };
2427 unsigned char *GeometryTranslation;
2428 if (LogicalDeviceInfo == NULL) continue;
2429 switch (LogicalDeviceInfo->DriveGeometry)
2430 {
2431 case DAC960_V2_Geometry_128_32:
2432 GeometryTranslation = "128/32";
2433 break;
2434 case DAC960_V2_Geometry_255_63:
2435 GeometryTranslation = "255/63";
2436 break;
2437 default:
2438 GeometryTranslation = "Invalid";
2439 DAC960_Error("Illegal Logical Device Geometry %d\n",
2440 Controller, LogicalDeviceInfo->DriveGeometry);
2441 break;
2442 }
2443 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2444 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2445 LogicalDeviceInfo->RAIDLevel,
2446 (LogicalDeviceInfo->LogicalDeviceState
2447 == DAC960_V2_LogicalDevice_Online
2448 ? "Online"
2449 : LogicalDeviceInfo->LogicalDeviceState
2450 == DAC960_V2_LogicalDevice_Critical
2451 ? "Critical" : "Offline"),
2452 LogicalDeviceInfo->ConfigurableDeviceSize);
2453 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2454 Controller,
2455 (LogicalDeviceInfo->LogicalDeviceControl
2456 .LogicalDeviceInitialized
2457 ? "Initialized" : "Uninitialized"),
2458 GeometryTranslation);
2459 if (LogicalDeviceInfo->StripeSize == 0)
2460 {
2461 if (LogicalDeviceInfo->CacheLineSize == 0)
2462 DAC960_Info(" Stripe Size: N/A, "
2463 "Segment Size: N/A\n", Controller);
2464 else
2465 DAC960_Info(" Stripe Size: N/A, "
2466 "Segment Size: %dKB\n", Controller,
2467 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2468 }
2469 else
2470 {
2471 if (LogicalDeviceInfo->CacheLineSize == 0)
2472 DAC960_Info(" Stripe Size: %dKB, "
2473 "Segment Size: N/A\n", Controller,
2474 1 << (LogicalDeviceInfo->StripeSize - 2));
2475 else
2476 DAC960_Info(" Stripe Size: %dKB, "
2477 "Segment Size: %dKB\n", Controller,
2478 1 << (LogicalDeviceInfo->StripeSize - 2),
2479 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2480 }
2481 DAC960_Info(" %s, %s\n", Controller,
2482 ReadCacheStatus[
2483 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2484 WriteCacheStatus[
2485 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2486 if (LogicalDeviceInfo->SoftErrors > 0 ||
2487 LogicalDeviceInfo->CommandsFailed > 0 ||
2488 LogicalDeviceInfo->DeferredWriteErrors)
2489 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2490 "Deferred Write: %d\n", Controller,
2491 LogicalDeviceInfo->SoftErrors,
2492 LogicalDeviceInfo->CommandsFailed,
2493 LogicalDeviceInfo->DeferredWriteErrors);
2494
2495 }
2496 return true;
2497}
2498
2499/*
2500 DAC960_RegisterBlockDevice registers the Block Device structures
2501 associated with Controller.
2502*/
2503
2504static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
2505{
2506 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2507 int n;
2508
2509 /*
2510 Register the Block Device Major Number for this DAC960 Controller.
2511 */
2512 if (register_blkdev(MajorNumber, "dac960") < 0)
2513 return false;
2514
2515 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2516 struct gendisk *disk = Controller->disks[n];
2517 struct request_queue *RequestQueue;
2518
2519 /* for now, let all request queues share controller's lock */
2520 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2521 if (!RequestQueue) {
2522 printk("DAC960: failure to allocate request queue\n");
2523 continue;
2524 }
2525 Controller->RequestQueue[n] = RequestQueue;
2526 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2527 RequestQueue->queuedata = Controller;
2528 blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2529 blk_queue_max_phys_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2530 blk_queue_max_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2531 disk->queue = RequestQueue;
2532 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002533 disk->major = MajorNumber;
2534 disk->first_minor = n << DAC960_MaxPartitionsBits;
2535 disk->fops = &DAC960_BlockDeviceOperations;
2536 }
2537 /*
2538 Indicate the Block Device Registration completed successfully,
2539 */
2540 return true;
2541}
2542
2543
2544/*
2545 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2546 associated with Controller.
2547*/
2548
2549static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2550{
2551 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2552 int disk;
2553
2554 /* does order matter when deleting gendisk and cleanup in request queue? */
2555 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2556 del_gendisk(Controller->disks[disk]);
2557 blk_cleanup_queue(Controller->RequestQueue[disk]);
2558 Controller->RequestQueue[disk] = NULL;
2559 }
2560
2561 /*
2562 Unregister the Block Device Major Number for this DAC960 Controller.
2563 */
2564 unregister_blkdev(MajorNumber, "dac960");
2565}
2566
2567/*
2568 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2569 Information Partition Sector Counts and Block Sizes.
2570*/
2571
2572static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2573{
2574 int disk;
2575 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2576 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2577}
2578
2579/*
2580 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2581 the Error Status Register when the driver performs the BIOS handshaking.
2582 It returns true for fatal errors and false otherwise.
2583*/
2584
2585static boolean DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2586 unsigned char ErrorStatus,
2587 unsigned char Parameter0,
2588 unsigned char Parameter1)
2589{
2590 switch (ErrorStatus)
2591 {
2592 case 0x00:
2593 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2594 Controller, Parameter1, Parameter0);
2595 break;
2596 case 0x08:
2597 if (Controller->DriveSpinUpMessageDisplayed) break;
2598 DAC960_Notice("Spinning Up Drives\n", Controller);
2599 Controller->DriveSpinUpMessageDisplayed = true;
2600 break;
2601 case 0x30:
2602 DAC960_Notice("Configuration Checksum Error\n", Controller);
2603 break;
2604 case 0x60:
2605 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2606 break;
2607 case 0x70:
2608 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2609 break;
2610 case 0x90:
2611 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2612 Controller, Parameter1, Parameter0);
2613 break;
2614 case 0xA0:
2615 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2616 break;
2617 case 0xB0:
2618 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2619 break;
2620 case 0xD0:
2621 DAC960_Notice("New Controller Configuration Found\n", Controller);
2622 break;
2623 case 0xF0:
2624 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2625 return true;
2626 default:
2627 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2628 Controller, ErrorStatus);
2629 return true;
2630 }
2631 return false;
2632}
2633
2634
2635/*
2636 * DAC960_DetectCleanup releases the resources that were allocated
2637 * during DAC960_DetectController(). DAC960_DetectController can
2638 * has several internal failure points, so not ALL resources may
2639 * have been allocated. It's important to free only
2640 * resources that HAVE been allocated. The code below always
2641 * tests that the resource has been allocated before attempting to
2642 * free it.
2643 */
2644static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2645{
2646 int i;
2647
2648 /* Free the memory mailbox, status, and related structures */
2649 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2650 if (Controller->MemoryMappedAddress) {
2651 switch(Controller->HardwareType)
2652 {
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07002653 case DAC960_GEM_Controller:
2654 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2655 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002656 case DAC960_BA_Controller:
2657 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2658 break;
2659 case DAC960_LP_Controller:
2660 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2661 break;
2662 case DAC960_LA_Controller:
2663 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2664 break;
2665 case DAC960_PG_Controller:
2666 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2667 break;
2668 case DAC960_PD_Controller:
2669 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2670 break;
2671 case DAC960_P_Controller:
2672 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2673 break;
2674 }
2675 iounmap(Controller->MemoryMappedAddress);
2676 }
2677 if (Controller->IRQ_Channel)
2678 free_irq(Controller->IRQ_Channel, Controller);
2679 if (Controller->IO_Address)
2680 release_region(Controller->IO_Address, 0x80);
2681 pci_disable_device(Controller->PCIDevice);
2682 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2683 put_disk(Controller->disks[i]);
2684 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2685 kfree(Controller);
2686}
2687
2688
2689/*
2690 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2691 PCI RAID Controllers by interrogating the PCI Configuration Space for
2692 Controller Type.
2693*/
2694
2695static DAC960_Controller_T *
2696DAC960_DetectController(struct pci_dev *PCI_Device,
2697 const struct pci_device_id *entry)
2698{
2699 struct DAC960_privdata *privdata =
2700 (struct DAC960_privdata *)entry->driver_data;
2701 irqreturn_t (*InterruptHandler)(int, void *, struct pt_regs *) =
2702 privdata->InterruptHandler;
2703 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2704 DAC960_Controller_T *Controller = NULL;
2705 unsigned char DeviceFunction = PCI_Device->devfn;
2706 unsigned char ErrorStatus, Parameter0, Parameter1;
2707 unsigned int IRQ_Channel;
2708 void __iomem *BaseAddress;
2709 int i;
2710
Eric Sesterhenn06ff37f2006-03-08 11:21:52 +01002711 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002712 if (Controller == NULL) {
2713 DAC960_Error("Unable to allocate Controller structure for "
2714 "Controller at\n", NULL);
2715 return NULL;
2716 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002717 Controller->ControllerNumber = DAC960_ControllerCount;
2718 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2719 Controller->Bus = PCI_Device->bus->number;
2720 Controller->FirmwareType = privdata->FirmwareType;
2721 Controller->HardwareType = privdata->HardwareType;
2722 Controller->Device = DeviceFunction >> 3;
2723 Controller->Function = DeviceFunction & 0x7;
2724 Controller->PCIDevice = PCI_Device;
2725 strcpy(Controller->FullModelName, "DAC960");
2726
2727 if (pci_enable_device(PCI_Device))
2728 goto Failure;
2729
2730 switch (Controller->HardwareType)
2731 {
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07002732 case DAC960_GEM_Controller:
2733 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2734 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002735 case DAC960_BA_Controller:
2736 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2737 break;
2738 case DAC960_LP_Controller:
2739 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2740 break;
2741 case DAC960_LA_Controller:
2742 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2743 break;
2744 case DAC960_PG_Controller:
2745 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2746 break;
2747 case DAC960_PD_Controller:
2748 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2749 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2750 break;
2751 case DAC960_P_Controller:
2752 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2753 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2754 break;
2755 }
2756
2757 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2758 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2759 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2760 if (!Controller->disks[i])
2761 goto Failure;
2762 Controller->disks[i]->private_data = (void *)((long)i);
2763 }
2764 init_waitqueue_head(&Controller->CommandWaitQueue);
2765 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2766 spin_lock_init(&Controller->queue_lock);
2767 DAC960_AnnounceDriver(Controller);
2768 /*
2769 Map the Controller Register Window.
2770 */
2771 if (MemoryWindowSize < PAGE_SIZE)
2772 MemoryWindowSize = PAGE_SIZE;
2773 Controller->MemoryMappedAddress =
2774 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2775 Controller->BaseAddress =
2776 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2777 if (Controller->MemoryMappedAddress == NULL)
2778 {
2779 DAC960_Error("Unable to map Controller Register Window for "
2780 "Controller at\n", Controller);
2781 goto Failure;
2782 }
2783 BaseAddress = Controller->BaseAddress;
2784 switch (Controller->HardwareType)
2785 {
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07002786 case DAC960_GEM_Controller:
2787 DAC960_GEM_DisableInterrupts(BaseAddress);
2788 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2789 udelay(1000);
2790 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2791 {
2792 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2793 &Parameter0, &Parameter1) &&
2794 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2795 Parameter0, Parameter1))
2796 goto Failure;
2797 udelay(10);
2798 }
2799 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2800 {
2801 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2802 "for Controller at\n", Controller);
2803 goto Failure;
2804 }
2805 DAC960_GEM_EnableInterrupts(BaseAddress);
2806 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2807 Controller->ReadControllerConfiguration =
2808 DAC960_V2_ReadControllerConfiguration;
2809 Controller->ReadDeviceConfiguration =
2810 DAC960_V2_ReadDeviceConfiguration;
2811 Controller->ReportDeviceConfiguration =
2812 DAC960_V2_ReportDeviceConfiguration;
2813 Controller->QueueReadWriteCommand =
2814 DAC960_V2_QueueReadWriteCommand;
2815 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002816 case DAC960_BA_Controller:
2817 DAC960_BA_DisableInterrupts(BaseAddress);
2818 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2819 udelay(1000);
2820 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2821 {
2822 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2823 &Parameter0, &Parameter1) &&
2824 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2825 Parameter0, Parameter1))
2826 goto Failure;
2827 udelay(10);
2828 }
2829 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2830 {
2831 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2832 "for Controller at\n", Controller);
2833 goto Failure;
2834 }
2835 DAC960_BA_EnableInterrupts(BaseAddress);
2836 Controller->QueueCommand = DAC960_BA_QueueCommand;
2837 Controller->ReadControllerConfiguration =
2838 DAC960_V2_ReadControllerConfiguration;
2839 Controller->ReadDeviceConfiguration =
2840 DAC960_V2_ReadDeviceConfiguration;
2841 Controller->ReportDeviceConfiguration =
2842 DAC960_V2_ReportDeviceConfiguration;
2843 Controller->QueueReadWriteCommand =
2844 DAC960_V2_QueueReadWriteCommand;
2845 break;
2846 case DAC960_LP_Controller:
2847 DAC960_LP_DisableInterrupts(BaseAddress);
2848 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2849 udelay(1000);
2850 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2851 {
2852 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2853 &Parameter0, &Parameter1) &&
2854 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2855 Parameter0, Parameter1))
2856 goto Failure;
2857 udelay(10);
2858 }
2859 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2860 {
2861 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2862 "for Controller at\n", Controller);
2863 goto Failure;
2864 }
2865 DAC960_LP_EnableInterrupts(BaseAddress);
2866 Controller->QueueCommand = DAC960_LP_QueueCommand;
2867 Controller->ReadControllerConfiguration =
2868 DAC960_V2_ReadControllerConfiguration;
2869 Controller->ReadDeviceConfiguration =
2870 DAC960_V2_ReadDeviceConfiguration;
2871 Controller->ReportDeviceConfiguration =
2872 DAC960_V2_ReportDeviceConfiguration;
2873 Controller->QueueReadWriteCommand =
2874 DAC960_V2_QueueReadWriteCommand;
2875 break;
2876 case DAC960_LA_Controller:
2877 DAC960_LA_DisableInterrupts(BaseAddress);
2878 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2879 udelay(1000);
2880 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2881 {
2882 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2883 &Parameter0, &Parameter1) &&
2884 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2885 Parameter0, Parameter1))
2886 goto Failure;
2887 udelay(10);
2888 }
2889 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2890 {
2891 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2892 "for Controller at\n", Controller);
2893 goto Failure;
2894 }
2895 DAC960_LA_EnableInterrupts(BaseAddress);
2896 if (Controller->V1.DualModeMemoryMailboxInterface)
2897 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2898 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2899 Controller->ReadControllerConfiguration =
2900 DAC960_V1_ReadControllerConfiguration;
2901 Controller->ReadDeviceConfiguration =
2902 DAC960_V1_ReadDeviceConfiguration;
2903 Controller->ReportDeviceConfiguration =
2904 DAC960_V1_ReportDeviceConfiguration;
2905 Controller->QueueReadWriteCommand =
2906 DAC960_V1_QueueReadWriteCommand;
2907 break;
2908 case DAC960_PG_Controller:
2909 DAC960_PG_DisableInterrupts(BaseAddress);
2910 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2911 udelay(1000);
2912 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2913 {
2914 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2915 &Parameter0, &Parameter1) &&
2916 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2917 Parameter0, Parameter1))
2918 goto Failure;
2919 udelay(10);
2920 }
2921 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2922 {
2923 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2924 "for Controller at\n", Controller);
2925 goto Failure;
2926 }
2927 DAC960_PG_EnableInterrupts(BaseAddress);
2928 if (Controller->V1.DualModeMemoryMailboxInterface)
2929 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2930 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2931 Controller->ReadControllerConfiguration =
2932 DAC960_V1_ReadControllerConfiguration;
2933 Controller->ReadDeviceConfiguration =
2934 DAC960_V1_ReadDeviceConfiguration;
2935 Controller->ReportDeviceConfiguration =
2936 DAC960_V1_ReportDeviceConfiguration;
2937 Controller->QueueReadWriteCommand =
2938 DAC960_V1_QueueReadWriteCommand;
2939 break;
2940 case DAC960_PD_Controller:
2941 if (!request_region(Controller->IO_Address, 0x80,
2942 Controller->FullModelName)) {
2943 DAC960_Error("IO port 0x%d busy for Controller at\n",
2944 Controller, Controller->IO_Address);
2945 goto Failure;
2946 }
2947 DAC960_PD_DisableInterrupts(BaseAddress);
2948 DAC960_PD_AcknowledgeStatus(BaseAddress);
2949 udelay(1000);
2950 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2951 {
2952 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2953 &Parameter0, &Parameter1) &&
2954 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2955 Parameter0, Parameter1))
2956 goto Failure;
2957 udelay(10);
2958 }
2959 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2960 {
2961 DAC960_Error("Unable to allocate DMA mapped memory "
2962 "for Controller at\n", Controller);
2963 goto Failure;
2964 }
2965 DAC960_PD_EnableInterrupts(BaseAddress);
2966 Controller->QueueCommand = DAC960_PD_QueueCommand;
2967 Controller->ReadControllerConfiguration =
2968 DAC960_V1_ReadControllerConfiguration;
2969 Controller->ReadDeviceConfiguration =
2970 DAC960_V1_ReadDeviceConfiguration;
2971 Controller->ReportDeviceConfiguration =
2972 DAC960_V1_ReportDeviceConfiguration;
2973 Controller->QueueReadWriteCommand =
2974 DAC960_V1_QueueReadWriteCommand;
2975 break;
2976 case DAC960_P_Controller:
2977 if (!request_region(Controller->IO_Address, 0x80,
2978 Controller->FullModelName)){
2979 DAC960_Error("IO port 0x%d busy for Controller at\n",
2980 Controller, Controller->IO_Address);
2981 goto Failure;
2982 }
2983 DAC960_PD_DisableInterrupts(BaseAddress);
2984 DAC960_PD_AcknowledgeStatus(BaseAddress);
2985 udelay(1000);
2986 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2987 {
2988 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2989 &Parameter0, &Parameter1) &&
2990 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2991 Parameter0, Parameter1))
2992 goto Failure;
2993 udelay(10);
2994 }
2995 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2996 {
2997 DAC960_Error("Unable to allocate DMA mapped memory"
2998 "for Controller at\n", Controller);
2999 goto Failure;
3000 }
3001 DAC960_PD_EnableInterrupts(BaseAddress);
3002 Controller->QueueCommand = DAC960_P_QueueCommand;
3003 Controller->ReadControllerConfiguration =
3004 DAC960_V1_ReadControllerConfiguration;
3005 Controller->ReadDeviceConfiguration =
3006 DAC960_V1_ReadDeviceConfiguration;
3007 Controller->ReportDeviceConfiguration =
3008 DAC960_V1_ReportDeviceConfiguration;
3009 Controller->QueueReadWriteCommand =
3010 DAC960_V1_QueueReadWriteCommand;
3011 break;
3012 }
3013 /*
3014 Acquire shared access to the IRQ Channel.
3015 */
3016 IRQ_Channel = PCI_Device->irq;
Thomas Gleixner69ab3912006-07-01 19:29:32 -07003017 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003018 Controller->FullModelName, Controller) < 0)
3019 {
3020 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3021 Controller, Controller->IRQ_Channel);
3022 goto Failure;
3023 }
3024 Controller->IRQ_Channel = IRQ_Channel;
3025 Controller->InitialCommand.CommandIdentifier = 1;
3026 Controller->InitialCommand.Controller = Controller;
3027 Controller->Commands[0] = &Controller->InitialCommand;
3028 Controller->FreeCommands = &Controller->InitialCommand;
3029 return Controller;
3030
3031Failure:
3032 if (Controller->IO_Address == 0)
3033 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3034 "PCI Address 0x%X\n", Controller,
3035 Controller->Bus, Controller->Device,
3036 Controller->Function, Controller->PCI_Address);
3037 else
3038 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3039 "0x%X PCI Address 0x%X\n", Controller,
3040 Controller->Bus, Controller->Device,
3041 Controller->Function, Controller->IO_Address,
3042 Controller->PCI_Address);
3043 DAC960_DetectCleanup(Controller);
3044 DAC960_ControllerCount--;
3045 return NULL;
3046}
3047
3048/*
3049 DAC960_InitializeController initializes Controller.
3050*/
3051
3052static boolean
3053DAC960_InitializeController(DAC960_Controller_T *Controller)
3054{
3055 if (DAC960_ReadControllerConfiguration(Controller) &&
3056 DAC960_ReportControllerConfiguration(Controller) &&
3057 DAC960_CreateAuxiliaryStructures(Controller) &&
3058 DAC960_ReadDeviceConfiguration(Controller) &&
3059 DAC960_ReportDeviceConfiguration(Controller) &&
3060 DAC960_RegisterBlockDevice(Controller))
3061 {
3062 /*
3063 Initialize the Monitoring Timer.
3064 */
3065 init_timer(&Controller->MonitoringTimer);
3066 Controller->MonitoringTimer.expires =
3067 jiffies + DAC960_MonitoringTimerInterval;
3068 Controller->MonitoringTimer.data = (unsigned long) Controller;
3069 Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
3070 add_timer(&Controller->MonitoringTimer);
3071 Controller->ControllerInitialized = true;
3072 return true;
3073 }
3074 return false;
3075}
3076
3077
3078/*
3079 DAC960_FinalizeController finalizes Controller.
3080*/
3081
3082static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3083{
3084 if (Controller->ControllerInitialized)
3085 {
3086 unsigned long flags;
3087
3088 /*
3089 * Acquiring and releasing lock here eliminates
3090 * a very low probability race.
3091 *
3092 * The code below allocates controller command structures
3093 * from the free list without holding the controller lock.
3094 * This is safe assuming there is no other activity on
3095 * the controller at the time.
3096 *
3097 * But, there might be a monitoring command still
3098 * in progress. Setting the Shutdown flag while holding
3099 * the lock ensures that there is no monitoring command
3100 * in the interrupt handler currently, and any monitoring
3101 * commands that complete from this time on will NOT return
3102 * their command structure to the free list.
3103 */
3104
3105 spin_lock_irqsave(&Controller->queue_lock, flags);
3106 Controller->ShutdownMonitoringTimer = 1;
3107 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3108
3109 del_timer_sync(&Controller->MonitoringTimer);
3110 if (Controller->FirmwareType == DAC960_V1_Controller)
3111 {
3112 DAC960_Notice("Flushing Cache...", Controller);
3113 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3114 DAC960_Notice("done\n", Controller);
3115
3116 if (Controller->HardwareType == DAC960_PD_Controller)
3117 release_region(Controller->IO_Address, 0x80);
3118 }
3119 else
3120 {
3121 DAC960_Notice("Flushing Cache...", Controller);
3122 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3123 DAC960_V2_RAID_Controller);
3124 DAC960_Notice("done\n", Controller);
3125 }
3126 }
3127 DAC960_UnregisterBlockDevice(Controller);
3128 DAC960_DestroyAuxiliaryStructures(Controller);
3129 DAC960_DestroyProcEntries(Controller);
3130 DAC960_DetectCleanup(Controller);
3131}
3132
3133
3134/*
3135 DAC960_Probe verifies controller's existence and
3136 initializes the DAC960 Driver for that controller.
3137*/
3138
3139static int
3140DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3141{
3142 int disk;
3143 DAC960_Controller_T *Controller;
3144
3145 if (DAC960_ControllerCount == DAC960_MaxControllers)
3146 {
3147 DAC960_Error("More than %d DAC960 Controllers detected - "
3148 "ignoring from Controller at\n",
3149 NULL, DAC960_MaxControllers);
3150 return -ENODEV;
3151 }
3152
3153 Controller = DAC960_DetectController(dev, entry);
3154 if (!Controller)
3155 return -ENODEV;
3156
3157 if (!DAC960_InitializeController(Controller)) {
3158 DAC960_FinalizeController(Controller);
3159 return -ENODEV;
3160 }
3161
3162 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3163 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3164 add_disk(Controller->disks[disk]);
3165 }
3166 DAC960_CreateProcEntries(Controller);
3167 return 0;
3168}
3169
3170
3171/*
3172 DAC960_Finalize finalizes the DAC960 Driver.
3173*/
3174
3175static void DAC960_Remove(struct pci_dev *PCI_Device)
3176{
3177 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3178 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3179 if (Controller != NULL)
3180 DAC960_FinalizeController(Controller);
3181}
3182
3183
3184/*
3185 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3186 DAC960 V1 Firmware Controllers.
3187*/
3188
3189static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3190{
3191 DAC960_Controller_T *Controller = Command->Controller;
3192 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3193 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3194 Command->V1.ScatterGatherList;
3195 struct scatterlist *ScatterList = Command->V1.ScatterList;
3196
3197 DAC960_V1_ClearCommand(Command);
3198
3199 if (Command->SegmentCount == 1)
3200 {
3201 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3202 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3203 else
3204 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3205
3206 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3207 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3208 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3209 CommandMailbox->Type5.BusAddress =
3210 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3211 }
3212 else
3213 {
3214 int i;
3215
3216 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3217 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3218 else
3219 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3220
3221 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3222 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3223 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3224 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3225
3226 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3227
3228 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3229 ScatterGatherList->SegmentDataPointer =
3230 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3231 ScatterGatherList->SegmentByteCount =
3232 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3233 }
3234 }
3235 DAC960_QueueCommand(Command);
3236}
3237
3238
3239/*
3240 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3241 DAC960 V2 Firmware Controllers.
3242*/
3243
3244static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3245{
3246 DAC960_Controller_T *Controller = Command->Controller;
3247 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3248 struct scatterlist *ScatterList = Command->V2.ScatterList;
3249
3250 DAC960_V2_ClearCommand(Command);
3251
3252 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3253 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3254 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3255 CommandMailbox->SCSI_10.DataTransferSize =
3256 Command->BlockCount << DAC960_BlockSizeBits;
3257 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3258 CommandMailbox->SCSI_10.PhysicalDevice =
3259 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3260 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3261 CommandMailbox->SCSI_10.CDBLength = 10;
3262 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3263 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3264 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3265 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3266 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3267 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3268 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3269 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3270
3271 if (Command->SegmentCount == 1)
3272 {
3273 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3274 .ScatterGatherSegments[0]
3275 .SegmentDataPointer =
3276 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3277 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3278 .ScatterGatherSegments[0]
3279 .SegmentByteCount =
3280 CommandMailbox->SCSI_10.DataTransferSize;
3281 }
3282 else
3283 {
3284 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3285 int i;
3286
3287 if (Command->SegmentCount > 2)
3288 {
3289 ScatterGatherList = Command->V2.ScatterGatherList;
3290 CommandMailbox->SCSI_10.CommandControlBits
3291 .AdditionalScatterGatherListMemory = true;
3292 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3293 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3294 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3295 .ExtendedScatterGather.ScatterGatherList0Address =
3296 Command->V2.ScatterGatherListDMA;
3297 }
3298 else
3299 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3300 .ScatterGatherSegments;
3301
3302 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3303 ScatterGatherList->SegmentDataPointer =
3304 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3305 ScatterGatherList->SegmentByteCount =
3306 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3307 }
3308 }
3309 DAC960_QueueCommand(Command);
3310}
3311
3312
3313static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3314{
3315 struct request *Request;
3316 DAC960_Command_T *Command;
3317
3318 while(1) {
3319 Request = elv_next_request(req_q);
3320 if (!Request)
3321 return 1;
3322
3323 Command = DAC960_AllocateCommand(Controller);
3324 if (Command == NULL)
3325 return 0;
3326
3327 if (rq_data_dir(Request) == READ) {
3328 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3329 Command->CommandType = DAC960_ReadCommand;
3330 } else {
3331 Command->DmaDirection = PCI_DMA_TODEVICE;
3332 Command->CommandType = DAC960_WriteCommand;
3333 }
3334 Command->Completion = Request->waiting;
3335 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3336 Command->BlockNumber = Request->sector;
3337 Command->BlockCount = Request->nr_sectors;
3338 Command->Request = Request;
3339 blkdev_dequeue_request(Request);
3340 Command->SegmentCount = blk_rq_map_sg(req_q,
3341 Command->Request, Command->cmd_sglist);
3342 /* pci_map_sg MAY change the value of SegCount */
3343 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3344 Command->SegmentCount, Command->DmaDirection);
3345
3346 DAC960_QueueReadWriteCommand(Command);
3347 }
3348}
3349
3350/*
3351 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3352 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3353 this function should wait for a Command to become available if necessary.
3354 This function returns true if an I/O Request was queued and false otherwise.
3355*/
3356static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3357{
3358 int i;
3359
3360 if (!controller->ControllerInitialized)
3361 return;
3362
3363 /* Do this better later! */
3364 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3365 struct request_queue *req_q = controller->RequestQueue[i];
3366
3367 if (req_q == NULL)
3368 continue;
3369
3370 if (!DAC960_process_queue(controller, req_q)) {
3371 controller->req_q_index = i;
3372 return;
3373 }
3374 }
3375
3376 if (controller->req_q_index == 0)
3377 return;
3378
3379 for (i = 0; i < controller->req_q_index; i++) {
3380 struct request_queue *req_q = controller->RequestQueue[i];
3381
3382 if (req_q == NULL)
3383 continue;
3384
3385 if (!DAC960_process_queue(controller, req_q)) {
3386 controller->req_q_index = i;
3387 return;
3388 }
3389 }
3390}
3391
3392
3393/*
3394 DAC960_queue_partial_rw extracts one bio from the request already
3395 associated with argument command, and construct a new command block to retry I/O
3396 only on that bio. Queue that command to the controller.
3397
3398 This function re-uses a previously-allocated Command,
3399 there is no failure mode from trying to allocate a command.
3400*/
3401
3402static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3403{
3404 DAC960_Controller_T *Controller = Command->Controller;
3405 struct request *Request = Command->Request;
3406 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3407
3408 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3409 Command->CommandType = DAC960_ReadRetryCommand;
3410 else
3411 Command->CommandType = DAC960_WriteRetryCommand;
3412
3413 /*
3414 * We could be more efficient with these mapping requests
3415 * and map only the portions that we need. But since this
3416 * code should almost never be called, just go with a
3417 * simple coding.
3418 */
3419 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3420
3421 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3422 /*
3423 * Resubmitting the request sector at a time is really tedious.
3424 * But, this should almost never happen. So, we're willing to pay
3425 * this price so that in the end, as much of the transfer is completed
3426 * successfully as possible.
3427 */
3428 Command->SegmentCount = 1;
3429 Command->BlockNumber = Request->sector;
3430 Command->BlockCount = 1;
3431 DAC960_QueueReadWriteCommand(Command);
3432 return;
3433}
3434
3435/*
3436 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3437*/
3438
3439static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3440{
3441 DAC960_ProcessRequest(RequestQueue->queuedata);
3442}
3443
3444/*
3445 DAC960_ProcessCompletedBuffer performs completion processing for an
3446 individual Buffer.
3447*/
3448
3449static inline boolean DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3450 boolean SuccessfulIO)
3451{
3452 struct request *Request = Command->Request;
3453 int UpToDate;
3454
3455 UpToDate = 0;
3456 if (SuccessfulIO)
3457 UpToDate = 1;
3458
3459 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3460 Command->SegmentCount, Command->DmaDirection);
3461
3462 if (!end_that_request_first(Request, UpToDate, Command->BlockCount)) {
Matt Mackall62287fb2006-03-07 21:55:47 -08003463 add_disk_randomness(Request->rq_disk);
Tejun Heo8ffdc652006-01-06 09:49:03 +01003464 end_that_request_last(Request, UpToDate);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003465
3466 if (Command->Completion) {
3467 complete(Command->Completion);
3468 Command->Completion = NULL;
3469 }
3470 return true;
3471 }
3472 return false;
3473}
3474
3475/*
3476 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3477 when an error occurs on a Read or Write operation.
3478*/
3479
3480static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3481{
3482 DAC960_Controller_T *Controller = Command->Controller;
3483 unsigned char *CommandName = "UNKNOWN";
3484 switch (Command->CommandType)
3485 {
3486 case DAC960_ReadCommand:
3487 case DAC960_ReadRetryCommand:
3488 CommandName = "READ";
3489 break;
3490 case DAC960_WriteCommand:
3491 case DAC960_WriteRetryCommand:
3492 CommandName = "WRITE";
3493 break;
3494 case DAC960_MonitoringCommand:
3495 case DAC960_ImmediateCommand:
3496 case DAC960_QueuedCommand:
3497 break;
3498 }
3499 switch (Command->V1.CommandStatus)
3500 {
3501 case DAC960_V1_IrrecoverableDataError:
3502 DAC960_Error("Irrecoverable Data Error on %s:\n",
3503 Controller, CommandName);
3504 break;
3505 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3506 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3507 Controller, CommandName);
3508 break;
3509 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3510 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3511 "on %s:\n", Controller, CommandName);
3512 break;
3513 case DAC960_V1_BadDataEncountered:
3514 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3515 break;
3516 default:
3517 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3518 Controller, Command->V1.CommandStatus, CommandName);
3519 break;
3520 }
3521 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3522 Controller, Controller->ControllerNumber,
3523 Command->LogicalDriveNumber, Command->BlockNumber,
3524 Command->BlockNumber + Command->BlockCount - 1);
3525}
3526
3527
3528/*
3529 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3530 for DAC960 V1 Firmware Controllers.
3531*/
3532
3533static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3534{
3535 DAC960_Controller_T *Controller = Command->Controller;
3536 DAC960_CommandType_T CommandType = Command->CommandType;
3537 DAC960_V1_CommandOpcode_T CommandOpcode =
3538 Command->V1.CommandMailbox.Common.CommandOpcode;
3539 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3540
3541 if (CommandType == DAC960_ReadCommand ||
3542 CommandType == DAC960_WriteCommand)
3543 {
3544
3545#ifdef FORCE_RETRY_DEBUG
3546 CommandStatus = DAC960_V1_IrrecoverableDataError;
3547#endif
3548
3549 if (CommandStatus == DAC960_V1_NormalCompletion) {
3550
3551 if (!DAC960_ProcessCompletedRequest(Command, true))
3552 BUG();
3553
3554 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3555 CommandStatus == DAC960_V1_BadDataEncountered)
3556 {
3557 /*
3558 * break the command down into pieces and resubmit each
3559 * piece, hoping that some of them will succeed.
3560 */
3561 DAC960_queue_partial_rw(Command);
3562 return;
3563 }
3564 else
3565 {
3566 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3567 DAC960_V1_ReadWriteError(Command);
3568
3569 if (!DAC960_ProcessCompletedRequest(Command, false))
3570 BUG();
3571 }
3572 }
3573 else if (CommandType == DAC960_ReadRetryCommand ||
3574 CommandType == DAC960_WriteRetryCommand)
3575 {
3576 boolean normal_completion;
3577#ifdef FORCE_RETRY_FAILURE_DEBUG
3578 static int retry_count = 1;
3579#endif
3580 /*
3581 Perform completion processing for the portion that was
3582 retried, and submit the next portion, if any.
3583 */
3584 normal_completion = true;
3585 if (CommandStatus != DAC960_V1_NormalCompletion) {
3586 normal_completion = false;
3587 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3588 DAC960_V1_ReadWriteError(Command);
3589 }
3590
3591#ifdef FORCE_RETRY_FAILURE_DEBUG
3592 if (!(++retry_count % 10000)) {
3593 printk("V1 error retry failure test\n");
3594 normal_completion = false;
3595 DAC960_V1_ReadWriteError(Command);
3596 }
3597#endif
3598
3599 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3600 DAC960_queue_partial_rw(Command);
3601 return;
3602 }
3603 }
3604
3605 else if (CommandType == DAC960_MonitoringCommand)
3606 {
3607 if (Controller->ShutdownMonitoringTimer)
3608 return;
3609 if (CommandOpcode == DAC960_V1_Enquiry)
3610 {
3611 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3612 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3613 unsigned int OldCriticalLogicalDriveCount =
3614 OldEnquiry->CriticalLogicalDriveCount;
3615 unsigned int NewCriticalLogicalDriveCount =
3616 NewEnquiry->CriticalLogicalDriveCount;
3617 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3618 {
3619 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3620 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3621 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3622 "Now Exists\n", Controller,
3623 LogicalDriveNumber,
3624 Controller->ControllerNumber,
3625 LogicalDriveNumber);
3626 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3627 DAC960_ComputeGenericDiskInfo(Controller);
3628 }
3629 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3630 {
3631 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3632 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3633 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3634 "No Longer Exists\n", Controller,
3635 LogicalDriveNumber,
3636 Controller->ControllerNumber,
3637 LogicalDriveNumber);
3638 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3639 DAC960_ComputeGenericDiskInfo(Controller);
3640 }
3641 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3642 OldEnquiry->StatusFlags.DeferredWriteError)
3643 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3644 (NewEnquiry->StatusFlags.DeferredWriteError
3645 ? "TRUE" : "FALSE"));
3646 if ((NewCriticalLogicalDriveCount > 0 ||
3647 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3648 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3649 NewEnquiry->OfflineLogicalDriveCount !=
3650 OldEnquiry->OfflineLogicalDriveCount) ||
3651 (NewEnquiry->DeadDriveCount > 0 ||
3652 NewEnquiry->DeadDriveCount !=
3653 OldEnquiry->DeadDriveCount) ||
3654 (NewEnquiry->EventLogSequenceNumber !=
3655 OldEnquiry->EventLogSequenceNumber) ||
3656 Controller->MonitoringTimerCount == 0 ||
Marcelo Feitoza Parisi50297cb2006-03-28 01:56:44 -08003657 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3658 + DAC960_SecondaryMonitoringInterval))
Linus Torvalds1da177e2005-04-16 15:20:36 -07003659 {
3660 Controller->V1.NeedLogicalDriveInformation = true;
3661 Controller->V1.NewEventLogSequenceNumber =
3662 NewEnquiry->EventLogSequenceNumber;
3663 Controller->V1.NeedErrorTableInformation = true;
3664 Controller->V1.NeedDeviceStateInformation = true;
3665 Controller->V1.StartDeviceStateScan = true;
3666 Controller->V1.NeedBackgroundInitializationStatus =
3667 Controller->V1.BackgroundInitializationStatusSupported;
3668 Controller->SecondaryMonitoringTime = jiffies;
3669 }
3670 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3671 NewEnquiry->RebuildFlag
3672 == DAC960_V1_BackgroundRebuildInProgress ||
3673 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3674 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3675 {
3676 Controller->V1.NeedRebuildProgress = true;
3677 Controller->V1.RebuildProgressFirst =
3678 (NewEnquiry->CriticalLogicalDriveCount <
3679 OldEnquiry->CriticalLogicalDriveCount);
3680 }
3681 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3682 switch (NewEnquiry->RebuildFlag)
3683 {
3684 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3685 DAC960_Progress("Consistency Check Completed Successfully\n",
3686 Controller);
3687 break;
3688 case DAC960_V1_StandbyRebuildInProgress:
3689 case DAC960_V1_BackgroundRebuildInProgress:
3690 break;
3691 case DAC960_V1_BackgroundCheckInProgress:
3692 Controller->V1.NeedConsistencyCheckProgress = true;
3693 break;
3694 case DAC960_V1_StandbyRebuildCompletedWithError:
3695 DAC960_Progress("Consistency Check Completed with Error\n",
3696 Controller);
3697 break;
3698 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3699 DAC960_Progress("Consistency Check Failed - "
3700 "Physical Device Failed\n", Controller);
3701 break;
3702 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3703 DAC960_Progress("Consistency Check Failed - "
3704 "Logical Drive Failed\n", Controller);
3705 break;
3706 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3707 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3708 Controller);
3709 break;
3710 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3711 DAC960_Progress("Consistency Check Successfully Terminated\n",
3712 Controller);
3713 break;
3714 }
3715 else if (NewEnquiry->RebuildFlag
3716 == DAC960_V1_BackgroundCheckInProgress)
3717 Controller->V1.NeedConsistencyCheckProgress = true;
3718 Controller->MonitoringAlertMode =
3719 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3720 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3721 NewEnquiry->DeadDriveCount > 0);
3722 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3723 {
3724 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3725 Controller->V1.RebuildFlagPending = true;
3726 }
3727 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3728 sizeof(DAC960_V1_Enquiry_T));
3729 }
3730 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3731 {
3732 static char
3733 *DAC960_EventMessages[] =
3734 { "killed because write recovery failed",
3735 "killed because of SCSI bus reset failure",
3736 "killed because of double check condition",
3737 "killed because it was removed",
3738 "killed because of gross error on SCSI chip",
3739 "killed because of bad tag returned from drive",
3740 "killed because of timeout on SCSI command",
3741 "killed because of reset SCSI command issued from system",
3742 "killed because busy or parity error count exceeded limit",
3743 "killed because of 'kill drive' command from system",
3744 "killed because of selection timeout",
3745 "killed due to SCSI phase sequence error",
3746 "killed due to unknown status" };
3747 DAC960_V1_EventLogEntry_T *EventLogEntry =
3748 Controller->V1.EventLogEntry;
3749 if (EventLogEntry->SequenceNumber ==
3750 Controller->V1.OldEventLogSequenceNumber)
3751 {
3752 unsigned char SenseKey = EventLogEntry->SenseKey;
3753 unsigned char AdditionalSenseCode =
3754 EventLogEntry->AdditionalSenseCode;
3755 unsigned char AdditionalSenseCodeQualifier =
3756 EventLogEntry->AdditionalSenseCodeQualifier;
3757 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3758 AdditionalSenseCode == 0x80 &&
3759 AdditionalSenseCodeQualifier <
Tobias Klauser945f3902006-01-08 01:05:11 -08003760 ARRAY_SIZE(DAC960_EventMessages))
Linus Torvalds1da177e2005-04-16 15:20:36 -07003761 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3762 EventLogEntry->Channel,
3763 EventLogEntry->TargetID,
3764 DAC960_EventMessages[
3765 AdditionalSenseCodeQualifier]);
3766 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3767 AdditionalSenseCode == 0x29)
3768 {
3769 if (Controller->MonitoringTimerCount > 0)
3770 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3771 [EventLogEntry->TargetID]++;
3772 }
3773 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3774 (SenseKey == DAC960_SenseKey_NotReady &&
3775 AdditionalSenseCode == 0x04 &&
3776 (AdditionalSenseCodeQualifier == 0x01 ||
3777 AdditionalSenseCodeQualifier == 0x02))))
3778 {
3779 DAC960_Critical("Physical Device %d:%d Error Log: "
3780 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3781 Controller,
3782 EventLogEntry->Channel,
3783 EventLogEntry->TargetID,
3784 SenseKey,
3785 AdditionalSenseCode,
3786 AdditionalSenseCodeQualifier);
3787 DAC960_Critical("Physical Device %d:%d Error Log: "
3788 "Information = %02X%02X%02X%02X "
3789 "%02X%02X%02X%02X\n",
3790 Controller,
3791 EventLogEntry->Channel,
3792 EventLogEntry->TargetID,
3793 EventLogEntry->Information[0],
3794 EventLogEntry->Information[1],
3795 EventLogEntry->Information[2],
3796 EventLogEntry->Information[3],
3797 EventLogEntry->CommandSpecificInformation[0],
3798 EventLogEntry->CommandSpecificInformation[1],
3799 EventLogEntry->CommandSpecificInformation[2],
3800 EventLogEntry->CommandSpecificInformation[3]);
3801 }
3802 }
3803 Controller->V1.OldEventLogSequenceNumber++;
3804 }
3805 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3806 {
3807 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3808 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3809 int Channel, TargetID;
3810 for (Channel = 0; Channel < Controller->Channels; Channel++)
3811 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3812 {
3813 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3814 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3815 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3816 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3817 if ((NewErrorEntry->ParityErrorCount !=
3818 OldErrorEntry->ParityErrorCount) ||
3819 (NewErrorEntry->SoftErrorCount !=
3820 OldErrorEntry->SoftErrorCount) ||
3821 (NewErrorEntry->HardErrorCount !=
3822 OldErrorEntry->HardErrorCount) ||
3823 (NewErrorEntry->MiscErrorCount !=
3824 OldErrorEntry->MiscErrorCount))
3825 DAC960_Critical("Physical Device %d:%d Errors: "
3826 "Parity = %d, Soft = %d, "
3827 "Hard = %d, Misc = %d\n",
3828 Controller, Channel, TargetID,
3829 NewErrorEntry->ParityErrorCount,
3830 NewErrorEntry->SoftErrorCount,
3831 NewErrorEntry->HardErrorCount,
3832 NewErrorEntry->MiscErrorCount);
3833 }
3834 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3835 sizeof(DAC960_V1_ErrorTable_T));
3836 }
3837 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3838 {
3839 DAC960_V1_DeviceState_T *OldDeviceState =
3840 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3841 [Controller->V1.DeviceStateTargetID];
3842 DAC960_V1_DeviceState_T *NewDeviceState =
3843 Controller->V1.NewDeviceState;
3844 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3845 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3846 Controller->V1.DeviceStateChannel,
3847 Controller->V1.DeviceStateTargetID,
3848 (NewDeviceState->DeviceState
3849 == DAC960_V1_Device_Dead
3850 ? "DEAD"
3851 : NewDeviceState->DeviceState
3852 == DAC960_V1_Device_WriteOnly
3853 ? "WRITE-ONLY"
3854 : NewDeviceState->DeviceState
3855 == DAC960_V1_Device_Online
3856 ? "ONLINE" : "STANDBY"));
3857 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3858 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3859 {
3860 Controller->V1.NeedDeviceInquiryInformation = true;
3861 Controller->V1.NeedDeviceSerialNumberInformation = true;
3862 Controller->V1.DeviceResetCount
3863 [Controller->V1.DeviceStateChannel]
3864 [Controller->V1.DeviceStateTargetID] = 0;
3865 }
3866 memcpy(OldDeviceState, NewDeviceState,
3867 sizeof(DAC960_V1_DeviceState_T));
3868 }
3869 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3870 {
3871 int LogicalDriveNumber;
3872 for (LogicalDriveNumber = 0;
3873 LogicalDriveNumber < Controller->LogicalDriveCount;
3874 LogicalDriveNumber++)
3875 {
3876 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3877 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3878 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3879 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3880 if (NewLogicalDriveInformation->LogicalDriveState !=
3881 OldLogicalDriveInformation->LogicalDriveState)
3882 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3883 "is now %s\n", Controller,
3884 LogicalDriveNumber,
3885 Controller->ControllerNumber,
3886 LogicalDriveNumber,
3887 (NewLogicalDriveInformation->LogicalDriveState
3888 == DAC960_V1_LogicalDrive_Online
3889 ? "ONLINE"
3890 : NewLogicalDriveInformation->LogicalDriveState
3891 == DAC960_V1_LogicalDrive_Critical
3892 ? "CRITICAL" : "OFFLINE"));
3893 if (NewLogicalDriveInformation->WriteBack !=
3894 OldLogicalDriveInformation->WriteBack)
3895 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3896 "is now %s\n", Controller,
3897 LogicalDriveNumber,
3898 Controller->ControllerNumber,
3899 LogicalDriveNumber,
3900 (NewLogicalDriveInformation->WriteBack
3901 ? "WRITE BACK" : "WRITE THRU"));
3902 }
3903 memcpy(&Controller->V1.LogicalDriveInformation,
3904 Controller->V1.NewLogicalDriveInformation,
3905 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3906 }
3907 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3908 {
3909 unsigned int LogicalDriveNumber =
3910 Controller->V1.RebuildProgress->LogicalDriveNumber;
3911 unsigned int LogicalDriveSize =
3912 Controller->V1.RebuildProgress->LogicalDriveSize;
3913 unsigned int BlocksCompleted =
3914 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3915 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3916 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3917 CommandStatus = DAC960_V1_RebuildSuccessful;
3918 switch (CommandStatus)
3919 {
3920 case DAC960_V1_NormalCompletion:
3921 Controller->EphemeralProgressMessage = true;
3922 DAC960_Progress("Rebuild in Progress: "
3923 "Logical Drive %d (/dev/rd/c%dd%d) "
3924 "%d%% completed\n",
3925 Controller, LogicalDriveNumber,
3926 Controller->ControllerNumber,
3927 LogicalDriveNumber,
3928 (100 * (BlocksCompleted >> 7))
3929 / (LogicalDriveSize >> 7));
3930 Controller->EphemeralProgressMessage = false;
3931 break;
3932 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3933 DAC960_Progress("Rebuild Failed due to "
3934 "Logical Drive Failure\n", Controller);
3935 break;
3936 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3937 DAC960_Progress("Rebuild Failed due to "
3938 "Bad Blocks on Other Drives\n", Controller);
3939 break;
3940 case DAC960_V1_RebuildFailed_NewDriveFailed:
3941 DAC960_Progress("Rebuild Failed due to "
3942 "Failure of Drive Being Rebuilt\n", Controller);
3943 break;
3944 case DAC960_V1_NoRebuildOrCheckInProgress:
3945 break;
3946 case DAC960_V1_RebuildSuccessful:
3947 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3948 break;
3949 case DAC960_V1_RebuildSuccessfullyTerminated:
3950 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3951 break;
3952 }
3953 Controller->V1.LastRebuildStatus = CommandStatus;
3954 if (CommandType != DAC960_MonitoringCommand &&
3955 Controller->V1.RebuildStatusPending)
3956 {
3957 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3958 Controller->V1.RebuildStatusPending = false;
3959 }
3960 else if (CommandType == DAC960_MonitoringCommand &&
3961 CommandStatus != DAC960_V1_NormalCompletion &&
3962 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3963 {
3964 Controller->V1.PendingRebuildStatus = CommandStatus;
3965 Controller->V1.RebuildStatusPending = true;
3966 }
3967 }
3968 else if (CommandOpcode == DAC960_V1_RebuildStat)
3969 {
3970 unsigned int LogicalDriveNumber =
3971 Controller->V1.RebuildProgress->LogicalDriveNumber;
3972 unsigned int LogicalDriveSize =
3973 Controller->V1.RebuildProgress->LogicalDriveSize;
3974 unsigned int BlocksCompleted =
3975 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3976 if (CommandStatus == DAC960_V1_NormalCompletion)
3977 {
3978 Controller->EphemeralProgressMessage = true;
3979 DAC960_Progress("Consistency Check in Progress: "
3980 "Logical Drive %d (/dev/rd/c%dd%d) "
3981 "%d%% completed\n",
3982 Controller, LogicalDriveNumber,
3983 Controller->ControllerNumber,
3984 LogicalDriveNumber,
3985 (100 * (BlocksCompleted >> 7))
3986 / (LogicalDriveSize >> 7));
3987 Controller->EphemeralProgressMessage = false;
3988 }
3989 }
3990 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3991 {
3992 unsigned int LogicalDriveNumber =
3993 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
3994 unsigned int LogicalDriveSize =
3995 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
3996 unsigned int BlocksCompleted =
3997 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
3998 switch (CommandStatus)
3999 {
4000 case DAC960_V1_NormalCompletion:
4001 switch (Controller->V1.BackgroundInitializationStatus->Status)
4002 {
4003 case DAC960_V1_BackgroundInitializationInvalid:
4004 break;
4005 case DAC960_V1_BackgroundInitializationStarted:
4006 DAC960_Progress("Background Initialization Started\n",
4007 Controller);
4008 break;
4009 case DAC960_V1_BackgroundInitializationInProgress:
4010 if (BlocksCompleted ==
4011 Controller->V1.LastBackgroundInitializationStatus.
4012 BlocksCompleted &&
4013 LogicalDriveNumber ==
4014 Controller->V1.LastBackgroundInitializationStatus.
4015 LogicalDriveNumber)
4016 break;
4017 Controller->EphemeralProgressMessage = true;
4018 DAC960_Progress("Background Initialization in Progress: "
4019 "Logical Drive %d (/dev/rd/c%dd%d) "
4020 "%d%% completed\n",
4021 Controller, LogicalDriveNumber,
4022 Controller->ControllerNumber,
4023 LogicalDriveNumber,
4024 (100 * (BlocksCompleted >> 7))
4025 / (LogicalDriveSize >> 7));
4026 Controller->EphemeralProgressMessage = false;
4027 break;
4028 case DAC960_V1_BackgroundInitializationSuspended:
4029 DAC960_Progress("Background Initialization Suspended\n",
4030 Controller);
4031 break;
4032 case DAC960_V1_BackgroundInitializationCancelled:
4033 DAC960_Progress("Background Initialization Cancelled\n",
4034 Controller);
4035 break;
4036 }
4037 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4038 Controller->V1.BackgroundInitializationStatus,
4039 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4040 break;
4041 case DAC960_V1_BackgroundInitSuccessful:
4042 if (Controller->V1.BackgroundInitializationStatus->Status ==
4043 DAC960_V1_BackgroundInitializationInProgress)
4044 DAC960_Progress("Background Initialization "
4045 "Completed Successfully\n", Controller);
4046 Controller->V1.BackgroundInitializationStatus->Status =
4047 DAC960_V1_BackgroundInitializationInvalid;
4048 break;
4049 case DAC960_V1_BackgroundInitAborted:
4050 if (Controller->V1.BackgroundInitializationStatus->Status ==
4051 DAC960_V1_BackgroundInitializationInProgress)
4052 DAC960_Progress("Background Initialization Aborted\n",
4053 Controller);
4054 Controller->V1.BackgroundInitializationStatus->Status =
4055 DAC960_V1_BackgroundInitializationInvalid;
4056 break;
4057 case DAC960_V1_NoBackgroundInitInProgress:
4058 break;
4059 }
4060 }
4061 else if (CommandOpcode == DAC960_V1_DCDB)
4062 {
4063 /*
4064 This is a bit ugly.
4065
4066 The InquiryStandardData and
4067 the InquiryUntitSerialNumber information
4068 retrieval operations BOTH use the DAC960_V1_DCDB
4069 commands. the test above can't distinguish between
4070 these two cases.
4071
4072 Instead, we rely on the order of code later in this
4073 function to ensure that DeviceInquiryInformation commands
4074 are submitted before DeviceSerialNumber commands.
4075 */
4076 if (Controller->V1.NeedDeviceInquiryInformation)
4077 {
4078 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4079 &Controller->V1.InquiryStandardData
4080 [Controller->V1.DeviceStateChannel]
4081 [Controller->V1.DeviceStateTargetID];
4082 if (CommandStatus != DAC960_V1_NormalCompletion)
4083 {
4084 memset(InquiryStandardData, 0,
4085 sizeof(DAC960_SCSI_Inquiry_T));
4086 InquiryStandardData->PeripheralDeviceType = 0x1F;
4087 }
4088 else
4089 memcpy(InquiryStandardData,
4090 Controller->V1.NewInquiryStandardData,
4091 sizeof(DAC960_SCSI_Inquiry_T));
4092 Controller->V1.NeedDeviceInquiryInformation = false;
4093 }
4094 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4095 {
4096 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4097 &Controller->V1.InquiryUnitSerialNumber
4098 [Controller->V1.DeviceStateChannel]
4099 [Controller->V1.DeviceStateTargetID];
4100 if (CommandStatus != DAC960_V1_NormalCompletion)
4101 {
4102 memset(InquiryUnitSerialNumber, 0,
4103 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4104 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4105 }
4106 else
4107 memcpy(InquiryUnitSerialNumber,
4108 Controller->V1.NewInquiryUnitSerialNumber,
4109 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4110 Controller->V1.NeedDeviceSerialNumberInformation = false;
4111 }
4112 }
4113 /*
4114 Begin submitting new monitoring commands.
4115 */
4116 if (Controller->V1.NewEventLogSequenceNumber
4117 - Controller->V1.OldEventLogSequenceNumber > 0)
4118 {
4119 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4120 DAC960_V1_PerformEventLogOperation;
4121 Command->V1.CommandMailbox.Type3E.OperationType =
4122 DAC960_V1_GetEventLogEntry;
4123 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4124 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4125 Controller->V1.OldEventLogSequenceNumber;
4126 Command->V1.CommandMailbox.Type3E.BusAddress =
4127 Controller->V1.EventLogEntryDMA;
4128 DAC960_QueueCommand(Command);
4129 return;
4130 }
4131 if (Controller->V1.NeedErrorTableInformation)
4132 {
4133 Controller->V1.NeedErrorTableInformation = false;
4134 Command->V1.CommandMailbox.Type3.CommandOpcode =
4135 DAC960_V1_GetErrorTable;
4136 Command->V1.CommandMailbox.Type3.BusAddress =
4137 Controller->V1.NewErrorTableDMA;
4138 DAC960_QueueCommand(Command);
4139 return;
4140 }
4141 if (Controller->V1.NeedRebuildProgress &&
4142 Controller->V1.RebuildProgressFirst)
4143 {
4144 Controller->V1.NeedRebuildProgress = false;
4145 Command->V1.CommandMailbox.Type3.CommandOpcode =
4146 DAC960_V1_GetRebuildProgress;
4147 Command->V1.CommandMailbox.Type3.BusAddress =
4148 Controller->V1.RebuildProgressDMA;
4149 DAC960_QueueCommand(Command);
4150 return;
4151 }
4152 if (Controller->V1.NeedDeviceStateInformation)
4153 {
4154 if (Controller->V1.NeedDeviceInquiryInformation)
4155 {
4156 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4157 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4158
4159 dma_addr_t NewInquiryStandardDataDMA =
4160 Controller->V1.NewInquiryStandardDataDMA;
4161
4162 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4163 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4164 DCDB->Channel = Controller->V1.DeviceStateChannel;
4165 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4166 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4167 DCDB->EarlyStatus = false;
4168 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4169 DCDB->NoAutomaticRequestSense = false;
4170 DCDB->DisconnectPermitted = true;
4171 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4172 DCDB->BusAddress = NewInquiryStandardDataDMA;
4173 DCDB->CDBLength = 6;
4174 DCDB->TransferLengthHigh4 = 0;
4175 DCDB->SenseLength = sizeof(DCDB->SenseData);
4176 DCDB->CDB[0] = 0x12; /* INQUIRY */
4177 DCDB->CDB[1] = 0; /* EVPD = 0 */
4178 DCDB->CDB[2] = 0; /* Page Code */
4179 DCDB->CDB[3] = 0; /* Reserved */
4180 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4181 DCDB->CDB[5] = 0; /* Control */
4182 DAC960_QueueCommand(Command);
4183 return;
4184 }
4185 if (Controller->V1.NeedDeviceSerialNumberInformation)
4186 {
4187 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4188 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4189 dma_addr_t NewInquiryUnitSerialNumberDMA =
4190 Controller->V1.NewInquiryUnitSerialNumberDMA;
4191
4192 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4193 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4194 DCDB->Channel = Controller->V1.DeviceStateChannel;
4195 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4196 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4197 DCDB->EarlyStatus = false;
4198 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4199 DCDB->NoAutomaticRequestSense = false;
4200 DCDB->DisconnectPermitted = true;
4201 DCDB->TransferLength =
4202 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4203 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4204 DCDB->CDBLength = 6;
4205 DCDB->TransferLengthHigh4 = 0;
4206 DCDB->SenseLength = sizeof(DCDB->SenseData);
4207 DCDB->CDB[0] = 0x12; /* INQUIRY */
4208 DCDB->CDB[1] = 1; /* EVPD = 1 */
4209 DCDB->CDB[2] = 0x80; /* Page Code */
4210 DCDB->CDB[3] = 0; /* Reserved */
4211 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4212 DCDB->CDB[5] = 0; /* Control */
4213 DAC960_QueueCommand(Command);
4214 return;
4215 }
4216 if (Controller->V1.StartDeviceStateScan)
4217 {
4218 Controller->V1.DeviceStateChannel = 0;
4219 Controller->V1.DeviceStateTargetID = 0;
4220 Controller->V1.StartDeviceStateScan = false;
4221 }
4222 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4223 {
4224 Controller->V1.DeviceStateChannel++;
4225 Controller->V1.DeviceStateTargetID = 0;
4226 }
4227 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4228 {
4229 Controller->V1.NewDeviceState->DeviceState =
4230 DAC960_V1_Device_Dead;
4231 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4232 DAC960_V1_GetDeviceState;
4233 Command->V1.CommandMailbox.Type3D.Channel =
4234 Controller->V1.DeviceStateChannel;
4235 Command->V1.CommandMailbox.Type3D.TargetID =
4236 Controller->V1.DeviceStateTargetID;
4237 Command->V1.CommandMailbox.Type3D.BusAddress =
4238 Controller->V1.NewDeviceStateDMA;
4239 DAC960_QueueCommand(Command);
4240 return;
4241 }
4242 Controller->V1.NeedDeviceStateInformation = false;
4243 }
4244 if (Controller->V1.NeedLogicalDriveInformation)
4245 {
4246 Controller->V1.NeedLogicalDriveInformation = false;
4247 Command->V1.CommandMailbox.Type3.CommandOpcode =
4248 DAC960_V1_GetLogicalDriveInformation;
4249 Command->V1.CommandMailbox.Type3.BusAddress =
4250 Controller->V1.NewLogicalDriveInformationDMA;
4251 DAC960_QueueCommand(Command);
4252 return;
4253 }
4254 if (Controller->V1.NeedRebuildProgress)
4255 {
4256 Controller->V1.NeedRebuildProgress = false;
4257 Command->V1.CommandMailbox.Type3.CommandOpcode =
4258 DAC960_V1_GetRebuildProgress;
4259 Command->V1.CommandMailbox.Type3.BusAddress =
4260 Controller->V1.RebuildProgressDMA;
4261 DAC960_QueueCommand(Command);
4262 return;
4263 }
4264 if (Controller->V1.NeedConsistencyCheckProgress)
4265 {
4266 Controller->V1.NeedConsistencyCheckProgress = false;
4267 Command->V1.CommandMailbox.Type3.CommandOpcode =
4268 DAC960_V1_RebuildStat;
4269 Command->V1.CommandMailbox.Type3.BusAddress =
4270 Controller->V1.RebuildProgressDMA;
4271 DAC960_QueueCommand(Command);
4272 return;
4273 }
4274 if (Controller->V1.NeedBackgroundInitializationStatus)
4275 {
4276 Controller->V1.NeedBackgroundInitializationStatus = false;
4277 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4278 DAC960_V1_BackgroundInitializationControl;
4279 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4280 Command->V1.CommandMailbox.Type3B.BusAddress =
4281 Controller->V1.BackgroundInitializationStatusDMA;
4282 DAC960_QueueCommand(Command);
4283 return;
4284 }
4285 Controller->MonitoringTimerCount++;
4286 Controller->MonitoringTimer.expires =
4287 jiffies + DAC960_MonitoringTimerInterval;
4288 add_timer(&Controller->MonitoringTimer);
4289 }
4290 if (CommandType == DAC960_ImmediateCommand)
4291 {
4292 complete(Command->Completion);
4293 Command->Completion = NULL;
4294 return;
4295 }
4296 if (CommandType == DAC960_QueuedCommand)
4297 {
4298 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4299 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4300 Command->V1.KernelCommand = NULL;
4301 if (CommandOpcode == DAC960_V1_DCDB)
4302 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4303 [KernelCommand->DCDB->TargetID] =
4304 false;
4305 DAC960_DeallocateCommand(Command);
4306 KernelCommand->CompletionFunction(KernelCommand);
4307 return;
4308 }
4309 /*
4310 Queue a Status Monitoring Command to the Controller using the just
4311 completed Command if one was deferred previously due to lack of a
4312 free Command when the Monitoring Timer Function was called.
4313 */
4314 if (Controller->MonitoringCommandDeferred)
4315 {
4316 Controller->MonitoringCommandDeferred = false;
4317 DAC960_V1_QueueMonitoringCommand(Command);
4318 return;
4319 }
4320 /*
4321 Deallocate the Command.
4322 */
4323 DAC960_DeallocateCommand(Command);
4324 /*
4325 Wake up any processes waiting on a free Command.
4326 */
4327 wake_up(&Controller->CommandWaitQueue);
4328}
4329
4330
4331/*
4332 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4333 when an error occurs on a Read or Write operation.
4334*/
4335
4336static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4337{
4338 DAC960_Controller_T *Controller = Command->Controller;
4339 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4340 "NOT READY", "MEDIUM ERROR",
4341 "HARDWARE ERROR", "ILLEGAL REQUEST",
4342 "UNIT ATTENTION", "DATA PROTECT",
4343 "BLANK CHECK", "VENDOR-SPECIFIC",
4344 "COPY ABORTED", "ABORTED COMMAND",
4345 "EQUAL", "VOLUME OVERFLOW",
4346 "MISCOMPARE", "RESERVED" };
4347 unsigned char *CommandName = "UNKNOWN";
4348 switch (Command->CommandType)
4349 {
4350 case DAC960_ReadCommand:
4351 case DAC960_ReadRetryCommand:
4352 CommandName = "READ";
4353 break;
4354 case DAC960_WriteCommand:
4355 case DAC960_WriteRetryCommand:
4356 CommandName = "WRITE";
4357 break;
4358 case DAC960_MonitoringCommand:
4359 case DAC960_ImmediateCommand:
4360 case DAC960_QueuedCommand:
4361 break;
4362 }
4363 DAC960_Error("Error Condition %s on %s:\n", Controller,
4364 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4365 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4366 Controller, Controller->ControllerNumber,
4367 Command->LogicalDriveNumber, Command->BlockNumber,
4368 Command->BlockNumber + Command->BlockCount - 1);
4369}
4370
4371
4372/*
4373 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4374 occurs.
4375*/
4376
4377static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4378 DAC960_V2_Event_T *Event)
4379{
4380 DAC960_SCSI_RequestSense_T *RequestSense =
4381 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4382 unsigned char MessageBuffer[DAC960_LineBufferSize];
4383 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4384 { /* Physical Device Events (0x0000 - 0x007F) */
4385 { 0x0001, "P Online" },
4386 { 0x0002, "P Standby" },
4387 { 0x0005, "P Automatic Rebuild Started" },
4388 { 0x0006, "P Manual Rebuild Started" },
4389 { 0x0007, "P Rebuild Completed" },
4390 { 0x0008, "P Rebuild Cancelled" },
4391 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4392 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4393 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4394 { 0x000C, "S Offline" },
4395 { 0x000D, "P Found" },
4396 { 0x000E, "P Removed" },
4397 { 0x000F, "P Unconfigured" },
4398 { 0x0010, "P Expand Capacity Started" },
4399 { 0x0011, "P Expand Capacity Completed" },
4400 { 0x0012, "P Expand Capacity Failed" },
4401 { 0x0013, "P Command Timed Out" },
4402 { 0x0014, "P Command Aborted" },
4403 { 0x0015, "P Command Retried" },
4404 { 0x0016, "P Parity Error" },
4405 { 0x0017, "P Soft Error" },
4406 { 0x0018, "P Miscellaneous Error" },
4407 { 0x0019, "P Reset" },
4408 { 0x001A, "P Active Spare Found" },
4409 { 0x001B, "P Warm Spare Found" },
4410 { 0x001C, "S Sense Data Received" },
4411 { 0x001D, "P Initialization Started" },
4412 { 0x001E, "P Initialization Completed" },
4413 { 0x001F, "P Initialization Failed" },
4414 { 0x0020, "P Initialization Cancelled" },
4415 { 0x0021, "P Failed because Write Recovery Failed" },
4416 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4417 { 0x0023, "P Failed because of Double Check Condition" },
4418 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4419 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4420 { 0x0026, "P Failed because of Bad Tag from Device" },
4421 { 0x0027, "P Failed because of Command Timeout" },
4422 { 0x0028, "P Failed because of System Reset" },
4423 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4424 { 0x002A, "P Failed because Host Set Device to Failed State" },
4425 { 0x002B, "P Failed because of Selection Timeout" },
4426 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4427 { 0x002D, "P Failed because Device Returned Unknown Status" },
4428 { 0x002E, "P Failed because Device Not Ready" },
4429 { 0x002F, "P Failed because Device Not Found at Startup" },
4430 { 0x0030, "P Failed because COD Write Operation Failed" },
4431 { 0x0031, "P Failed because BDT Write Operation Failed" },
4432 { 0x0039, "P Missing at Startup" },
4433 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4434 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4435 { 0x003D, "P Standby Rebuild Started" },
4436 /* Logical Device Events (0x0080 - 0x00FF) */
4437 { 0x0080, "M Consistency Check Started" },
4438 { 0x0081, "M Consistency Check Completed" },
4439 { 0x0082, "M Consistency Check Cancelled" },
4440 { 0x0083, "M Consistency Check Completed With Errors" },
4441 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4442 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4443 { 0x0086, "L Offline" },
4444 { 0x0087, "L Critical" },
4445 { 0x0088, "L Online" },
4446 { 0x0089, "M Automatic Rebuild Started" },
4447 { 0x008A, "M Manual Rebuild Started" },
4448 { 0x008B, "M Rebuild Completed" },
4449 { 0x008C, "M Rebuild Cancelled" },
4450 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4451 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4452 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4453 { 0x0090, "M Initialization Started" },
4454 { 0x0091, "M Initialization Completed" },
4455 { 0x0092, "M Initialization Cancelled" },
4456 { 0x0093, "M Initialization Failed" },
4457 { 0x0094, "L Found" },
4458 { 0x0095, "L Deleted" },
4459 { 0x0096, "M Expand Capacity Started" },
4460 { 0x0097, "M Expand Capacity Completed" },
4461 { 0x0098, "M Expand Capacity Failed" },
4462 { 0x0099, "L Bad Block Found" },
4463 { 0x009A, "L Size Changed" },
4464 { 0x009B, "L Type Changed" },
4465 { 0x009C, "L Bad Data Block Found" },
4466 { 0x009E, "L Read of Data Block in BDT" },
4467 { 0x009F, "L Write Back Data for Disk Block Lost" },
4468 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4469 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4470 { 0x00A2, "L Standby Rebuild Started" },
4471 /* Fault Management Events (0x0100 - 0x017F) */
4472 { 0x0140, "E Fan %d Failed" },
4473 { 0x0141, "E Fan %d OK" },
4474 { 0x0142, "E Fan %d Not Present" },
4475 { 0x0143, "E Power Supply %d Failed" },
4476 { 0x0144, "E Power Supply %d OK" },
4477 { 0x0145, "E Power Supply %d Not Present" },
4478 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4479 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4480 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4481 { 0x0149, "E Temperature Sensor %d Not Present" },
4482 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4483 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4484 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4485 /* Controller Events (0x0180 - 0x01FF) */
4486 { 0x0181, "C Cache Write Back Error" },
4487 { 0x0188, "C Battery Backup Unit Found" },
4488 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4489 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4490 { 0x0193, "C Installation Aborted" },
4491 { 0x0195, "C Battery Backup Unit Physically Removed" },
4492 { 0x0196, "C Memory Error During Warm Boot" },
4493 { 0x019E, "C Memory Soft ECC Error Corrected" },
4494 { 0x019F, "C Memory Hard ECC Error Corrected" },
4495 { 0x01A2, "C Battery Backup Unit Failed" },
4496 { 0x01AB, "C Mirror Race Recovery Failed" },
4497 { 0x01AC, "C Mirror Race on Critical Drive" },
4498 /* Controller Internal Processor Events */
4499 { 0x0380, "C Internal Controller Hung" },
4500 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4501 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4502 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4503 { 0, "" } };
4504 int EventListIndex = 0, EventCode;
4505 unsigned char EventType, *EventMessage;
4506 if (Event->EventCode == 0x1C &&
4507 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4508 (RequestSense->AdditionalSenseCode == 0x80 ||
4509 RequestSense->AdditionalSenseCode == 0x81))
4510 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4511 RequestSense->AdditionalSenseCodeQualifier;
4512 while (true)
4513 {
4514 EventCode = EventList[EventListIndex].EventCode;
4515 if (EventCode == Event->EventCode || EventCode == 0) break;
4516 EventListIndex++;
4517 }
4518 EventType = EventList[EventListIndex].EventMessage[0];
4519 EventMessage = &EventList[EventListIndex].EventMessage[2];
4520 if (EventCode == 0)
4521 {
4522 DAC960_Critical("Unknown Controller Event Code %04X\n",
4523 Controller, Event->EventCode);
4524 return;
4525 }
4526 switch (EventType)
4527 {
4528 case 'P':
4529 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4530 Event->Channel, Event->TargetID, EventMessage);
4531 break;
4532 case 'L':
4533 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4534 Event->LogicalUnit, Controller->ControllerNumber,
4535 Event->LogicalUnit, EventMessage);
4536 break;
4537 case 'M':
4538 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4539 Event->LogicalUnit, Controller->ControllerNumber,
4540 Event->LogicalUnit, EventMessage);
4541 break;
4542 case 'S':
4543 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4544 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4545 RequestSense->AdditionalSenseCode == 0x04 &&
4546 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4547 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4548 break;
4549 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4550 Event->Channel, Event->TargetID, EventMessage);
4551 DAC960_Critical("Physical Device %d:%d Request Sense: "
4552 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4553 Controller,
4554 Event->Channel,
4555 Event->TargetID,
4556 RequestSense->SenseKey,
4557 RequestSense->AdditionalSenseCode,
4558 RequestSense->AdditionalSenseCodeQualifier);
4559 DAC960_Critical("Physical Device %d:%d Request Sense: "
4560 "Information = %02X%02X%02X%02X "
4561 "%02X%02X%02X%02X\n",
4562 Controller,
4563 Event->Channel,
4564 Event->TargetID,
4565 RequestSense->Information[0],
4566 RequestSense->Information[1],
4567 RequestSense->Information[2],
4568 RequestSense->Information[3],
4569 RequestSense->CommandSpecificInformation[0],
4570 RequestSense->CommandSpecificInformation[1],
4571 RequestSense->CommandSpecificInformation[2],
4572 RequestSense->CommandSpecificInformation[3]);
4573 break;
4574 case 'E':
4575 if (Controller->SuppressEnclosureMessages) break;
4576 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4577 DAC960_Critical("Enclosure %d %s\n", Controller,
4578 Event->TargetID, MessageBuffer);
4579 break;
4580 case 'C':
4581 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4582 break;
4583 default:
4584 DAC960_Critical("Unknown Controller Event Code %04X\n",
4585 Controller, Event->EventCode);
4586 break;
4587 }
4588}
4589
4590
4591/*
4592 DAC960_V2_ReportProgress prints an appropriate progress message for
4593 Logical Device Long Operations.
4594*/
4595
4596static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4597 unsigned char *MessageString,
4598 unsigned int LogicalDeviceNumber,
4599 unsigned long BlocksCompleted,
4600 unsigned long LogicalDeviceSize)
4601{
4602 Controller->EphemeralProgressMessage = true;
4603 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4604 "%d%% completed\n", Controller,
4605 MessageString,
4606 LogicalDeviceNumber,
4607 Controller->ControllerNumber,
4608 LogicalDeviceNumber,
4609 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4610 Controller->EphemeralProgressMessage = false;
4611}
4612
4613
4614/*
4615 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4616 for DAC960 V2 Firmware Controllers.
4617*/
4618
4619static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4620{
4621 DAC960_Controller_T *Controller = Command->Controller;
4622 DAC960_CommandType_T CommandType = Command->CommandType;
4623 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4624 DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
4625 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4626
4627 if (CommandType == DAC960_ReadCommand ||
4628 CommandType == DAC960_WriteCommand)
4629 {
4630
4631#ifdef FORCE_RETRY_DEBUG
4632 CommandStatus = DAC960_V2_AbormalCompletion;
4633#endif
4634 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4635
4636 if (CommandStatus == DAC960_V2_NormalCompletion) {
4637
4638 if (!DAC960_ProcessCompletedRequest(Command, true))
4639 BUG();
4640
4641 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4642 {
4643 /*
4644 * break the command down into pieces and resubmit each
4645 * piece, hoping that some of them will succeed.
4646 */
4647 DAC960_queue_partial_rw(Command);
4648 return;
4649 }
4650 else
4651 {
4652 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4653 DAC960_V2_ReadWriteError(Command);
4654 /*
4655 Perform completion processing for all buffers in this I/O Request.
4656 */
4657 (void)DAC960_ProcessCompletedRequest(Command, false);
4658 }
4659 }
4660 else if (CommandType == DAC960_ReadRetryCommand ||
4661 CommandType == DAC960_WriteRetryCommand)
4662 {
4663 boolean normal_completion;
4664
4665#ifdef FORCE_RETRY_FAILURE_DEBUG
4666 static int retry_count = 1;
4667#endif
4668 /*
4669 Perform completion processing for the portion that was
4670 retried, and submit the next portion, if any.
4671 */
4672 normal_completion = true;
4673 if (CommandStatus != DAC960_V2_NormalCompletion) {
4674 normal_completion = false;
4675 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4676 DAC960_V2_ReadWriteError(Command);
4677 }
4678
4679#ifdef FORCE_RETRY_FAILURE_DEBUG
4680 if (!(++retry_count % 10000)) {
4681 printk("V2 error retry failure test\n");
4682 normal_completion = false;
4683 DAC960_V2_ReadWriteError(Command);
4684 }
4685#endif
4686
4687 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4688 DAC960_queue_partial_rw(Command);
4689 return;
4690 }
4691 }
4692 else if (CommandType == DAC960_MonitoringCommand)
4693 {
4694 if (Controller->ShutdownMonitoringTimer)
4695 return;
4696 if (CommandOpcode == DAC960_V2_GetControllerInfo)
4697 {
4698 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4699 Controller->V2.NewControllerInformation;
4700 DAC960_V2_ControllerInfo_T *ControllerInfo =
4701 &Controller->V2.ControllerInformation;
4702 Controller->LogicalDriveCount =
4703 NewControllerInfo->LogicalDevicesPresent;
4704 Controller->V2.NeedLogicalDeviceInformation = true;
4705 Controller->V2.NeedPhysicalDeviceInformation = true;
4706 Controller->V2.StartLogicalDeviceInformationScan = true;
4707 Controller->V2.StartPhysicalDeviceInformationScan = true;
4708 Controller->MonitoringAlertMode =
4709 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4710 NewControllerInfo->LogicalDevicesOffline > 0 ||
4711 NewControllerInfo->PhysicalDisksCritical > 0 ||
4712 NewControllerInfo->PhysicalDisksOffline > 0);
4713 memcpy(ControllerInfo, NewControllerInfo,
4714 sizeof(DAC960_V2_ControllerInfo_T));
4715 }
4716 else if (CommandOpcode == DAC960_V2_GetEvent)
4717 {
4718 if (CommandStatus == DAC960_V2_NormalCompletion) {
4719 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4720 }
4721 Controller->V2.NextEventSequenceNumber++;
4722 }
4723 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4724 CommandStatus == DAC960_V2_NormalCompletion)
4725 {
4726 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4727 Controller->V2.NewPhysicalDeviceInformation;
4728 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4729 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4730 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4731 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4732 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4733 unsigned int DeviceIndex;
4734 while (PhysicalDeviceInfo != NULL &&
4735 (NewPhysicalDeviceInfo->Channel >
4736 PhysicalDeviceInfo->Channel ||
4737 (NewPhysicalDeviceInfo->Channel ==
4738 PhysicalDeviceInfo->Channel &&
4739 (NewPhysicalDeviceInfo->TargetID >
4740 PhysicalDeviceInfo->TargetID ||
4741 (NewPhysicalDeviceInfo->TargetID ==
4742 PhysicalDeviceInfo->TargetID &&
4743 NewPhysicalDeviceInfo->LogicalUnit >
4744 PhysicalDeviceInfo->LogicalUnit)))))
4745 {
4746 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4747 Controller,
4748 PhysicalDeviceInfo->Channel,
4749 PhysicalDeviceInfo->TargetID);
4750 Controller->V2.PhysicalDeviceInformation
4751 [PhysicalDeviceIndex] = NULL;
4752 Controller->V2.InquiryUnitSerialNumber
4753 [PhysicalDeviceIndex] = NULL;
4754 kfree(PhysicalDeviceInfo);
4755 kfree(InquiryUnitSerialNumber);
4756 for (DeviceIndex = PhysicalDeviceIndex;
4757 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4758 DeviceIndex++)
4759 {
4760 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4761 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4762 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4763 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4764 }
4765 Controller->V2.PhysicalDeviceInformation
4766 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4767 Controller->V2.InquiryUnitSerialNumber
4768 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4769 PhysicalDeviceInfo =
4770 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4771 InquiryUnitSerialNumber =
4772 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4773 }
4774 if (PhysicalDeviceInfo == NULL ||
4775 (NewPhysicalDeviceInfo->Channel !=
4776 PhysicalDeviceInfo->Channel) ||
4777 (NewPhysicalDeviceInfo->TargetID !=
4778 PhysicalDeviceInfo->TargetID) ||
4779 (NewPhysicalDeviceInfo->LogicalUnit !=
4780 PhysicalDeviceInfo->LogicalUnit))
4781 {
Jesper Juhl07fb75a2006-05-14 00:39:38 +02004782 PhysicalDeviceInfo =
Linus Torvalds1da177e2005-04-16 15:20:36 -07004783 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4784 InquiryUnitSerialNumber =
Linus Torvalds1da177e2005-04-16 15:20:36 -07004785 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4786 GFP_ATOMIC);
Jesper Juhl07fb75a2006-05-14 00:39:38 +02004787 if (InquiryUnitSerialNumber == NULL ||
4788 PhysicalDeviceInfo == NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004789 {
Jesper Juhl07fb75a2006-05-14 00:39:38 +02004790 kfree(InquiryUnitSerialNumber);
4791 InquiryUnitSerialNumber = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004792 kfree(PhysicalDeviceInfo);
4793 PhysicalDeviceInfo = NULL;
4794 }
4795 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4796 Controller,
4797 NewPhysicalDeviceInfo->Channel,
4798 NewPhysicalDeviceInfo->TargetID,
4799 (PhysicalDeviceInfo != NULL
4800 ? "" : " - Allocation Failed"));
4801 if (PhysicalDeviceInfo != NULL)
4802 {
4803 memset(PhysicalDeviceInfo, 0,
4804 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4805 PhysicalDeviceInfo->PhysicalDeviceState =
4806 DAC960_V2_Device_InvalidState;
4807 memset(InquiryUnitSerialNumber, 0,
4808 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4809 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4810 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4811 DeviceIndex > PhysicalDeviceIndex;
4812 DeviceIndex--)
4813 {
4814 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4815 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4816 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4817 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4818 }
4819 Controller->V2.PhysicalDeviceInformation
4820 [PhysicalDeviceIndex] =
4821 PhysicalDeviceInfo;
4822 Controller->V2.InquiryUnitSerialNumber
4823 [PhysicalDeviceIndex] =
4824 InquiryUnitSerialNumber;
4825 Controller->V2.NeedDeviceSerialNumberInformation = true;
4826 }
4827 }
4828 if (PhysicalDeviceInfo != NULL)
4829 {
4830 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4831 PhysicalDeviceInfo->PhysicalDeviceState)
4832 DAC960_Critical(
4833 "Physical Device %d:%d is now %s\n", Controller,
4834 NewPhysicalDeviceInfo->Channel,
4835 NewPhysicalDeviceInfo->TargetID,
4836 (NewPhysicalDeviceInfo->PhysicalDeviceState
4837 == DAC960_V2_Device_Online
4838 ? "ONLINE"
4839 : NewPhysicalDeviceInfo->PhysicalDeviceState
4840 == DAC960_V2_Device_Rebuild
4841 ? "REBUILD"
4842 : NewPhysicalDeviceInfo->PhysicalDeviceState
4843 == DAC960_V2_Device_Missing
4844 ? "MISSING"
4845 : NewPhysicalDeviceInfo->PhysicalDeviceState
4846 == DAC960_V2_Device_Critical
4847 ? "CRITICAL"
4848 : NewPhysicalDeviceInfo->PhysicalDeviceState
4849 == DAC960_V2_Device_Dead
4850 ? "DEAD"
4851 : NewPhysicalDeviceInfo->PhysicalDeviceState
4852 == DAC960_V2_Device_SuspectedDead
4853 ? "SUSPECTED-DEAD"
4854 : NewPhysicalDeviceInfo->PhysicalDeviceState
4855 == DAC960_V2_Device_CommandedOffline
4856 ? "COMMANDED-OFFLINE"
4857 : NewPhysicalDeviceInfo->PhysicalDeviceState
4858 == DAC960_V2_Device_Standby
4859 ? "STANDBY" : "UNKNOWN"));
4860 if ((NewPhysicalDeviceInfo->ParityErrors !=
4861 PhysicalDeviceInfo->ParityErrors) ||
4862 (NewPhysicalDeviceInfo->SoftErrors !=
4863 PhysicalDeviceInfo->SoftErrors) ||
4864 (NewPhysicalDeviceInfo->HardErrors !=
4865 PhysicalDeviceInfo->HardErrors) ||
4866 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4867 PhysicalDeviceInfo->MiscellaneousErrors) ||
4868 (NewPhysicalDeviceInfo->CommandTimeouts !=
4869 PhysicalDeviceInfo->CommandTimeouts) ||
4870 (NewPhysicalDeviceInfo->Retries !=
4871 PhysicalDeviceInfo->Retries) ||
4872 (NewPhysicalDeviceInfo->Aborts !=
4873 PhysicalDeviceInfo->Aborts) ||
4874 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4875 PhysicalDeviceInfo->PredictedFailuresDetected))
4876 {
4877 DAC960_Critical("Physical Device %d:%d Errors: "
4878 "Parity = %d, Soft = %d, "
4879 "Hard = %d, Misc = %d\n",
4880 Controller,
4881 NewPhysicalDeviceInfo->Channel,
4882 NewPhysicalDeviceInfo->TargetID,
4883 NewPhysicalDeviceInfo->ParityErrors,
4884 NewPhysicalDeviceInfo->SoftErrors,
4885 NewPhysicalDeviceInfo->HardErrors,
4886 NewPhysicalDeviceInfo->MiscellaneousErrors);
4887 DAC960_Critical("Physical Device %d:%d Errors: "
4888 "Timeouts = %d, Retries = %d, "
4889 "Aborts = %d, Predicted = %d\n",
4890 Controller,
4891 NewPhysicalDeviceInfo->Channel,
4892 NewPhysicalDeviceInfo->TargetID,
4893 NewPhysicalDeviceInfo->CommandTimeouts,
4894 NewPhysicalDeviceInfo->Retries,
4895 NewPhysicalDeviceInfo->Aborts,
4896 NewPhysicalDeviceInfo
4897 ->PredictedFailuresDetected);
4898 }
4899 if ((PhysicalDeviceInfo->PhysicalDeviceState
4900 == DAC960_V2_Device_Dead ||
4901 PhysicalDeviceInfo->PhysicalDeviceState
4902 == DAC960_V2_Device_InvalidState) &&
4903 NewPhysicalDeviceInfo->PhysicalDeviceState
4904 != DAC960_V2_Device_Dead)
4905 Controller->V2.NeedDeviceSerialNumberInformation = true;
4906 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4907 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4908 }
4909 NewPhysicalDeviceInfo->LogicalUnit++;
4910 Controller->V2.PhysicalDeviceIndex++;
4911 }
4912 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4913 {
4914 unsigned int DeviceIndex;
4915 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4916 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4917 DeviceIndex++)
4918 {
4919 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4920 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4921 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4922 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4923 if (PhysicalDeviceInfo == NULL) break;
4924 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4925 Controller,
4926 PhysicalDeviceInfo->Channel,
4927 PhysicalDeviceInfo->TargetID);
4928 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4929 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4930 kfree(PhysicalDeviceInfo);
4931 kfree(InquiryUnitSerialNumber);
4932 }
4933 Controller->V2.NeedPhysicalDeviceInformation = false;
4934 }
4935 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4936 CommandStatus == DAC960_V2_NormalCompletion)
4937 {
4938 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4939 Controller->V2.NewLogicalDeviceInformation;
4940 unsigned short LogicalDeviceNumber =
4941 NewLogicalDeviceInfo->LogicalDeviceNumber;
4942 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4943 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4944 if (LogicalDeviceInfo == NULL)
4945 {
4946 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4947 PhysicalDevice.Controller = 0;
4948 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4949 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4950 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4951 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4952 PhysicalDevice;
4953 LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *)
4954 kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC);
4955 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4956 LogicalDeviceInfo;
4957 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4958 "Now Exists%s\n", Controller,
4959 LogicalDeviceNumber,
4960 Controller->ControllerNumber,
4961 LogicalDeviceNumber,
4962 (LogicalDeviceInfo != NULL
4963 ? "" : " - Allocation Failed"));
4964 if (LogicalDeviceInfo != NULL)
4965 {
4966 memset(LogicalDeviceInfo, 0,
4967 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4968 DAC960_ComputeGenericDiskInfo(Controller);
4969 }
4970 }
4971 if (LogicalDeviceInfo != NULL)
4972 {
4973 unsigned long LogicalDeviceSize =
4974 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4975 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4976 LogicalDeviceInfo->LogicalDeviceState)
4977 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4978 "is now %s\n", Controller,
4979 LogicalDeviceNumber,
4980 Controller->ControllerNumber,
4981 LogicalDeviceNumber,
4982 (NewLogicalDeviceInfo->LogicalDeviceState
4983 == DAC960_V2_LogicalDevice_Online
4984 ? "ONLINE"
4985 : NewLogicalDeviceInfo->LogicalDeviceState
4986 == DAC960_V2_LogicalDevice_Critical
4987 ? "CRITICAL" : "OFFLINE"));
4988 if ((NewLogicalDeviceInfo->SoftErrors !=
4989 LogicalDeviceInfo->SoftErrors) ||
4990 (NewLogicalDeviceInfo->CommandsFailed !=
4991 LogicalDeviceInfo->CommandsFailed) ||
4992 (NewLogicalDeviceInfo->DeferredWriteErrors !=
4993 LogicalDeviceInfo->DeferredWriteErrors))
4994 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
4995 "Soft = %d, Failed = %d, Deferred Write = %d\n",
4996 Controller, LogicalDeviceNumber,
4997 Controller->ControllerNumber,
4998 LogicalDeviceNumber,
4999 NewLogicalDeviceInfo->SoftErrors,
5000 NewLogicalDeviceInfo->CommandsFailed,
5001 NewLogicalDeviceInfo->DeferredWriteErrors);
5002 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5003 DAC960_V2_ReportProgress(Controller,
5004 "Consistency Check",
5005 LogicalDeviceNumber,
5006 NewLogicalDeviceInfo
5007 ->ConsistencyCheckBlockNumber,
5008 LogicalDeviceSize);
5009 else if (NewLogicalDeviceInfo->RebuildInProgress)
5010 DAC960_V2_ReportProgress(Controller,
5011 "Rebuild",
5012 LogicalDeviceNumber,
5013 NewLogicalDeviceInfo
5014 ->RebuildBlockNumber,
5015 LogicalDeviceSize);
5016 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5017 DAC960_V2_ReportProgress(Controller,
5018 "Background Initialization",
5019 LogicalDeviceNumber,
5020 NewLogicalDeviceInfo
5021 ->BackgroundInitializationBlockNumber,
5022 LogicalDeviceSize);
5023 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5024 DAC960_V2_ReportProgress(Controller,
5025 "Foreground Initialization",
5026 LogicalDeviceNumber,
5027 NewLogicalDeviceInfo
5028 ->ForegroundInitializationBlockNumber,
5029 LogicalDeviceSize);
5030 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5031 DAC960_V2_ReportProgress(Controller,
5032 "Data Migration",
5033 LogicalDeviceNumber,
5034 NewLogicalDeviceInfo
5035 ->DataMigrationBlockNumber,
5036 LogicalDeviceSize);
5037 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5038 DAC960_V2_ReportProgress(Controller,
5039 "Patrol Operation",
5040 LogicalDeviceNumber,
5041 NewLogicalDeviceInfo
5042 ->PatrolOperationBlockNumber,
5043 LogicalDeviceSize);
5044 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5045 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5046 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5047 "Background Initialization %s\n",
5048 Controller,
5049 LogicalDeviceNumber,
5050 Controller->ControllerNumber,
5051 LogicalDeviceNumber,
5052 (NewLogicalDeviceInfo->LogicalDeviceControl
5053 .LogicalDeviceInitialized
5054 ? "Completed" : "Failed"));
5055 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5056 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5057 }
5058 Controller->V2.LogicalDriveFoundDuringScan
5059 [LogicalDeviceNumber] = true;
5060 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5061 }
5062 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5063 {
5064 int LogicalDriveNumber;
5065 for (LogicalDriveNumber = 0;
5066 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5067 LogicalDriveNumber++)
5068 {
5069 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5070 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5071 if (LogicalDeviceInfo == NULL ||
5072 Controller->V2.LogicalDriveFoundDuringScan
5073 [LogicalDriveNumber])
5074 continue;
5075 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5076 "No Longer Exists\n", Controller,
5077 LogicalDriveNumber,
5078 Controller->ControllerNumber,
5079 LogicalDriveNumber);
5080 Controller->V2.LogicalDeviceInformation
5081 [LogicalDriveNumber] = NULL;
5082 kfree(LogicalDeviceInfo);
5083 Controller->LogicalDriveInitiallyAccessible
5084 [LogicalDriveNumber] = false;
5085 DAC960_ComputeGenericDiskInfo(Controller);
5086 }
5087 Controller->V2.NeedLogicalDeviceInformation = false;
5088 }
5089 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5090 {
5091 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5092 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5093
5094 if (CommandStatus != DAC960_V2_NormalCompletion) {
5095 memset(InquiryUnitSerialNumber,
5096 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5097 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5098 } else
5099 memcpy(InquiryUnitSerialNumber,
5100 Controller->V2.NewInquiryUnitSerialNumber,
5101 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5102
5103 Controller->V2.NeedDeviceSerialNumberInformation = false;
5104 }
5105
5106 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5107 - Controller->V2.NextEventSequenceNumber > 0)
5108 {
5109 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5110 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5111 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5112 Controller->V2.NextEventSequenceNumber >> 16;
5113 CommandMailbox->GetEvent.ControllerNumber = 0;
5114 CommandMailbox->GetEvent.IOCTL_Opcode =
5115 DAC960_V2_GetEvent;
5116 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5117 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5118 CommandMailbox->GetEvent.DataTransferMemoryAddress
5119 .ScatterGatherSegments[0]
5120 .SegmentDataPointer =
5121 Controller->V2.EventDMA;
5122 CommandMailbox->GetEvent.DataTransferMemoryAddress
5123 .ScatterGatherSegments[0]
5124 .SegmentByteCount =
5125 CommandMailbox->GetEvent.DataTransferSize;
5126 DAC960_QueueCommand(Command);
5127 return;
5128 }
5129 if (Controller->V2.NeedPhysicalDeviceInformation)
5130 {
5131 if (Controller->V2.NeedDeviceSerialNumberInformation)
5132 {
5133 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5134 Controller->V2.NewInquiryUnitSerialNumber;
5135 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5136
5137 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5138 Controller->V2.NewPhysicalDeviceInformation->Channel,
5139 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5140 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5141
5142
5143 DAC960_QueueCommand(Command);
5144 return;
5145 }
5146 if (Controller->V2.StartPhysicalDeviceInformationScan)
5147 {
5148 Controller->V2.PhysicalDeviceIndex = 0;
5149 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5150 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5151 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5152 Controller->V2.StartPhysicalDeviceInformationScan = false;
5153 }
5154 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5155 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5156 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5157 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5158 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5159 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5160 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5161 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5162 Controller->V2.NewPhysicalDeviceInformation->Channel;
5163 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5164 DAC960_V2_GetPhysicalDeviceInfoValid;
5165 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5166 .ScatterGatherSegments[0]
5167 .SegmentDataPointer =
5168 Controller->V2.NewPhysicalDeviceInformationDMA;
5169 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5170 .ScatterGatherSegments[0]
5171 .SegmentByteCount =
5172 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5173 DAC960_QueueCommand(Command);
5174 return;
5175 }
5176 if (Controller->V2.NeedLogicalDeviceInformation)
5177 {
5178 if (Controller->V2.StartLogicalDeviceInformationScan)
5179 {
5180 int LogicalDriveNumber;
5181 for (LogicalDriveNumber = 0;
5182 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5183 LogicalDriveNumber++)
5184 Controller->V2.LogicalDriveFoundDuringScan
5185 [LogicalDriveNumber] = false;
5186 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5187 Controller->V2.StartLogicalDeviceInformationScan = false;
5188 }
5189 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5190 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5191 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5192 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5193 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5194 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5195 DAC960_V2_GetLogicalDeviceInfoValid;
5196 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5197 .ScatterGatherSegments[0]
5198 .SegmentDataPointer =
5199 Controller->V2.NewLogicalDeviceInformationDMA;
5200 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5201 .ScatterGatherSegments[0]
5202 .SegmentByteCount =
5203 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5204 DAC960_QueueCommand(Command);
5205 return;
5206 }
5207 Controller->MonitoringTimerCount++;
5208 Controller->MonitoringTimer.expires =
5209 jiffies + DAC960_HealthStatusMonitoringInterval;
5210 add_timer(&Controller->MonitoringTimer);
5211 }
5212 if (CommandType == DAC960_ImmediateCommand)
5213 {
5214 complete(Command->Completion);
5215 Command->Completion = NULL;
5216 return;
5217 }
5218 if (CommandType == DAC960_QueuedCommand)
5219 {
5220 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5221 KernelCommand->CommandStatus = CommandStatus;
5222 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5223 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5224 Command->V2.KernelCommand = NULL;
5225 DAC960_DeallocateCommand(Command);
5226 KernelCommand->CompletionFunction(KernelCommand);
5227 return;
5228 }
5229 /*
5230 Queue a Status Monitoring Command to the Controller using the just
5231 completed Command if one was deferred previously due to lack of a
5232 free Command when the Monitoring Timer Function was called.
5233 */
5234 if (Controller->MonitoringCommandDeferred)
5235 {
5236 Controller->MonitoringCommandDeferred = false;
5237 DAC960_V2_QueueMonitoringCommand(Command);
5238 return;
5239 }
5240 /*
5241 Deallocate the Command.
5242 */
5243 DAC960_DeallocateCommand(Command);
5244 /*
5245 Wake up any processes waiting on a free Command.
5246 */
5247 wake_up(&Controller->CommandWaitQueue);
5248}
5249
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07005250/*
5251 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5252 Controllers.
5253*/
5254
5255static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
5256 void *DeviceIdentifier,
5257 struct pt_regs *InterruptRegisters)
5258{
5259 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5260 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5261 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5262 unsigned long flags;
5263
5264 spin_lock_irqsave(&Controller->queue_lock, flags);
5265 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5266 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5267 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5268 {
5269 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5270 NextStatusMailbox->Fields.CommandIdentifier;
5271 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5272 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5273 Command->V2.RequestSenseLength =
5274 NextStatusMailbox->Fields.RequestSenseLength;
5275 Command->V2.DataTransferResidue =
5276 NextStatusMailbox->Fields.DataTransferResidue;
5277 NextStatusMailbox->Words[0] = 0;
5278 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5279 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5280 DAC960_V2_ProcessCompletedCommand(Command);
5281 }
5282 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5283 /*
5284 Attempt to remove additional I/O Requests from the Controller's
5285 I/O Request Queue and queue them to the Controller.
5286 */
5287 DAC960_ProcessRequest(Controller);
5288 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5289 return IRQ_HANDLED;
5290}
Linus Torvalds1da177e2005-04-16 15:20:36 -07005291
5292/*
5293 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5294 Controllers.
5295*/
5296
5297static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
5298 void *DeviceIdentifier,
5299 struct pt_regs *InterruptRegisters)
5300{
5301 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5302 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5303 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5304 unsigned long flags;
5305
5306 spin_lock_irqsave(&Controller->queue_lock, flags);
5307 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5308 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5309 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5310 {
5311 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5312 NextStatusMailbox->Fields.CommandIdentifier;
5313 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5314 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5315 Command->V2.RequestSenseLength =
5316 NextStatusMailbox->Fields.RequestSenseLength;
5317 Command->V2.DataTransferResidue =
5318 NextStatusMailbox->Fields.DataTransferResidue;
5319 NextStatusMailbox->Words[0] = 0;
5320 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5321 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5322 DAC960_V2_ProcessCompletedCommand(Command);
5323 }
5324 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5325 /*
5326 Attempt to remove additional I/O Requests from the Controller's
5327 I/O Request Queue and queue them to the Controller.
5328 */
5329 DAC960_ProcessRequest(Controller);
5330 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5331 return IRQ_HANDLED;
5332}
5333
5334
5335/*
5336 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5337 Controllers.
5338*/
5339
5340static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
5341 void *DeviceIdentifier,
5342 struct pt_regs *InterruptRegisters)
5343{
5344 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5345 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5346 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5347 unsigned long flags;
5348
5349 spin_lock_irqsave(&Controller->queue_lock, flags);
5350 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5351 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5352 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5353 {
5354 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5355 NextStatusMailbox->Fields.CommandIdentifier;
5356 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5357 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5358 Command->V2.RequestSenseLength =
5359 NextStatusMailbox->Fields.RequestSenseLength;
5360 Command->V2.DataTransferResidue =
5361 NextStatusMailbox->Fields.DataTransferResidue;
5362 NextStatusMailbox->Words[0] = 0;
5363 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5364 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5365 DAC960_V2_ProcessCompletedCommand(Command);
5366 }
5367 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5368 /*
5369 Attempt to remove additional I/O Requests from the Controller's
5370 I/O Request Queue and queue them to the Controller.
5371 */
5372 DAC960_ProcessRequest(Controller);
5373 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5374 return IRQ_HANDLED;
5375}
5376
5377
5378/*
5379 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5380 Controllers.
5381*/
5382
5383static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
5384 void *DeviceIdentifier,
5385 struct pt_regs *InterruptRegisters)
5386{
5387 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5388 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5389 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5390 unsigned long flags;
5391
5392 spin_lock_irqsave(&Controller->queue_lock, flags);
5393 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5394 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5395 while (NextStatusMailbox->Fields.Valid)
5396 {
5397 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5398 NextStatusMailbox->Fields.CommandIdentifier;
5399 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5400 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5401 NextStatusMailbox->Word = 0;
5402 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5403 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5404 DAC960_V1_ProcessCompletedCommand(Command);
5405 }
5406 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5407 /*
5408 Attempt to remove additional I/O Requests from the Controller's
5409 I/O Request Queue and queue them to the Controller.
5410 */
5411 DAC960_ProcessRequest(Controller);
5412 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5413 return IRQ_HANDLED;
5414}
5415
5416
5417/*
5418 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5419 Controllers.
5420*/
5421
5422static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
5423 void *DeviceIdentifier,
5424 struct pt_regs *InterruptRegisters)
5425{
5426 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5427 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5428 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5429 unsigned long flags;
5430
5431 spin_lock_irqsave(&Controller->queue_lock, flags);
5432 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5433 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5434 while (NextStatusMailbox->Fields.Valid)
5435 {
5436 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5437 NextStatusMailbox->Fields.CommandIdentifier;
5438 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5439 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5440 NextStatusMailbox->Word = 0;
5441 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5442 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5443 DAC960_V1_ProcessCompletedCommand(Command);
5444 }
5445 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5446 /*
5447 Attempt to remove additional I/O Requests from the Controller's
5448 I/O Request Queue and queue them to the Controller.
5449 */
5450 DAC960_ProcessRequest(Controller);
5451 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5452 return IRQ_HANDLED;
5453}
5454
5455
5456/*
5457 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5458 Controllers.
5459*/
5460
5461static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
5462 void *DeviceIdentifier,
5463 struct pt_regs *InterruptRegisters)
5464{
5465 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5466 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5467 unsigned long flags;
5468
5469 spin_lock_irqsave(&Controller->queue_lock, flags);
5470 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5471 {
5472 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5473 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5474 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5475 Command->V1.CommandStatus =
5476 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5477 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5478 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5479 DAC960_V1_ProcessCompletedCommand(Command);
5480 }
5481 /*
5482 Attempt to remove additional I/O Requests from the Controller's
5483 I/O Request Queue and queue them to the Controller.
5484 */
5485 DAC960_ProcessRequest(Controller);
5486 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5487 return IRQ_HANDLED;
5488}
5489
5490
5491/*
5492 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5493 Controllers.
5494
5495 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5496 on the data having been placed into DAC960_Controller_T, rather than
5497 an arbitrary buffer.
5498*/
5499
5500static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
5501 void *DeviceIdentifier,
5502 struct pt_regs *InterruptRegisters)
5503{
5504 DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
5505 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5506 unsigned long flags;
5507
5508 spin_lock_irqsave(&Controller->queue_lock, flags);
5509 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5510 {
5511 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5512 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5513 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5514 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5515 DAC960_V1_CommandOpcode_T CommandOpcode =
5516 CommandMailbox->Common.CommandOpcode;
5517 Command->V1.CommandStatus =
5518 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5519 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5520 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5521 switch (CommandOpcode)
5522 {
5523 case DAC960_V1_Enquiry_Old:
5524 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5525 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5526 break;
5527 case DAC960_V1_GetDeviceState_Old:
5528 Command->V1.CommandMailbox.Common.CommandOpcode =
5529 DAC960_V1_GetDeviceState;
5530 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5531 break;
5532 case DAC960_V1_Read_Old:
5533 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5534 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5535 break;
5536 case DAC960_V1_Write_Old:
5537 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5538 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5539 break;
5540 case DAC960_V1_ReadWithScatterGather_Old:
5541 Command->V1.CommandMailbox.Common.CommandOpcode =
5542 DAC960_V1_ReadWithScatterGather;
5543 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5544 break;
5545 case DAC960_V1_WriteWithScatterGather_Old:
5546 Command->V1.CommandMailbox.Common.CommandOpcode =
5547 DAC960_V1_WriteWithScatterGather;
5548 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5549 break;
5550 default:
5551 break;
5552 }
5553 DAC960_V1_ProcessCompletedCommand(Command);
5554 }
5555 /*
5556 Attempt to remove additional I/O Requests from the Controller's
5557 I/O Request Queue and queue them to the Controller.
5558 */
5559 DAC960_ProcessRequest(Controller);
5560 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5561 return IRQ_HANDLED;
5562}
5563
5564
5565/*
5566 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5567 Firmware Controllers.
5568*/
5569
5570static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5571{
5572 DAC960_Controller_T *Controller = Command->Controller;
5573 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5574 DAC960_V1_ClearCommand(Command);
5575 Command->CommandType = DAC960_MonitoringCommand;
5576 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5577 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5578 DAC960_QueueCommand(Command);
5579}
5580
5581
5582/*
5583 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5584 Firmware Controllers.
5585*/
5586
5587static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5588{
5589 DAC960_Controller_T *Controller = Command->Controller;
5590 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5591 DAC960_V2_ClearCommand(Command);
5592 Command->CommandType = DAC960_MonitoringCommand;
5593 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5594 CommandMailbox->ControllerInfo.CommandControlBits
5595 .DataTransferControllerToHost = true;
5596 CommandMailbox->ControllerInfo.CommandControlBits
5597 .NoAutoRequestSense = true;
5598 CommandMailbox->ControllerInfo.DataTransferSize =
5599 sizeof(DAC960_V2_ControllerInfo_T);
5600 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5601 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5602 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5603 .ScatterGatherSegments[0]
5604 .SegmentDataPointer =
5605 Controller->V2.NewControllerInformationDMA;
5606 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5607 .ScatterGatherSegments[0]
5608 .SegmentByteCount =
5609 CommandMailbox->ControllerInfo.DataTransferSize;
5610 DAC960_QueueCommand(Command);
5611}
5612
5613
5614/*
5615 DAC960_MonitoringTimerFunction is the timer function for monitoring
5616 the status of DAC960 Controllers.
5617*/
5618
5619static void DAC960_MonitoringTimerFunction(unsigned long TimerData)
5620{
5621 DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData;
5622 DAC960_Command_T *Command;
5623 unsigned long flags;
5624
5625 if (Controller->FirmwareType == DAC960_V1_Controller)
5626 {
5627 spin_lock_irqsave(&Controller->queue_lock, flags);
5628 /*
5629 Queue a Status Monitoring Command to Controller.
5630 */
5631 Command = DAC960_AllocateCommand(Controller);
5632 if (Command != NULL)
5633 DAC960_V1_QueueMonitoringCommand(Command);
5634 else Controller->MonitoringCommandDeferred = true;
5635 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5636 }
5637 else
5638 {
5639 DAC960_V2_ControllerInfo_T *ControllerInfo =
5640 &Controller->V2.ControllerInformation;
5641 unsigned int StatusChangeCounter =
5642 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
5643 boolean ForceMonitoringCommand = false;
Marcelo Feitoza Parisi50297cb2006-03-28 01:56:44 -08005644 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5645 + DAC960_SecondaryMonitoringInterval))
Linus Torvalds1da177e2005-04-16 15:20:36 -07005646 {
5647 int LogicalDriveNumber;
5648 for (LogicalDriveNumber = 0;
5649 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5650 LogicalDriveNumber++)
5651 {
5652 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5653 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5654 if (LogicalDeviceInfo == NULL) continue;
5655 if (!LogicalDeviceInfo->LogicalDeviceControl
5656 .LogicalDeviceInitialized)
5657 {
5658 ForceMonitoringCommand = true;
5659 break;
5660 }
5661 }
5662 Controller->SecondaryMonitoringTime = jiffies;
5663 }
5664 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5665 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5666 == Controller->V2.NextEventSequenceNumber &&
5667 (ControllerInfo->BackgroundInitializationsActive +
5668 ControllerInfo->LogicalDeviceInitializationsActive +
5669 ControllerInfo->PhysicalDeviceInitializationsActive +
5670 ControllerInfo->ConsistencyChecksActive +
5671 ControllerInfo->RebuildsActive +
5672 ControllerInfo->OnlineExpansionsActive == 0 ||
Marcelo Feitoza Parisi50297cb2006-03-28 01:56:44 -08005673 time_before(jiffies, Controller->PrimaryMonitoringTime
5674 + DAC960_MonitoringTimerInterval)) &&
Linus Torvalds1da177e2005-04-16 15:20:36 -07005675 !ForceMonitoringCommand)
5676 {
5677 Controller->MonitoringTimer.expires =
5678 jiffies + DAC960_HealthStatusMonitoringInterval;
5679 add_timer(&Controller->MonitoringTimer);
5680 return;
5681 }
5682 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5683 Controller->PrimaryMonitoringTime = jiffies;
5684
5685 spin_lock_irqsave(&Controller->queue_lock, flags);
5686 /*
5687 Queue a Status Monitoring Command to Controller.
5688 */
5689 Command = DAC960_AllocateCommand(Controller);
5690 if (Command != NULL)
5691 DAC960_V2_QueueMonitoringCommand(Command);
5692 else Controller->MonitoringCommandDeferred = true;
5693 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5694 /*
5695 Wake up any processes waiting on a Health Status Buffer change.
5696 */
5697 wake_up(&Controller->HealthStatusWaitQueue);
5698 }
5699}
5700
5701/*
5702 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5703 additional bytes in the Combined Status Buffer and grows the buffer if
5704 necessary. It returns true if there is enough room and false otherwise.
5705*/
5706
5707static boolean DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
5708 unsigned int ByteCount)
5709{
5710 unsigned char *NewStatusBuffer;
5711 if (Controller->InitialStatusLength + 1 +
5712 Controller->CurrentStatusLength + ByteCount + 1 <=
5713 Controller->CombinedStatusBufferLength)
5714 return true;
5715 if (Controller->CombinedStatusBufferLength == 0)
5716 {
5717 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5718 while (NewStatusBufferLength < ByteCount)
5719 NewStatusBufferLength *= 2;
5720 Controller->CombinedStatusBuffer =
5721 (unsigned char *) kmalloc(NewStatusBufferLength, GFP_ATOMIC);
5722 if (Controller->CombinedStatusBuffer == NULL) return false;
5723 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5724 return true;
5725 }
5726 NewStatusBuffer = (unsigned char *)
5727 kmalloc(2 * Controller->CombinedStatusBufferLength, GFP_ATOMIC);
5728 if (NewStatusBuffer == NULL)
5729 {
5730 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5731 Controller);
5732 return false;
5733 }
5734 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5735 Controller->CombinedStatusBufferLength);
5736 kfree(Controller->CombinedStatusBuffer);
5737 Controller->CombinedStatusBuffer = NewStatusBuffer;
5738 Controller->CombinedStatusBufferLength *= 2;
5739 Controller->CurrentStatusBuffer =
5740 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5741 return true;
5742}
5743
5744
5745/*
5746 DAC960_Message prints Driver Messages.
5747*/
5748
5749static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5750 unsigned char *Format,
5751 DAC960_Controller_T *Controller,
5752 ...)
5753{
5754 static unsigned char Buffer[DAC960_LineBufferSize];
5755 static boolean BeginningOfLine = true;
5756 va_list Arguments;
5757 int Length = 0;
5758 va_start(Arguments, Controller);
5759 Length = vsprintf(Buffer, Format, Arguments);
5760 va_end(Arguments);
5761 if (Controller == NULL)
5762 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5763 DAC960_ControllerCount, Buffer);
5764 else if (MessageLevel == DAC960_AnnounceLevel ||
5765 MessageLevel == DAC960_InfoLevel)
5766 {
5767 if (!Controller->ControllerInitialized)
5768 {
5769 if (DAC960_CheckStatusBuffer(Controller, Length))
5770 {
5771 strcpy(&Controller->CombinedStatusBuffer
5772 [Controller->InitialStatusLength],
5773 Buffer);
5774 Controller->InitialStatusLength += Length;
5775 Controller->CurrentStatusBuffer =
5776 &Controller->CombinedStatusBuffer
5777 [Controller->InitialStatusLength + 1];
5778 }
5779 if (MessageLevel == DAC960_AnnounceLevel)
5780 {
5781 static int AnnouncementLines = 0;
5782 if (++AnnouncementLines <= 2)
5783 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5784 Buffer);
5785 }
5786 else
5787 {
5788 if (BeginningOfLine)
5789 {
5790 if (Buffer[0] != '\n' || Length > 1)
5791 printk("%sDAC960#%d: %s",
5792 DAC960_MessageLevelMap[MessageLevel],
5793 Controller->ControllerNumber, Buffer);
5794 }
5795 else printk("%s", Buffer);
5796 }
5797 }
5798 else if (DAC960_CheckStatusBuffer(Controller, Length))
5799 {
5800 strcpy(&Controller->CurrentStatusBuffer[
5801 Controller->CurrentStatusLength], Buffer);
5802 Controller->CurrentStatusLength += Length;
5803 }
5804 }
5805 else if (MessageLevel == DAC960_ProgressLevel)
5806 {
5807 strcpy(Controller->ProgressBuffer, Buffer);
5808 Controller->ProgressBufferLength = Length;
5809 if (Controller->EphemeralProgressMessage)
5810 {
Marcelo Feitoza Parisi50297cb2006-03-28 01:56:44 -08005811 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5812 + DAC960_ProgressReportingInterval))
Linus Torvalds1da177e2005-04-16 15:20:36 -07005813 {
5814 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5815 Controller->ControllerNumber, Buffer);
5816 Controller->LastProgressReportTime = jiffies;
5817 }
5818 }
5819 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5820 Controller->ControllerNumber, Buffer);
5821 }
5822 else if (MessageLevel == DAC960_UserCriticalLevel)
5823 {
5824 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5825 Buffer);
5826 Controller->UserStatusLength += Length;
5827 if (Buffer[0] != '\n' || Length > 1)
5828 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5829 Controller->ControllerNumber, Buffer);
5830 }
5831 else
5832 {
5833 if (BeginningOfLine)
5834 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5835 Controller->ControllerNumber, Buffer);
5836 else printk("%s", Buffer);
5837 }
5838 BeginningOfLine = (Buffer[Length-1] == '\n');
5839}
5840
5841
5842/*
5843 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5844 Channel:TargetID specification from a User Command string. It updates
5845 Channel and TargetID and returns true on success and false on failure.
5846*/
5847
5848static boolean DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
5849 char *UserCommandString,
5850 unsigned char *Channel,
5851 unsigned char *TargetID)
5852{
5853 char *NewUserCommandString = UserCommandString;
5854 unsigned long XChannel, XTargetID;
5855 while (*UserCommandString == ' ') UserCommandString++;
5856 if (UserCommandString == NewUserCommandString)
5857 return false;
5858 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5859 if (NewUserCommandString == UserCommandString ||
5860 *NewUserCommandString != ':' ||
5861 XChannel >= Controller->Channels)
5862 return false;
5863 UserCommandString = ++NewUserCommandString;
5864 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5865 if (NewUserCommandString == UserCommandString ||
5866 *NewUserCommandString != '\0' ||
5867 XTargetID >= Controller->Targets)
5868 return false;
5869 *Channel = XChannel;
5870 *TargetID = XTargetID;
5871 return true;
5872}
5873
5874
5875/*
5876 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5877 specification from a User Command string. It updates LogicalDriveNumber and
5878 returns true on success and false on failure.
5879*/
5880
5881static boolean DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
5882 char *UserCommandString,
5883 unsigned char *LogicalDriveNumber)
5884{
5885 char *NewUserCommandString = UserCommandString;
5886 unsigned long XLogicalDriveNumber;
5887 while (*UserCommandString == ' ') UserCommandString++;
5888 if (UserCommandString == NewUserCommandString)
5889 return false;
5890 XLogicalDriveNumber =
5891 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5892 if (NewUserCommandString == UserCommandString ||
5893 *NewUserCommandString != '\0' ||
5894 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5895 return false;
5896 *LogicalDriveNumber = XLogicalDriveNumber;
5897 return true;
5898}
5899
5900
5901/*
5902 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5903 DAC960 V1 Firmware Controllers.
5904*/
5905
5906static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5907 DAC960_Command_T *Command,
5908 unsigned char Channel,
5909 unsigned char TargetID,
5910 DAC960_V1_PhysicalDeviceState_T
5911 DeviceState,
5912 const unsigned char *DeviceStateString)
5913{
5914 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5915 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5916 CommandMailbox->Type3D.Channel = Channel;
5917 CommandMailbox->Type3D.TargetID = TargetID;
5918 CommandMailbox->Type3D.DeviceState = DeviceState;
5919 CommandMailbox->Type3D.Modifier = 0;
5920 DAC960_ExecuteCommand(Command);
5921 switch (Command->V1.CommandStatus)
5922 {
5923 case DAC960_V1_NormalCompletion:
5924 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5925 DeviceStateString, Channel, TargetID);
5926 break;
5927 case DAC960_V1_UnableToStartDevice:
5928 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5929 "Unable to Start Device\n", Controller,
5930 DeviceStateString, Channel, TargetID);
5931 break;
5932 case DAC960_V1_NoDeviceAtAddress:
5933 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5934 "No Device at Address\n", Controller,
5935 DeviceStateString, Channel, TargetID);
5936 break;
5937 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5938 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5939 "Invalid Channel or Target or Modifier\n",
5940 Controller, DeviceStateString, Channel, TargetID);
5941 break;
5942 case DAC960_V1_ChannelBusy:
5943 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5944 "Channel Busy\n", Controller,
5945 DeviceStateString, Channel, TargetID);
5946 break;
5947 default:
5948 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5949 "Unexpected Status %04X\n", Controller,
5950 DeviceStateString, Channel, TargetID,
5951 Command->V1.CommandStatus);
5952 break;
5953 }
5954}
5955
5956
5957/*
5958 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5959 Controllers.
5960*/
5961
5962static boolean DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
5963 unsigned char *UserCommand)
5964{
5965 DAC960_Command_T *Command;
5966 DAC960_V1_CommandMailbox_T *CommandMailbox;
5967 unsigned long flags;
5968 unsigned char Channel, TargetID, LogicalDriveNumber;
5969
5970 spin_lock_irqsave(&Controller->queue_lock, flags);
5971 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5972 DAC960_WaitForCommand(Controller);
5973 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5974 Controller->UserStatusLength = 0;
5975 DAC960_V1_ClearCommand(Command);
5976 Command->CommandType = DAC960_ImmediateCommand;
5977 CommandMailbox = &Command->V1.CommandMailbox;
5978 if (strcmp(UserCommand, "flush-cache") == 0)
5979 {
5980 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5981 DAC960_ExecuteCommand(Command);
5982 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5983 }
5984 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5985 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5986 &Channel, &TargetID))
5987 {
5988 DAC960_V1_DeviceState_T *DeviceState =
5989 &Controller->V1.DeviceState[Channel][TargetID];
5990 if (DeviceState->Present &&
5991 DeviceState->DeviceType == DAC960_V1_DiskType &&
5992 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5993 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5994 DAC960_V1_Device_Dead, "Kill");
5995 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5996 Controller, Channel, TargetID);
5997 }
5998 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
5999 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6000 &Channel, &TargetID))
6001 {
6002 DAC960_V1_DeviceState_T *DeviceState =
6003 &Controller->V1.DeviceState[Channel][TargetID];
6004 if (DeviceState->Present &&
6005 DeviceState->DeviceType == DAC960_V1_DiskType &&
6006 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6007 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6008 DAC960_V1_Device_Online, "Make Online");
6009 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6010 Controller, Channel, TargetID);
6011
6012 }
6013 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6014 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6015 &Channel, &TargetID))
6016 {
6017 DAC960_V1_DeviceState_T *DeviceState =
6018 &Controller->V1.DeviceState[Channel][TargetID];
6019 if (DeviceState->Present &&
6020 DeviceState->DeviceType == DAC960_V1_DiskType &&
6021 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6022 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6023 DAC960_V1_Device_Standby, "Make Standby");
6024 else DAC960_UserCritical("Make Standby of Physical "
6025 "Device %d:%d Illegal\n",
6026 Controller, Channel, TargetID);
6027 }
6028 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6029 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6030 &Channel, &TargetID))
6031 {
6032 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6033 CommandMailbox->Type3D.Channel = Channel;
6034 CommandMailbox->Type3D.TargetID = TargetID;
6035 DAC960_ExecuteCommand(Command);
6036 switch (Command->V1.CommandStatus)
6037 {
6038 case DAC960_V1_NormalCompletion:
6039 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6040 Controller, Channel, TargetID);
6041 break;
6042 case DAC960_V1_AttemptToRebuildOnlineDrive:
6043 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6044 "Attempt to Rebuild Online or "
6045 "Unresponsive Drive\n",
6046 Controller, Channel, TargetID);
6047 break;
6048 case DAC960_V1_NewDiskFailedDuringRebuild:
6049 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6050 "New Disk Failed During Rebuild\n",
6051 Controller, Channel, TargetID);
6052 break;
6053 case DAC960_V1_InvalidDeviceAddress:
6054 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6055 "Invalid Device Address\n",
6056 Controller, Channel, TargetID);
6057 break;
6058 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6059 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6060 "Rebuild or Consistency Check Already "
6061 "in Progress\n", Controller, Channel, TargetID);
6062 break;
6063 default:
6064 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6065 "Unexpected Status %04X\n", Controller,
6066 Channel, TargetID, Command->V1.CommandStatus);
6067 break;
6068 }
6069 }
6070 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6071 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6072 &LogicalDriveNumber))
6073 {
6074 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6075 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6076 CommandMailbox->Type3C.AutoRestore = true;
6077 DAC960_ExecuteCommand(Command);
6078 switch (Command->V1.CommandStatus)
6079 {
6080 case DAC960_V1_NormalCompletion:
6081 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6082 "(/dev/rd/c%dd%d) Initiated\n",
6083 Controller, LogicalDriveNumber,
6084 Controller->ControllerNumber,
6085 LogicalDriveNumber);
6086 break;
6087 case DAC960_V1_DependentDiskIsDead:
6088 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6089 "(/dev/rd/c%dd%d) Failed - "
6090 "Dependent Physical Device is DEAD\n",
6091 Controller, LogicalDriveNumber,
6092 Controller->ControllerNumber,
6093 LogicalDriveNumber);
6094 break;
6095 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6096 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6097 "(/dev/rd/c%dd%d) Failed - "
6098 "Invalid or Nonredundant Logical Drive\n",
6099 Controller, LogicalDriveNumber,
6100 Controller->ControllerNumber,
6101 LogicalDriveNumber);
6102 break;
6103 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6104 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6105 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6106 "Consistency Check Already in Progress\n",
6107 Controller, LogicalDriveNumber,
6108 Controller->ControllerNumber,
6109 LogicalDriveNumber);
6110 break;
6111 default:
6112 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6113 "(/dev/rd/c%dd%d) Failed - "
6114 "Unexpected Status %04X\n",
6115 Controller, LogicalDriveNumber,
6116 Controller->ControllerNumber,
6117 LogicalDriveNumber, Command->V1.CommandStatus);
6118 break;
6119 }
6120 }
6121 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6122 strcmp(UserCommand, "cancel-consistency-check") == 0)
6123 {
6124 /*
6125 the OldRebuildRateConstant is never actually used
6126 once its value is retrieved from the controller.
6127 */
6128 unsigned char *OldRebuildRateConstant;
6129 dma_addr_t OldRebuildRateConstantDMA;
6130
6131 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6132 sizeof(char), &OldRebuildRateConstantDMA);
6133 if (OldRebuildRateConstant == NULL) {
6134 DAC960_UserCritical("Cancellation of Rebuild or "
6135 "Consistency Check Failed - "
6136 "Out of Memory",
6137 Controller);
6138 goto failure;
6139 }
6140 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6141 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6142 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6143 DAC960_ExecuteCommand(Command);
6144 switch (Command->V1.CommandStatus)
6145 {
6146 case DAC960_V1_NormalCompletion:
6147 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6148 Controller);
6149 break;
6150 default:
6151 DAC960_UserCritical("Cancellation of Rebuild or "
6152 "Consistency Check Failed - "
6153 "Unexpected Status %04X\n",
6154 Controller, Command->V1.CommandStatus);
6155 break;
6156 }
6157failure:
6158 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6159 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6160 }
6161 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6162 Controller, UserCommand);
6163
6164 spin_lock_irqsave(&Controller->queue_lock, flags);
6165 DAC960_DeallocateCommand(Command);
6166 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6167 return true;
6168}
6169
6170
6171/*
6172 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6173 TargetID into a Logical Device. It returns true on success and false
6174 on failure.
6175*/
6176
6177static boolean DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
6178 unsigned char Channel,
6179 unsigned char TargetID,
6180 unsigned short
6181 *LogicalDeviceNumber)
6182{
6183 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6184 DAC960_Controller_T *Controller = Command->Controller;
6185
6186 CommandMailbox = &Command->V2.CommandMailbox;
6187 memcpy(&SavedCommandMailbox, CommandMailbox,
6188 sizeof(DAC960_V2_CommandMailbox_T));
6189
6190 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6191 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6192 .DataTransferControllerToHost = true;
6193 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6194 .NoAutoRequestSense = true;
6195 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6196 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6197 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6198 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6199 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6200 DAC960_V2_TranslatePhysicalToLogicalDevice;
6201 CommandMailbox->Common.DataTransferMemoryAddress
6202 .ScatterGatherSegments[0]
6203 .SegmentDataPointer =
6204 Controller->V2.PhysicalToLogicalDeviceDMA;
6205 CommandMailbox->Common.DataTransferMemoryAddress
6206 .ScatterGatherSegments[0]
6207 .SegmentByteCount =
6208 CommandMailbox->Common.DataTransferSize;
6209
6210 DAC960_ExecuteCommand(Command);
6211 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6212
6213 memcpy(CommandMailbox, &SavedCommandMailbox,
6214 sizeof(DAC960_V2_CommandMailbox_T));
6215 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6216}
6217
6218
6219/*
6220 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6221 Controllers.
6222*/
6223
6224static boolean DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
6225 unsigned char *UserCommand)
6226{
6227 DAC960_Command_T *Command;
6228 DAC960_V2_CommandMailbox_T *CommandMailbox;
6229 unsigned long flags;
6230 unsigned char Channel, TargetID, LogicalDriveNumber;
6231 unsigned short LogicalDeviceNumber;
6232
6233 spin_lock_irqsave(&Controller->queue_lock, flags);
6234 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6235 DAC960_WaitForCommand(Controller);
6236 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6237 Controller->UserStatusLength = 0;
6238 DAC960_V2_ClearCommand(Command);
6239 Command->CommandType = DAC960_ImmediateCommand;
6240 CommandMailbox = &Command->V2.CommandMailbox;
6241 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6242 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6243 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6244 if (strcmp(UserCommand, "flush-cache") == 0)
6245 {
6246 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6247 CommandMailbox->DeviceOperation.OperationDevice =
6248 DAC960_V2_RAID_Controller;
6249 DAC960_ExecuteCommand(Command);
6250 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6251 }
6252 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6253 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6254 &Channel, &TargetID) &&
6255 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6256 &LogicalDeviceNumber))
6257 {
6258 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6259 LogicalDeviceNumber;
6260 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6261 DAC960_V2_SetDeviceState;
6262 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6263 DAC960_V2_Device_Dead;
6264 DAC960_ExecuteCommand(Command);
6265 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6266 Controller, Channel, TargetID,
6267 (Command->V2.CommandStatus
6268 == DAC960_V2_NormalCompletion
6269 ? "Succeeded" : "Failed"));
6270 }
6271 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6272 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6273 &Channel, &TargetID) &&
6274 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6275 &LogicalDeviceNumber))
6276 {
6277 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6278 LogicalDeviceNumber;
6279 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6280 DAC960_V2_SetDeviceState;
6281 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6282 DAC960_V2_Device_Online;
6283 DAC960_ExecuteCommand(Command);
6284 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6285 Controller, Channel, TargetID,
6286 (Command->V2.CommandStatus
6287 == DAC960_V2_NormalCompletion
6288 ? "Succeeded" : "Failed"));
6289 }
6290 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6291 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6292 &Channel, &TargetID) &&
6293 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6294 &LogicalDeviceNumber))
6295 {
6296 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6297 LogicalDeviceNumber;
6298 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6299 DAC960_V2_SetDeviceState;
6300 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6301 DAC960_V2_Device_Standby;
6302 DAC960_ExecuteCommand(Command);
6303 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6304 Controller, Channel, TargetID,
6305 (Command->V2.CommandStatus
6306 == DAC960_V2_NormalCompletion
6307 ? "Succeeded" : "Failed"));
6308 }
6309 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6310 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6311 &Channel, &TargetID) &&
6312 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6313 &LogicalDeviceNumber))
6314 {
6315 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6316 LogicalDeviceNumber;
6317 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6318 DAC960_V2_RebuildDeviceStart;
6319 DAC960_ExecuteCommand(Command);
6320 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6321 Controller, Channel, TargetID,
6322 (Command->V2.CommandStatus
6323 == DAC960_V2_NormalCompletion
6324 ? "Initiated" : "Not Initiated"));
6325 }
6326 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6327 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6328 &Channel, &TargetID) &&
6329 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6330 &LogicalDeviceNumber))
6331 {
6332 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6333 LogicalDeviceNumber;
6334 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6335 DAC960_V2_RebuildDeviceStop;
6336 DAC960_ExecuteCommand(Command);
6337 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6338 Controller, Channel, TargetID,
6339 (Command->V2.CommandStatus
6340 == DAC960_V2_NormalCompletion
6341 ? "Cancelled" : "Not Cancelled"));
6342 }
6343 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6344 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6345 &LogicalDriveNumber))
6346 {
6347 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6348 LogicalDriveNumber;
6349 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6350 DAC960_V2_ConsistencyCheckStart;
6351 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6352 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6353 DAC960_ExecuteCommand(Command);
6354 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6355 "(/dev/rd/c%dd%d) %s\n",
6356 Controller, LogicalDriveNumber,
6357 Controller->ControllerNumber,
6358 LogicalDriveNumber,
6359 (Command->V2.CommandStatus
6360 == DAC960_V2_NormalCompletion
6361 ? "Initiated" : "Not Initiated"));
6362 }
6363 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6364 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6365 &LogicalDriveNumber))
6366 {
6367 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6368 LogicalDriveNumber;
6369 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6370 DAC960_V2_ConsistencyCheckStop;
6371 DAC960_ExecuteCommand(Command);
6372 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6373 "(/dev/rd/c%dd%d) %s\n",
6374 Controller, LogicalDriveNumber,
6375 Controller->ControllerNumber,
6376 LogicalDriveNumber,
6377 (Command->V2.CommandStatus
6378 == DAC960_V2_NormalCompletion
6379 ? "Cancelled" : "Not Cancelled"));
6380 }
6381 else if (strcmp(UserCommand, "perform-discovery") == 0)
6382 {
6383 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6384 DAC960_ExecuteCommand(Command);
6385 DAC960_UserCritical("Discovery %s\n", Controller,
6386 (Command->V2.CommandStatus
6387 == DAC960_V2_NormalCompletion
6388 ? "Initiated" : "Not Initiated"));
6389 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6390 {
6391 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6392 CommandMailbox->ControllerInfo.CommandControlBits
6393 .DataTransferControllerToHost = true;
6394 CommandMailbox->ControllerInfo.CommandControlBits
6395 .NoAutoRequestSense = true;
6396 CommandMailbox->ControllerInfo.DataTransferSize =
6397 sizeof(DAC960_V2_ControllerInfo_T);
6398 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6399 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6400 DAC960_V2_GetControllerInfo;
6401 /*
6402 * How does this NOT race with the queued Monitoring
6403 * usage of this structure?
6404 */
6405 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6406 .ScatterGatherSegments[0]
6407 .SegmentDataPointer =
6408 Controller->V2.NewControllerInformationDMA;
6409 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6410 .ScatterGatherSegments[0]
6411 .SegmentByteCount =
6412 CommandMailbox->ControllerInfo.DataTransferSize;
6413 DAC960_ExecuteCommand(Command);
6414 while (Controller->V2.NewControllerInformation->PhysicalScanActive)
6415 {
6416 DAC960_ExecuteCommand(Command);
6417 sleep_on_timeout(&Controller->CommandWaitQueue, HZ);
6418 }
6419 DAC960_UserCritical("Discovery Completed\n", Controller);
6420 }
6421 }
6422 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6423 Controller->SuppressEnclosureMessages = true;
6424 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6425 Controller, UserCommand);
6426
6427 spin_lock_irqsave(&Controller->queue_lock, flags);
6428 DAC960_DeallocateCommand(Command);
6429 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6430 return true;
6431}
6432
6433
6434/*
6435 DAC960_ProcReadStatus implements reading /proc/rd/status.
6436*/
6437
6438static int DAC960_ProcReadStatus(char *Page, char **Start, off_t Offset,
6439 int Count, int *EOF, void *Data)
6440{
6441 unsigned char *StatusMessage = "OK\n";
6442 int ControllerNumber, BytesAvailable;
6443 for (ControllerNumber = 0;
6444 ControllerNumber < DAC960_ControllerCount;
6445 ControllerNumber++)
6446 {
6447 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6448 if (Controller == NULL) continue;
6449 if (Controller->MonitoringAlertMode)
6450 {
6451 StatusMessage = "ALERT\n";
6452 break;
6453 }
6454 }
6455 BytesAvailable = strlen(StatusMessage) - Offset;
6456 if (Count >= BytesAvailable)
6457 {
6458 Count = BytesAvailable;
6459 *EOF = true;
6460 }
6461 if (Count <= 0) return 0;
6462 *Start = Page;
6463 memcpy(Page, &StatusMessage[Offset], Count);
6464 return Count;
6465}
6466
6467
6468/*
6469 DAC960_ProcReadInitialStatus implements reading /proc/rd/cN/initial_status.
6470*/
6471
6472static int DAC960_ProcReadInitialStatus(char *Page, char **Start, off_t Offset,
6473 int Count, int *EOF, void *Data)
6474{
6475 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6476 int BytesAvailable = Controller->InitialStatusLength - Offset;
6477 if (Count >= BytesAvailable)
6478 {
6479 Count = BytesAvailable;
6480 *EOF = true;
6481 }
6482 if (Count <= 0) return 0;
6483 *Start = Page;
6484 memcpy(Page, &Controller->CombinedStatusBuffer[Offset], Count);
6485 return Count;
6486}
6487
6488
6489/*
6490 DAC960_ProcReadCurrentStatus implements reading /proc/rd/cN/current_status.
6491*/
6492
6493static int DAC960_ProcReadCurrentStatus(char *Page, char **Start, off_t Offset,
6494 int Count, int *EOF, void *Data)
6495{
6496 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6497 unsigned char *StatusMessage =
6498 "No Rebuild or Consistency Check in Progress\n";
6499 int ProgressMessageLength = strlen(StatusMessage);
6500 int BytesAvailable;
6501 if (jiffies != Controller->LastCurrentStatusTime)
6502 {
6503 Controller->CurrentStatusLength = 0;
6504 DAC960_AnnounceDriver(Controller);
6505 DAC960_ReportControllerConfiguration(Controller);
6506 DAC960_ReportDeviceConfiguration(Controller);
6507 if (Controller->ProgressBufferLength > 0)
6508 ProgressMessageLength = Controller->ProgressBufferLength;
6509 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6510 {
6511 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6512 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6513 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6514 if (Controller->ProgressBufferLength > 0)
6515 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6516 Controller->ProgressBuffer);
6517 else
6518 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6519 StatusMessage);
6520 Controller->CurrentStatusLength += ProgressMessageLength;
6521 }
6522 Controller->LastCurrentStatusTime = jiffies;
6523 }
6524 BytesAvailable = Controller->CurrentStatusLength - Offset;
6525 if (Count >= BytesAvailable)
6526 {
6527 Count = BytesAvailable;
6528 *EOF = true;
6529 }
6530 if (Count <= 0) return 0;
6531 *Start = Page;
6532 memcpy(Page, &Controller->CurrentStatusBuffer[Offset], Count);
6533 return Count;
6534}
6535
6536
6537/*
6538 DAC960_ProcReadUserCommand implements reading /proc/rd/cN/user_command.
6539*/
6540
6541static int DAC960_ProcReadUserCommand(char *Page, char **Start, off_t Offset,
6542 int Count, int *EOF, void *Data)
6543{
6544 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6545 int BytesAvailable = Controller->UserStatusLength - Offset;
6546 if (Count >= BytesAvailable)
6547 {
6548 Count = BytesAvailable;
6549 *EOF = true;
6550 }
6551 if (Count <= 0) return 0;
6552 *Start = Page;
6553 memcpy(Page, &Controller->UserStatusBuffer[Offset], Count);
6554 return Count;
6555}
6556
6557
6558/*
6559 DAC960_ProcWriteUserCommand implements writing /proc/rd/cN/user_command.
6560*/
6561
6562static int DAC960_ProcWriteUserCommand(struct file *file,
6563 const char __user *Buffer,
6564 unsigned long Count, void *Data)
6565{
6566 DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
6567 unsigned char CommandBuffer[80];
6568 int Length;
6569 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6570 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6571 CommandBuffer[Count] = '\0';
6572 Length = strlen(CommandBuffer);
6573 if (CommandBuffer[Length-1] == '\n')
6574 CommandBuffer[--Length] = '\0';
6575 if (Controller->FirmwareType == DAC960_V1_Controller)
6576 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6577 ? Count : -EBUSY);
6578 else
6579 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6580 ? Count : -EBUSY);
6581}
6582
6583
6584/*
6585 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6586 DAC960 Driver.
6587*/
6588
6589static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6590{
6591 struct proc_dir_entry *StatusProcEntry;
6592 struct proc_dir_entry *ControllerProcEntry;
6593 struct proc_dir_entry *UserCommandProcEntry;
6594
6595 if (DAC960_ProcDirectoryEntry == NULL) {
6596 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6597 StatusProcEntry = create_proc_read_entry("status", 0,
6598 DAC960_ProcDirectoryEntry,
6599 DAC960_ProcReadStatus, NULL);
6600 }
6601
6602 sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
6603 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6604 DAC960_ProcDirectoryEntry);
6605 create_proc_read_entry("initial_status", 0, ControllerProcEntry,
6606 DAC960_ProcReadInitialStatus, Controller);
6607 create_proc_read_entry("current_status", 0, ControllerProcEntry,
6608 DAC960_ProcReadCurrentStatus, Controller);
6609 UserCommandProcEntry =
6610 create_proc_read_entry("user_command", S_IWUSR | S_IRUSR,
6611 ControllerProcEntry, DAC960_ProcReadUserCommand,
6612 Controller);
6613 UserCommandProcEntry->write_proc = DAC960_ProcWriteUserCommand;
6614 Controller->ControllerProcEntry = ControllerProcEntry;
6615}
6616
6617
6618/*
6619 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6620 DAC960 Driver.
6621*/
6622
6623static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6624{
6625 if (Controller->ControllerProcEntry == NULL)
6626 return;
6627 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6628 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6629 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6630 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6631 Controller->ControllerProcEntry = NULL;
6632}
6633
6634#ifdef DAC960_GAM_MINOR
6635
6636/*
6637 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
6638*/
6639
6640static int DAC960_gam_ioctl(struct inode *inode, struct file *file,
6641 unsigned int Request, unsigned long Argument)
6642{
6643 int ErrorCode = 0;
6644 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
6645 switch (Request)
6646 {
6647 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
6648 return DAC960_ControllerCount;
6649 case DAC960_IOCTL_GET_CONTROLLER_INFO:
6650 {
6651 DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
6652 (DAC960_ControllerInfo_T __user *) Argument;
6653 DAC960_ControllerInfo_T ControllerInfo;
6654 DAC960_Controller_T *Controller;
6655 int ControllerNumber;
6656 if (UserSpaceControllerInfo == NULL) return -EINVAL;
6657 ErrorCode = get_user(ControllerNumber,
6658 &UserSpaceControllerInfo->ControllerNumber);
6659 if (ErrorCode != 0) return ErrorCode;
6660 if (ControllerNumber < 0 ||
6661 ControllerNumber > DAC960_ControllerCount - 1)
6662 return -ENXIO;
6663 Controller = DAC960_Controllers[ControllerNumber];
6664 if (Controller == NULL) return -ENXIO;
6665 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6666 ControllerInfo.ControllerNumber = ControllerNumber;
6667 ControllerInfo.FirmwareType = Controller->FirmwareType;
6668 ControllerInfo.Channels = Controller->Channels;
6669 ControllerInfo.Targets = Controller->Targets;
6670 ControllerInfo.PCI_Bus = Controller->Bus;
6671 ControllerInfo.PCI_Device = Controller->Device;
6672 ControllerInfo.PCI_Function = Controller->Function;
6673 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6674 ControllerInfo.PCI_Address = Controller->PCI_Address;
6675 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6676 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
6677 return (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
6678 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
6679 }
6680 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
6681 {
6682 DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
6683 (DAC960_V1_UserCommand_T __user *) Argument;
6684 DAC960_V1_UserCommand_T UserCommand;
6685 DAC960_Controller_T *Controller;
6686 DAC960_Command_T *Command = NULL;
6687 DAC960_V1_CommandOpcode_T CommandOpcode;
6688 DAC960_V1_CommandStatus_T CommandStatus;
6689 DAC960_V1_DCDB_T DCDB;
6690 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6691 dma_addr_t DCDB_IOBUFDMA;
6692 unsigned long flags;
6693 int ControllerNumber, DataTransferLength;
6694 unsigned char *DataTransferBuffer = NULL;
6695 dma_addr_t DataTransferBufferDMA;
6696 if (UserSpaceUserCommand == NULL) return -EINVAL;
6697 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6698 sizeof(DAC960_V1_UserCommand_T))) {
6699 ErrorCode = -EFAULT;
6700 goto Failure1a;
6701 }
6702 ControllerNumber = UserCommand.ControllerNumber;
6703 if (ControllerNumber < 0 ||
6704 ControllerNumber > DAC960_ControllerCount - 1)
6705 return -ENXIO;
6706 Controller = DAC960_Controllers[ControllerNumber];
6707 if (Controller == NULL) return -ENXIO;
6708 if (Controller->FirmwareType != DAC960_V1_Controller) return -EINVAL;
6709 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6710 DataTransferLength = UserCommand.DataTransferLength;
6711 if (CommandOpcode & 0x80) return -EINVAL;
6712 if (CommandOpcode == DAC960_V1_DCDB)
6713 {
6714 if (copy_from_user(&DCDB, UserCommand.DCDB,
6715 sizeof(DAC960_V1_DCDB_T))) {
6716 ErrorCode = -EFAULT;
6717 goto Failure1a;
6718 }
6719 if (DCDB.Channel >= DAC960_V1_MaxChannels) return -EINVAL;
6720 if (!((DataTransferLength == 0 &&
6721 DCDB.Direction
6722 == DAC960_V1_DCDB_NoDataTransfer) ||
6723 (DataTransferLength > 0 &&
6724 DCDB.Direction
6725 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6726 (DataTransferLength < 0 &&
6727 DCDB.Direction
6728 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
6729 return -EINVAL;
6730 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6731 != abs(DataTransferLength))
6732 return -EINVAL;
6733 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6734 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
6735 if (DCDB_IOBUF == NULL)
6736 return -ENOMEM;
6737 }
6738 if (DataTransferLength > 0)
6739 {
6740 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6741 DataTransferLength, &DataTransferBufferDMA);
6742 if (DataTransferBuffer == NULL) {
6743 ErrorCode = -ENOMEM;
6744 goto Failure1;
6745 }
6746 memset(DataTransferBuffer, 0, DataTransferLength);
6747 }
6748 else if (DataTransferLength < 0)
6749 {
6750 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6751 -DataTransferLength, &DataTransferBufferDMA);
6752 if (DataTransferBuffer == NULL) {
6753 ErrorCode = -ENOMEM;
6754 goto Failure1;
6755 }
6756 if (copy_from_user(DataTransferBuffer,
6757 UserCommand.DataTransferBuffer,
6758 -DataTransferLength)) {
6759 ErrorCode = -EFAULT;
6760 goto Failure1;
6761 }
6762 }
6763 if (CommandOpcode == DAC960_V1_DCDB)
6764 {
6765 spin_lock_irqsave(&Controller->queue_lock, flags);
6766 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6767 DAC960_WaitForCommand(Controller);
6768 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6769 [DCDB.TargetID])
6770 {
6771 spin_unlock_irq(&Controller->queue_lock);
6772 __wait_event(Controller->CommandWaitQueue,
6773 !Controller->V1.DirectCommandActive
6774 [DCDB.Channel][DCDB.TargetID]);
6775 spin_lock_irq(&Controller->queue_lock);
6776 }
6777 Controller->V1.DirectCommandActive[DCDB.Channel]
6778 [DCDB.TargetID] = true;
6779 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6780 DAC960_V1_ClearCommand(Command);
6781 Command->CommandType = DAC960_ImmediateCommand;
6782 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6783 sizeof(DAC960_V1_CommandMailbox_T));
6784 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6785 DCDB.BusAddress = DataTransferBufferDMA;
6786 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6787 }
6788 else
6789 {
6790 spin_lock_irqsave(&Controller->queue_lock, flags);
6791 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6792 DAC960_WaitForCommand(Controller);
6793 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6794 DAC960_V1_ClearCommand(Command);
6795 Command->CommandType = DAC960_ImmediateCommand;
6796 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6797 sizeof(DAC960_V1_CommandMailbox_T));
6798 if (DataTransferBuffer != NULL)
6799 Command->V1.CommandMailbox.Type3.BusAddress =
6800 DataTransferBufferDMA;
6801 }
6802 DAC960_ExecuteCommand(Command);
6803 CommandStatus = Command->V1.CommandStatus;
6804 spin_lock_irqsave(&Controller->queue_lock, flags);
6805 DAC960_DeallocateCommand(Command);
6806 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6807 if (DataTransferLength > 0)
6808 {
6809 if (copy_to_user(UserCommand.DataTransferBuffer,
6810 DataTransferBuffer, DataTransferLength)) {
6811 ErrorCode = -EFAULT;
6812 goto Failure1;
6813 }
6814 }
6815 if (CommandOpcode == DAC960_V1_DCDB)
6816 {
6817 /*
6818 I don't believe Target or Channel in the DCDB_IOBUF
6819 should be any different from the contents of DCDB.
6820 */
6821 Controller->V1.DirectCommandActive[DCDB.Channel]
6822 [DCDB.TargetID] = false;
6823 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6824 sizeof(DAC960_V1_DCDB_T))) {
6825 ErrorCode = -EFAULT;
6826 goto Failure1;
6827 }
6828 }
6829 ErrorCode = CommandStatus;
6830 Failure1:
6831 if (DataTransferBuffer != NULL)
6832 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6833 DataTransferBuffer, DataTransferBufferDMA);
6834 if (DCDB_IOBUF != NULL)
6835 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6836 DCDB_IOBUF, DCDB_IOBUFDMA);
6837 Failure1a:
6838 return ErrorCode;
6839 }
6840 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
6841 {
6842 DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
6843 (DAC960_V2_UserCommand_T __user *) Argument;
6844 DAC960_V2_UserCommand_T UserCommand;
6845 DAC960_Controller_T *Controller;
6846 DAC960_Command_T *Command = NULL;
6847 DAC960_V2_CommandMailbox_T *CommandMailbox;
6848 DAC960_V2_CommandStatus_T CommandStatus;
6849 unsigned long flags;
6850 int ControllerNumber, DataTransferLength;
6851 int DataTransferResidue, RequestSenseLength;
6852 unsigned char *DataTransferBuffer = NULL;
6853 dma_addr_t DataTransferBufferDMA;
6854 unsigned char *RequestSenseBuffer = NULL;
6855 dma_addr_t RequestSenseBufferDMA;
6856 if (UserSpaceUserCommand == NULL) return -EINVAL;
6857 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6858 sizeof(DAC960_V2_UserCommand_T))) {
6859 ErrorCode = -EFAULT;
6860 goto Failure2a;
6861 }
6862 ControllerNumber = UserCommand.ControllerNumber;
6863 if (ControllerNumber < 0 ||
6864 ControllerNumber > DAC960_ControllerCount - 1)
6865 return -ENXIO;
6866 Controller = DAC960_Controllers[ControllerNumber];
6867 if (Controller == NULL) return -ENXIO;
6868 if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
6869 DataTransferLength = UserCommand.DataTransferLength;
6870 if (DataTransferLength > 0)
6871 {
6872 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6873 DataTransferLength, &DataTransferBufferDMA);
6874 if (DataTransferBuffer == NULL) return -ENOMEM;
6875 memset(DataTransferBuffer, 0, DataTransferLength);
6876 }
6877 else if (DataTransferLength < 0)
6878 {
6879 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6880 -DataTransferLength, &DataTransferBufferDMA);
6881 if (DataTransferBuffer == NULL) return -ENOMEM;
6882 if (copy_from_user(DataTransferBuffer,
6883 UserCommand.DataTransferBuffer,
6884 -DataTransferLength)) {
6885 ErrorCode = -EFAULT;
6886 goto Failure2;
6887 }
6888 }
6889 RequestSenseLength = UserCommand.RequestSenseLength;
6890 if (RequestSenseLength > 0)
6891 {
6892 RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice,
6893 RequestSenseLength, &RequestSenseBufferDMA);
6894 if (RequestSenseBuffer == NULL)
6895 {
6896 ErrorCode = -ENOMEM;
6897 goto Failure2;
6898 }
6899 memset(RequestSenseBuffer, 0, RequestSenseLength);
6900 }
6901 spin_lock_irqsave(&Controller->queue_lock, flags);
6902 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6903 DAC960_WaitForCommand(Controller);
6904 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6905 DAC960_V2_ClearCommand(Command);
6906 Command->CommandType = DAC960_ImmediateCommand;
6907 CommandMailbox = &Command->V2.CommandMailbox;
6908 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6909 sizeof(DAC960_V2_CommandMailbox_T));
6910 CommandMailbox->Common.CommandControlBits
6911 .AdditionalScatterGatherListMemory = false;
6912 CommandMailbox->Common.CommandControlBits
6913 .NoAutoRequestSense = true;
6914 CommandMailbox->Common.DataTransferSize = 0;
6915 CommandMailbox->Common.DataTransferPageNumber = 0;
6916 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6917 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6918 if (DataTransferLength != 0)
6919 {
6920 if (DataTransferLength > 0)
6921 {
6922 CommandMailbox->Common.CommandControlBits
6923 .DataTransferControllerToHost = true;
6924 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6925 }
6926 else
6927 {
6928 CommandMailbox->Common.CommandControlBits
6929 .DataTransferControllerToHost = false;
6930 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6931 }
6932 CommandMailbox->Common.DataTransferMemoryAddress
6933 .ScatterGatherSegments[0]
6934 .SegmentDataPointer = DataTransferBufferDMA;
6935 CommandMailbox->Common.DataTransferMemoryAddress
6936 .ScatterGatherSegments[0]
6937 .SegmentByteCount =
6938 CommandMailbox->Common.DataTransferSize;
6939 }
6940 if (RequestSenseLength > 0)
6941 {
6942 CommandMailbox->Common.CommandControlBits
6943 .NoAutoRequestSense = false;
6944 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6945 CommandMailbox->Common.RequestSenseBusAddress =
6946 RequestSenseBufferDMA;
6947 }
6948 DAC960_ExecuteCommand(Command);
6949 CommandStatus = Command->V2.CommandStatus;
6950 RequestSenseLength = Command->V2.RequestSenseLength;
6951 DataTransferResidue = Command->V2.DataTransferResidue;
6952 spin_lock_irqsave(&Controller->queue_lock, flags);
6953 DAC960_DeallocateCommand(Command);
6954 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6955 if (RequestSenseLength > UserCommand.RequestSenseLength)
6956 RequestSenseLength = UserCommand.RequestSenseLength;
6957 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6958 &DataTransferResidue,
6959 sizeof(DataTransferResidue))) {
6960 ErrorCode = -EFAULT;
6961 goto Failure2;
6962 }
6963 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6964 &RequestSenseLength, sizeof(RequestSenseLength))) {
6965 ErrorCode = -EFAULT;
6966 goto Failure2;
6967 }
6968 if (DataTransferLength > 0)
6969 {
6970 if (copy_to_user(UserCommand.DataTransferBuffer,
6971 DataTransferBuffer, DataTransferLength)) {
6972 ErrorCode = -EFAULT;
6973 goto Failure2;
6974 }
6975 }
6976 if (RequestSenseLength > 0)
6977 {
6978 if (copy_to_user(UserCommand.RequestSenseBuffer,
6979 RequestSenseBuffer, RequestSenseLength)) {
6980 ErrorCode = -EFAULT;
6981 goto Failure2;
6982 }
6983 }
6984 ErrorCode = CommandStatus;
6985 Failure2:
6986 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6987 DataTransferBuffer, DataTransferBufferDMA);
6988 if (RequestSenseBuffer != NULL)
6989 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
6990 RequestSenseBuffer, RequestSenseBufferDMA);
6991 Failure2a:
6992 return ErrorCode;
6993 }
6994 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
6995 {
6996 DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
6997 (DAC960_V2_GetHealthStatus_T __user *) Argument;
6998 DAC960_V2_GetHealthStatus_T GetHealthStatus;
6999 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
7000 DAC960_Controller_T *Controller;
7001 int ControllerNumber;
7002 if (UserSpaceGetHealthStatus == NULL) return -EINVAL;
7003 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
7004 sizeof(DAC960_V2_GetHealthStatus_T)))
7005 return -EFAULT;
7006 ControllerNumber = GetHealthStatus.ControllerNumber;
7007 if (ControllerNumber < 0 ||
7008 ControllerNumber > DAC960_ControllerCount - 1)
7009 return -ENXIO;
7010 Controller = DAC960_Controllers[ControllerNumber];
7011 if (Controller == NULL) return -ENXIO;
7012 if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
7013 if (copy_from_user(&HealthStatusBuffer,
7014 GetHealthStatus.HealthStatusBuffer,
7015 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7016 return -EFAULT;
7017 while (Controller->V2.HealthStatusBuffer->StatusChangeCounter
7018 == HealthStatusBuffer.StatusChangeCounter &&
7019 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7020 == HealthStatusBuffer.NextEventSequenceNumber)
7021 {
7022 interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue,
7023 DAC960_MonitoringTimerInterval);
7024 if (signal_pending(current)) return -EINTR;
7025 }
7026 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7027 Controller->V2.HealthStatusBuffer,
7028 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7029 return -EFAULT;
7030 return 0;
7031 }
7032 }
7033 return -EINVAL;
7034}
7035
7036static struct file_operations DAC960_gam_fops = {
7037 .owner = THIS_MODULE,
7038 .ioctl = DAC960_gam_ioctl
7039};
7040
7041static struct miscdevice DAC960_gam_dev = {
7042 DAC960_GAM_MINOR,
7043 "dac960_gam",
7044 &DAC960_gam_fops
7045};
7046
7047static int DAC960_gam_init(void)
7048{
7049 int ret;
7050
7051 ret = misc_register(&DAC960_gam_dev);
7052 if (ret)
7053 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7054 return ret;
7055}
7056
7057static void DAC960_gam_cleanup(void)
7058{
7059 misc_deregister(&DAC960_gam_dev);
7060}
7061
7062#endif /* DAC960_GAM_MINOR */
7063
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07007064static struct DAC960_privdata DAC960_GEM_privdata = {
7065 .HardwareType = DAC960_GEM_Controller,
7066 .FirmwareType = DAC960_V2_Controller,
7067 .InterruptHandler = DAC960_GEM_InterruptHandler,
7068 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7069};
7070
7071
Linus Torvalds1da177e2005-04-16 15:20:36 -07007072static struct DAC960_privdata DAC960_BA_privdata = {
7073 .HardwareType = DAC960_BA_Controller,
7074 .FirmwareType = DAC960_V2_Controller,
7075 .InterruptHandler = DAC960_BA_InterruptHandler,
7076 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7077};
7078
7079static struct DAC960_privdata DAC960_LP_privdata = {
7080 .HardwareType = DAC960_LP_Controller,
7081 .FirmwareType = DAC960_LP_Controller,
7082 .InterruptHandler = DAC960_LP_InterruptHandler,
7083 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7084};
7085
7086static struct DAC960_privdata DAC960_LA_privdata = {
7087 .HardwareType = DAC960_LA_Controller,
7088 .FirmwareType = DAC960_V1_Controller,
7089 .InterruptHandler = DAC960_LA_InterruptHandler,
7090 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7091};
7092
7093static struct DAC960_privdata DAC960_PG_privdata = {
7094 .HardwareType = DAC960_PG_Controller,
7095 .FirmwareType = DAC960_V1_Controller,
7096 .InterruptHandler = DAC960_PG_InterruptHandler,
7097 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7098};
7099
7100static struct DAC960_privdata DAC960_PD_privdata = {
7101 .HardwareType = DAC960_PD_Controller,
7102 .FirmwareType = DAC960_V1_Controller,
7103 .InterruptHandler = DAC960_PD_InterruptHandler,
7104 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7105};
7106
7107static struct DAC960_privdata DAC960_P_privdata = {
7108 .HardwareType = DAC960_P_Controller,
7109 .FirmwareType = DAC960_V1_Controller,
7110 .InterruptHandler = DAC960_P_InterruptHandler,
7111 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7112};
7113
7114static struct pci_device_id DAC960_id_table[] = {
7115 {
7116 .vendor = PCI_VENDOR_ID_MYLEX,
Christoph Hellwig5b76ffd2005-05-05 16:15:58 -07007117 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
7118 .subvendor = PCI_ANY_ID,
7119 .subdevice = PCI_ANY_ID,
7120 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7121 },
7122 {
7123 .vendor = PCI_VENDOR_ID_MYLEX,
Linus Torvalds1da177e2005-04-16 15:20:36 -07007124 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7125 .subvendor = PCI_ANY_ID,
7126 .subdevice = PCI_ANY_ID,
7127 .driver_data = (unsigned long) &DAC960_BA_privdata,
7128 },
7129 {
7130 .vendor = PCI_VENDOR_ID_MYLEX,
7131 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7132 .subvendor = PCI_ANY_ID,
7133 .subdevice = PCI_ANY_ID,
7134 .driver_data = (unsigned long) &DAC960_LP_privdata,
7135 },
7136 {
7137 .vendor = PCI_VENDOR_ID_DEC,
7138 .device = PCI_DEVICE_ID_DEC_21285,
7139 .subvendor = PCI_VENDOR_ID_MYLEX,
7140 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7141 .driver_data = (unsigned long) &DAC960_LA_privdata,
7142 },
7143 {
7144 .vendor = PCI_VENDOR_ID_MYLEX,
7145 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7146 .subvendor = PCI_ANY_ID,
7147 .subdevice = PCI_ANY_ID,
7148 .driver_data = (unsigned long) &DAC960_PG_privdata,
7149 },
7150 {
7151 .vendor = PCI_VENDOR_ID_MYLEX,
7152 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7153 .subvendor = PCI_ANY_ID,
7154 .subdevice = PCI_ANY_ID,
7155 .driver_data = (unsigned long) &DAC960_PD_privdata,
7156 },
7157 {
7158 .vendor = PCI_VENDOR_ID_MYLEX,
7159 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7160 .subvendor = PCI_ANY_ID,
7161 .subdevice = PCI_ANY_ID,
7162 .driver_data = (unsigned long) &DAC960_P_privdata,
7163 },
7164 {0, },
7165};
7166
7167MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7168
7169static struct pci_driver DAC960_pci_driver = {
7170 .name = "DAC960",
7171 .id_table = DAC960_id_table,
7172 .probe = DAC960_Probe,
7173 .remove = DAC960_Remove,
7174};
7175
7176static int DAC960_init_module(void)
7177{
7178 int ret;
7179
Richard Knutsson9bfab8c2005-11-30 00:59:34 +01007180 ret = pci_register_driver(&DAC960_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007181#ifdef DAC960_GAM_MINOR
7182 if (!ret)
7183 DAC960_gam_init();
7184#endif
7185 return ret;
7186}
7187
7188static void DAC960_cleanup_module(void)
7189{
7190 int i;
7191
7192#ifdef DAC960_GAM_MINOR
7193 DAC960_gam_cleanup();
7194#endif
7195
7196 for (i = 0; i < DAC960_ControllerCount; i++) {
7197 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7198 if (Controller == NULL)
7199 continue;
7200 DAC960_FinalizeController(Controller);
7201 }
7202 if (DAC960_ProcDirectoryEntry != NULL) {
7203 remove_proc_entry("rd/status", NULL);
7204 remove_proc_entry("rd", NULL);
7205 }
7206 DAC960_ControllerCount = 0;
7207 pci_unregister_driver(&DAC960_pci_driver);
7208}
7209
7210module_init(DAC960_init_module);
7211module_exit(DAC960_cleanup_module);
7212
7213MODULE_LICENSE("GPL");