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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* yellowfin.c: A Packet Engines G-NIC ethernet driver for linux. */
2/*
3 Written 1997-2001 by Donald Becker.
4
5 This software may be used and distributed according to the terms of
6 the GNU General Public License (GPL), incorporated herein by reference.
7 Drivers based on or derived from this code fall under the GPL and must
8 retain the authorship, copyright and license notice. This file is not
9 a complete program and may only be used when the entire operating
10 system is licensed under the GPL.
11
12 This driver is for the Packet Engines G-NIC PCI Gigabit Ethernet adapter.
13 It also supports the Symbios Logic version of the same chip core.
14
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
18 Annapolis MD 21403
19
20 Support and updates available at
21 http://www.scyld.com/network/yellowfin.html
Jeff Garzik03a8c662006-06-27 07:57:22 -040022 [link no longer provides useful info -jgarzik]
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
Linus Torvalds1da177e2005-04-16 15:20:36 -070024*/
25
26#define DRV_NAME "yellowfin"
Andy Gospodarekd5b20692006-09-11 17:39:18 -040027#define DRV_VERSION "2.1"
28#define DRV_RELDATE "Sep 11, 2006"
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30#define PFX DRV_NAME ": "
31
32/* The user-configurable values.
33 These may be modified when a driver module is loaded.*/
34
35static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
36/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
37static int max_interrupt_work = 20;
38static int mtu;
39#ifdef YF_PROTOTYPE /* Support for prototype hardware errata. */
40/* System-wide count of bogus-rx frames. */
41static int bogus_rx;
42static int dma_ctrl = 0x004A0263; /* Constrained by errata */
43static int fifo_cfg = 0x0020; /* Bypass external Tx FIFO. */
44#elif defined(YF_NEW) /* A future perfect board :->. */
45static int dma_ctrl = 0x00CAC277; /* Override when loading module! */
46static int fifo_cfg = 0x0028;
47#else
Arjan van de Venf71e1302006-03-03 21:33:57 -050048static const int dma_ctrl = 0x004A0263; /* Constrained by errata */
49static const int fifo_cfg = 0x0020; /* Bypass external Tx FIFO. */
Linus Torvalds1da177e2005-04-16 15:20:36 -070050#endif
51
52/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
53 Setting to > 1514 effectively disables this feature. */
54static int rx_copybreak;
55
56/* Used to pass the media type, etc.
57 No media types are currently defined. These exist for driver
58 interoperability.
59*/
60#define MAX_UNITS 8 /* More are supported, limit only on options */
61static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
62static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
63
64/* Do ugly workaround for GX server chipset errata. */
65static int gx_fix;
66
67/* Operational parameters that are set at compile time. */
68
69/* Keep the ring sizes a power of two for efficiency.
70 Making the Tx ring too long decreases the effectiveness of channel
71 bonding and packet priority.
72 There are no ill effects from too-large receive rings. */
73#define TX_RING_SIZE 16
74#define TX_QUEUE_SIZE 12 /* Must be > 4 && <= TX_RING_SIZE */
75#define RX_RING_SIZE 64
76#define STATUS_TOTAL_SIZE TX_RING_SIZE*sizeof(struct tx_status_words)
77#define TX_TOTAL_SIZE 2*TX_RING_SIZE*sizeof(struct yellowfin_desc)
78#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct yellowfin_desc)
79
80/* Operational parameters that usually are not changed. */
81/* Time in jiffies before concluding the transmitter is hung. */
82#define TX_TIMEOUT (2*HZ)
83#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
84
85#define yellowfin_debug debug
86
87#include <linux/module.h>
88#include <linux/kernel.h>
89#include <linux/string.h>
90#include <linux/timer.h>
91#include <linux/errno.h>
92#include <linux/ioport.h>
93#include <linux/slab.h>
94#include <linux/interrupt.h>
95#include <linux/pci.h>
96#include <linux/init.h>
97#include <linux/mii.h>
98#include <linux/netdevice.h>
99#include <linux/etherdevice.h>
100#include <linux/skbuff.h>
101#include <linux/ethtool.h>
102#include <linux/crc32.h>
103#include <linux/bitops.h>
104#include <asm/uaccess.h>
105#include <asm/processor.h> /* Processor type for cache alignment. */
106#include <asm/unaligned.h>
107#include <asm/io.h>
108
109/* These identify the driver base version and may not be removed. */
110static char version[] __devinitdata =
111KERN_INFO DRV_NAME ".c:v1.05 1/09/2001 Written by Donald Becker <becker@scyld.com>\n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112KERN_INFO " (unofficial 2.4.x port, " DRV_VERSION ", " DRV_RELDATE ")\n";
113
114MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
115MODULE_DESCRIPTION("Packet Engines Yellowfin G-NIC Gigabit Ethernet driver");
116MODULE_LICENSE("GPL");
117
118module_param(max_interrupt_work, int, 0);
119module_param(mtu, int, 0);
120module_param(debug, int, 0);
121module_param(rx_copybreak, int, 0);
122module_param_array(options, int, NULL, 0);
123module_param_array(full_duplex, int, NULL, 0);
124module_param(gx_fix, int, 0);
125MODULE_PARM_DESC(max_interrupt_work, "G-NIC maximum events handled per interrupt");
126MODULE_PARM_DESC(mtu, "G-NIC MTU (all boards)");
127MODULE_PARM_DESC(debug, "G-NIC debug level (0-7)");
128MODULE_PARM_DESC(rx_copybreak, "G-NIC copy breakpoint for copy-only-tiny-frames");
129MODULE_PARM_DESC(options, "G-NIC: Bits 0-3: media type, bit 17: full duplex");
130MODULE_PARM_DESC(full_duplex, "G-NIC full duplex setting(s) (1)");
131MODULE_PARM_DESC(gx_fix, "G-NIC: enable GX server chipset bug workaround (0-1)");
132
133/*
134 Theory of Operation
135
136I. Board Compatibility
137
138This device driver is designed for the Packet Engines "Yellowfin" Gigabit
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400139Ethernet adapter. The G-NIC 64-bit PCI card is supported, as well as the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140Symbios 53C885E dual function chip.
141
142II. Board-specific settings
143
144PCI bus devices are configured by the system at boot time, so no jumpers
145need to be set on the board. The system BIOS preferably should assign the
146PCI INTA signal to an otherwise unused system IRQ line.
147Note: Kernel versions earlier than 1.3.73 do not support shared PCI
148interrupt lines.
149
150III. Driver operation
151
152IIIa. Ring buffers
153
154The Yellowfin uses the Descriptor Based DMA Architecture specified by Apple.
155This is a descriptor list scheme similar to that used by the EEPro100 and
156Tulip. This driver uses two statically allocated fixed-size descriptor lists
157formed into rings by a branch from the final descriptor to the beginning of
158the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
159
160The driver allocates full frame size skbuffs for the Rx ring buffers at
161open() time and passes the skb->data field to the Yellowfin as receive data
162buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
163a fresh skbuff is allocated and the frame is copied to the new skbuff.
164When the incoming frame is larger, the skbuff is passed directly up the
165protocol stack and replaced by a newly allocated skbuff.
166
167The RX_COPYBREAK value is chosen to trade-off the memory wasted by
168using a full-sized skbuff for small frames vs. the copying costs of larger
169frames. For small frames the copying cost is negligible (esp. considering
170that we are pre-loading the cache with immediately useful header
171information). For large frames the copying cost is non-trivial, and the
172larger copy might flush the cache of useful data.
173
174IIIC. Synchronization
175
176The driver runs as two independent, single-threaded flows of control. One
177is the send-packet routine, which enforces single-threaded use by the
178dev->tbusy flag. The other thread is the interrupt handler, which is single
179threaded by the hardware and other software.
180
181The send packet thread has partial control over the Tx ring and 'dev->tbusy'
182flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
183queue slot is empty, it clears the tbusy flag when finished otherwise it sets
184the 'yp->tx_full' flag.
185
186The interrupt handler has exclusive control over the Rx ring and records stats
187from the Tx ring. After reaping the stats, it marks the Tx queue entry as
188empty by incrementing the dirty_tx mark. Iff the 'yp->tx_full' flag is set, it
189clears both the tx_full and tbusy flags.
190
191IV. Notes
192
193Thanks to Kim Stearns of Packet Engines for providing a pair of G-NIC boards.
194Thanks to Bruce Faust of Digitalscape for providing both their SYM53C885 board
195and an AlphaStation to verifty the Alpha port!
196
197IVb. References
198
199Yellowfin Engineering Design Specification, 4/23/97 Preliminary/Confidential
200Symbios SYM53C885 PCI-SCSI/Fast Ethernet Multifunction Controller Preliminary
201 Data Manual v3.0
202http://cesdis.gsfc.nasa.gov/linux/misc/NWay.html
203http://cesdis.gsfc.nasa.gov/linux/misc/100mbps.html
204
205IVc. Errata
206
207See Packet Engines confidential appendix (prototype chips only).
208*/
209
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400210
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212enum capability_flags {
213 HasMII=1, FullTxStatus=2, IsGigabit=4, HasMulticastBug=8, FullRxStatus=16,
214 HasMACAddrBug=32, /* Only on early revs. */
215 DontUseEeprom=64, /* Don't read the MAC from the EEPROm. */
216};
Jeff Garzikc3d8e682006-06-27 08:54:34 -0400217
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218/* The PCI I/O space extent. */
Jeff Garzikc3d8e682006-06-27 08:54:34 -0400219enum {
220 YELLOWFIN_SIZE = 0x100,
221};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222
223struct pci_id_info {
224 const char *name;
225 struct match_info {
226 int pci, pci_mask, subsystem, subsystem_mask;
227 int revision, revision_mask; /* Only 8 bits. */
228 } id;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229 int drv_flags; /* Driver use, intended as capability flags. */
230};
231
Arjan van de Venf71e1302006-03-03 21:33:57 -0500232static const struct pci_id_info pci_id_tbl[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233 {"Yellowfin G-NIC Gigabit Ethernet", { 0x07021000, 0xffffffff},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234 FullTxStatus | IsGigabit | HasMulticastBug | HasMACAddrBug | DontUseEeprom},
235 {"Symbios SYM83C885", { 0x07011000, 0xffffffff},
Jeff Garzikc3d8e682006-06-27 08:54:34 -0400236 HasMII | DontUseEeprom },
Jeff Garzik1f1bd5f2006-06-26 23:47:50 -0400237 { }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238};
239
Jeff Garzik1f1bd5f2006-06-26 23:47:50 -0400240static const struct pci_device_id yellowfin_pci_tbl[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 { 0x1000, 0x0702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
242 { 0x1000, 0x0701, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
Jeff Garzik1f1bd5f2006-06-26 23:47:50 -0400243 { }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244};
245MODULE_DEVICE_TABLE (pci, yellowfin_pci_tbl);
246
247
248/* Offsets to the Yellowfin registers. Various sizes and alignments. */
249enum yellowfin_offsets {
250 TxCtrl=0x00, TxStatus=0x04, TxPtr=0x0C,
251 TxIntrSel=0x10, TxBranchSel=0x14, TxWaitSel=0x18,
252 RxCtrl=0x40, RxStatus=0x44, RxPtr=0x4C,
253 RxIntrSel=0x50, RxBranchSel=0x54, RxWaitSel=0x58,
254 EventStatus=0x80, IntrEnb=0x82, IntrClear=0x84, IntrStatus=0x86,
255 ChipRev=0x8C, DMACtrl=0x90, TxThreshold=0x94,
256 Cnfg=0xA0, FrameGap0=0xA2, FrameGap1=0xA4,
257 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
258 MII_Status=0xAE,
259 RxDepth=0xB8, FlowCtrl=0xBC,
260 AddrMode=0xD0, StnAddr=0xD2, HashTbl=0xD8, FIFOcfg=0xF8,
261 EEStatus=0xF0, EECtrl=0xF1, EEAddr=0xF2, EERead=0xF3, EEWrite=0xF4,
262 EEFeature=0xF5,
263};
264
265/* The Yellowfin Rx and Tx buffer descriptors.
266 Elements are written as 32 bit for endian portability. */
267struct yellowfin_desc {
268 u32 dbdma_cmd;
269 u32 addr;
270 u32 branch_addr;
271 u32 result_status;
272};
273
274struct tx_status_words {
275#ifdef __BIG_ENDIAN
276 u16 tx_errs;
277 u16 tx_cnt;
278 u16 paused;
279 u16 total_tx_cnt;
280#else /* Little endian chips. */
281 u16 tx_cnt;
282 u16 tx_errs;
283 u16 total_tx_cnt;
284 u16 paused;
285#endif /* __BIG_ENDIAN */
286};
287
288/* Bits in yellowfin_desc.cmd */
289enum desc_cmd_bits {
290 CMD_TX_PKT=0x10000000, CMD_RX_BUF=0x20000000, CMD_TXSTATUS=0x30000000,
291 CMD_NOP=0x60000000, CMD_STOP=0x70000000,
292 BRANCH_ALWAYS=0x0C0000, INTR_ALWAYS=0x300000, WAIT_ALWAYS=0x030000,
293 BRANCH_IFTRUE=0x040000,
294};
295
296/* Bits in yellowfin_desc.status */
297enum desc_status_bits { RX_EOP=0x0040, };
298
299/* Bits in the interrupt status/mask registers. */
300enum intr_status_bits {
301 IntrRxDone=0x01, IntrRxInvalid=0x02, IntrRxPCIFault=0x04,IntrRxPCIErr=0x08,
302 IntrTxDone=0x10, IntrTxInvalid=0x20, IntrTxPCIFault=0x40,IntrTxPCIErr=0x80,
303 IntrEarlyRx=0x100, IntrWakeup=0x200, };
304
305#define PRIV_ALIGN 31 /* Required alignment mask */
306#define MII_CNT 4
307struct yellowfin_private {
308 /* Descriptor rings first for alignment.
309 Tx requires a second descriptor for status. */
310 struct yellowfin_desc *rx_ring;
311 struct yellowfin_desc *tx_ring;
312 struct sk_buff* rx_skbuff[RX_RING_SIZE];
313 struct sk_buff* tx_skbuff[TX_RING_SIZE];
314 dma_addr_t rx_ring_dma;
315 dma_addr_t tx_ring_dma;
316
317 struct tx_status_words *tx_status;
318 dma_addr_t tx_status_dma;
319
320 struct timer_list timer; /* Media selection timer. */
321 struct net_device_stats stats;
322 /* Frequently used and paired value: keep adjacent for cache effect. */
323 int chip_id, drv_flags;
324 struct pci_dev *pci_dev;
325 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
326 unsigned int rx_buf_sz; /* Based on MTU+slack. */
327 struct tx_status_words *tx_tail_desc;
328 unsigned int cur_tx, dirty_tx;
329 int tx_threshold;
330 unsigned int tx_full:1; /* The Tx queue is full. */
331 unsigned int full_duplex:1; /* Full-duplex operation requested. */
332 unsigned int duplex_lock:1;
333 unsigned int medialock:1; /* Do not sense media. */
334 unsigned int default_port:4; /* Last dev->if_port value. */
335 /* MII transceiver section. */
336 int mii_cnt; /* MII device addresses. */
337 u16 advertising; /* NWay media advertisement */
338 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used */
339 spinlock_t lock;
340 void __iomem *base;
341};
342
343static int read_eeprom(void __iomem *ioaddr, int location);
344static int mdio_read(void __iomem *ioaddr, int phy_id, int location);
345static void mdio_write(void __iomem *ioaddr, int phy_id, int location, int value);
346static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
347static int yellowfin_open(struct net_device *dev);
348static void yellowfin_timer(unsigned long data);
349static void yellowfin_tx_timeout(struct net_device *dev);
350static void yellowfin_init_ring(struct net_device *dev);
351static int yellowfin_start_xmit(struct sk_buff *skb, struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100352static irqreturn_t yellowfin_interrupt(int irq, void *dev_instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353static int yellowfin_rx(struct net_device *dev);
354static void yellowfin_error(struct net_device *dev, int intr_status);
355static int yellowfin_close(struct net_device *dev);
356static struct net_device_stats *yellowfin_get_stats(struct net_device *dev);
357static void set_rx_mode(struct net_device *dev);
Jeff Garzik7282d492006-09-13 14:30:00 -0400358static const struct ethtool_ops ethtool_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359
360
361static int __devinit yellowfin_init_one(struct pci_dev *pdev,
362 const struct pci_device_id *ent)
363{
364 struct net_device *dev;
365 struct yellowfin_private *np;
366 int irq;
367 int chip_idx = ent->driver_data;
368 static int find_cnt;
369 void __iomem *ioaddr;
370 int i, option = find_cnt < MAX_UNITS ? options[find_cnt] : 0;
371 int drv_flags = pci_id_tbl[chip_idx].drv_flags;
372 void *ring_space;
373 dma_addr_t ring_dma;
374#ifdef USE_IO_OPS
375 int bar = 0;
376#else
377 int bar = 1;
378#endif
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400379
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380/* when built into the kernel, we only print version if device is found */
381#ifndef MODULE
382 static int printed_version;
383 if (!printed_version++)
384 printk(version);
385#endif
386
387 i = pci_enable_device(pdev);
388 if (i) return i;
389
390 dev = alloc_etherdev(sizeof(*np));
391 if (!dev) {
392 printk (KERN_ERR PFX "cannot allocate ethernet device\n");
393 return -ENOMEM;
394 }
395 SET_MODULE_OWNER(dev);
396 SET_NETDEV_DEV(dev, &pdev->dev);
397
398 np = netdev_priv(dev);
399
400 if (pci_request_regions(pdev, DRV_NAME))
401 goto err_out_free_netdev;
402
403 pci_set_master (pdev);
404
405 ioaddr = pci_iomap(pdev, bar, YELLOWFIN_SIZE);
406 if (!ioaddr)
407 goto err_out_free_res;
408
409 irq = pdev->irq;
410
411 if (drv_flags & DontUseEeprom)
412 for (i = 0; i < 6; i++)
413 dev->dev_addr[i] = ioread8(ioaddr + StnAddr + i);
414 else {
415 int ee_offset = (read_eeprom(ioaddr, 6) == 0xff ? 0x100 : 0);
416 for (i = 0; i < 6; i++)
417 dev->dev_addr[i] = read_eeprom(ioaddr, ee_offset + i);
418 }
419
420 /* Reset the chip. */
421 iowrite32(0x80000000, ioaddr + DMACtrl);
422
423 dev->base_addr = (unsigned long)ioaddr;
424 dev->irq = irq;
425
426 pci_set_drvdata(pdev, dev);
427 spin_lock_init(&np->lock);
428
429 np->pci_dev = pdev;
430 np->chip_id = chip_idx;
431 np->drv_flags = drv_flags;
432 np->base = ioaddr;
433
434 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
435 if (!ring_space)
436 goto err_out_cleardev;
437 np->tx_ring = (struct yellowfin_desc *)ring_space;
438 np->tx_ring_dma = ring_dma;
439
440 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
441 if (!ring_space)
442 goto err_out_unmap_tx;
443 np->rx_ring = (struct yellowfin_desc *)ring_space;
444 np->rx_ring_dma = ring_dma;
445
446 ring_space = pci_alloc_consistent(pdev, STATUS_TOTAL_SIZE, &ring_dma);
447 if (!ring_space)
448 goto err_out_unmap_rx;
449 np->tx_status = (struct tx_status_words *)ring_space;
450 np->tx_status_dma = ring_dma;
451
452 if (dev->mem_start)
453 option = dev->mem_start;
454
455 /* The lower four bits are the media type. */
456 if (option > 0) {
457 if (option & 0x200)
458 np->full_duplex = 1;
459 np->default_port = option & 15;
460 if (np->default_port)
461 np->medialock = 1;
462 }
463 if (find_cnt < MAX_UNITS && full_duplex[find_cnt] > 0)
464 np->full_duplex = 1;
465
466 if (np->full_duplex)
467 np->duplex_lock = 1;
468
469 /* The Yellowfin-specific entries in the device structure. */
470 dev->open = &yellowfin_open;
471 dev->hard_start_xmit = &yellowfin_start_xmit;
472 dev->stop = &yellowfin_close;
473 dev->get_stats = &yellowfin_get_stats;
474 dev->set_multicast_list = &set_rx_mode;
475 dev->do_ioctl = &netdev_ioctl;
476 SET_ETHTOOL_OPS(dev, &ethtool_ops);
477 dev->tx_timeout = yellowfin_tx_timeout;
478 dev->watchdog_timeo = TX_TIMEOUT;
479
480 if (mtu)
481 dev->mtu = mtu;
482
483 i = register_netdev(dev);
484 if (i)
485 goto err_out_unmap_status;
486
487 printk(KERN_INFO "%s: %s type %8x at %p, ",
488 dev->name, pci_id_tbl[chip_idx].name,
489 ioread32(ioaddr + ChipRev), ioaddr);
490 for (i = 0; i < 5; i++)
491 printk("%2.2x:", dev->dev_addr[i]);
492 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
493
494 if (np->drv_flags & HasMII) {
495 int phy, phy_idx = 0;
496 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
497 int mii_status = mdio_read(ioaddr, phy, 1);
498 if (mii_status != 0xffff && mii_status != 0x0000) {
499 np->phys[phy_idx++] = phy;
500 np->advertising = mdio_read(ioaddr, phy, 4);
501 printk(KERN_INFO "%s: MII PHY found at address %d, status "
502 "0x%4.4x advertising %4.4x.\n",
503 dev->name, phy, mii_status, np->advertising);
504 }
505 }
506 np->mii_cnt = phy_idx;
507 }
508
509 find_cnt++;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400510
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511 return 0;
512
513err_out_unmap_status:
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400514 pci_free_consistent(pdev, STATUS_TOTAL_SIZE, np->tx_status,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700515 np->tx_status_dma);
516err_out_unmap_rx:
517 pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
518err_out_unmap_tx:
519 pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
520err_out_cleardev:
521 pci_set_drvdata(pdev, NULL);
522 pci_iounmap(pdev, ioaddr);
523err_out_free_res:
524 pci_release_regions(pdev);
525err_out_free_netdev:
526 free_netdev (dev);
527 return -ENODEV;
528}
529
530static int __devinit read_eeprom(void __iomem *ioaddr, int location)
531{
532 int bogus_cnt = 10000; /* Typical 33Mhz: 1050 ticks */
533
534 iowrite8(location, ioaddr + EEAddr);
535 iowrite8(0x30 | ((location >> 8) & 7), ioaddr + EECtrl);
536 while ((ioread8(ioaddr + EEStatus) & 0x80) && --bogus_cnt > 0)
537 ;
538 return ioread8(ioaddr + EERead);
539}
540
541/* MII Managemen Data I/O accesses.
542 These routines assume the MDIO controller is idle, and do not exit until
543 the command is finished. */
544
545static int mdio_read(void __iomem *ioaddr, int phy_id, int location)
546{
547 int i;
548
549 iowrite16((phy_id<<8) + location, ioaddr + MII_Addr);
550 iowrite16(1, ioaddr + MII_Cmd);
551 for (i = 10000; i >= 0; i--)
552 if ((ioread16(ioaddr + MII_Status) & 1) == 0)
553 break;
554 return ioread16(ioaddr + MII_Rd_Data);
555}
556
557static void mdio_write(void __iomem *ioaddr, int phy_id, int location, int value)
558{
559 int i;
560
561 iowrite16((phy_id<<8) + location, ioaddr + MII_Addr);
562 iowrite16(value, ioaddr + MII_Wr_Data);
563
564 /* Wait for the command to finish. */
565 for (i = 10000; i >= 0; i--)
566 if ((ioread16(ioaddr + MII_Status) & 1) == 0)
567 break;
568 return;
569}
570
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400571
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572static int yellowfin_open(struct net_device *dev)
573{
574 struct yellowfin_private *yp = netdev_priv(dev);
575 void __iomem *ioaddr = yp->base;
576 int i;
577
578 /* Reset the chip. */
579 iowrite32(0x80000000, ioaddr + DMACtrl);
580
Thomas Gleixner1fb9df52006-07-01 19:29:39 -0700581 i = request_irq(dev->irq, &yellowfin_interrupt, IRQF_SHARED, dev->name, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582 if (i) return i;
583
584 if (yellowfin_debug > 1)
585 printk(KERN_DEBUG "%s: yellowfin_open() irq %d.\n",
586 dev->name, dev->irq);
587
588 yellowfin_init_ring(dev);
589
590 iowrite32(yp->rx_ring_dma, ioaddr + RxPtr);
591 iowrite32(yp->tx_ring_dma, ioaddr + TxPtr);
592
593 for (i = 0; i < 6; i++)
594 iowrite8(dev->dev_addr[i], ioaddr + StnAddr + i);
595
596 /* Set up various condition 'select' registers.
597 There are no options here. */
598 iowrite32(0x00800080, ioaddr + TxIntrSel); /* Interrupt on Tx abort */
599 iowrite32(0x00800080, ioaddr + TxBranchSel); /* Branch on Tx abort */
600 iowrite32(0x00400040, ioaddr + TxWaitSel); /* Wait on Tx status */
601 iowrite32(0x00400040, ioaddr + RxIntrSel); /* Interrupt on Rx done */
602 iowrite32(0x00400040, ioaddr + RxBranchSel); /* Branch on Rx error */
603 iowrite32(0x00400040, ioaddr + RxWaitSel); /* Wait on Rx done */
604
605 /* Initialize other registers: with so many this eventually this will
606 converted to an offset/value list. */
607 iowrite32(dma_ctrl, ioaddr + DMACtrl);
608 iowrite16(fifo_cfg, ioaddr + FIFOcfg);
609 /* Enable automatic generation of flow control frames, period 0xffff. */
610 iowrite32(0x0030FFFF, ioaddr + FlowCtrl);
611
612 yp->tx_threshold = 32;
613 iowrite32(yp->tx_threshold, ioaddr + TxThreshold);
614
615 if (dev->if_port == 0)
616 dev->if_port = yp->default_port;
617
618 netif_start_queue(dev);
619
620 /* Setting the Rx mode will start the Rx process. */
621 if (yp->drv_flags & IsGigabit) {
622 /* We are always in full-duplex mode with gigabit! */
623 yp->full_duplex = 1;
624 iowrite16(0x01CF, ioaddr + Cnfg);
625 } else {
626 iowrite16(0x0018, ioaddr + FrameGap0); /* 0060/4060 for non-MII 10baseT */
627 iowrite16(0x1018, ioaddr + FrameGap1);
628 iowrite16(0x101C | (yp->full_duplex ? 2 : 0), ioaddr + Cnfg);
629 }
630 set_rx_mode(dev);
631
632 /* Enable interrupts by setting the interrupt mask. */
633 iowrite16(0x81ff, ioaddr + IntrEnb); /* See enum intr_status_bits */
634 iowrite16(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
635 iowrite32(0x80008000, ioaddr + RxCtrl); /* Start Rx and Tx channels. */
636 iowrite32(0x80008000, ioaddr + TxCtrl);
637
638 if (yellowfin_debug > 2) {
639 printk(KERN_DEBUG "%s: Done yellowfin_open().\n",
640 dev->name);
641 }
642
643 /* Set the timer to check for link beat. */
644 init_timer(&yp->timer);
645 yp->timer.expires = jiffies + 3*HZ;
646 yp->timer.data = (unsigned long)dev;
647 yp->timer.function = &yellowfin_timer; /* timer handler */
648 add_timer(&yp->timer);
649
650 return 0;
651}
652
653static void yellowfin_timer(unsigned long data)
654{
655 struct net_device *dev = (struct net_device *)data;
656 struct yellowfin_private *yp = netdev_priv(dev);
657 void __iomem *ioaddr = yp->base;
658 int next_tick = 60*HZ;
659
660 if (yellowfin_debug > 3) {
661 printk(KERN_DEBUG "%s: Yellowfin timer tick, status %8.8x.\n",
662 dev->name, ioread16(ioaddr + IntrStatus));
663 }
664
665 if (yp->mii_cnt) {
666 int bmsr = mdio_read(ioaddr, yp->phys[0], MII_BMSR);
667 int lpa = mdio_read(ioaddr, yp->phys[0], MII_LPA);
668 int negotiated = lpa & yp->advertising;
669 if (yellowfin_debug > 1)
670 printk(KERN_DEBUG "%s: MII #%d status register is %4.4x, "
671 "link partner capability %4.4x.\n",
672 dev->name, yp->phys[0], bmsr, lpa);
673
674 yp->full_duplex = mii_duplex(yp->duplex_lock, negotiated);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400675
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676 iowrite16(0x101C | (yp->full_duplex ? 2 : 0), ioaddr + Cnfg);
677
678 if (bmsr & BMSR_LSTATUS)
679 next_tick = 60*HZ;
680 else
681 next_tick = 3*HZ;
682 }
683
684 yp->timer.expires = jiffies + next_tick;
685 add_timer(&yp->timer);
686}
687
688static void yellowfin_tx_timeout(struct net_device *dev)
689{
690 struct yellowfin_private *yp = netdev_priv(dev);
691 void __iomem *ioaddr = yp->base;
692
693 printk(KERN_WARNING "%s: Yellowfin transmit timed out at %d/%d Tx "
694 "status %4.4x, Rx status %4.4x, resetting...\n",
695 dev->name, yp->cur_tx, yp->dirty_tx,
696 ioread32(ioaddr + TxStatus), ioread32(ioaddr + RxStatus));
697
698 /* Note: these should be KERN_DEBUG. */
699 if (yellowfin_debug) {
700 int i;
701 printk(KERN_WARNING " Rx ring %p: ", yp->rx_ring);
702 for (i = 0; i < RX_RING_SIZE; i++)
703 printk(" %8.8x", yp->rx_ring[i].result_status);
704 printk("\n"KERN_WARNING" Tx ring %p: ", yp->tx_ring);
705 for (i = 0; i < TX_RING_SIZE; i++)
706 printk(" %4.4x /%8.8x", yp->tx_status[i].tx_errs,
707 yp->tx_ring[i].result_status);
708 printk("\n");
709 }
710
711 /* If the hardware is found to hang regularly, we will update the code
712 to reinitialize the chip here. */
713 dev->if_port = 0;
714
715 /* Wake the potentially-idle transmit channel. */
716 iowrite32(0x10001000, yp->base + TxCtrl);
717 if (yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE)
718 netif_wake_queue (dev); /* Typical path */
719
720 dev->trans_start = jiffies;
721 yp->stats.tx_errors++;
722}
723
724/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
725static void yellowfin_init_ring(struct net_device *dev)
726{
727 struct yellowfin_private *yp = netdev_priv(dev);
728 int i;
729
730 yp->tx_full = 0;
731 yp->cur_rx = yp->cur_tx = 0;
732 yp->dirty_tx = 0;
733
734 yp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
735
736 for (i = 0; i < RX_RING_SIZE; i++) {
737 yp->rx_ring[i].dbdma_cmd =
738 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | yp->rx_buf_sz);
739 yp->rx_ring[i].branch_addr = cpu_to_le32(yp->rx_ring_dma +
740 ((i+1)%RX_RING_SIZE)*sizeof(struct yellowfin_desc));
741 }
742
743 for (i = 0; i < RX_RING_SIZE; i++) {
744 struct sk_buff *skb = dev_alloc_skb(yp->rx_buf_sz);
745 yp->rx_skbuff[i] = skb;
746 if (skb == NULL)
747 break;
748 skb->dev = dev; /* Mark as being used by this device. */
749 skb_reserve(skb, 2); /* 16 byte align the IP header. */
750 yp->rx_ring[i].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -0700751 skb->data, yp->rx_buf_sz, PCI_DMA_FROMDEVICE));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700752 }
753 yp->rx_ring[i-1].dbdma_cmd = cpu_to_le32(CMD_STOP);
754 yp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
755
756#define NO_TXSTATS
757#ifdef NO_TXSTATS
758 /* In this mode the Tx ring needs only a single descriptor. */
759 for (i = 0; i < TX_RING_SIZE; i++) {
760 yp->tx_skbuff[i] = NULL;
761 yp->tx_ring[i].dbdma_cmd = cpu_to_le32(CMD_STOP);
762 yp->tx_ring[i].branch_addr = cpu_to_le32(yp->tx_ring_dma +
763 ((i+1)%TX_RING_SIZE)*sizeof(struct yellowfin_desc));
764 }
765 /* Wrap ring */
766 yp->tx_ring[--i].dbdma_cmd = cpu_to_le32(CMD_STOP | BRANCH_ALWAYS);
767#else
768{
769 int j;
770
771 /* Tx ring needs a pair of descriptors, the second for the status. */
772 for (i = 0; i < TX_RING_SIZE; i++) {
773 j = 2*i;
774 yp->tx_skbuff[i] = 0;
775 /* Branch on Tx error. */
776 yp->tx_ring[j].dbdma_cmd = cpu_to_le32(CMD_STOP);
777 yp->tx_ring[j].branch_addr = cpu_to_le32(yp->tx_ring_dma +
778 (j+1)*sizeof(struct yellowfin_desc);
779 j++;
780 if (yp->flags & FullTxStatus) {
781 yp->tx_ring[j].dbdma_cmd =
782 cpu_to_le32(CMD_TXSTATUS | sizeof(*yp->tx_status));
783 yp->tx_ring[j].request_cnt = sizeof(*yp->tx_status);
784 yp->tx_ring[j].addr = cpu_to_le32(yp->tx_status_dma +
785 i*sizeof(struct tx_status_words);
786 } else {
787 /* Symbios chips write only tx_errs word. */
788 yp->tx_ring[j].dbdma_cmd =
789 cpu_to_le32(CMD_TXSTATUS | INTR_ALWAYS | 2);
790 yp->tx_ring[j].request_cnt = 2;
791 /* Om pade ummmmm... */
792 yp->tx_ring[j].addr = cpu_to_le32(yp->tx_status_dma +
793 i*sizeof(struct tx_status_words) +
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400794 &(yp->tx_status[0].tx_errs) -
Linus Torvalds1da177e2005-04-16 15:20:36 -0700795 &(yp->tx_status[0]));
796 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400797 yp->tx_ring[j].branch_addr = cpu_to_le32(yp->tx_ring_dma +
Linus Torvalds1da177e2005-04-16 15:20:36 -0700798 ((j+1)%(2*TX_RING_SIZE))*sizeof(struct yellowfin_desc));
799 }
800 /* Wrap ring */
801 yp->tx_ring[++j].dbdma_cmd |= cpu_to_le32(BRANCH_ALWAYS | INTR_ALWAYS);
802}
803#endif
804 yp->tx_tail_desc = &yp->tx_status[0];
805 return;
806}
807
808static int yellowfin_start_xmit(struct sk_buff *skb, struct net_device *dev)
809{
810 struct yellowfin_private *yp = netdev_priv(dev);
811 unsigned entry;
812 int len = skb->len;
813
814 netif_stop_queue (dev);
815
816 /* Note: Ordering is important here, set the field with the
817 "ownership" bit last, and only then increment cur_tx. */
818
819 /* Calculate the next Tx descriptor entry. */
820 entry = yp->cur_tx % TX_RING_SIZE;
821
822 if (gx_fix) { /* Note: only works for paddable protocols e.g. IP. */
823 int cacheline_end = ((unsigned long)skb->data + skb->len) % 32;
824 /* Fix GX chipset errata. */
825 if (cacheline_end > 24 || cacheline_end == 0) {
826 len = skb->len + 32 - cacheline_end + 1;
Herbert Xu5b057c62006-06-23 02:06:41 -0700827 if (skb_padto(skb, len)) {
828 yp->tx_skbuff[entry] = NULL;
829 netif_wake_queue(dev);
830 return 0;
831 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700832 }
833 }
834 yp->tx_skbuff[entry] = skb;
835
836#ifdef NO_TXSTATS
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400837 yp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838 skb->data, len, PCI_DMA_TODEVICE));
839 yp->tx_ring[entry].result_status = 0;
840 if (entry >= TX_RING_SIZE-1) {
841 /* New stop command. */
842 yp->tx_ring[0].dbdma_cmd = cpu_to_le32(CMD_STOP);
843 yp->tx_ring[TX_RING_SIZE-1].dbdma_cmd =
844 cpu_to_le32(CMD_TX_PKT|BRANCH_ALWAYS | len);
845 } else {
846 yp->tx_ring[entry+1].dbdma_cmd = cpu_to_le32(CMD_STOP);
847 yp->tx_ring[entry].dbdma_cmd =
848 cpu_to_le32(CMD_TX_PKT | BRANCH_IFTRUE | len);
849 }
850 yp->cur_tx++;
851#else
852 yp->tx_ring[entry<<1].request_cnt = len;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400853 yp->tx_ring[entry<<1].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700854 skb->data, len, PCI_DMA_TODEVICE));
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400855 /* The input_last (status-write) command is constant, but we must
Linus Torvalds1da177e2005-04-16 15:20:36 -0700856 rewrite the subsequent 'stop' command. */
857
858 yp->cur_tx++;
859 {
860 unsigned next_entry = yp->cur_tx % TX_RING_SIZE;
861 yp->tx_ring[next_entry<<1].dbdma_cmd = cpu_to_le32(CMD_STOP);
862 }
863 /* Final step -- overwrite the old 'stop' command. */
864
865 yp->tx_ring[entry<<1].dbdma_cmd =
866 cpu_to_le32( ((entry % 6) == 0 ? CMD_TX_PKT|INTR_ALWAYS|BRANCH_IFTRUE :
867 CMD_TX_PKT | BRANCH_IFTRUE) | len);
868#endif
869
870 /* Non-x86 Todo: explicitly flush cache lines here. */
871
872 /* Wake the potentially-idle transmit channel. */
873 iowrite32(0x10001000, yp->base + TxCtrl);
874
875 if (yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE)
876 netif_start_queue (dev); /* Typical path */
877 else
878 yp->tx_full = 1;
879 dev->trans_start = jiffies;
880
881 if (yellowfin_debug > 4) {
882 printk(KERN_DEBUG "%s: Yellowfin transmit frame #%d queued in slot %d.\n",
883 dev->name, yp->cur_tx, entry);
884 }
885 return 0;
886}
887
888/* The interrupt handler does all of the Rx thread work and cleans up
889 after the Tx thread. */
David Howells7d12e782006-10-05 14:55:46 +0100890static irqreturn_t yellowfin_interrupt(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891{
892 struct net_device *dev = dev_instance;
893 struct yellowfin_private *yp;
894 void __iomem *ioaddr;
895 int boguscnt = max_interrupt_work;
896 unsigned int handled = 0;
897
Linus Torvalds1da177e2005-04-16 15:20:36 -0700898 yp = netdev_priv(dev);
899 ioaddr = yp->base;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400900
Linus Torvalds1da177e2005-04-16 15:20:36 -0700901 spin_lock (&yp->lock);
902
903 do {
904 u16 intr_status = ioread16(ioaddr + IntrClear);
905
906 if (yellowfin_debug > 4)
907 printk(KERN_DEBUG "%s: Yellowfin interrupt, status %4.4x.\n",
908 dev->name, intr_status);
909
910 if (intr_status == 0)
911 break;
912 handled = 1;
913
914 if (intr_status & (IntrRxDone | IntrEarlyRx)) {
915 yellowfin_rx(dev);
916 iowrite32(0x10001000, ioaddr + RxCtrl); /* Wake Rx engine. */
917 }
918
919#ifdef NO_TXSTATS
920 for (; yp->cur_tx - yp->dirty_tx > 0; yp->dirty_tx++) {
921 int entry = yp->dirty_tx % TX_RING_SIZE;
922 struct sk_buff *skb;
923
924 if (yp->tx_ring[entry].result_status == 0)
925 break;
926 skb = yp->tx_skbuff[entry];
927 yp->stats.tx_packets++;
928 yp->stats.tx_bytes += skb->len;
929 /* Free the original skb. */
930 pci_unmap_single(yp->pci_dev, yp->tx_ring[entry].addr,
931 skb->len, PCI_DMA_TODEVICE);
932 dev_kfree_skb_irq(skb);
933 yp->tx_skbuff[entry] = NULL;
934 }
935 if (yp->tx_full
936 && yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE - 4) {
937 /* The ring is no longer full, clear tbusy. */
938 yp->tx_full = 0;
939 netif_wake_queue(dev);
940 }
941#else
942 if ((intr_status & IntrTxDone) || (yp->tx_tail_desc->tx_errs)) {
943 unsigned dirty_tx = yp->dirty_tx;
944
945 for (dirty_tx = yp->dirty_tx; yp->cur_tx - dirty_tx > 0;
946 dirty_tx++) {
947 /* Todo: optimize this. */
948 int entry = dirty_tx % TX_RING_SIZE;
949 u16 tx_errs = yp->tx_status[entry].tx_errs;
950 struct sk_buff *skb;
951
952#ifndef final_version
953 if (yellowfin_debug > 5)
954 printk(KERN_DEBUG "%s: Tx queue %d check, Tx status "
955 "%4.4x %4.4x %4.4x %4.4x.\n",
956 dev->name, entry,
957 yp->tx_status[entry].tx_cnt,
958 yp->tx_status[entry].tx_errs,
959 yp->tx_status[entry].total_tx_cnt,
960 yp->tx_status[entry].paused);
961#endif
962 if (tx_errs == 0)
963 break; /* It still hasn't been Txed */
964 skb = yp->tx_skbuff[entry];
965 if (tx_errs & 0xF810) {
966 /* There was an major error, log it. */
967#ifndef final_version
968 if (yellowfin_debug > 1)
969 printk(KERN_DEBUG "%s: Transmit error, Tx status %4.4x.\n",
970 dev->name, tx_errs);
971#endif
972 yp->stats.tx_errors++;
973 if (tx_errs & 0xF800) yp->stats.tx_aborted_errors++;
974 if (tx_errs & 0x0800) yp->stats.tx_carrier_errors++;
975 if (tx_errs & 0x2000) yp->stats.tx_window_errors++;
976 if (tx_errs & 0x8000) yp->stats.tx_fifo_errors++;
977 } else {
978#ifndef final_version
979 if (yellowfin_debug > 4)
980 printk(KERN_DEBUG "%s: Normal transmit, Tx status %4.4x.\n",
981 dev->name, tx_errs);
982#endif
983 yp->stats.tx_bytes += skb->len;
984 yp->stats.collisions += tx_errs & 15;
985 yp->stats.tx_packets++;
986 }
987 /* Free the original skb. */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400988 pci_unmap_single(yp->pci_dev,
989 yp->tx_ring[entry<<1].addr, skb->len,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700990 PCI_DMA_TODEVICE);
991 dev_kfree_skb_irq(skb);
992 yp->tx_skbuff[entry] = 0;
993 /* Mark status as empty. */
994 yp->tx_status[entry].tx_errs = 0;
995 }
996
997#ifndef final_version
998 if (yp->cur_tx - dirty_tx > TX_RING_SIZE) {
999 printk(KERN_ERR "%s: Out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
1000 dev->name, dirty_tx, yp->cur_tx, yp->tx_full);
1001 dirty_tx += TX_RING_SIZE;
1002 }
1003#endif
1004
1005 if (yp->tx_full
1006 && yp->cur_tx - dirty_tx < TX_QUEUE_SIZE - 2) {
1007 /* The ring is no longer full, clear tbusy. */
1008 yp->tx_full = 0;
1009 netif_wake_queue(dev);
1010 }
1011
1012 yp->dirty_tx = dirty_tx;
1013 yp->tx_tail_desc = &yp->tx_status[dirty_tx % TX_RING_SIZE];
1014 }
1015#endif
1016
1017 /* Log errors and other uncommon events. */
1018 if (intr_status & 0x2ee) /* Abnormal error summary. */
1019 yellowfin_error(dev, intr_status);
1020
1021 if (--boguscnt < 0) {
1022 printk(KERN_WARNING "%s: Too much work at interrupt, "
1023 "status=0x%4.4x.\n",
1024 dev->name, intr_status);
1025 break;
1026 }
1027 } while (1);
1028
1029 if (yellowfin_debug > 3)
1030 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1031 dev->name, ioread16(ioaddr + IntrStatus));
1032
1033 spin_unlock (&yp->lock);
1034 return IRQ_RETVAL(handled);
1035}
1036
1037/* This routine is logically part of the interrupt handler, but separated
1038 for clarity and better register allocation. */
1039static int yellowfin_rx(struct net_device *dev)
1040{
1041 struct yellowfin_private *yp = netdev_priv(dev);
1042 int entry = yp->cur_rx % RX_RING_SIZE;
1043 int boguscnt = yp->dirty_rx + RX_RING_SIZE - yp->cur_rx;
1044
1045 if (yellowfin_debug > 4) {
1046 printk(KERN_DEBUG " In yellowfin_rx(), entry %d status %8.8x.\n",
1047 entry, yp->rx_ring[entry].result_status);
1048 printk(KERN_DEBUG " #%d desc. %8.8x %8.8x %8.8x.\n",
1049 entry, yp->rx_ring[entry].dbdma_cmd, yp->rx_ring[entry].addr,
1050 yp->rx_ring[entry].result_status);
1051 }
1052
1053 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1054 while (1) {
1055 struct yellowfin_desc *desc = &yp->rx_ring[entry];
1056 struct sk_buff *rx_skb = yp->rx_skbuff[entry];
1057 s16 frame_status;
1058 u16 desc_status;
1059 int data_size;
1060 u8 *buf_addr;
1061
1062 if(!desc->result_status)
1063 break;
1064 pci_dma_sync_single_for_cpu(yp->pci_dev, desc->addr,
1065 yp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1066 desc_status = le32_to_cpu(desc->result_status) >> 16;
David S. Miller689be432005-06-28 15:25:31 -07001067 buf_addr = rx_skb->data;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001068 data_size = (le32_to_cpu(desc->dbdma_cmd) -
Linus Torvalds1da177e2005-04-16 15:20:36 -07001069 le32_to_cpu(desc->result_status)) & 0xffff;
1070 frame_status = le16_to_cpu(get_unaligned((s16*)&(buf_addr[data_size - 2])));
1071 if (yellowfin_debug > 4)
1072 printk(KERN_DEBUG " yellowfin_rx() status was %4.4x.\n",
1073 frame_status);
1074 if (--boguscnt < 0)
1075 break;
1076 if ( ! (desc_status & RX_EOP)) {
1077 if (data_size != 0)
1078 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned multiple buffers,"
1079 " status %4.4x, data_size %d!\n", dev->name, desc_status, data_size);
1080 yp->stats.rx_length_errors++;
1081 } else if ((yp->drv_flags & IsGigabit) && (frame_status & 0x0038)) {
1082 /* There was a error. */
1083 if (yellowfin_debug > 3)
1084 printk(KERN_DEBUG " yellowfin_rx() Rx error was %4.4x.\n",
1085 frame_status);
1086 yp->stats.rx_errors++;
1087 if (frame_status & 0x0060) yp->stats.rx_length_errors++;
1088 if (frame_status & 0x0008) yp->stats.rx_frame_errors++;
1089 if (frame_status & 0x0010) yp->stats.rx_crc_errors++;
1090 if (frame_status < 0) yp->stats.rx_dropped++;
1091 } else if ( !(yp->drv_flags & IsGigabit) &&
1092 ((buf_addr[data_size-1] & 0x85) || buf_addr[data_size-2] & 0xC0)) {
1093 u8 status1 = buf_addr[data_size-2];
1094 u8 status2 = buf_addr[data_size-1];
1095 yp->stats.rx_errors++;
1096 if (status1 & 0xC0) yp->stats.rx_length_errors++;
1097 if (status2 & 0x03) yp->stats.rx_frame_errors++;
1098 if (status2 & 0x04) yp->stats.rx_crc_errors++;
1099 if (status2 & 0x80) yp->stats.rx_dropped++;
1100#ifdef YF_PROTOTYPE /* Support for prototype hardware errata. */
1101 } else if ((yp->flags & HasMACAddrBug) &&
1102 memcmp(le32_to_cpu(yp->rx_ring_dma +
1103 entry*sizeof(struct yellowfin_desc)),
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001104 dev->dev_addr, 6) != 0 &&
Linus Torvalds1da177e2005-04-16 15:20:36 -07001105 memcmp(le32_to_cpu(yp->rx_ring_dma +
1106 entry*sizeof(struct yellowfin_desc)),
1107 "\377\377\377\377\377\377", 6) != 0) {
1108 if (bogus_rx++ == 0)
1109 printk(KERN_WARNING "%s: Bad frame to %2.2x:%2.2x:%2.2x:%2.2x:"
1110 "%2.2x:%2.2x.\n",
1111 dev->name, buf_addr[0], buf_addr[1], buf_addr[2],
1112 buf_addr[3], buf_addr[4], buf_addr[5]);
1113#endif
1114 } else {
1115 struct sk_buff *skb;
1116 int pkt_len = data_size -
1117 (yp->chip_id ? 7 : 8 + buf_addr[data_size - 8]);
1118 /* To verify: Yellowfin Length should omit the CRC! */
1119
1120#ifndef final_version
1121 if (yellowfin_debug > 4)
1122 printk(KERN_DEBUG " yellowfin_rx() normal Rx pkt length %d"
1123 " of %d, bogus_cnt %d.\n",
1124 pkt_len, data_size, boguscnt);
1125#endif
1126 /* Check if the packet is long enough to just pass up the skbuff
1127 without copying to a properly sized skbuff. */
1128 if (pkt_len > rx_copybreak) {
1129 skb_put(skb = rx_skb, pkt_len);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001130 pci_unmap_single(yp->pci_dev,
1131 yp->rx_ring[entry].addr,
1132 yp->rx_buf_sz,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001133 PCI_DMA_FROMDEVICE);
1134 yp->rx_skbuff[entry] = NULL;
1135 } else {
1136 skb = dev_alloc_skb(pkt_len + 2);
1137 if (skb == NULL)
1138 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001139 skb_reserve(skb, 2); /* 16 byte align the IP header */
David S. Miller8c7b7fa2007-07-10 22:08:12 -07001140 skb_copy_to_linear_data(skb, rx_skb->data, pkt_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001141 skb_put(skb, pkt_len);
1142 pci_dma_sync_single_for_device(yp->pci_dev, desc->addr,
1143 yp->rx_buf_sz,
1144 PCI_DMA_FROMDEVICE);
1145 }
1146 skb->protocol = eth_type_trans(skb, dev);
1147 netif_rx(skb);
1148 dev->last_rx = jiffies;
1149 yp->stats.rx_packets++;
1150 yp->stats.rx_bytes += pkt_len;
1151 }
1152 entry = (++yp->cur_rx) % RX_RING_SIZE;
1153 }
1154
1155 /* Refill the Rx ring buffers. */
1156 for (; yp->cur_rx - yp->dirty_rx > 0; yp->dirty_rx++) {
1157 entry = yp->dirty_rx % RX_RING_SIZE;
1158 if (yp->rx_skbuff[entry] == NULL) {
1159 struct sk_buff *skb = dev_alloc_skb(yp->rx_buf_sz);
1160 if (skb == NULL)
1161 break; /* Better luck next round. */
1162 yp->rx_skbuff[entry] = skb;
1163 skb->dev = dev; /* Mark as being used by this device. */
1164 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1165 yp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -07001166 skb->data, yp->rx_buf_sz, PCI_DMA_FROMDEVICE));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001167 }
1168 yp->rx_ring[entry].dbdma_cmd = cpu_to_le32(CMD_STOP);
1169 yp->rx_ring[entry].result_status = 0; /* Clear complete bit. */
1170 if (entry != 0)
1171 yp->rx_ring[entry - 1].dbdma_cmd =
1172 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | yp->rx_buf_sz);
1173 else
1174 yp->rx_ring[RX_RING_SIZE - 1].dbdma_cmd =
1175 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | BRANCH_ALWAYS
1176 | yp->rx_buf_sz);
1177 }
1178
1179 return 0;
1180}
1181
1182static void yellowfin_error(struct net_device *dev, int intr_status)
1183{
1184 struct yellowfin_private *yp = netdev_priv(dev);
1185
1186 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1187 dev->name, intr_status);
1188 /* Hmmmmm, it's not clear what to do here. */
1189 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1190 yp->stats.tx_errors++;
1191 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1192 yp->stats.rx_errors++;
1193}
1194
1195static int yellowfin_close(struct net_device *dev)
1196{
1197 struct yellowfin_private *yp = netdev_priv(dev);
1198 void __iomem *ioaddr = yp->base;
1199 int i;
1200
1201 netif_stop_queue (dev);
1202
1203 if (yellowfin_debug > 1) {
1204 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x "
1205 "Rx %4.4x Int %2.2x.\n",
1206 dev->name, ioread16(ioaddr + TxStatus),
1207 ioread16(ioaddr + RxStatus),
1208 ioread16(ioaddr + IntrStatus));
1209 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1210 dev->name, yp->cur_tx, yp->dirty_tx, yp->cur_rx, yp->dirty_rx);
1211 }
1212
1213 /* Disable interrupts by clearing the interrupt mask. */
1214 iowrite16(0x0000, ioaddr + IntrEnb);
1215
1216 /* Stop the chip's Tx and Rx processes. */
1217 iowrite32(0x80000000, ioaddr + RxCtrl);
1218 iowrite32(0x80000000, ioaddr + TxCtrl);
1219
1220 del_timer(&yp->timer);
1221
1222#if defined(__i386__)
1223 if (yellowfin_debug > 2) {
1224 printk("\n"KERN_DEBUG" Tx ring at %8.8llx:\n",
1225 (unsigned long long)yp->tx_ring_dma);
1226 for (i = 0; i < TX_RING_SIZE*2; i++)
1227 printk(" %c #%d desc. %8.8x %8.8x %8.8x %8.8x.\n",
1228 ioread32(ioaddr + TxPtr) == (long)&yp->tx_ring[i] ? '>' : ' ',
1229 i, yp->tx_ring[i].dbdma_cmd, yp->tx_ring[i].addr,
1230 yp->tx_ring[i].branch_addr, yp->tx_ring[i].result_status);
1231 printk(KERN_DEBUG " Tx status %p:\n", yp->tx_status);
1232 for (i = 0; i < TX_RING_SIZE; i++)
1233 printk(" #%d status %4.4x %4.4x %4.4x %4.4x.\n",
1234 i, yp->tx_status[i].tx_cnt, yp->tx_status[i].tx_errs,
1235 yp->tx_status[i].total_tx_cnt, yp->tx_status[i].paused);
1236
1237 printk("\n"KERN_DEBUG " Rx ring %8.8llx:\n",
1238 (unsigned long long)yp->rx_ring_dma);
1239 for (i = 0; i < RX_RING_SIZE; i++) {
1240 printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x %8.8x\n",
1241 ioread32(ioaddr + RxPtr) == (long)&yp->rx_ring[i] ? '>' : ' ',
1242 i, yp->rx_ring[i].dbdma_cmd, yp->rx_ring[i].addr,
1243 yp->rx_ring[i].result_status);
1244 if (yellowfin_debug > 6) {
1245 if (get_unaligned((u8*)yp->rx_ring[i].addr) != 0x69) {
1246 int j;
1247 for (j = 0; j < 0x50; j++)
1248 printk(" %4.4x",
1249 get_unaligned(((u16*)yp->rx_ring[i].addr) + j));
1250 printk("\n");
1251 }
1252 }
1253 }
1254 }
1255#endif /* __i386__ debugging only */
1256
1257 free_irq(dev->irq, dev);
1258
1259 /* Free all the skbuffs in the Rx queue. */
1260 for (i = 0; i < RX_RING_SIZE; i++) {
1261 yp->rx_ring[i].dbdma_cmd = cpu_to_le32(CMD_STOP);
1262 yp->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
1263 if (yp->rx_skbuff[i]) {
1264 dev_kfree_skb(yp->rx_skbuff[i]);
1265 }
1266 yp->rx_skbuff[i] = NULL;
1267 }
1268 for (i = 0; i < TX_RING_SIZE; i++) {
1269 if (yp->tx_skbuff[i])
1270 dev_kfree_skb(yp->tx_skbuff[i]);
1271 yp->tx_skbuff[i] = NULL;
1272 }
1273
1274#ifdef YF_PROTOTYPE /* Support for prototype hardware errata. */
1275 if (yellowfin_debug > 0) {
1276 printk(KERN_DEBUG "%s: Received %d frames that we should not have.\n",
1277 dev->name, bogus_rx);
1278 }
1279#endif
1280
1281 return 0;
1282}
1283
1284static struct net_device_stats *yellowfin_get_stats(struct net_device *dev)
1285{
1286 struct yellowfin_private *yp = netdev_priv(dev);
1287 return &yp->stats;
1288}
1289
1290/* Set or clear the multicast filter for this adaptor. */
1291
1292static void set_rx_mode(struct net_device *dev)
1293{
1294 struct yellowfin_private *yp = netdev_priv(dev);
1295 void __iomem *ioaddr = yp->base;
1296 u16 cfg_value = ioread16(ioaddr + Cnfg);
1297
1298 /* Stop the Rx process to change any value. */
1299 iowrite16(cfg_value & ~0x1000, ioaddr + Cnfg);
1300 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001301 iowrite16(0x000F, ioaddr + AddrMode);
1302 } else if ((dev->mc_count > 64) || (dev->flags & IFF_ALLMULTI)) {
1303 /* Too many to filter well, or accept all multicasts. */
1304 iowrite16(0x000B, ioaddr + AddrMode);
1305 } else if (dev->mc_count > 0) { /* Must use the multicast hash table. */
1306 struct dev_mc_list *mclist;
1307 u16 hash_table[4];
1308 int i;
1309 memset(hash_table, 0, sizeof(hash_table));
1310 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1311 i++, mclist = mclist->next) {
1312 unsigned int bit;
1313
1314 /* Due to a bug in the early chip versions, multiple filter
1315 slots must be set for each address. */
1316 if (yp->drv_flags & HasMulticastBug) {
1317 bit = (ether_crc_le(3, mclist->dmi_addr) >> 3) & 0x3f;
1318 hash_table[bit >> 4] |= (1 << bit);
1319 bit = (ether_crc_le(4, mclist->dmi_addr) >> 3) & 0x3f;
1320 hash_table[bit >> 4] |= (1 << bit);
1321 bit = (ether_crc_le(5, mclist->dmi_addr) >> 3) & 0x3f;
1322 hash_table[bit >> 4] |= (1 << bit);
1323 }
1324 bit = (ether_crc_le(6, mclist->dmi_addr) >> 3) & 0x3f;
1325 hash_table[bit >> 4] |= (1 << bit);
1326 }
1327 /* Copy the hash table to the chip. */
1328 for (i = 0; i < 4; i++)
1329 iowrite16(hash_table[i], ioaddr + HashTbl + i*2);
1330 iowrite16(0x0003, ioaddr + AddrMode);
1331 } else { /* Normal, unicast/broadcast-only mode. */
1332 iowrite16(0x0001, ioaddr + AddrMode);
1333 }
1334 /* Restart the Rx process. */
1335 iowrite16(cfg_value | 0x1000, ioaddr + Cnfg);
1336}
1337
1338static void yellowfin_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1339{
1340 struct yellowfin_private *np = netdev_priv(dev);
1341 strcpy(info->driver, DRV_NAME);
1342 strcpy(info->version, DRV_VERSION);
1343 strcpy(info->bus_info, pci_name(np->pci_dev));
1344}
1345
Jeff Garzik7282d492006-09-13 14:30:00 -04001346static const struct ethtool_ops ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001347 .get_drvinfo = yellowfin_get_drvinfo
1348};
1349
1350static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1351{
1352 struct yellowfin_private *np = netdev_priv(dev);
1353 void __iomem *ioaddr = np->base;
1354 struct mii_ioctl_data *data = if_mii(rq);
1355
1356 switch(cmd) {
1357 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
1358 data->phy_id = np->phys[0] & 0x1f;
1359 /* Fall Through */
1360
1361 case SIOCGMIIREG: /* Read MII PHY register. */
1362 data->val_out = mdio_read(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f);
1363 return 0;
1364
1365 case SIOCSMIIREG: /* Write MII PHY register. */
1366 if (!capable(CAP_NET_ADMIN))
1367 return -EPERM;
1368 if (data->phy_id == np->phys[0]) {
1369 u16 value = data->val_in;
1370 switch (data->reg_num) {
1371 case 0:
1372 /* Check for autonegotiation on or reset. */
1373 np->medialock = (value & 0x9000) ? 0 : 1;
1374 if (np->medialock)
1375 np->full_duplex = (value & 0x0100) ? 1 : 0;
1376 break;
1377 case 4: np->advertising = value; break;
1378 }
1379 /* Perhaps check_duplex(dev), depending on chip semantics. */
1380 }
1381 mdio_write(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1382 return 0;
1383 default:
1384 return -EOPNOTSUPP;
1385 }
1386}
1387
1388
1389static void __devexit yellowfin_remove_one (struct pci_dev *pdev)
1390{
1391 struct net_device *dev = pci_get_drvdata(pdev);
1392 struct yellowfin_private *np;
1393
Eric Sesterhenn5d9428d2006-04-02 13:52:48 +02001394 BUG_ON(!dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001395 np = netdev_priv(dev);
1396
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001397 pci_free_consistent(pdev, STATUS_TOTAL_SIZE, np->tx_status,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001398 np->tx_status_dma);
1399 pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
1400 pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
1401 unregister_netdev (dev);
1402
1403 pci_iounmap(pdev, np->base);
1404
1405 pci_release_regions (pdev);
1406
1407 free_netdev (dev);
1408 pci_set_drvdata(pdev, NULL);
1409}
1410
1411
1412static struct pci_driver yellowfin_driver = {
1413 .name = DRV_NAME,
1414 .id_table = yellowfin_pci_tbl,
1415 .probe = yellowfin_init_one,
1416 .remove = __devexit_p(yellowfin_remove_one),
1417};
1418
1419
1420static int __init yellowfin_init (void)
1421{
1422/* when a module, this is printed whether or not devices are found in probe */
1423#ifdef MODULE
1424 printk(version);
1425#endif
Jeff Garzik29917622006-08-19 17:48:59 -04001426 return pci_register_driver(&yellowfin_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001427}
1428
1429
1430static void __exit yellowfin_cleanup (void)
1431{
1432 pci_unregister_driver (&yellowfin_driver);
1433}
1434
1435
1436module_init(yellowfin_init);
1437module_exit(yellowfin_cleanup);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001438
Linus Torvalds1da177e2005-04-16 15:20:36 -07001439/*
1440 * Local variables:
1441 * compile-command: "gcc -DMODULE -Wall -Wstrict-prototypes -O6 -c yellowfin.c"
1442 * compile-command-alphaLX: "gcc -DMODULE -Wall -Wstrict-prototypes -O2 -c yellowfin.c -fomit-frame-pointer -fno-strength-reduce -mno-fp-regs -Wa,-m21164a -DBWX_USABLE -DBWIO_ENABLED"
1443 * simple-compile-command: "gcc -DMODULE -O6 -c yellowfin.c"
1444 * c-indent-level: 4
1445 * c-basic-offset: 4
1446 * tab-width: 4
1447 * End:
1448 */