Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Red Hat Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Ben Skeggs |
| 23 | */ |
| 24 | |
| 25 | #include <core/object.h> |
| 26 | #include <core/device.h> |
| 27 | #include <core/client.h> |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 28 | #include <core/option.h> |
| 29 | |
| 30 | #include <core/class.h> |
| 31 | |
Ben Skeggs | 9838366 | 2013-10-17 09:56:02 +1000 | [diff] [blame] | 32 | #include "priv.h" |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame^] | 33 | #include "acpi.h" |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 34 | |
| 35 | static DEFINE_MUTEX(nv_devices_mutex); |
| 36 | static LIST_HEAD(nv_devices); |
| 37 | |
| 38 | struct nouveau_device * |
| 39 | nouveau_device_find(u64 name) |
| 40 | { |
| 41 | struct nouveau_device *device, *match = NULL; |
| 42 | mutex_lock(&nv_devices_mutex); |
| 43 | list_for_each_entry(device, &nv_devices, head) { |
| 44 | if (device->handle == name) { |
| 45 | match = device; |
| 46 | break; |
| 47 | } |
| 48 | } |
| 49 | mutex_unlock(&nv_devices_mutex); |
| 50 | return match; |
| 51 | } |
| 52 | |
| 53 | /****************************************************************************** |
| 54 | * nouveau_devobj (0x0080): class implementation |
| 55 | *****************************************************************************/ |
| 56 | struct nouveau_devobj { |
| 57 | struct nouveau_parent base; |
| 58 | struct nouveau_object *subdev[NVDEV_SUBDEV_NR]; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 59 | }; |
| 60 | |
| 61 | static const u64 disable_map[] = { |
| 62 | [NVDEV_SUBDEV_VBIOS] = NV_DEVICE_DISABLE_VBIOS, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 63 | [NVDEV_SUBDEV_DEVINIT] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 64 | [NVDEV_SUBDEV_GPIO] = NV_DEVICE_DISABLE_CORE, |
| 65 | [NVDEV_SUBDEV_I2C] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 66 | [NVDEV_SUBDEV_CLOCK] = NV_DEVICE_DISABLE_CORE, |
| 67 | [NVDEV_SUBDEV_MXM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 68 | [NVDEV_SUBDEV_MC] = NV_DEVICE_DISABLE_CORE, |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 69 | [NVDEV_SUBDEV_BUS] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 70 | [NVDEV_SUBDEV_TIMER] = NV_DEVICE_DISABLE_CORE, |
| 71 | [NVDEV_SUBDEV_FB] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 72 | [NVDEV_SUBDEV_LTCG] = NV_DEVICE_DISABLE_CORE, |
| 73 | [NVDEV_SUBDEV_IBUS] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 74 | [NVDEV_SUBDEV_INSTMEM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 75 | [NVDEV_SUBDEV_VM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 76 | [NVDEV_SUBDEV_BAR] = NV_DEVICE_DISABLE_CORE, |
| 77 | [NVDEV_SUBDEV_VOLT] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 78 | [NVDEV_SUBDEV_THERM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | ff4b42c | 2013-10-15 09:38:12 +1000 | [diff] [blame] | 79 | [NVDEV_SUBDEV_PWR] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 80 | [NVDEV_ENGINE_DMAOBJ] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | aa4d7a4 | 2013-02-13 15:29:11 +1000 | [diff] [blame] | 81 | [NVDEV_ENGINE_PERFMON] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 82 | [NVDEV_ENGINE_FIFO] = NV_DEVICE_DISABLE_FIFO, |
| 83 | [NVDEV_ENGINE_SW] = NV_DEVICE_DISABLE_FIFO, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 84 | [NVDEV_ENGINE_GR] = NV_DEVICE_DISABLE_GRAPH, |
| 85 | [NVDEV_ENGINE_MPEG] = NV_DEVICE_DISABLE_MPEG, |
| 86 | [NVDEV_ENGINE_ME] = NV_DEVICE_DISABLE_ME, |
| 87 | [NVDEV_ENGINE_VP] = NV_DEVICE_DISABLE_VP, |
| 88 | [NVDEV_ENGINE_CRYPT] = NV_DEVICE_DISABLE_CRYPT, |
| 89 | [NVDEV_ENGINE_BSP] = NV_DEVICE_DISABLE_BSP, |
| 90 | [NVDEV_ENGINE_PPP] = NV_DEVICE_DISABLE_PPP, |
| 91 | [NVDEV_ENGINE_COPY0] = NV_DEVICE_DISABLE_COPY0, |
| 92 | [NVDEV_ENGINE_COPY1] = NV_DEVICE_DISABLE_COPY1, |
Ben Skeggs | c42a7ae | 2013-08-21 13:26:42 +1000 | [diff] [blame] | 93 | [NVDEV_ENGINE_VIC] = NV_DEVICE_DISABLE_VIC, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 94 | [NVDEV_ENGINE_VENC] = NV_DEVICE_DISABLE_VENC, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 95 | [NVDEV_ENGINE_DISP] = NV_DEVICE_DISABLE_DISP, |
| 96 | [NVDEV_SUBDEV_NR] = 0, |
| 97 | }; |
| 98 | |
| 99 | static int |
| 100 | nouveau_devobj_ctor(struct nouveau_object *parent, |
| 101 | struct nouveau_object *engine, |
| 102 | struct nouveau_oclass *oclass, void *data, u32 size, |
| 103 | struct nouveau_object **pobject) |
| 104 | { |
| 105 | struct nouveau_client *client = nv_client(parent); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 106 | struct nouveau_device *device; |
| 107 | struct nouveau_devobj *devobj; |
| 108 | struct nv_device_class *args = data; |
Marcin Slusarz | 950fbfa | 2012-12-29 16:24:37 +0100 | [diff] [blame] | 109 | u32 boot0, strap; |
| 110 | u64 disable, mmio_base, mmio_size; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 111 | void __iomem *map; |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 112 | int ret, i, c; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 113 | |
| 114 | if (size < sizeof(struct nv_device_class)) |
| 115 | return -EINVAL; |
| 116 | |
| 117 | /* find the device subdev that matches what the client requested */ |
| 118 | device = nv_device(client->device); |
| 119 | if (args->device != ~0) { |
| 120 | device = nouveau_device_find(args->device); |
| 121 | if (!device) |
| 122 | return -ENODEV; |
| 123 | } |
| 124 | |
Ben Skeggs | 9838366 | 2013-10-17 09:56:02 +1000 | [diff] [blame] | 125 | ret = nouveau_parent_create(parent, nv_object(device), oclass, 0, |
| 126 | nouveau_control_oclass, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 127 | (1ULL << NVDEV_ENGINE_DMAOBJ) | |
| 128 | (1ULL << NVDEV_ENGINE_FIFO) | |
Ben Skeggs | aa4d7a4 | 2013-02-13 15:29:11 +1000 | [diff] [blame] | 129 | (1ULL << NVDEV_ENGINE_DISP) | |
| 130 | (1ULL << NVDEV_ENGINE_PERFMON), &devobj); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 131 | *pobject = nv_object(devobj); |
| 132 | if (ret) |
| 133 | return ret; |
| 134 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 135 | mmio_base = nv_device_resource_start(device, 0); |
| 136 | mmio_size = nv_device_resource_len(device, 0); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 137 | |
| 138 | /* translate api disable mask into internal mapping */ |
| 139 | disable = args->debug0; |
| 140 | for (i = 0; i < NVDEV_SUBDEV_NR; i++) { |
| 141 | if (args->disable & disable_map[i]) |
| 142 | disable |= (1ULL << i); |
| 143 | } |
| 144 | |
| 145 | /* identify the chipset, and determine classes of subdev/engines */ |
| 146 | if (!(args->disable & NV_DEVICE_DISABLE_IDENTIFY) && |
| 147 | !device->card_type) { |
| 148 | map = ioremap(mmio_base, 0x102000); |
Ben Skeggs | 43b1e9c | 2012-08-06 16:31:26 +1000 | [diff] [blame] | 149 | if (map == NULL) |
| 150 | return -ENOMEM; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 151 | |
| 152 | /* switch mmio to cpu's native endianness */ |
| 153 | #ifndef __BIG_ENDIAN |
| 154 | if (ioread32_native(map + 0x000004) != 0x00000000) |
| 155 | #else |
| 156 | if (ioread32_native(map + 0x000004) == 0x00000000) |
| 157 | #endif |
| 158 | iowrite32_native(0x01000001, map + 0x000004); |
| 159 | |
| 160 | /* read boot0 and strapping information */ |
| 161 | boot0 = ioread32_native(map + 0x000000); |
| 162 | strap = ioread32_native(map + 0x101000); |
| 163 | iounmap(map); |
| 164 | |
| 165 | /* determine chipset and derive architecture from it */ |
Ben Skeggs | dd5b84a | 2013-09-28 07:31:07 +1000 | [diff] [blame] | 166 | if ((boot0 & 0x1f000000) > 0) { |
| 167 | device->chipset = (boot0 & 0x1ff00000) >> 20; |
| 168 | switch (device->chipset & 0x1f0) { |
Ben Skeggs | aabf19c | 2013-11-05 13:14:25 +1000 | [diff] [blame] | 169 | case 0x010: { |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 170 | if (0x461 & (1 << (device->chipset & 0xf))) |
| 171 | device->card_type = NV_10; |
| 172 | else |
| 173 | device->card_type = NV_11; |
| 174 | break; |
| 175 | } |
Ben Skeggs | aabf19c | 2013-11-05 13:14:25 +1000 | [diff] [blame] | 176 | case 0x020: device->card_type = NV_20; break; |
| 177 | case 0x030: device->card_type = NV_30; break; |
| 178 | case 0x040: |
| 179 | case 0x060: device->card_type = NV_40; break; |
| 180 | case 0x050: |
| 181 | case 0x080: |
| 182 | case 0x090: |
| 183 | case 0x0a0: device->card_type = NV_50; break; |
| 184 | case 0x0c0: device->card_type = NV_C0; break; |
| 185 | case 0x0d0: device->card_type = NV_D0; break; |
| 186 | case 0x0e0: |
| 187 | case 0x0f0: |
| 188 | case 0x100: device->card_type = NV_E0; break; |
Ben Skeggs | 3f20464 | 2014-02-24 11:28:37 +1000 | [diff] [blame] | 189 | case 0x110: device->card_type = GM100; break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 190 | default: |
| 191 | break; |
| 192 | } |
| 193 | } else |
| 194 | if ((boot0 & 0xff00fff0) == 0x20004000) { |
| 195 | if (boot0 & 0x00f00000) |
| 196 | device->chipset = 0x05; |
| 197 | else |
| 198 | device->chipset = 0x04; |
| 199 | device->card_type = NV_04; |
| 200 | } |
| 201 | |
| 202 | switch (device->card_type) { |
| 203 | case NV_04: ret = nv04_identify(device); break; |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 204 | case NV_10: |
| 205 | case NV_11: ret = nv10_identify(device); break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 206 | case NV_20: ret = nv20_identify(device); break; |
| 207 | case NV_30: ret = nv30_identify(device); break; |
| 208 | case NV_40: ret = nv40_identify(device); break; |
| 209 | case NV_50: ret = nv50_identify(device); break; |
| 210 | case NV_C0: |
| 211 | case NV_D0: ret = nvc0_identify(device); break; |
| 212 | case NV_E0: ret = nve0_identify(device); break; |
Ben Skeggs | 3f20464 | 2014-02-24 11:28:37 +1000 | [diff] [blame] | 213 | case GM100: ret = gm100_identify(device); break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 214 | default: |
| 215 | ret = -EINVAL; |
| 216 | break; |
| 217 | } |
| 218 | |
| 219 | if (ret) { |
| 220 | nv_error(device, "unknown chipset, 0x%08x\n", boot0); |
| 221 | return ret; |
| 222 | } |
| 223 | |
| 224 | nv_info(device, "BOOT0 : 0x%08x\n", boot0); |
Ben Skeggs | 2094dd8 | 2012-07-27 08:28:20 +1000 | [diff] [blame] | 225 | nv_info(device, "Chipset: %s (NV%02X)\n", |
| 226 | device->cname, device->chipset); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 227 | nv_info(device, "Family : NV%02X\n", device->card_type); |
| 228 | |
| 229 | /* determine frequency of timing crystal */ |
Ilia Mirkin | 8aa816b | 2013-09-05 04:45:03 -0400 | [diff] [blame] | 230 | if ( device->card_type <= NV_10 || device->chipset < 0x17 || |
Viktor Novotný | 1f2285d4 | 2012-11-10 19:24:06 +0100 | [diff] [blame] | 231 | (device->chipset >= 0x20 && device->chipset < 0x25)) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 232 | strap &= 0x00000040; |
| 233 | else |
| 234 | strap &= 0x00400040; |
| 235 | |
| 236 | switch (strap) { |
| 237 | case 0x00000000: device->crystal = 13500; break; |
| 238 | case 0x00000040: device->crystal = 14318; break; |
| 239 | case 0x00400000: device->crystal = 27000; break; |
| 240 | case 0x00400040: device->crystal = 25000; break; |
| 241 | } |
| 242 | |
| 243 | nv_debug(device, "crystal freq: %dKHz\n", device->crystal); |
| 244 | } |
| 245 | |
| 246 | if (!(args->disable & NV_DEVICE_DISABLE_MMIO) && |
| 247 | !nv_subdev(device)->mmio) { |
| 248 | nv_subdev(device)->mmio = ioremap(mmio_base, mmio_size); |
| 249 | if (!nv_subdev(device)->mmio) { |
| 250 | nv_error(device, "unable to map device registers\n"); |
Ben Skeggs | 43b1e9c | 2012-08-06 16:31:26 +1000 | [diff] [blame] | 251 | return -ENOMEM; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 252 | } |
| 253 | } |
| 254 | |
| 255 | /* ensure requested subsystems are available for use */ |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 256 | for (i = 1, c = 1; i < NVDEV_SUBDEV_NR; i++) { |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 257 | if (!(oclass = device->oclass[i]) || (disable & (1ULL << i))) |
| 258 | continue; |
| 259 | |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 260 | if (device->subdev[i]) { |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 261 | nouveau_object_ref(device->subdev[i], |
| 262 | &devobj->subdev[i]); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 263 | continue; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 264 | } |
| 265 | |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 266 | ret = nouveau_object_ctor(nv_object(device), NULL, |
| 267 | oclass, NULL, i, |
| 268 | &devobj->subdev[i]); |
| 269 | if (ret == -ENODEV) |
| 270 | continue; |
| 271 | if (ret) |
| 272 | return ret; |
| 273 | |
Ben Skeggs | 61b365a | 2013-11-27 09:46:56 +1000 | [diff] [blame] | 274 | device->subdev[i] = devobj->subdev[i]; |
| 275 | |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 276 | /* note: can't init *any* subdevs until devinit has been run |
| 277 | * due to not knowing exactly what the vbios init tables will |
| 278 | * mess with. devinit also can't be run until all of its |
| 279 | * dependencies have been created. |
| 280 | * |
| 281 | * this code delays init of any subdev until all of devinit's |
| 282 | * dependencies have been created, and then initialises each |
| 283 | * subdev in turn as they're created. |
| 284 | */ |
| 285 | while (i >= NVDEV_SUBDEV_DEVINIT_LAST && c <= i) { |
| 286 | struct nouveau_object *subdev = devobj->subdev[c++]; |
| 287 | if (subdev && !nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 288 | ret = nouveau_object_inc(subdev); |
| 289 | if (ret) |
| 290 | return ret; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 291 | atomic_dec(&nv_object(device)->usecount); |
| 292 | } else |
| 293 | if (subdev) { |
| 294 | nouveau_subdev_reset(subdev); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 295 | } |
| 296 | } |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 297 | } |
| 298 | |
| 299 | return 0; |
| 300 | } |
| 301 | |
| 302 | static void |
| 303 | nouveau_devobj_dtor(struct nouveau_object *object) |
| 304 | { |
| 305 | struct nouveau_devobj *devobj = (void *)object; |
| 306 | int i; |
| 307 | |
| 308 | for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) |
| 309 | nouveau_object_ref(NULL, &devobj->subdev[i]); |
| 310 | |
| 311 | nouveau_parent_destroy(&devobj->base); |
| 312 | } |
| 313 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 314 | static u8 |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 315 | nouveau_devobj_rd08(struct nouveau_object *object, u64 addr) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 316 | { |
| 317 | return nv_rd08(object->engine, addr); |
| 318 | } |
| 319 | |
| 320 | static u16 |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 321 | nouveau_devobj_rd16(struct nouveau_object *object, u64 addr) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 322 | { |
| 323 | return nv_rd16(object->engine, addr); |
| 324 | } |
| 325 | |
| 326 | static u32 |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 327 | nouveau_devobj_rd32(struct nouveau_object *object, u64 addr) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 328 | { |
| 329 | return nv_rd32(object->engine, addr); |
| 330 | } |
| 331 | |
| 332 | static void |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 333 | nouveau_devobj_wr08(struct nouveau_object *object, u64 addr, u8 data) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 334 | { |
| 335 | nv_wr08(object->engine, addr, data); |
| 336 | } |
| 337 | |
| 338 | static void |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 339 | nouveau_devobj_wr16(struct nouveau_object *object, u64 addr, u16 data) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 340 | { |
| 341 | nv_wr16(object->engine, addr, data); |
| 342 | } |
| 343 | |
| 344 | static void |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 345 | nouveau_devobj_wr32(struct nouveau_object *object, u64 addr, u32 data) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 346 | { |
| 347 | nv_wr32(object->engine, addr, data); |
| 348 | } |
| 349 | |
| 350 | static struct nouveau_ofuncs |
| 351 | nouveau_devobj_ofuncs = { |
| 352 | .ctor = nouveau_devobj_ctor, |
| 353 | .dtor = nouveau_devobj_dtor, |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 354 | .init = _nouveau_parent_init, |
| 355 | .fini = _nouveau_parent_fini, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 356 | .rd08 = nouveau_devobj_rd08, |
| 357 | .rd16 = nouveau_devobj_rd16, |
| 358 | .rd32 = nouveau_devobj_rd32, |
| 359 | .wr08 = nouveau_devobj_wr08, |
| 360 | .wr16 = nouveau_devobj_wr16, |
| 361 | .wr32 = nouveau_devobj_wr32, |
| 362 | }; |
| 363 | |
| 364 | /****************************************************************************** |
| 365 | * nouveau_device: engine functions |
| 366 | *****************************************************************************/ |
Ben Skeggs | 9aecbad | 2013-04-25 17:56:03 +1000 | [diff] [blame] | 367 | static struct nouveau_oclass |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 368 | nouveau_device_sclass[] = { |
| 369 | { 0x0080, &nouveau_devobj_ofuncs }, |
| 370 | {} |
| 371 | }; |
| 372 | |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 373 | static int |
| 374 | nouveau_device_fini(struct nouveau_object *object, bool suspend) |
| 375 | { |
| 376 | struct nouveau_device *device = (void *)object; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 377 | struct nouveau_object *subdev; |
| 378 | int ret, i; |
| 379 | |
| 380 | for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) { |
| 381 | if ((subdev = device->subdev[i])) { |
| 382 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 383 | ret = nouveau_object_dec(subdev, suspend); |
| 384 | if (ret && suspend) |
| 385 | goto fail; |
| 386 | } |
| 387 | } |
| 388 | } |
| 389 | |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame^] | 390 | ret = nvkm_acpi_fini(device, suspend); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 391 | fail: |
| 392 | for (; ret && i < NVDEV_SUBDEV_NR; i++) { |
| 393 | if ((subdev = device->subdev[i])) { |
| 394 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 395 | ret = nouveau_object_inc(subdev); |
| 396 | if (ret) { |
| 397 | /* XXX */ |
| 398 | } |
| 399 | } |
| 400 | } |
| 401 | } |
| 402 | |
| 403 | return ret; |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 404 | } |
| 405 | |
| 406 | static int |
| 407 | nouveau_device_init(struct nouveau_object *object) |
| 408 | { |
| 409 | struct nouveau_device *device = (void *)object; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 410 | struct nouveau_object *subdev; |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame^] | 411 | int ret, i = 0; |
| 412 | |
| 413 | ret = nvkm_acpi_init(device); |
| 414 | if (ret) |
| 415 | goto fail; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 416 | |
| 417 | for (i = 0; i < NVDEV_SUBDEV_NR; i++) { |
| 418 | if ((subdev = device->subdev[i])) { |
| 419 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 420 | ret = nouveau_object_inc(subdev); |
| 421 | if (ret) |
| 422 | goto fail; |
| 423 | } else { |
| 424 | nouveau_subdev_reset(subdev); |
| 425 | } |
| 426 | } |
| 427 | } |
| 428 | |
| 429 | ret = 0; |
| 430 | fail: |
| 431 | for (--i; ret && i >= 0; i--) { |
| 432 | if ((subdev = device->subdev[i])) { |
| 433 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) |
| 434 | nouveau_object_dec(subdev, false); |
| 435 | } |
| 436 | } |
| 437 | |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame^] | 438 | if (ret) |
| 439 | nvkm_acpi_fini(device, false); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 440 | return ret; |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 441 | } |
| 442 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 443 | static void |
| 444 | nouveau_device_dtor(struct nouveau_object *object) |
| 445 | { |
| 446 | struct nouveau_device *device = (void *)object; |
| 447 | |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame^] | 448 | nouveau_event_destroy(&device->ntfy); |
| 449 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 450 | mutex_lock(&nv_devices_mutex); |
| 451 | list_del(&device->head); |
| 452 | mutex_unlock(&nv_devices_mutex); |
| 453 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 454 | if (nv_subdev(device)->mmio) |
| 455 | iounmap(nv_subdev(device)->mmio); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 456 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 457 | nouveau_engine_destroy(&device->base); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 458 | } |
| 459 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 460 | resource_size_t |
| 461 | nv_device_resource_start(struct nouveau_device *device, unsigned int bar) |
| 462 | { |
| 463 | if (nv_device_is_pci(device)) { |
| 464 | return pci_resource_start(device->pdev, bar); |
| 465 | } else { |
| 466 | struct resource *res; |
| 467 | res = platform_get_resource(device->platformdev, |
| 468 | IORESOURCE_MEM, bar); |
| 469 | if (!res) |
| 470 | return 0; |
| 471 | return res->start; |
| 472 | } |
| 473 | } |
| 474 | |
| 475 | resource_size_t |
| 476 | nv_device_resource_len(struct nouveau_device *device, unsigned int bar) |
| 477 | { |
| 478 | if (nv_device_is_pci(device)) { |
| 479 | return pci_resource_len(device->pdev, bar); |
| 480 | } else { |
| 481 | struct resource *res; |
| 482 | res = platform_get_resource(device->platformdev, |
| 483 | IORESOURCE_MEM, bar); |
| 484 | if (!res) |
| 485 | return 0; |
| 486 | return resource_size(res); |
| 487 | } |
| 488 | } |
| 489 | |
| 490 | dma_addr_t |
| 491 | nv_device_map_page(struct nouveau_device *device, struct page *page) |
| 492 | { |
| 493 | dma_addr_t ret; |
| 494 | |
| 495 | if (nv_device_is_pci(device)) { |
| 496 | ret = pci_map_page(device->pdev, page, 0, PAGE_SIZE, |
| 497 | PCI_DMA_BIDIRECTIONAL); |
| 498 | if (pci_dma_mapping_error(device->pdev, ret)) |
| 499 | ret = 0; |
| 500 | } else { |
| 501 | ret = page_to_phys(page); |
| 502 | } |
| 503 | |
| 504 | return ret; |
| 505 | } |
| 506 | |
| 507 | void |
| 508 | nv_device_unmap_page(struct nouveau_device *device, dma_addr_t addr) |
| 509 | { |
| 510 | if (nv_device_is_pci(device)) |
| 511 | pci_unmap_page(device->pdev, addr, PAGE_SIZE, |
| 512 | PCI_DMA_BIDIRECTIONAL); |
| 513 | } |
| 514 | |
| 515 | int |
| 516 | nv_device_get_irq(struct nouveau_device *device, bool stall) |
| 517 | { |
| 518 | if (nv_device_is_pci(device)) { |
| 519 | return device->pdev->irq; |
| 520 | } else { |
| 521 | return platform_get_irq_byname(device->platformdev, |
| 522 | stall ? "stall" : "nonstall"); |
| 523 | } |
| 524 | } |
| 525 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 526 | static struct nouveau_oclass |
| 527 | nouveau_device_oclass = { |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 528 | .handle = NV_ENGINE(DEVICE, 0x00), |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 529 | .ofuncs = &(struct nouveau_ofuncs) { |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 530 | .dtor = nouveau_device_dtor, |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 531 | .init = nouveau_device_init, |
| 532 | .fini = nouveau_device_fini, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 533 | }, |
| 534 | }; |
| 535 | |
| 536 | int |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 537 | nouveau_device_create_(void *dev, enum nv_bus_type type, u64 name, |
| 538 | const char *sname, const char *cfg, const char *dbg, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 539 | int length, void **pobject) |
| 540 | { |
| 541 | struct nouveau_device *device; |
| 542 | int ret = -EEXIST; |
| 543 | |
| 544 | mutex_lock(&nv_devices_mutex); |
| 545 | list_for_each_entry(device, &nv_devices, head) { |
| 546 | if (device->handle == name) |
| 547 | goto done; |
| 548 | } |
| 549 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 550 | ret = nouveau_engine_create_(NULL, NULL, &nouveau_device_oclass, true, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 551 | "DEVICE", "device", length, pobject); |
| 552 | device = *pobject; |
| 553 | if (ret) |
| 554 | goto done; |
| 555 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 556 | switch (type) { |
| 557 | case NOUVEAU_BUS_PCI: |
| 558 | device->pdev = dev; |
| 559 | break; |
| 560 | case NOUVEAU_BUS_PLATFORM: |
| 561 | device->platformdev = dev; |
| 562 | break; |
| 563 | } |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 564 | device->handle = name; |
| 565 | device->cfgopt = cfg; |
| 566 | device->dbgopt = dbg; |
| 567 | device->name = sname; |
| 568 | |
| 569 | nv_subdev(device)->debug = nouveau_dbgopt(device->dbgopt, "DEVICE"); |
Ben Skeggs | 9aecbad | 2013-04-25 17:56:03 +1000 | [diff] [blame] | 570 | nv_engine(device)->sclass = nouveau_device_sclass; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 571 | list_add(&device->head, &nv_devices); |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame^] | 572 | |
| 573 | ret = nouveau_event_create(1, NVKM_DEVICE_NTFY, &device->ntfy); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 574 | done: |
| 575 | mutex_unlock(&nv_devices_mutex); |
| 576 | return ret; |
| 577 | } |