Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 1 | /* |
Dave Jones | f3a03b0 | 2007-07-16 11:23:03 -0400 | [diff] [blame] | 2 | * libata-sff.c - helper library for PCI IDE BMDMA |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 3 | * |
| 4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> |
| 5 | * Please ALWAYS copy linux-ide@vger.kernel.org |
| 6 | * on emails. |
| 7 | * |
| 8 | * Copyright 2003-2006 Red Hat, Inc. All rights reserved. |
| 9 | * Copyright 2003-2006 Jeff Garzik |
| 10 | * |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License as published by |
| 14 | * the Free Software Foundation; either version 2, or (at your option) |
| 15 | * any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; see the file COPYING. If not, write to |
| 24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
| 25 | * |
| 26 | * |
| 27 | * libata documentation is available via 'make {ps|pdf}docs', |
| 28 | * as Documentation/DocBook/libata.* |
| 29 | * |
| 30 | * Hardware documentation available from http://www.t13.org/ and |
| 31 | * http://www.sata-io.org/ |
| 32 | * |
| 33 | */ |
| 34 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 35 | #include <linux/kernel.h> |
| 36 | #include <linux/pci.h> |
| 37 | #include <linux/libata.h> |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 38 | #include <linux/highmem.h> |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 39 | |
| 40 | #include "libata.h" |
| 41 | |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 42 | const struct ata_port_operations ata_sff_port_ops = { |
| 43 | .inherits = &ata_base_port_ops, |
| 44 | |
| 45 | .qc_prep = ata_qc_prep, |
| 46 | .qc_issue = ata_qc_issue_prot, |
| 47 | |
| 48 | .freeze = ata_bmdma_freeze, |
| 49 | .thaw = ata_bmdma_thaw, |
| 50 | .softreset = ata_std_softreset, |
| 51 | .error_handler = ata_bmdma_error_handler, |
| 52 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 53 | |
| 54 | .dev_select = ata_std_dev_select, |
| 55 | .check_status = ata_check_status, |
| 56 | .tf_load = ata_tf_load, |
| 57 | .tf_read = ata_tf_read, |
| 58 | .exec_command = ata_exec_command, |
| 59 | .data_xfer = ata_data_xfer, |
| 60 | .irq_on = ata_irq_on, |
| 61 | |
| 62 | .port_start = ata_sff_port_start, |
| 63 | }; |
| 64 | |
| 65 | const struct ata_port_operations ata_bmdma_port_ops = { |
| 66 | .inherits = &ata_sff_port_ops, |
| 67 | |
| 68 | .mode_filter = ata_pci_default_filter, |
| 69 | |
| 70 | .bmdma_setup = ata_bmdma_setup, |
| 71 | .bmdma_start = ata_bmdma_start, |
| 72 | .bmdma_stop = ata_bmdma_stop, |
| 73 | .bmdma_status = ata_bmdma_status, |
| 74 | .irq_clear = ata_bmdma_irq_clear, |
| 75 | }; |
| 76 | |
| 77 | /** |
| 78 | * ata_fill_sg - Fill PCI IDE PRD table |
| 79 | * @qc: Metadata associated with taskfile to be transferred |
| 80 | * |
| 81 | * Fill PCI IDE PRD (scatter-gather) table with segments |
| 82 | * associated with the current disk command. |
| 83 | * |
| 84 | * LOCKING: |
| 85 | * spin_lock_irqsave(host lock) |
| 86 | * |
| 87 | */ |
| 88 | static void ata_fill_sg(struct ata_queued_cmd *qc) |
| 89 | { |
| 90 | struct ata_port *ap = qc->ap; |
| 91 | struct scatterlist *sg; |
| 92 | unsigned int si, pi; |
| 93 | |
| 94 | pi = 0; |
| 95 | for_each_sg(qc->sg, sg, qc->n_elem, si) { |
| 96 | u32 addr, offset; |
| 97 | u32 sg_len, len; |
| 98 | |
| 99 | /* determine if physical DMA addr spans 64K boundary. |
| 100 | * Note h/w doesn't support 64-bit, so we unconditionally |
| 101 | * truncate dma_addr_t to u32. |
| 102 | */ |
| 103 | addr = (u32) sg_dma_address(sg); |
| 104 | sg_len = sg_dma_len(sg); |
| 105 | |
| 106 | while (sg_len) { |
| 107 | offset = addr & 0xffff; |
| 108 | len = sg_len; |
| 109 | if ((offset + sg_len) > 0x10000) |
| 110 | len = 0x10000 - offset; |
| 111 | |
| 112 | ap->prd[pi].addr = cpu_to_le32(addr); |
| 113 | ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff); |
| 114 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len); |
| 115 | |
| 116 | pi++; |
| 117 | sg_len -= len; |
| 118 | addr += len; |
| 119 | } |
| 120 | } |
| 121 | |
| 122 | ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); |
| 123 | } |
| 124 | |
| 125 | /** |
| 126 | * ata_fill_sg_dumb - Fill PCI IDE PRD table |
| 127 | * @qc: Metadata associated with taskfile to be transferred |
| 128 | * |
| 129 | * Fill PCI IDE PRD (scatter-gather) table with segments |
| 130 | * associated with the current disk command. Perform the fill |
| 131 | * so that we avoid writing any length 64K records for |
| 132 | * controllers that don't follow the spec. |
| 133 | * |
| 134 | * LOCKING: |
| 135 | * spin_lock_irqsave(host lock) |
| 136 | * |
| 137 | */ |
| 138 | static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) |
| 139 | { |
| 140 | struct ata_port *ap = qc->ap; |
| 141 | struct scatterlist *sg; |
| 142 | unsigned int si, pi; |
| 143 | |
| 144 | pi = 0; |
| 145 | for_each_sg(qc->sg, sg, qc->n_elem, si) { |
| 146 | u32 addr, offset; |
| 147 | u32 sg_len, len, blen; |
| 148 | |
| 149 | /* determine if physical DMA addr spans 64K boundary. |
| 150 | * Note h/w doesn't support 64-bit, so we unconditionally |
| 151 | * truncate dma_addr_t to u32. |
| 152 | */ |
| 153 | addr = (u32) sg_dma_address(sg); |
| 154 | sg_len = sg_dma_len(sg); |
| 155 | |
| 156 | while (sg_len) { |
| 157 | offset = addr & 0xffff; |
| 158 | len = sg_len; |
| 159 | if ((offset + sg_len) > 0x10000) |
| 160 | len = 0x10000 - offset; |
| 161 | |
| 162 | blen = len & 0xffff; |
| 163 | ap->prd[pi].addr = cpu_to_le32(addr); |
| 164 | if (blen == 0) { |
| 165 | /* Some PATA chipsets like the CS5530 can't |
| 166 | cope with 0x0000 meaning 64K as the spec says */ |
| 167 | ap->prd[pi].flags_len = cpu_to_le32(0x8000); |
| 168 | blen = 0x8000; |
| 169 | ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000); |
| 170 | } |
| 171 | ap->prd[pi].flags_len = cpu_to_le32(blen); |
| 172 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len); |
| 173 | |
| 174 | pi++; |
| 175 | sg_len -= len; |
| 176 | addr += len; |
| 177 | } |
| 178 | } |
| 179 | |
| 180 | ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); |
| 181 | } |
| 182 | |
| 183 | /** |
| 184 | * ata_qc_prep - Prepare taskfile for submission |
| 185 | * @qc: Metadata associated with taskfile to be prepared |
| 186 | * |
| 187 | * Prepare ATA taskfile for submission. |
| 188 | * |
| 189 | * LOCKING: |
| 190 | * spin_lock_irqsave(host lock) |
| 191 | */ |
| 192 | void ata_qc_prep(struct ata_queued_cmd *qc) |
| 193 | { |
| 194 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) |
| 195 | return; |
| 196 | |
| 197 | ata_fill_sg(qc); |
| 198 | } |
| 199 | |
| 200 | /** |
| 201 | * ata_dumb_qc_prep - Prepare taskfile for submission |
| 202 | * @qc: Metadata associated with taskfile to be prepared |
| 203 | * |
| 204 | * Prepare ATA taskfile for submission. |
| 205 | * |
| 206 | * LOCKING: |
| 207 | * spin_lock_irqsave(host lock) |
| 208 | */ |
| 209 | void ata_dumb_qc_prep(struct ata_queued_cmd *qc) |
| 210 | { |
| 211 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) |
| 212 | return; |
| 213 | |
| 214 | ata_fill_sg_dumb(qc); |
| 215 | } |
| 216 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 217 | /** |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 218 | * ata_check_status - Read device status reg & clear interrupt |
| 219 | * @ap: port where the device is |
| 220 | * |
| 221 | * Reads ATA taskfile status register for currently-selected device |
| 222 | * and return its value. This also clears pending interrupts |
| 223 | * from this device |
| 224 | * |
| 225 | * LOCKING: |
| 226 | * Inherited from caller. |
| 227 | */ |
| 228 | u8 ata_check_status(struct ata_port *ap) |
| 229 | { |
| 230 | return ioread8(ap->ioaddr.status_addr); |
| 231 | } |
| 232 | |
| 233 | /** |
| 234 | * ata_altstatus - Read device alternate status reg |
| 235 | * @ap: port where the device is |
| 236 | * |
| 237 | * Reads ATA taskfile alternate status register for |
| 238 | * currently-selected device and return its value. |
| 239 | * |
| 240 | * Note: may NOT be used as the check_altstatus() entry in |
| 241 | * ata_port_operations. |
| 242 | * |
| 243 | * LOCKING: |
| 244 | * Inherited from caller. |
| 245 | */ |
| 246 | u8 ata_altstatus(struct ata_port *ap) |
| 247 | { |
| 248 | if (ap->ops->check_altstatus) |
| 249 | return ap->ops->check_altstatus(ap); |
| 250 | |
| 251 | return ioread8(ap->ioaddr.altstatus_addr); |
| 252 | } |
| 253 | |
| 254 | /** |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 255 | * ata_busy_sleep - sleep until BSY clears, or timeout |
| 256 | * @ap: port containing status register to be polled |
| 257 | * @tmout_pat: impatience timeout |
| 258 | * @tmout: overall timeout |
| 259 | * |
| 260 | * Sleep until ATA Status register bit BSY clears, |
| 261 | * or a timeout occurs. |
| 262 | * |
| 263 | * LOCKING: |
| 264 | * Kernel thread context (may sleep). |
| 265 | * |
| 266 | * RETURNS: |
| 267 | * 0 on success, -errno otherwise. |
| 268 | */ |
| 269 | int ata_busy_sleep(struct ata_port *ap, |
| 270 | unsigned long tmout_pat, unsigned long tmout) |
| 271 | { |
| 272 | unsigned long timer_start, timeout; |
| 273 | u8 status; |
| 274 | |
| 275 | status = ata_busy_wait(ap, ATA_BUSY, 300); |
| 276 | timer_start = jiffies; |
| 277 | timeout = timer_start + tmout_pat; |
| 278 | while (status != 0xff && (status & ATA_BUSY) && |
| 279 | time_before(jiffies, timeout)) { |
| 280 | msleep(50); |
| 281 | status = ata_busy_wait(ap, ATA_BUSY, 3); |
| 282 | } |
| 283 | |
| 284 | if (status != 0xff && (status & ATA_BUSY)) |
| 285 | ata_port_printk(ap, KERN_WARNING, |
| 286 | "port is slow to respond, please be patient " |
| 287 | "(Status 0x%x)\n", status); |
| 288 | |
| 289 | timeout = timer_start + tmout; |
| 290 | while (status != 0xff && (status & ATA_BUSY) && |
| 291 | time_before(jiffies, timeout)) { |
| 292 | msleep(50); |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 293 | status = ap->ops->check_status(ap); |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 294 | } |
| 295 | |
| 296 | if (status == 0xff) |
| 297 | return -ENODEV; |
| 298 | |
| 299 | if (status & ATA_BUSY) { |
| 300 | ata_port_printk(ap, KERN_ERR, "port failed to respond " |
| 301 | "(%lu secs, Status 0x%x)\n", |
| 302 | tmout / HZ, status); |
| 303 | return -EBUSY; |
| 304 | } |
| 305 | |
| 306 | return 0; |
| 307 | } |
| 308 | |
| 309 | /** |
| 310 | * ata_wait_ready - sleep until BSY clears, or timeout |
| 311 | * @ap: port containing status register to be polled |
| 312 | * @deadline: deadline jiffies for the operation |
| 313 | * |
| 314 | * Sleep until ATA Status register bit BSY clears, or timeout |
| 315 | * occurs. |
| 316 | * |
| 317 | * LOCKING: |
| 318 | * Kernel thread context (may sleep). |
| 319 | * |
| 320 | * RETURNS: |
| 321 | * 0 on success, -errno otherwise. |
| 322 | */ |
| 323 | int ata_wait_ready(struct ata_port *ap, unsigned long deadline) |
| 324 | { |
| 325 | unsigned long start = jiffies; |
| 326 | int warned = 0; |
| 327 | |
| 328 | while (1) { |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 329 | u8 status = ap->ops->check_status(ap); |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 330 | unsigned long now = jiffies; |
| 331 | |
| 332 | if (!(status & ATA_BUSY)) |
| 333 | return 0; |
| 334 | if (!ata_link_online(&ap->link) && status == 0xff) |
| 335 | return -ENODEV; |
| 336 | if (time_after(now, deadline)) |
| 337 | return -EBUSY; |
| 338 | |
| 339 | if (!warned && time_after(now, start + 5 * HZ) && |
| 340 | (deadline - now > 3 * HZ)) { |
| 341 | ata_port_printk(ap, KERN_WARNING, |
| 342 | "port is slow to respond, please be patient " |
| 343 | "(Status 0x%x)\n", status); |
| 344 | warned = 1; |
| 345 | } |
| 346 | |
| 347 | msleep(50); |
| 348 | } |
| 349 | } |
| 350 | |
| 351 | /** |
| 352 | * ata_std_dev_select - Select device 0/1 on ATA bus |
| 353 | * @ap: ATA channel to manipulate |
| 354 | * @device: ATA device (numbered from zero) to select |
| 355 | * |
| 356 | * Use the method defined in the ATA specification to |
| 357 | * make either device 0, or device 1, active on the |
| 358 | * ATA channel. Works with both PIO and MMIO. |
| 359 | * |
| 360 | * May be used as the dev_select() entry in ata_port_operations. |
| 361 | * |
| 362 | * LOCKING: |
| 363 | * caller. |
| 364 | */ |
| 365 | void ata_std_dev_select(struct ata_port *ap, unsigned int device) |
| 366 | { |
| 367 | u8 tmp; |
| 368 | |
| 369 | if (device == 0) |
| 370 | tmp = ATA_DEVICE_OBS; |
| 371 | else |
| 372 | tmp = ATA_DEVICE_OBS | ATA_DEV1; |
| 373 | |
| 374 | iowrite8(tmp, ap->ioaddr.device_addr); |
| 375 | ata_pause(ap); /* needed; also flushes, for mmio */ |
| 376 | } |
| 377 | |
| 378 | /** |
| 379 | * ata_dev_select - Select device 0/1 on ATA bus |
| 380 | * @ap: ATA channel to manipulate |
| 381 | * @device: ATA device (numbered from zero) to select |
| 382 | * @wait: non-zero to wait for Status register BSY bit to clear |
| 383 | * @can_sleep: non-zero if context allows sleeping |
| 384 | * |
| 385 | * Use the method defined in the ATA specification to |
| 386 | * make either device 0, or device 1, active on the |
| 387 | * ATA channel. |
| 388 | * |
| 389 | * This is a high-level version of ata_std_dev_select(), |
| 390 | * which additionally provides the services of inserting |
| 391 | * the proper pauses and status polling, where needed. |
| 392 | * |
| 393 | * LOCKING: |
| 394 | * caller. |
| 395 | */ |
| 396 | void ata_dev_select(struct ata_port *ap, unsigned int device, |
| 397 | unsigned int wait, unsigned int can_sleep) |
| 398 | { |
| 399 | if (ata_msg_probe(ap)) |
| 400 | ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " |
| 401 | "device %u, wait %u\n", device, wait); |
| 402 | |
| 403 | if (wait) |
| 404 | ata_wait_idle(ap); |
| 405 | |
| 406 | ap->ops->dev_select(ap, device); |
| 407 | |
| 408 | if (wait) { |
| 409 | if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) |
| 410 | msleep(150); |
| 411 | ata_wait_idle(ap); |
| 412 | } |
| 413 | } |
| 414 | |
| 415 | /** |
Tejun Heo | 90088bb | 2006-10-09 11:10:26 +0900 | [diff] [blame] | 416 | * ata_irq_on - Enable interrupts on a port. |
| 417 | * @ap: Port on which interrupts are enabled. |
| 418 | * |
| 419 | * Enable interrupts on a legacy IDE device using MMIO or PIO, |
| 420 | * wait for idle, clear any pending interrupts. |
| 421 | * |
| 422 | * LOCKING: |
| 423 | * Inherited from caller. |
| 424 | */ |
| 425 | u8 ata_irq_on(struct ata_port *ap) |
| 426 | { |
| 427 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 428 | u8 tmp; |
| 429 | |
| 430 | ap->ctl &= ~ATA_NIEN; |
| 431 | ap->last_ctl = ap->ctl; |
| 432 | |
Tejun Heo | f659f0e4 | 2008-03-06 13:12:54 +0900 | [diff] [blame] | 433 | if (ioaddr->ctl_addr) |
| 434 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
Tejun Heo | 90088bb | 2006-10-09 11:10:26 +0900 | [diff] [blame] | 435 | tmp = ata_wait_idle(ap); |
| 436 | |
| 437 | ap->ops->irq_clear(ap); |
| 438 | |
| 439 | return tmp; |
| 440 | } |
| 441 | |
| 442 | /** |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 443 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. |
| 444 | * @ap: Port associated with this ATA transaction. |
| 445 | * |
| 446 | * Clear interrupt and error flags in DMA status register. |
| 447 | * |
| 448 | * May be used as the irq_clear() entry in ata_port_operations. |
| 449 | * |
| 450 | * LOCKING: |
| 451 | * spin_lock_irqsave(host lock) |
| 452 | */ |
| 453 | void ata_bmdma_irq_clear(struct ata_port *ap) |
| 454 | { |
| 455 | void __iomem *mmio = ap->ioaddr.bmdma_addr; |
| 456 | |
| 457 | if (!mmio) |
| 458 | return; |
| 459 | |
| 460 | iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS); |
| 461 | } |
| 462 | |
| 463 | /** |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 464 | * ata_tf_load - send taskfile registers to host controller |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 465 | * @ap: Port to which output is sent |
| 466 | * @tf: ATA taskfile register set |
| 467 | * |
| 468 | * Outputs ATA taskfile to standard ATA host controller. |
| 469 | * |
| 470 | * LOCKING: |
| 471 | * Inherited from caller. |
| 472 | */ |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 473 | void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) |
| 474 | { |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 475 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 476 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; |
| 477 | |
| 478 | if (tf->ctl != ap->last_ctl) { |
Tejun Heo | f659f0e4 | 2008-03-06 13:12:54 +0900 | [diff] [blame] | 479 | if (ioaddr->ctl_addr) |
| 480 | iowrite8(tf->ctl, ioaddr->ctl_addr); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 481 | ap->last_ctl = tf->ctl; |
| 482 | ata_wait_idle(ap); |
| 483 | } |
| 484 | |
| 485 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { |
Tejun Heo | f659f0e4 | 2008-03-06 13:12:54 +0900 | [diff] [blame] | 486 | WARN_ON(!ioaddr->ctl_addr); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 487 | iowrite8(tf->hob_feature, ioaddr->feature_addr); |
| 488 | iowrite8(tf->hob_nsect, ioaddr->nsect_addr); |
| 489 | iowrite8(tf->hob_lbal, ioaddr->lbal_addr); |
| 490 | iowrite8(tf->hob_lbam, ioaddr->lbam_addr); |
| 491 | iowrite8(tf->hob_lbah, ioaddr->lbah_addr); |
| 492 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", |
| 493 | tf->hob_feature, |
| 494 | tf->hob_nsect, |
| 495 | tf->hob_lbal, |
| 496 | tf->hob_lbam, |
| 497 | tf->hob_lbah); |
| 498 | } |
| 499 | |
| 500 | if (is_addr) { |
| 501 | iowrite8(tf->feature, ioaddr->feature_addr); |
| 502 | iowrite8(tf->nsect, ioaddr->nsect_addr); |
| 503 | iowrite8(tf->lbal, ioaddr->lbal_addr); |
| 504 | iowrite8(tf->lbam, ioaddr->lbam_addr); |
| 505 | iowrite8(tf->lbah, ioaddr->lbah_addr); |
| 506 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", |
| 507 | tf->feature, |
| 508 | tf->nsect, |
| 509 | tf->lbal, |
| 510 | tf->lbam, |
| 511 | tf->lbah); |
| 512 | } |
| 513 | |
| 514 | if (tf->flags & ATA_TFLAG_DEVICE) { |
| 515 | iowrite8(tf->device, ioaddr->device_addr); |
| 516 | VPRINTK("device 0x%X\n", tf->device); |
| 517 | } |
| 518 | |
| 519 | ata_wait_idle(ap); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 520 | } |
| 521 | |
| 522 | /** |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 523 | * ata_tf_read - input device's ATA taskfile shadow registers |
| 524 | * @ap: Port from which input is read |
| 525 | * @tf: ATA taskfile register set for storing input |
| 526 | * |
| 527 | * Reads ATA taskfile registers for currently-selected device |
Alan Cox | 76548ed | 2007-11-19 14:34:56 +0000 | [diff] [blame] | 528 | * into @tf. Assumes the device has a fully SFF compliant task file |
| 529 | * layout and behaviour. If you device does not (eg has a different |
| 530 | * status method) then you will need to provide a replacement tf_read |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 531 | * |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 532 | * LOCKING: |
| 533 | * Inherited from caller. |
| 534 | */ |
| 535 | void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
| 536 | { |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 537 | struct ata_ioports *ioaddr = &ap->ioaddr; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 538 | |
Alan Cox | 76548ed | 2007-11-19 14:34:56 +0000 | [diff] [blame] | 539 | tf->command = ata_check_status(ap); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 540 | tf->feature = ioread8(ioaddr->error_addr); |
| 541 | tf->nsect = ioread8(ioaddr->nsect_addr); |
| 542 | tf->lbal = ioread8(ioaddr->lbal_addr); |
| 543 | tf->lbam = ioread8(ioaddr->lbam_addr); |
| 544 | tf->lbah = ioread8(ioaddr->lbah_addr); |
| 545 | tf->device = ioread8(ioaddr->device_addr); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 546 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 547 | if (tf->flags & ATA_TFLAG_LBA48) { |
Tejun Heo | f659f0e4 | 2008-03-06 13:12:54 +0900 | [diff] [blame] | 548 | if (likely(ioaddr->ctl_addr)) { |
| 549 | iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr); |
| 550 | tf->hob_feature = ioread8(ioaddr->error_addr); |
| 551 | tf->hob_nsect = ioread8(ioaddr->nsect_addr); |
| 552 | tf->hob_lbal = ioread8(ioaddr->lbal_addr); |
| 553 | tf->hob_lbam = ioread8(ioaddr->lbam_addr); |
| 554 | tf->hob_lbah = ioread8(ioaddr->lbah_addr); |
| 555 | iowrite8(tf->ctl, ioaddr->ctl_addr); |
| 556 | ap->last_ctl = tf->ctl; |
| 557 | } else |
| 558 | WARN_ON(1); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 559 | } |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 560 | } |
| 561 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 562 | /** |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 563 | * ata_exec_command - issue ATA command to host controller |
| 564 | * @ap: port to which command is being issued |
| 565 | * @tf: ATA taskfile register set |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 566 | * |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 567 | * Issues ATA command, with proper synchronization with interrupt |
| 568 | * handler / other threads. |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 569 | * |
| 570 | * LOCKING: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 571 | * spin_lock_irqsave(host lock) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 572 | */ |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 573 | void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf) |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 574 | { |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 575 | DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command); |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 576 | |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 577 | iowrite8(tf->command, ap->ioaddr.command_addr); |
| 578 | ata_pause(ap); |
Jeff Garzik | 2cc432e | 2006-03-23 00:32:03 -0500 | [diff] [blame] | 579 | } |
| 580 | |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 581 | /** |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 582 | * ata_tf_to_host - issue ATA taskfile to host controller |
| 583 | * @ap: port to which command is being issued |
| 584 | * @tf: ATA taskfile register set |
| 585 | * |
| 586 | * Issues ATA taskfile register set to ATA host controller, |
| 587 | * with proper synchronization with interrupt handler and |
| 588 | * other threads. |
| 589 | * |
| 590 | * LOCKING: |
| 591 | * spin_lock_irqsave(host lock) |
| 592 | */ |
| 593 | static inline void ata_tf_to_host(struct ata_port *ap, |
| 594 | const struct ata_taskfile *tf) |
| 595 | { |
| 596 | ap->ops->tf_load(ap, tf); |
| 597 | ap->ops->exec_command(ap, tf); |
| 598 | } |
| 599 | |
| 600 | /** |
| 601 | * ata_data_xfer - Transfer data by PIO |
| 602 | * @dev: device to target |
| 603 | * @buf: data buffer |
| 604 | * @buflen: buffer length |
| 605 | * @rw: read/write |
| 606 | * |
| 607 | * Transfer data from/to the device data register by PIO. |
| 608 | * |
| 609 | * LOCKING: |
| 610 | * Inherited from caller. |
| 611 | * |
| 612 | * RETURNS: |
| 613 | * Bytes consumed. |
| 614 | */ |
| 615 | unsigned int ata_data_xfer(struct ata_device *dev, unsigned char *buf, |
| 616 | unsigned int buflen, int rw) |
| 617 | { |
| 618 | struct ata_port *ap = dev->link->ap; |
| 619 | void __iomem *data_addr = ap->ioaddr.data_addr; |
| 620 | unsigned int words = buflen >> 1; |
| 621 | |
| 622 | /* Transfer multiple of 2 bytes */ |
| 623 | if (rw == READ) |
| 624 | ioread16_rep(data_addr, buf, words); |
| 625 | else |
| 626 | iowrite16_rep(data_addr, buf, words); |
| 627 | |
| 628 | /* Transfer trailing 1 byte, if any. */ |
| 629 | if (unlikely(buflen & 0x01)) { |
| 630 | __le16 align_buf[1] = { 0 }; |
| 631 | unsigned char *trailing_buf = buf + buflen - 1; |
| 632 | |
| 633 | if (rw == READ) { |
| 634 | align_buf[0] = cpu_to_le16(ioread16(data_addr)); |
| 635 | memcpy(trailing_buf, align_buf, 1); |
| 636 | } else { |
| 637 | memcpy(align_buf, trailing_buf, 1); |
| 638 | iowrite16(le16_to_cpu(align_buf[0]), data_addr); |
| 639 | } |
| 640 | words++; |
| 641 | } |
| 642 | |
| 643 | return words << 1; |
| 644 | } |
| 645 | |
| 646 | /** |
| 647 | * ata_data_xfer_noirq - Transfer data by PIO |
| 648 | * @dev: device to target |
| 649 | * @buf: data buffer |
| 650 | * @buflen: buffer length |
| 651 | * @rw: read/write |
| 652 | * |
| 653 | * Transfer data from/to the device data register by PIO. Do the |
| 654 | * transfer with interrupts disabled. |
| 655 | * |
| 656 | * LOCKING: |
| 657 | * Inherited from caller. |
| 658 | * |
| 659 | * RETURNS: |
| 660 | * Bytes consumed. |
| 661 | */ |
| 662 | unsigned int ata_data_xfer_noirq(struct ata_device *dev, unsigned char *buf, |
| 663 | unsigned int buflen, int rw) |
| 664 | { |
| 665 | unsigned long flags; |
| 666 | unsigned int consumed; |
| 667 | |
| 668 | local_irq_save(flags); |
| 669 | consumed = ata_data_xfer(dev, buf, buflen, rw); |
| 670 | local_irq_restore(flags); |
| 671 | |
| 672 | return consumed; |
| 673 | } |
| 674 | |
| 675 | /** |
| 676 | * ata_pio_sector - Transfer a sector of data. |
| 677 | * @qc: Command on going |
| 678 | * |
| 679 | * Transfer qc->sect_size bytes of data from/to the ATA device. |
| 680 | * |
| 681 | * LOCKING: |
| 682 | * Inherited from caller. |
| 683 | */ |
| 684 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
| 685 | { |
| 686 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); |
| 687 | struct ata_port *ap = qc->ap; |
| 688 | struct page *page; |
| 689 | unsigned int offset; |
| 690 | unsigned char *buf; |
| 691 | |
| 692 | if (qc->curbytes == qc->nbytes - qc->sect_size) |
| 693 | ap->hsm_task_state = HSM_ST_LAST; |
| 694 | |
| 695 | page = sg_page(qc->cursg); |
| 696 | offset = qc->cursg->offset + qc->cursg_ofs; |
| 697 | |
| 698 | /* get the current page and offset */ |
| 699 | page = nth_page(page, (offset >> PAGE_SHIFT)); |
| 700 | offset %= PAGE_SIZE; |
| 701 | |
| 702 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
| 703 | |
| 704 | if (PageHighMem(page)) { |
| 705 | unsigned long flags; |
| 706 | |
| 707 | /* FIXME: use a bounce buffer */ |
| 708 | local_irq_save(flags); |
| 709 | buf = kmap_atomic(page, KM_IRQ0); |
| 710 | |
| 711 | /* do the actual data transfer */ |
| 712 | ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); |
| 713 | |
| 714 | kunmap_atomic(buf, KM_IRQ0); |
| 715 | local_irq_restore(flags); |
| 716 | } else { |
| 717 | buf = page_address(page); |
| 718 | ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); |
| 719 | } |
| 720 | |
| 721 | qc->curbytes += qc->sect_size; |
| 722 | qc->cursg_ofs += qc->sect_size; |
| 723 | |
| 724 | if (qc->cursg_ofs == qc->cursg->length) { |
| 725 | qc->cursg = sg_next(qc->cursg); |
| 726 | qc->cursg_ofs = 0; |
| 727 | } |
| 728 | } |
| 729 | |
| 730 | /** |
| 731 | * ata_pio_sectors - Transfer one or many sectors. |
| 732 | * @qc: Command on going |
| 733 | * |
| 734 | * Transfer one or many sectors of data from/to the |
| 735 | * ATA device for the DRQ request. |
| 736 | * |
| 737 | * LOCKING: |
| 738 | * Inherited from caller. |
| 739 | */ |
| 740 | static void ata_pio_sectors(struct ata_queued_cmd *qc) |
| 741 | { |
| 742 | if (is_multi_taskfile(&qc->tf)) { |
| 743 | /* READ/WRITE MULTIPLE */ |
| 744 | unsigned int nsect; |
| 745 | |
| 746 | WARN_ON(qc->dev->multi_count == 0); |
| 747 | |
| 748 | nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, |
| 749 | qc->dev->multi_count); |
| 750 | while (nsect--) |
| 751 | ata_pio_sector(qc); |
| 752 | } else |
| 753 | ata_pio_sector(qc); |
| 754 | |
| 755 | ata_altstatus(qc->ap); /* flush */ |
| 756 | } |
| 757 | |
| 758 | /** |
| 759 | * atapi_send_cdb - Write CDB bytes to hardware |
| 760 | * @ap: Port to which ATAPI device is attached. |
| 761 | * @qc: Taskfile currently active |
| 762 | * |
| 763 | * When device has indicated its readiness to accept |
| 764 | * a CDB, this function is called. Send the CDB. |
| 765 | * |
| 766 | * LOCKING: |
| 767 | * caller. |
| 768 | */ |
| 769 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) |
| 770 | { |
| 771 | /* send SCSI cdb */ |
| 772 | DPRINTK("send cdb\n"); |
| 773 | WARN_ON(qc->dev->cdb_len < 12); |
| 774 | |
| 775 | ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); |
| 776 | ata_altstatus(ap); /* flush */ |
| 777 | |
| 778 | switch (qc->tf.protocol) { |
| 779 | case ATAPI_PROT_PIO: |
| 780 | ap->hsm_task_state = HSM_ST; |
| 781 | break; |
| 782 | case ATAPI_PROT_NODATA: |
| 783 | ap->hsm_task_state = HSM_ST_LAST; |
| 784 | break; |
| 785 | case ATAPI_PROT_DMA: |
| 786 | ap->hsm_task_state = HSM_ST_LAST; |
| 787 | /* initiate bmdma */ |
| 788 | ap->ops->bmdma_start(qc); |
| 789 | break; |
| 790 | } |
| 791 | } |
| 792 | |
| 793 | /** |
| 794 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. |
| 795 | * @qc: Command on going |
| 796 | * @bytes: number of bytes |
| 797 | * |
| 798 | * Transfer Transfer data from/to the ATAPI device. |
| 799 | * |
| 800 | * LOCKING: |
| 801 | * Inherited from caller. |
| 802 | * |
| 803 | */ |
| 804 | static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
| 805 | { |
| 806 | int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ; |
| 807 | struct ata_port *ap = qc->ap; |
| 808 | struct ata_device *dev = qc->dev; |
| 809 | struct ata_eh_info *ehi = &dev->link->eh_info; |
| 810 | struct scatterlist *sg; |
| 811 | struct page *page; |
| 812 | unsigned char *buf; |
| 813 | unsigned int offset, count, consumed; |
| 814 | |
| 815 | next_sg: |
| 816 | sg = qc->cursg; |
| 817 | if (unlikely(!sg)) { |
| 818 | ata_ehi_push_desc(ehi, "unexpected or too much trailing data " |
| 819 | "buf=%u cur=%u bytes=%u", |
| 820 | qc->nbytes, qc->curbytes, bytes); |
| 821 | return -1; |
| 822 | } |
| 823 | |
| 824 | page = sg_page(sg); |
| 825 | offset = sg->offset + qc->cursg_ofs; |
| 826 | |
| 827 | /* get the current page and offset */ |
| 828 | page = nth_page(page, (offset >> PAGE_SHIFT)); |
| 829 | offset %= PAGE_SIZE; |
| 830 | |
| 831 | /* don't overrun current sg */ |
| 832 | count = min(sg->length - qc->cursg_ofs, bytes); |
| 833 | |
| 834 | /* don't cross page boundaries */ |
| 835 | count = min(count, (unsigned int)PAGE_SIZE - offset); |
| 836 | |
| 837 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
| 838 | |
| 839 | if (PageHighMem(page)) { |
| 840 | unsigned long flags; |
| 841 | |
| 842 | /* FIXME: use bounce buffer */ |
| 843 | local_irq_save(flags); |
| 844 | buf = kmap_atomic(page, KM_IRQ0); |
| 845 | |
| 846 | /* do the actual data transfer */ |
| 847 | consumed = ap->ops->data_xfer(dev, buf + offset, count, rw); |
| 848 | |
| 849 | kunmap_atomic(buf, KM_IRQ0); |
| 850 | local_irq_restore(flags); |
| 851 | } else { |
| 852 | buf = page_address(page); |
| 853 | consumed = ap->ops->data_xfer(dev, buf + offset, count, rw); |
| 854 | } |
| 855 | |
| 856 | bytes -= min(bytes, consumed); |
| 857 | qc->curbytes += count; |
| 858 | qc->cursg_ofs += count; |
| 859 | |
| 860 | if (qc->cursg_ofs == sg->length) { |
| 861 | qc->cursg = sg_next(qc->cursg); |
| 862 | qc->cursg_ofs = 0; |
| 863 | } |
| 864 | |
| 865 | /* consumed can be larger than count only for the last transfer */ |
| 866 | WARN_ON(qc->cursg && count != consumed); |
| 867 | |
| 868 | if (bytes) |
| 869 | goto next_sg; |
| 870 | return 0; |
| 871 | } |
| 872 | |
| 873 | /** |
| 874 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. |
| 875 | * @qc: Command on going |
| 876 | * |
| 877 | * Transfer Transfer data from/to the ATAPI device. |
| 878 | * |
| 879 | * LOCKING: |
| 880 | * Inherited from caller. |
| 881 | */ |
| 882 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
| 883 | { |
| 884 | struct ata_port *ap = qc->ap; |
| 885 | struct ata_device *dev = qc->dev; |
| 886 | struct ata_eh_info *ehi = &dev->link->eh_info; |
| 887 | unsigned int ireason, bc_lo, bc_hi, bytes; |
| 888 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; |
| 889 | |
| 890 | /* Abuse qc->result_tf for temp storage of intermediate TF |
| 891 | * here to save some kernel stack usage. |
| 892 | * For normal completion, qc->result_tf is not relevant. For |
| 893 | * error, qc->result_tf is later overwritten by ata_qc_complete(). |
| 894 | * So, the correctness of qc->result_tf is not affected. |
| 895 | */ |
| 896 | ap->ops->tf_read(ap, &qc->result_tf); |
| 897 | ireason = qc->result_tf.nsect; |
| 898 | bc_lo = qc->result_tf.lbam; |
| 899 | bc_hi = qc->result_tf.lbah; |
| 900 | bytes = (bc_hi << 8) | bc_lo; |
| 901 | |
| 902 | /* shall be cleared to zero, indicating xfer of data */ |
| 903 | if (unlikely(ireason & (1 << 0))) |
| 904 | goto atapi_check; |
| 905 | |
| 906 | /* make sure transfer direction matches expected */ |
| 907 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; |
| 908 | if (unlikely(do_write != i_write)) |
| 909 | goto atapi_check; |
| 910 | |
| 911 | if (unlikely(!bytes)) |
| 912 | goto atapi_check; |
| 913 | |
| 914 | VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); |
| 915 | |
| 916 | if (unlikely(__atapi_pio_bytes(qc, bytes))) |
| 917 | goto err_out; |
| 918 | ata_altstatus(ap); /* flush */ |
| 919 | |
| 920 | return; |
| 921 | |
| 922 | atapi_check: |
| 923 | ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)", |
| 924 | ireason, bytes); |
| 925 | err_out: |
| 926 | qc->err_mask |= AC_ERR_HSM; |
| 927 | ap->hsm_task_state = HSM_ST_ERR; |
| 928 | } |
| 929 | |
| 930 | /** |
| 931 | * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. |
| 932 | * @ap: the target ata_port |
| 933 | * @qc: qc on going |
| 934 | * |
| 935 | * RETURNS: |
| 936 | * 1 if ok in workqueue, 0 otherwise. |
| 937 | */ |
| 938 | static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) |
| 939 | { |
| 940 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
| 941 | return 1; |
| 942 | |
| 943 | if (ap->hsm_task_state == HSM_ST_FIRST) { |
| 944 | if (qc->tf.protocol == ATA_PROT_PIO && |
| 945 | (qc->tf.flags & ATA_TFLAG_WRITE)) |
| 946 | return 1; |
| 947 | |
| 948 | if (ata_is_atapi(qc->tf.protocol) && |
| 949 | !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) |
| 950 | return 1; |
| 951 | } |
| 952 | |
| 953 | return 0; |
| 954 | } |
| 955 | |
| 956 | /** |
| 957 | * ata_hsm_qc_complete - finish a qc running on standard HSM |
| 958 | * @qc: Command to complete |
| 959 | * @in_wq: 1 if called from workqueue, 0 otherwise |
| 960 | * |
| 961 | * Finish @qc which is running on standard HSM. |
| 962 | * |
| 963 | * LOCKING: |
| 964 | * If @in_wq is zero, spin_lock_irqsave(host lock). |
| 965 | * Otherwise, none on entry and grabs host lock. |
| 966 | */ |
| 967 | static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) |
| 968 | { |
| 969 | struct ata_port *ap = qc->ap; |
| 970 | unsigned long flags; |
| 971 | |
| 972 | if (ap->ops->error_handler) { |
| 973 | if (in_wq) { |
| 974 | spin_lock_irqsave(ap->lock, flags); |
| 975 | |
| 976 | /* EH might have kicked in while host lock is |
| 977 | * released. |
| 978 | */ |
| 979 | qc = ata_qc_from_tag(ap, qc->tag); |
| 980 | if (qc) { |
| 981 | if (likely(!(qc->err_mask & AC_ERR_HSM))) { |
| 982 | ap->ops->irq_on(ap); |
| 983 | ata_qc_complete(qc); |
| 984 | } else |
| 985 | ata_port_freeze(ap); |
| 986 | } |
| 987 | |
| 988 | spin_unlock_irqrestore(ap->lock, flags); |
| 989 | } else { |
| 990 | if (likely(!(qc->err_mask & AC_ERR_HSM))) |
| 991 | ata_qc_complete(qc); |
| 992 | else |
| 993 | ata_port_freeze(ap); |
| 994 | } |
| 995 | } else { |
| 996 | if (in_wq) { |
| 997 | spin_lock_irqsave(ap->lock, flags); |
| 998 | ap->ops->irq_on(ap); |
| 999 | ata_qc_complete(qc); |
| 1000 | spin_unlock_irqrestore(ap->lock, flags); |
| 1001 | } else |
| 1002 | ata_qc_complete(qc); |
| 1003 | } |
| 1004 | } |
| 1005 | |
| 1006 | /** |
| 1007 | * ata_hsm_move - move the HSM to the next state. |
| 1008 | * @ap: the target ata_port |
| 1009 | * @qc: qc on going |
| 1010 | * @status: current device status |
| 1011 | * @in_wq: 1 if called from workqueue, 0 otherwise |
| 1012 | * |
| 1013 | * RETURNS: |
| 1014 | * 1 when poll next status needed, 0 otherwise. |
| 1015 | */ |
| 1016 | int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, |
| 1017 | u8 status, int in_wq) |
| 1018 | { |
| 1019 | unsigned long flags = 0; |
| 1020 | int poll_next; |
| 1021 | |
| 1022 | WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); |
| 1023 | |
| 1024 | /* Make sure ata_qc_issue_prot() does not throw things |
| 1025 | * like DMA polling into the workqueue. Notice that |
| 1026 | * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). |
| 1027 | */ |
| 1028 | WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); |
| 1029 | |
| 1030 | fsm_start: |
| 1031 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
| 1032 | ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); |
| 1033 | |
| 1034 | switch (ap->hsm_task_state) { |
| 1035 | case HSM_ST_FIRST: |
| 1036 | /* Send first data block or PACKET CDB */ |
| 1037 | |
| 1038 | /* If polling, we will stay in the work queue after |
| 1039 | * sending the data. Otherwise, interrupt handler |
| 1040 | * takes over after sending the data. |
| 1041 | */ |
| 1042 | poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); |
| 1043 | |
| 1044 | /* check device status */ |
| 1045 | if (unlikely((status & ATA_DRQ) == 0)) { |
| 1046 | /* handle BSY=0, DRQ=0 as error */ |
| 1047 | if (likely(status & (ATA_ERR | ATA_DF))) |
| 1048 | /* device stops HSM for abort/error */ |
| 1049 | qc->err_mask |= AC_ERR_DEV; |
| 1050 | else |
| 1051 | /* HSM violation. Let EH handle this */ |
| 1052 | qc->err_mask |= AC_ERR_HSM; |
| 1053 | |
| 1054 | ap->hsm_task_state = HSM_ST_ERR; |
| 1055 | goto fsm_start; |
| 1056 | } |
| 1057 | |
| 1058 | /* Device should not ask for data transfer (DRQ=1) |
| 1059 | * when it finds something wrong. |
| 1060 | * We ignore DRQ here and stop the HSM by |
| 1061 | * changing hsm_task_state to HSM_ST_ERR and |
| 1062 | * let the EH abort the command or reset the device. |
| 1063 | */ |
| 1064 | if (unlikely(status & (ATA_ERR | ATA_DF))) { |
| 1065 | /* Some ATAPI tape drives forget to clear the ERR bit |
| 1066 | * when doing the next command (mostly request sense). |
| 1067 | * We ignore ERR here to workaround and proceed sending |
| 1068 | * the CDB. |
| 1069 | */ |
| 1070 | if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) { |
| 1071 | ata_port_printk(ap, KERN_WARNING, |
| 1072 | "DRQ=1 with device error, " |
| 1073 | "dev_stat 0x%X\n", status); |
| 1074 | qc->err_mask |= AC_ERR_HSM; |
| 1075 | ap->hsm_task_state = HSM_ST_ERR; |
| 1076 | goto fsm_start; |
| 1077 | } |
| 1078 | } |
| 1079 | |
| 1080 | /* Send the CDB (atapi) or the first data block (ata pio out). |
| 1081 | * During the state transition, interrupt handler shouldn't |
| 1082 | * be invoked before the data transfer is complete and |
| 1083 | * hsm_task_state is changed. Hence, the following locking. |
| 1084 | */ |
| 1085 | if (in_wq) |
| 1086 | spin_lock_irqsave(ap->lock, flags); |
| 1087 | |
| 1088 | if (qc->tf.protocol == ATA_PROT_PIO) { |
| 1089 | /* PIO data out protocol. |
| 1090 | * send first data block. |
| 1091 | */ |
| 1092 | |
| 1093 | /* ata_pio_sectors() might change the state |
| 1094 | * to HSM_ST_LAST. so, the state is changed here |
| 1095 | * before ata_pio_sectors(). |
| 1096 | */ |
| 1097 | ap->hsm_task_state = HSM_ST; |
| 1098 | ata_pio_sectors(qc); |
| 1099 | } else |
| 1100 | /* send CDB */ |
| 1101 | atapi_send_cdb(ap, qc); |
| 1102 | |
| 1103 | if (in_wq) |
| 1104 | spin_unlock_irqrestore(ap->lock, flags); |
| 1105 | |
| 1106 | /* if polling, ata_pio_task() handles the rest. |
| 1107 | * otherwise, interrupt handler takes over from here. |
| 1108 | */ |
| 1109 | break; |
| 1110 | |
| 1111 | case HSM_ST: |
| 1112 | /* complete command or read/write the data register */ |
| 1113 | if (qc->tf.protocol == ATAPI_PROT_PIO) { |
| 1114 | /* ATAPI PIO protocol */ |
| 1115 | if ((status & ATA_DRQ) == 0) { |
| 1116 | /* No more data to transfer or device error. |
| 1117 | * Device error will be tagged in HSM_ST_LAST. |
| 1118 | */ |
| 1119 | ap->hsm_task_state = HSM_ST_LAST; |
| 1120 | goto fsm_start; |
| 1121 | } |
| 1122 | |
| 1123 | /* Device should not ask for data transfer (DRQ=1) |
| 1124 | * when it finds something wrong. |
| 1125 | * We ignore DRQ here and stop the HSM by |
| 1126 | * changing hsm_task_state to HSM_ST_ERR and |
| 1127 | * let the EH abort the command or reset the device. |
| 1128 | */ |
| 1129 | if (unlikely(status & (ATA_ERR | ATA_DF))) { |
| 1130 | ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " |
| 1131 | "device error, dev_stat 0x%X\n", |
| 1132 | status); |
| 1133 | qc->err_mask |= AC_ERR_HSM; |
| 1134 | ap->hsm_task_state = HSM_ST_ERR; |
| 1135 | goto fsm_start; |
| 1136 | } |
| 1137 | |
| 1138 | atapi_pio_bytes(qc); |
| 1139 | |
| 1140 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) |
| 1141 | /* bad ireason reported by device */ |
| 1142 | goto fsm_start; |
| 1143 | |
| 1144 | } else { |
| 1145 | /* ATA PIO protocol */ |
| 1146 | if (unlikely((status & ATA_DRQ) == 0)) { |
| 1147 | /* handle BSY=0, DRQ=0 as error */ |
| 1148 | if (likely(status & (ATA_ERR | ATA_DF))) |
| 1149 | /* device stops HSM for abort/error */ |
| 1150 | qc->err_mask |= AC_ERR_DEV; |
| 1151 | else |
| 1152 | /* HSM violation. Let EH handle this. |
| 1153 | * Phantom devices also trigger this |
| 1154 | * condition. Mark hint. |
| 1155 | */ |
| 1156 | qc->err_mask |= AC_ERR_HSM | |
| 1157 | AC_ERR_NODEV_HINT; |
| 1158 | |
| 1159 | ap->hsm_task_state = HSM_ST_ERR; |
| 1160 | goto fsm_start; |
| 1161 | } |
| 1162 | |
| 1163 | /* For PIO reads, some devices may ask for |
| 1164 | * data transfer (DRQ=1) alone with ERR=1. |
| 1165 | * We respect DRQ here and transfer one |
| 1166 | * block of junk data before changing the |
| 1167 | * hsm_task_state to HSM_ST_ERR. |
| 1168 | * |
| 1169 | * For PIO writes, ERR=1 DRQ=1 doesn't make |
| 1170 | * sense since the data block has been |
| 1171 | * transferred to the device. |
| 1172 | */ |
| 1173 | if (unlikely(status & (ATA_ERR | ATA_DF))) { |
| 1174 | /* data might be corrputed */ |
| 1175 | qc->err_mask |= AC_ERR_DEV; |
| 1176 | |
| 1177 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { |
| 1178 | ata_pio_sectors(qc); |
| 1179 | status = ata_wait_idle(ap); |
| 1180 | } |
| 1181 | |
| 1182 | if (status & (ATA_BUSY | ATA_DRQ)) |
| 1183 | qc->err_mask |= AC_ERR_HSM; |
| 1184 | |
| 1185 | /* ata_pio_sectors() might change the |
| 1186 | * state to HSM_ST_LAST. so, the state |
| 1187 | * is changed after ata_pio_sectors(). |
| 1188 | */ |
| 1189 | ap->hsm_task_state = HSM_ST_ERR; |
| 1190 | goto fsm_start; |
| 1191 | } |
| 1192 | |
| 1193 | ata_pio_sectors(qc); |
| 1194 | |
| 1195 | if (ap->hsm_task_state == HSM_ST_LAST && |
| 1196 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { |
| 1197 | /* all data read */ |
| 1198 | status = ata_wait_idle(ap); |
| 1199 | goto fsm_start; |
| 1200 | } |
| 1201 | } |
| 1202 | |
| 1203 | poll_next = 1; |
| 1204 | break; |
| 1205 | |
| 1206 | case HSM_ST_LAST: |
| 1207 | if (unlikely(!ata_ok(status))) { |
| 1208 | qc->err_mask |= __ac_err_mask(status); |
| 1209 | ap->hsm_task_state = HSM_ST_ERR; |
| 1210 | goto fsm_start; |
| 1211 | } |
| 1212 | |
| 1213 | /* no more data to transfer */ |
| 1214 | DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", |
| 1215 | ap->print_id, qc->dev->devno, status); |
| 1216 | |
| 1217 | WARN_ON(qc->err_mask); |
| 1218 | |
| 1219 | ap->hsm_task_state = HSM_ST_IDLE; |
| 1220 | |
| 1221 | /* complete taskfile transaction */ |
| 1222 | ata_hsm_qc_complete(qc, in_wq); |
| 1223 | |
| 1224 | poll_next = 0; |
| 1225 | break; |
| 1226 | |
| 1227 | case HSM_ST_ERR: |
| 1228 | /* make sure qc->err_mask is available to |
| 1229 | * know what's wrong and recover |
| 1230 | */ |
| 1231 | WARN_ON(qc->err_mask == 0); |
| 1232 | |
| 1233 | ap->hsm_task_state = HSM_ST_IDLE; |
| 1234 | |
| 1235 | /* complete taskfile transaction */ |
| 1236 | ata_hsm_qc_complete(qc, in_wq); |
| 1237 | |
| 1238 | poll_next = 0; |
| 1239 | break; |
| 1240 | default: |
| 1241 | poll_next = 0; |
| 1242 | BUG(); |
| 1243 | } |
| 1244 | |
| 1245 | return poll_next; |
| 1246 | } |
| 1247 | |
| 1248 | void ata_pio_task(struct work_struct *work) |
| 1249 | { |
| 1250 | struct ata_port *ap = |
| 1251 | container_of(work, struct ata_port, port_task.work); |
| 1252 | struct ata_queued_cmd *qc = ap->port_task_data; |
| 1253 | u8 status; |
| 1254 | int poll_next; |
| 1255 | |
| 1256 | fsm_start: |
| 1257 | WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); |
| 1258 | |
| 1259 | /* |
| 1260 | * This is purely heuristic. This is a fast path. |
| 1261 | * Sometimes when we enter, BSY will be cleared in |
| 1262 | * a chk-status or two. If not, the drive is probably seeking |
| 1263 | * or something. Snooze for a couple msecs, then |
| 1264 | * chk-status again. If still busy, queue delayed work. |
| 1265 | */ |
| 1266 | status = ata_busy_wait(ap, ATA_BUSY, 5); |
| 1267 | if (status & ATA_BUSY) { |
| 1268 | msleep(2); |
| 1269 | status = ata_busy_wait(ap, ATA_BUSY, 10); |
| 1270 | if (status & ATA_BUSY) { |
| 1271 | ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE); |
| 1272 | return; |
| 1273 | } |
| 1274 | } |
| 1275 | |
| 1276 | /* move the HSM */ |
| 1277 | poll_next = ata_hsm_move(ap, qc, status, 1); |
| 1278 | |
| 1279 | /* another command or interrupt handler |
| 1280 | * may be running at this point. |
| 1281 | */ |
| 1282 | if (poll_next) |
| 1283 | goto fsm_start; |
| 1284 | } |
| 1285 | |
| 1286 | /** |
| 1287 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner |
| 1288 | * @qc: command to issue to device |
| 1289 | * |
| 1290 | * Using various libata functions and hooks, this function |
| 1291 | * starts an ATA command. ATA commands are grouped into |
| 1292 | * classes called "protocols", and issuing each type of protocol |
| 1293 | * is slightly different. |
| 1294 | * |
| 1295 | * May be used as the qc_issue() entry in ata_port_operations. |
| 1296 | * |
| 1297 | * LOCKING: |
| 1298 | * spin_lock_irqsave(host lock) |
| 1299 | * |
| 1300 | * RETURNS: |
| 1301 | * Zero on success, AC_ERR_* mask on failure |
| 1302 | */ |
| 1303 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
| 1304 | { |
| 1305 | struct ata_port *ap = qc->ap; |
| 1306 | |
| 1307 | /* Use polling pio if the LLD doesn't handle |
| 1308 | * interrupt driven pio and atapi CDB interrupt. |
| 1309 | */ |
| 1310 | if (ap->flags & ATA_FLAG_PIO_POLLING) { |
| 1311 | switch (qc->tf.protocol) { |
| 1312 | case ATA_PROT_PIO: |
| 1313 | case ATA_PROT_NODATA: |
| 1314 | case ATAPI_PROT_PIO: |
| 1315 | case ATAPI_PROT_NODATA: |
| 1316 | qc->tf.flags |= ATA_TFLAG_POLLING; |
| 1317 | break; |
| 1318 | case ATAPI_PROT_DMA: |
| 1319 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) |
| 1320 | /* see ata_dma_blacklisted() */ |
| 1321 | BUG(); |
| 1322 | break; |
| 1323 | default: |
| 1324 | break; |
| 1325 | } |
| 1326 | } |
| 1327 | |
| 1328 | /* select the device */ |
| 1329 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
| 1330 | |
| 1331 | /* start the command */ |
| 1332 | switch (qc->tf.protocol) { |
| 1333 | case ATA_PROT_NODATA: |
| 1334 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
| 1335 | ata_qc_set_polling(qc); |
| 1336 | |
| 1337 | ata_tf_to_host(ap, &qc->tf); |
| 1338 | ap->hsm_task_state = HSM_ST_LAST; |
| 1339 | |
| 1340 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
| 1341 | ata_pio_queue_task(ap, qc, 0); |
| 1342 | |
| 1343 | break; |
| 1344 | |
| 1345 | case ATA_PROT_DMA: |
| 1346 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
| 1347 | |
| 1348 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
| 1349 | ap->ops->bmdma_setup(qc); /* set up bmdma */ |
| 1350 | ap->ops->bmdma_start(qc); /* initiate bmdma */ |
| 1351 | ap->hsm_task_state = HSM_ST_LAST; |
| 1352 | break; |
| 1353 | |
| 1354 | case ATA_PROT_PIO: |
| 1355 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
| 1356 | ata_qc_set_polling(qc); |
| 1357 | |
| 1358 | ata_tf_to_host(ap, &qc->tf); |
| 1359 | |
| 1360 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
| 1361 | /* PIO data out protocol */ |
| 1362 | ap->hsm_task_state = HSM_ST_FIRST; |
| 1363 | ata_pio_queue_task(ap, qc, 0); |
| 1364 | |
| 1365 | /* always send first data block using |
| 1366 | * the ata_pio_task() codepath. |
| 1367 | */ |
| 1368 | } else { |
| 1369 | /* PIO data in protocol */ |
| 1370 | ap->hsm_task_state = HSM_ST; |
| 1371 | |
| 1372 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
| 1373 | ata_pio_queue_task(ap, qc, 0); |
| 1374 | |
| 1375 | /* if polling, ata_pio_task() handles the rest. |
| 1376 | * otherwise, interrupt handler takes over from here. |
| 1377 | */ |
| 1378 | } |
| 1379 | |
| 1380 | break; |
| 1381 | |
| 1382 | case ATAPI_PROT_PIO: |
| 1383 | case ATAPI_PROT_NODATA: |
| 1384 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
| 1385 | ata_qc_set_polling(qc); |
| 1386 | |
| 1387 | ata_tf_to_host(ap, &qc->tf); |
| 1388 | |
| 1389 | ap->hsm_task_state = HSM_ST_FIRST; |
| 1390 | |
| 1391 | /* send cdb by polling if no cdb interrupt */ |
| 1392 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || |
| 1393 | (qc->tf.flags & ATA_TFLAG_POLLING)) |
| 1394 | ata_pio_queue_task(ap, qc, 0); |
| 1395 | break; |
| 1396 | |
| 1397 | case ATAPI_PROT_DMA: |
| 1398 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
| 1399 | |
| 1400 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
| 1401 | ap->ops->bmdma_setup(qc); /* set up bmdma */ |
| 1402 | ap->hsm_task_state = HSM_ST_FIRST; |
| 1403 | |
| 1404 | /* send cdb by polling if no cdb interrupt */ |
| 1405 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) |
| 1406 | ata_pio_queue_task(ap, qc, 0); |
| 1407 | break; |
| 1408 | |
| 1409 | default: |
| 1410 | WARN_ON(1); |
| 1411 | return AC_ERR_SYSTEM; |
| 1412 | } |
| 1413 | |
| 1414 | return 0; |
| 1415 | } |
| 1416 | |
| 1417 | /** |
| 1418 | * ata_host_intr - Handle host interrupt for given (port, task) |
| 1419 | * @ap: Port on which interrupt arrived (possibly...) |
| 1420 | * @qc: Taskfile currently active in engine |
| 1421 | * |
| 1422 | * Handle host interrupt for given queued command. Currently, |
| 1423 | * only DMA interrupts are handled. All other commands are |
| 1424 | * handled via polling with interrupts disabled (nIEN bit). |
| 1425 | * |
| 1426 | * LOCKING: |
| 1427 | * spin_lock_irqsave(host lock) |
| 1428 | * |
| 1429 | * RETURNS: |
| 1430 | * One if interrupt was handled, zero if not (shared irq). |
| 1431 | */ |
| 1432 | inline unsigned int ata_host_intr(struct ata_port *ap, |
| 1433 | struct ata_queued_cmd *qc) |
| 1434 | { |
| 1435 | struct ata_eh_info *ehi = &ap->link.eh_info; |
| 1436 | u8 status, host_stat = 0; |
| 1437 | |
| 1438 | VPRINTK("ata%u: protocol %d task_state %d\n", |
| 1439 | ap->print_id, qc->tf.protocol, ap->hsm_task_state); |
| 1440 | |
| 1441 | /* Check whether we are expecting interrupt in this state */ |
| 1442 | switch (ap->hsm_task_state) { |
| 1443 | case HSM_ST_FIRST: |
| 1444 | /* Some pre-ATAPI-4 devices assert INTRQ |
| 1445 | * at this state when ready to receive CDB. |
| 1446 | */ |
| 1447 | |
| 1448 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. |
| 1449 | * The flag was turned on only for atapi devices. No |
| 1450 | * need to check ata_is_atapi(qc->tf.protocol) again. |
| 1451 | */ |
| 1452 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) |
| 1453 | goto idle_irq; |
| 1454 | break; |
| 1455 | case HSM_ST_LAST: |
| 1456 | if (qc->tf.protocol == ATA_PROT_DMA || |
| 1457 | qc->tf.protocol == ATAPI_PROT_DMA) { |
| 1458 | /* check status of DMA engine */ |
| 1459 | host_stat = ap->ops->bmdma_status(ap); |
| 1460 | VPRINTK("ata%u: host_stat 0x%X\n", |
| 1461 | ap->print_id, host_stat); |
| 1462 | |
| 1463 | /* if it's not our irq... */ |
| 1464 | if (!(host_stat & ATA_DMA_INTR)) |
| 1465 | goto idle_irq; |
| 1466 | |
| 1467 | /* before we do anything else, clear DMA-Start bit */ |
| 1468 | ap->ops->bmdma_stop(qc); |
| 1469 | |
| 1470 | if (unlikely(host_stat & ATA_DMA_ERR)) { |
| 1471 | /* error when transfering data to/from memory */ |
| 1472 | qc->err_mask |= AC_ERR_HOST_BUS; |
| 1473 | ap->hsm_task_state = HSM_ST_ERR; |
| 1474 | } |
| 1475 | } |
| 1476 | break; |
| 1477 | case HSM_ST: |
| 1478 | break; |
| 1479 | default: |
| 1480 | goto idle_irq; |
| 1481 | } |
| 1482 | |
| 1483 | /* check altstatus */ |
| 1484 | status = ata_altstatus(ap); |
| 1485 | if (status & ATA_BUSY) |
| 1486 | goto idle_irq; |
| 1487 | |
| 1488 | /* check main status, clearing INTRQ */ |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 1489 | status = ap->ops->check_status(ap); |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 1490 | if (unlikely(status & ATA_BUSY)) |
| 1491 | goto idle_irq; |
| 1492 | |
| 1493 | /* ack bmdma irq events */ |
| 1494 | ap->ops->irq_clear(ap); |
| 1495 | |
| 1496 | ata_hsm_move(ap, qc, status, 0); |
| 1497 | |
| 1498 | if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || |
| 1499 | qc->tf.protocol == ATAPI_PROT_DMA)) |
| 1500 | ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); |
| 1501 | |
| 1502 | return 1; /* irq handled */ |
| 1503 | |
| 1504 | idle_irq: |
| 1505 | ap->stats.idle_irq++; |
| 1506 | |
| 1507 | #ifdef ATA_IRQ_TRAP |
| 1508 | if ((ap->stats.idle_irq % 1000) == 0) { |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 1509 | ap->ops->check_status(ap); |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 1510 | ap->ops->irq_clear(ap); |
| 1511 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); |
| 1512 | return 1; |
| 1513 | } |
| 1514 | #endif |
| 1515 | return 0; /* irq not handled */ |
| 1516 | } |
| 1517 | |
| 1518 | /** |
| 1519 | * ata_interrupt - Default ATA host interrupt handler |
| 1520 | * @irq: irq line (unused) |
| 1521 | * @dev_instance: pointer to our ata_host information structure |
| 1522 | * |
| 1523 | * Default interrupt handler for PCI IDE devices. Calls |
| 1524 | * ata_host_intr() for each port that is not disabled. |
| 1525 | * |
| 1526 | * LOCKING: |
| 1527 | * Obtains host lock during operation. |
| 1528 | * |
| 1529 | * RETURNS: |
| 1530 | * IRQ_NONE or IRQ_HANDLED. |
| 1531 | */ |
| 1532 | irqreturn_t ata_interrupt(int irq, void *dev_instance) |
| 1533 | { |
| 1534 | struct ata_host *host = dev_instance; |
| 1535 | unsigned int i; |
| 1536 | unsigned int handled = 0; |
| 1537 | unsigned long flags; |
| 1538 | |
| 1539 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ |
| 1540 | spin_lock_irqsave(&host->lock, flags); |
| 1541 | |
| 1542 | for (i = 0; i < host->n_ports; i++) { |
| 1543 | struct ata_port *ap; |
| 1544 | |
| 1545 | ap = host->ports[i]; |
| 1546 | if (ap && |
| 1547 | !(ap->flags & ATA_FLAG_DISABLED)) { |
| 1548 | struct ata_queued_cmd *qc; |
| 1549 | |
| 1550 | qc = ata_qc_from_tag(ap, ap->link.active_tag); |
| 1551 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
| 1552 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
| 1553 | handled |= ata_host_intr(ap, qc); |
| 1554 | } |
| 1555 | } |
| 1556 | |
| 1557 | spin_unlock_irqrestore(&host->lock, flags); |
| 1558 | |
| 1559 | return IRQ_RETVAL(handled); |
| 1560 | } |
| 1561 | |
| 1562 | /** |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 1563 | * ata_bmdma_freeze - Freeze BMDMA controller port |
| 1564 | * @ap: port to freeze |
| 1565 | * |
| 1566 | * Freeze BMDMA controller port. |
| 1567 | * |
| 1568 | * LOCKING: |
| 1569 | * Inherited from caller. |
| 1570 | */ |
| 1571 | void ata_bmdma_freeze(struct ata_port *ap) |
| 1572 | { |
| 1573 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 1574 | |
| 1575 | ap->ctl |= ATA_NIEN; |
| 1576 | ap->last_ctl = ap->ctl; |
| 1577 | |
Tejun Heo | f659f0e4 | 2008-03-06 13:12:54 +0900 | [diff] [blame] | 1578 | if (ioaddr->ctl_addr) |
| 1579 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
Tejun Heo | 0f0a3ad | 2006-11-17 12:24:22 +0900 | [diff] [blame] | 1580 | |
| 1581 | /* Under certain circumstances, some controllers raise IRQ on |
| 1582 | * ATA_NIEN manipulation. Also, many controllers fail to mask |
| 1583 | * previously pending IRQ on ATA_NIEN assertion. Clear it. |
| 1584 | */ |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 1585 | ap->ops->check_status(ap); |
Tejun Heo | 0f0a3ad | 2006-11-17 12:24:22 +0900 | [diff] [blame] | 1586 | |
| 1587 | ap->ops->irq_clear(ap); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 1588 | } |
| 1589 | |
| 1590 | /** |
| 1591 | * ata_bmdma_thaw - Thaw BMDMA controller port |
| 1592 | * @ap: port to thaw |
| 1593 | * |
| 1594 | * Thaw BMDMA controller port. |
| 1595 | * |
| 1596 | * LOCKING: |
| 1597 | * Inherited from caller. |
| 1598 | */ |
| 1599 | void ata_bmdma_thaw(struct ata_port *ap) |
| 1600 | { |
| 1601 | /* clear & re-enable interrupts */ |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 1602 | ap->ops->check_status(ap); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 1603 | ap->ops->irq_clear(ap); |
Akira Iguchi | 8362500 | 2007-01-26 16:27:32 +0900 | [diff] [blame] | 1604 | ap->ops->irq_on(ap); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 1605 | } |
| 1606 | |
| 1607 | /** |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 1608 | * ata_devchk - PATA device presence detection |
| 1609 | * @ap: ATA channel to examine |
| 1610 | * @device: Device to examine (starting at zero) |
| 1611 | * |
| 1612 | * This technique was originally described in |
| 1613 | * Hale Landis's ATADRVR (www.ata-atapi.com), and |
| 1614 | * later found its way into the ATA/ATAPI spec. |
| 1615 | * |
| 1616 | * Write a pattern to the ATA shadow registers, |
| 1617 | * and if a device is present, it will respond by |
| 1618 | * correctly storing and echoing back the |
| 1619 | * ATA shadow register contents. |
| 1620 | * |
| 1621 | * LOCKING: |
| 1622 | * caller. |
| 1623 | */ |
| 1624 | static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) |
| 1625 | { |
| 1626 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 1627 | u8 nsect, lbal; |
| 1628 | |
| 1629 | ap->ops->dev_select(ap, device); |
| 1630 | |
| 1631 | iowrite8(0x55, ioaddr->nsect_addr); |
| 1632 | iowrite8(0xaa, ioaddr->lbal_addr); |
| 1633 | |
| 1634 | iowrite8(0xaa, ioaddr->nsect_addr); |
| 1635 | iowrite8(0x55, ioaddr->lbal_addr); |
| 1636 | |
| 1637 | iowrite8(0x55, ioaddr->nsect_addr); |
| 1638 | iowrite8(0xaa, ioaddr->lbal_addr); |
| 1639 | |
| 1640 | nsect = ioread8(ioaddr->nsect_addr); |
| 1641 | lbal = ioread8(ioaddr->lbal_addr); |
| 1642 | |
| 1643 | if ((nsect == 0x55) && (lbal == 0xaa)) |
| 1644 | return 1; /* we found a device */ |
| 1645 | |
| 1646 | return 0; /* nothing found */ |
| 1647 | } |
| 1648 | |
| 1649 | /** |
| 1650 | * ata_dev_try_classify - Parse returned ATA device signature |
| 1651 | * @dev: ATA device to classify (starting at zero) |
| 1652 | * @present: device seems present |
| 1653 | * @r_err: Value of error register on completion |
| 1654 | * |
| 1655 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, |
| 1656 | * an ATA/ATAPI-defined set of values is placed in the ATA |
| 1657 | * shadow registers, indicating the results of device detection |
| 1658 | * and diagnostics. |
| 1659 | * |
| 1660 | * Select the ATA device, and read the values from the ATA shadow |
| 1661 | * registers. Then parse according to the Error register value, |
| 1662 | * and the spec-defined values examined by ata_dev_classify(). |
| 1663 | * |
| 1664 | * LOCKING: |
| 1665 | * caller. |
| 1666 | * |
| 1667 | * RETURNS: |
| 1668 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. |
| 1669 | */ |
| 1670 | unsigned int ata_dev_try_classify(struct ata_device *dev, int present, |
| 1671 | u8 *r_err) |
| 1672 | { |
| 1673 | struct ata_port *ap = dev->link->ap; |
| 1674 | struct ata_taskfile tf; |
| 1675 | unsigned int class; |
| 1676 | u8 err; |
| 1677 | |
| 1678 | ap->ops->dev_select(ap, dev->devno); |
| 1679 | |
| 1680 | memset(&tf, 0, sizeof(tf)); |
| 1681 | |
| 1682 | ap->ops->tf_read(ap, &tf); |
| 1683 | err = tf.feature; |
| 1684 | if (r_err) |
| 1685 | *r_err = err; |
| 1686 | |
| 1687 | /* see if device passed diags: continue and warn later */ |
| 1688 | if (err == 0) |
| 1689 | /* diagnostic fail : do nothing _YET_ */ |
| 1690 | dev->horkage |= ATA_HORKAGE_DIAGNOSTIC; |
| 1691 | else if (err == 1) |
| 1692 | /* do nothing */ ; |
| 1693 | else if ((dev->devno == 0) && (err == 0x81)) |
| 1694 | /* do nothing */ ; |
| 1695 | else |
| 1696 | return ATA_DEV_NONE; |
| 1697 | |
| 1698 | /* determine if device is ATA or ATAPI */ |
| 1699 | class = ata_dev_classify(&tf); |
| 1700 | |
| 1701 | if (class == ATA_DEV_UNKNOWN) { |
| 1702 | /* If the device failed diagnostic, it's likely to |
| 1703 | * have reported incorrect device signature too. |
| 1704 | * Assume ATA device if the device seems present but |
| 1705 | * device signature is invalid with diagnostic |
| 1706 | * failure. |
| 1707 | */ |
| 1708 | if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC)) |
| 1709 | class = ATA_DEV_ATA; |
| 1710 | else |
| 1711 | class = ATA_DEV_NONE; |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 1712 | } else if ((class == ATA_DEV_ATA) && (ap->ops->check_status(ap) == 0)) |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 1713 | class = ATA_DEV_NONE; |
| 1714 | |
| 1715 | return class; |
| 1716 | } |
| 1717 | |
| 1718 | static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, |
| 1719 | unsigned long deadline) |
| 1720 | { |
| 1721 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 1722 | unsigned int dev0 = devmask & (1 << 0); |
| 1723 | unsigned int dev1 = devmask & (1 << 1); |
| 1724 | int rc, ret = 0; |
| 1725 | |
| 1726 | /* if device 0 was found in ata_devchk, wait for its |
| 1727 | * BSY bit to clear |
| 1728 | */ |
| 1729 | if (dev0) { |
| 1730 | rc = ata_wait_ready(ap, deadline); |
| 1731 | if (rc) { |
| 1732 | if (rc != -ENODEV) |
| 1733 | return rc; |
| 1734 | ret = rc; |
| 1735 | } |
| 1736 | } |
| 1737 | |
| 1738 | /* if device 1 was found in ata_devchk, wait for register |
| 1739 | * access briefly, then wait for BSY to clear. |
| 1740 | */ |
| 1741 | if (dev1) { |
| 1742 | int i; |
| 1743 | |
| 1744 | ap->ops->dev_select(ap, 1); |
| 1745 | |
| 1746 | /* Wait for register access. Some ATAPI devices fail |
| 1747 | * to set nsect/lbal after reset, so don't waste too |
| 1748 | * much time on it. We're gonna wait for !BSY anyway. |
| 1749 | */ |
| 1750 | for (i = 0; i < 2; i++) { |
| 1751 | u8 nsect, lbal; |
| 1752 | |
| 1753 | nsect = ioread8(ioaddr->nsect_addr); |
| 1754 | lbal = ioread8(ioaddr->lbal_addr); |
| 1755 | if ((nsect == 1) && (lbal == 1)) |
| 1756 | break; |
| 1757 | msleep(50); /* give drive a breather */ |
| 1758 | } |
| 1759 | |
| 1760 | rc = ata_wait_ready(ap, deadline); |
| 1761 | if (rc) { |
| 1762 | if (rc != -ENODEV) |
| 1763 | return rc; |
| 1764 | ret = rc; |
| 1765 | } |
| 1766 | } |
| 1767 | |
| 1768 | /* is all this really necessary? */ |
| 1769 | ap->ops->dev_select(ap, 0); |
| 1770 | if (dev1) |
| 1771 | ap->ops->dev_select(ap, 1); |
| 1772 | if (dev0) |
| 1773 | ap->ops->dev_select(ap, 0); |
| 1774 | |
| 1775 | return ret; |
| 1776 | } |
| 1777 | |
| 1778 | /** |
| 1779 | * ata_wait_after_reset - wait before checking status after reset |
| 1780 | * @ap: port containing status register to be polled |
| 1781 | * @deadline: deadline jiffies for the operation |
| 1782 | * |
| 1783 | * After reset, we need to pause a while before reading status. |
| 1784 | * Also, certain combination of controller and device report 0xff |
| 1785 | * for some duration (e.g. until SATA PHY is up and running) |
| 1786 | * which is interpreted as empty port in ATA world. This |
| 1787 | * function also waits for such devices to get out of 0xff |
| 1788 | * status. |
| 1789 | * |
| 1790 | * LOCKING: |
| 1791 | * Kernel thread context (may sleep). |
| 1792 | */ |
| 1793 | void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline) |
| 1794 | { |
| 1795 | unsigned long until = jiffies + ATA_TMOUT_FF_WAIT; |
| 1796 | |
| 1797 | if (time_before(until, deadline)) |
| 1798 | deadline = until; |
| 1799 | |
| 1800 | /* Spec mandates ">= 2ms" before checking status. We wait |
| 1801 | * 150ms, because that was the magic delay used for ATAPI |
| 1802 | * devices in Hale Landis's ATADRVR, for the period of time |
| 1803 | * between when the ATA command register is written, and then |
| 1804 | * status is checked. Because waiting for "a while" before |
| 1805 | * checking status is fine, post SRST, we perform this magic |
| 1806 | * delay here as well. |
| 1807 | * |
| 1808 | * Old drivers/ide uses the 2mS rule and then waits for ready. |
| 1809 | */ |
| 1810 | msleep(150); |
| 1811 | |
| 1812 | /* Wait for 0xff to clear. Some SATA devices take a long time |
| 1813 | * to clear 0xff after reset. For example, HHD424020F7SV00 |
| 1814 | * iVDR needs >= 800ms while. Quantum GoVault needs even more |
| 1815 | * than that. |
| 1816 | * |
| 1817 | * Note that some PATA controllers (pata_ali) explode if |
| 1818 | * status register is read more than once when there's no |
| 1819 | * device attached. |
| 1820 | */ |
| 1821 | if (ap->flags & ATA_FLAG_SATA) { |
| 1822 | while (1) { |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 1823 | u8 status = ap->ops->check_status(ap); |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 1824 | |
| 1825 | if (status != 0xff || time_after(jiffies, deadline)) |
| 1826 | return; |
| 1827 | |
| 1828 | msleep(50); |
| 1829 | } |
| 1830 | } |
| 1831 | } |
| 1832 | |
| 1833 | static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, |
| 1834 | unsigned long deadline) |
| 1835 | { |
| 1836 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 1837 | |
| 1838 | DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); |
| 1839 | |
| 1840 | /* software reset. causes dev0 to be selected */ |
| 1841 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
| 1842 | udelay(20); /* FIXME: flush */ |
| 1843 | iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); |
| 1844 | udelay(20); /* FIXME: flush */ |
| 1845 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
| 1846 | |
| 1847 | /* wait a while before checking status */ |
| 1848 | ata_wait_after_reset(ap, deadline); |
| 1849 | |
| 1850 | /* Before we perform post reset processing we want to see if |
| 1851 | * the bus shows 0xFF because the odd clown forgets the D7 |
| 1852 | * pulldown resistor. |
| 1853 | */ |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 1854 | if (ap->ops->check_status(ap) == 0xFF) |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 1855 | return -ENODEV; |
| 1856 | |
| 1857 | return ata_bus_post_reset(ap, devmask, deadline); |
| 1858 | } |
| 1859 | |
| 1860 | /** |
| 1861 | * ata_std_softreset - reset host port via ATA SRST |
| 1862 | * @link: ATA link to reset |
| 1863 | * @classes: resulting classes of attached devices |
| 1864 | * @deadline: deadline jiffies for the operation |
| 1865 | * |
| 1866 | * Reset host port using ATA SRST. |
| 1867 | * |
| 1868 | * LOCKING: |
| 1869 | * Kernel thread context (may sleep) |
| 1870 | * |
| 1871 | * RETURNS: |
| 1872 | * 0 on success, -errno otherwise. |
| 1873 | */ |
| 1874 | int ata_std_softreset(struct ata_link *link, unsigned int *classes, |
| 1875 | unsigned long deadline) |
| 1876 | { |
| 1877 | struct ata_port *ap = link->ap; |
| 1878 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; |
| 1879 | unsigned int devmask = 0; |
| 1880 | int rc; |
| 1881 | u8 err; |
| 1882 | |
| 1883 | DPRINTK("ENTER\n"); |
| 1884 | |
| 1885 | if (ata_link_offline(link)) { |
| 1886 | classes[0] = ATA_DEV_NONE; |
| 1887 | goto out; |
| 1888 | } |
| 1889 | |
| 1890 | /* determine if device 0/1 are present */ |
| 1891 | if (ata_devchk(ap, 0)) |
| 1892 | devmask |= (1 << 0); |
| 1893 | if (slave_possible && ata_devchk(ap, 1)) |
| 1894 | devmask |= (1 << 1); |
| 1895 | |
| 1896 | /* select device 0 again */ |
| 1897 | ap->ops->dev_select(ap, 0); |
| 1898 | |
| 1899 | /* issue bus reset */ |
| 1900 | DPRINTK("about to softreset, devmask=%x\n", devmask); |
| 1901 | rc = ata_bus_softreset(ap, devmask, deadline); |
| 1902 | /* if link is occupied, -ENODEV too is an error */ |
| 1903 | if (rc && (rc != -ENODEV || sata_scr_valid(link))) { |
| 1904 | ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc); |
| 1905 | return rc; |
| 1906 | } |
| 1907 | |
| 1908 | /* determine by signature whether we have ATA or ATAPI devices */ |
| 1909 | classes[0] = ata_dev_try_classify(&link->device[0], |
| 1910 | devmask & (1 << 0), &err); |
| 1911 | if (slave_possible && err != 0x81) |
| 1912 | classes[1] = ata_dev_try_classify(&link->device[1], |
| 1913 | devmask & (1 << 1), &err); |
| 1914 | |
| 1915 | out: |
| 1916 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
| 1917 | return 0; |
| 1918 | } |
| 1919 | |
| 1920 | /** |
| 1921 | * sata_std_hardreset - reset host port via SATA phy reset |
| 1922 | * @link: link to reset |
| 1923 | * @class: resulting class of attached device |
| 1924 | * @deadline: deadline jiffies for the operation |
| 1925 | * |
| 1926 | * SATA phy-reset host port using DET bits of SControl register, |
| 1927 | * wait for !BSY and classify the attached device. |
| 1928 | * |
| 1929 | * LOCKING: |
| 1930 | * Kernel thread context (may sleep) |
| 1931 | * |
| 1932 | * RETURNS: |
| 1933 | * 0 on success, -errno otherwise. |
| 1934 | */ |
| 1935 | int sata_std_hardreset(struct ata_link *link, unsigned int *class, |
| 1936 | unsigned long deadline) |
| 1937 | { |
| 1938 | struct ata_port *ap = link->ap; |
| 1939 | const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); |
| 1940 | int rc; |
| 1941 | |
| 1942 | DPRINTK("ENTER\n"); |
| 1943 | |
| 1944 | /* do hardreset */ |
| 1945 | rc = sata_link_hardreset(link, timing, deadline); |
| 1946 | if (rc) { |
| 1947 | ata_link_printk(link, KERN_ERR, |
| 1948 | "COMRESET failed (errno=%d)\n", rc); |
| 1949 | return rc; |
| 1950 | } |
| 1951 | |
| 1952 | /* TODO: phy layer with polling, timeouts, etc. */ |
| 1953 | if (ata_link_offline(link)) { |
| 1954 | *class = ATA_DEV_NONE; |
| 1955 | DPRINTK("EXIT, link offline\n"); |
| 1956 | return 0; |
| 1957 | } |
| 1958 | |
| 1959 | /* wait a while before checking status */ |
| 1960 | ata_wait_after_reset(ap, deadline); |
| 1961 | |
| 1962 | /* If PMP is supported, we have to do follow-up SRST. Note |
| 1963 | * that some PMPs don't send D2H Reg FIS after hardreset at |
| 1964 | * all if the first port is empty. Wait for it just for a |
| 1965 | * second and request follow-up SRST. |
| 1966 | */ |
| 1967 | if (ap->flags & ATA_FLAG_PMP) { |
| 1968 | ata_wait_ready(ap, jiffies + HZ); |
| 1969 | return -EAGAIN; |
| 1970 | } |
| 1971 | |
| 1972 | rc = ata_wait_ready(ap, deadline); |
| 1973 | /* link occupied, -ENODEV too is an error */ |
| 1974 | if (rc) { |
| 1975 | ata_link_printk(link, KERN_ERR, |
| 1976 | "COMRESET failed (errno=%d)\n", rc); |
| 1977 | return rc; |
| 1978 | } |
| 1979 | |
| 1980 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
| 1981 | |
| 1982 | *class = ata_dev_try_classify(link->device, 1, NULL); |
| 1983 | |
| 1984 | DPRINTK("EXIT, class=%u\n", *class); |
| 1985 | return 0; |
| 1986 | } |
| 1987 | |
| 1988 | /** |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 1989 | * ata_bmdma_error_handler - Stock error handler for BMDMA controller |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 1990 | * @ap: port to handle error for |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 1991 | * |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 1992 | * Stock error handler for BMDMA controller. It can handle both |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 1993 | * PATA and SATA controllers. Many controllers should be able to |
| 1994 | * use this EH as-is or with some added handling before and |
| 1995 | * after. |
| 1996 | * |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 1997 | * LOCKING: |
| 1998 | * Kernel thread context (may sleep) |
| 1999 | */ |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 2000 | void ata_bmdma_error_handler(struct ata_port *ap) |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2001 | { |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 2002 | ata_reset_fn_t softreset = ap->ops->softreset; |
| 2003 | ata_reset_fn_t hardreset = ap->ops->hardreset; |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2004 | struct ata_queued_cmd *qc; |
| 2005 | unsigned long flags; |
| 2006 | int thaw = 0; |
| 2007 | |
Tejun Heo | 9af5c9c | 2007-08-06 18:36:22 +0900 | [diff] [blame] | 2008 | qc = __ata_qc_from_tag(ap, ap->link.active_tag); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2009 | if (qc && !(qc->flags & ATA_QCFLAG_FAILED)) |
| 2010 | qc = NULL; |
| 2011 | |
| 2012 | /* reset PIO HSM and stop DMA engine */ |
Jeff Garzik | ba6a130 | 2006-06-22 23:46:10 -0400 | [diff] [blame] | 2013 | spin_lock_irqsave(ap->lock, flags); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2014 | |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2015 | ap->hsm_task_state = HSM_ST_IDLE; |
| 2016 | |
Tejun Heo | ed82f96 | 2008-03-25 21:34:39 +0900 | [diff] [blame^] | 2017 | if (ap->ioaddr.bmdma_addr && |
| 2018 | qc && (qc->tf.protocol == ATA_PROT_DMA || |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 2019 | qc->tf.protocol == ATAPI_PROT_DMA)) { |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2020 | u8 host_stat; |
| 2021 | |
Robert Hancock | fbbb262 | 2006-10-27 19:08:41 -0700 | [diff] [blame] | 2022 | host_stat = ap->ops->bmdma_status(ap); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2023 | |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2024 | /* BMDMA controllers indicate host bus error by |
| 2025 | * setting DMA_ERR bit and timing out. As it wasn't |
| 2026 | * really a timeout event, adjust error mask and |
| 2027 | * cancel frozen state. |
| 2028 | */ |
Alan | 18d90de | 2007-01-24 11:42:38 +0000 | [diff] [blame] | 2029 | if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) { |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2030 | qc->err_mask = AC_ERR_HOST_BUS; |
| 2031 | thaw = 1; |
| 2032 | } |
| 2033 | |
| 2034 | ap->ops->bmdma_stop(qc); |
| 2035 | } |
| 2036 | |
| 2037 | ata_altstatus(ap); |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 2038 | ap->ops->check_status(ap); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2039 | ap->ops->irq_clear(ap); |
| 2040 | |
Jeff Garzik | ba6a130 | 2006-06-22 23:46:10 -0400 | [diff] [blame] | 2041 | spin_unlock_irqrestore(ap->lock, flags); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2042 | |
| 2043 | if (thaw) |
| 2044 | ata_eh_thaw_port(ap); |
| 2045 | |
| 2046 | /* PIO and DMA engines have been stopped, perform recovery */ |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2047 | |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 2048 | /* ata_std_softreset and sata_std_hardreset are inherited to |
| 2049 | * all SFF drivers from ata_sff_port_ops. Ignore softreset if |
| 2050 | * ctl isn't accessible. Ignore hardreset if SCR access isn't |
| 2051 | * available. |
| 2052 | */ |
| 2053 | if (softreset == ata_std_softreset && !ap->ioaddr.ctl_addr) |
| 2054 | softreset = NULL; |
| 2055 | if (hardreset == sata_std_hardreset && !sata_scr_valid(&ap->link)) |
| 2056 | hardreset = NULL; |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2057 | |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 2058 | ata_do_eh(ap, ap->ops->prereset, softreset, hardreset, |
| 2059 | ap->ops->postreset); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2060 | } |
| 2061 | |
| 2062 | /** |
| 2063 | * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for |
| 2064 | * BMDMA controller |
| 2065 | * @qc: internal command to clean up |
| 2066 | * |
| 2067 | * LOCKING: |
| 2068 | * Kernel thread context (may sleep) |
| 2069 | */ |
| 2070 | void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc) |
| 2071 | { |
Alan | 61dd08c | 2007-01-25 15:09:05 +0000 | [diff] [blame] | 2072 | if (qc->ap->ioaddr.bmdma_addr) |
| 2073 | ata_bmdma_stop(qc); |
Tejun Heo | 6d97dbd | 2006-05-15 20:58:24 +0900 | [diff] [blame] | 2074 | } |
| 2075 | |
Alan Cox | d92e74d | 2007-06-07 16:19:15 +0100 | [diff] [blame] | 2076 | /** |
| 2077 | * ata_sff_port_start - Set port up for dma. |
| 2078 | * @ap: Port to initialize |
| 2079 | * |
| 2080 | * Called just after data structures for each port are |
| 2081 | * initialized. Allocates space for PRD table if the device |
| 2082 | * is DMA capable SFF. |
| 2083 | * |
| 2084 | * May be used as the port_start() entry in ata_port_operations. |
| 2085 | * |
| 2086 | * LOCKING: |
| 2087 | * Inherited from caller. |
| 2088 | */ |
Alan Cox | d92e74d | 2007-06-07 16:19:15 +0100 | [diff] [blame] | 2089 | int ata_sff_port_start(struct ata_port *ap) |
| 2090 | { |
| 2091 | if (ap->ioaddr.bmdma_addr) |
| 2092 | return ata_port_start(ap); |
| 2093 | return 0; |
| 2094 | } |
| 2095 | |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 2096 | /** |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 2097 | * ata_std_ports - initialize ioaddr with standard port offsets. |
| 2098 | * @ioaddr: IO address structure to be initialized |
| 2099 | * |
| 2100 | * Utility function which initializes data_addr, error_addr, |
| 2101 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, |
| 2102 | * device_addr, status_addr, and command_addr to standard offsets |
| 2103 | * relative to cmd_addr. |
| 2104 | * |
| 2105 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. |
| 2106 | */ |
| 2107 | void ata_std_ports(struct ata_ioports *ioaddr) |
| 2108 | { |
| 2109 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; |
| 2110 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; |
| 2111 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; |
| 2112 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; |
| 2113 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; |
| 2114 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; |
| 2115 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; |
| 2116 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; |
| 2117 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; |
| 2118 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; |
| 2119 | } |
| 2120 | |
Tejun Heo | 071ce34 | 2008-03-25 22:16:42 +0900 | [diff] [blame] | 2121 | unsigned long ata_pci_default_filter(struct ata_device *adev, unsigned long xfer_mask) |
| 2122 | { |
| 2123 | /* Filter out DMA modes if the device has been configured by |
| 2124 | the BIOS as PIO only */ |
| 2125 | |
| 2126 | if (adev->link->ap->ioaddr.bmdma_addr == NULL) |
| 2127 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); |
| 2128 | return xfer_mask; |
| 2129 | } |
| 2130 | |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 2131 | /** |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 2132 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction |
| 2133 | * @qc: Info associated with this ATA transaction. |
| 2134 | * |
| 2135 | * LOCKING: |
| 2136 | * spin_lock_irqsave(host lock) |
| 2137 | */ |
| 2138 | void ata_bmdma_setup(struct ata_queued_cmd *qc) |
| 2139 | { |
| 2140 | struct ata_port *ap = qc->ap; |
| 2141 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); |
| 2142 | u8 dmactl; |
| 2143 | |
| 2144 | /* load PRD table addr. */ |
| 2145 | mb(); /* make sure PRD table writes are visible to controller */ |
| 2146 | iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); |
| 2147 | |
| 2148 | /* specify data direction, triple-check start bit is clear */ |
| 2149 | dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 2150 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); |
| 2151 | if (!rw) |
| 2152 | dmactl |= ATA_DMA_WR; |
| 2153 | iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 2154 | |
| 2155 | /* issue r/w command */ |
| 2156 | ap->ops->exec_command(ap, &qc->tf); |
| 2157 | } |
| 2158 | |
| 2159 | /** |
| 2160 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction |
| 2161 | * @qc: Info associated with this ATA transaction. |
| 2162 | * |
| 2163 | * LOCKING: |
| 2164 | * spin_lock_irqsave(host lock) |
| 2165 | */ |
| 2166 | void ata_bmdma_start(struct ata_queued_cmd *qc) |
| 2167 | { |
| 2168 | struct ata_port *ap = qc->ap; |
| 2169 | u8 dmactl; |
| 2170 | |
| 2171 | /* start host DMA transaction */ |
| 2172 | dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 2173 | iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 2174 | |
| 2175 | /* Strictly, one may wish to issue an ioread8() here, to |
| 2176 | * flush the mmio write. However, control also passes |
| 2177 | * to the hardware at this point, and it will interrupt |
| 2178 | * us when we are to resume control. So, in effect, |
| 2179 | * we don't care when the mmio write flushes. |
| 2180 | * Further, a read of the DMA status register _immediately_ |
| 2181 | * following the write may not be what certain flaky hardware |
| 2182 | * is expected, so I think it is best to not add a readb() |
| 2183 | * without first all the MMIO ATA cards/mobos. |
| 2184 | * Or maybe I'm just being paranoid. |
| 2185 | * |
| 2186 | * FIXME: The posting of this write means I/O starts are |
| 2187 | * unneccessarily delayed for MMIO |
| 2188 | */ |
| 2189 | } |
| 2190 | |
| 2191 | /** |
| 2192 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer |
| 2193 | * @qc: Command we are ending DMA for |
| 2194 | * |
| 2195 | * Clears the ATA_DMA_START flag in the dma control register |
| 2196 | * |
| 2197 | * May be used as the bmdma_stop() entry in ata_port_operations. |
| 2198 | * |
| 2199 | * LOCKING: |
| 2200 | * spin_lock_irqsave(host lock) |
| 2201 | */ |
| 2202 | void ata_bmdma_stop(struct ata_queued_cmd *qc) |
| 2203 | { |
| 2204 | struct ata_port *ap = qc->ap; |
| 2205 | void __iomem *mmio = ap->ioaddr.bmdma_addr; |
| 2206 | |
| 2207 | /* clear start/stop bit */ |
| 2208 | iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, |
| 2209 | mmio + ATA_DMA_CMD); |
| 2210 | |
| 2211 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ |
| 2212 | ata_altstatus(ap); /* dummy read */ |
| 2213 | } |
| 2214 | |
| 2215 | /** |
| 2216 | * ata_bmdma_status - Read PCI IDE BMDMA status |
| 2217 | * @ap: Port associated with this ATA transaction. |
| 2218 | * |
| 2219 | * Read and return BMDMA status register. |
| 2220 | * |
| 2221 | * May be used as the bmdma_status() entry in ata_port_operations. |
| 2222 | * |
| 2223 | * LOCKING: |
| 2224 | * spin_lock_irqsave(host lock) |
| 2225 | */ |
| 2226 | u8 ata_bmdma_status(struct ata_port *ap) |
| 2227 | { |
| 2228 | return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
| 2229 | } |
| 2230 | |
| 2231 | /** |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 2232 | * ata_bus_reset - reset host port and associated ATA channel |
| 2233 | * @ap: port to reset |
| 2234 | * |
| 2235 | * This is typically the first time we actually start issuing |
| 2236 | * commands to the ATA channel. We wait for BSY to clear, then |
| 2237 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its |
| 2238 | * result. Determine what devices, if any, are on the channel |
| 2239 | * by looking at the device 0/1 error register. Look at the signature |
| 2240 | * stored in each device's taskfile registers, to determine if |
| 2241 | * the device is ATA or ATAPI. |
| 2242 | * |
| 2243 | * LOCKING: |
| 2244 | * PCI/etc. bus probe sem. |
| 2245 | * Obtains host lock. |
| 2246 | * |
| 2247 | * SIDE EFFECTS: |
| 2248 | * Sets ATA_FLAG_DISABLED if bus reset fails. |
| 2249 | * |
| 2250 | * DEPRECATED: |
| 2251 | * This function is only for drivers which still use old EH and |
| 2252 | * will be removed soon. |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 2253 | */ |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 2254 | void ata_bus_reset(struct ata_port *ap) |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 2255 | { |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 2256 | struct ata_device *device = ap->link.device; |
| 2257 | struct ata_ioports *ioaddr = &ap->ioaddr; |
| 2258 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; |
| 2259 | u8 err; |
| 2260 | unsigned int dev0, dev1 = 0, devmask = 0; |
| 2261 | int rc; |
| 2262 | |
| 2263 | DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); |
| 2264 | |
| 2265 | /* determine if device 0/1 are present */ |
| 2266 | if (ap->flags & ATA_FLAG_SATA_RESET) |
| 2267 | dev0 = 1; |
| 2268 | else { |
| 2269 | dev0 = ata_devchk(ap, 0); |
| 2270 | if (slave_possible) |
| 2271 | dev1 = ata_devchk(ap, 1); |
| 2272 | } |
| 2273 | |
| 2274 | if (dev0) |
| 2275 | devmask |= (1 << 0); |
| 2276 | if (dev1) |
| 2277 | devmask |= (1 << 1); |
| 2278 | |
| 2279 | /* select device 0 again */ |
| 2280 | ap->ops->dev_select(ap, 0); |
| 2281 | |
| 2282 | /* issue bus reset */ |
| 2283 | if (ap->flags & ATA_FLAG_SRST) { |
| 2284 | rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); |
| 2285 | if (rc && rc != -ENODEV) |
| 2286 | goto err_out; |
| 2287 | } |
| 2288 | |
| 2289 | /* |
| 2290 | * determine by signature whether we have ATA or ATAPI devices |
| 2291 | */ |
| 2292 | device[0].class = ata_dev_try_classify(&device[0], dev0, &err); |
| 2293 | if ((slave_possible) && (err != 0x81)) |
| 2294 | device[1].class = ata_dev_try_classify(&device[1], dev1, &err); |
| 2295 | |
| 2296 | /* is double-select really necessary? */ |
| 2297 | if (device[1].class != ATA_DEV_NONE) |
| 2298 | ap->ops->dev_select(ap, 1); |
| 2299 | if (device[0].class != ATA_DEV_NONE) |
| 2300 | ap->ops->dev_select(ap, 0); |
| 2301 | |
| 2302 | /* if no devices were detected, disable this port */ |
| 2303 | if ((device[0].class == ATA_DEV_NONE) && |
| 2304 | (device[1].class == ATA_DEV_NONE)) |
| 2305 | goto err_out; |
| 2306 | |
| 2307 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { |
| 2308 | /* set up device control for ATA_FLAG_SATA_RESET */ |
| 2309 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
| 2310 | } |
| 2311 | |
| 2312 | DPRINTK("EXIT\n"); |
| 2313 | return; |
| 2314 | |
| 2315 | err_out: |
| 2316 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); |
| 2317 | ata_port_disable(ap); |
| 2318 | |
| 2319 | DPRINTK("EXIT\n"); |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 2320 | } |
| 2321 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2322 | #ifdef CONFIG_PCI |
Alan | 4112e16 | 2007-01-08 12:10:05 +0000 | [diff] [blame] | 2323 | |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 2324 | /** |
| 2325 | * ata_pci_clear_simplex - attempt to kick device out of simplex |
| 2326 | * @pdev: PCI device |
| 2327 | * |
| 2328 | * Some PCI ATA devices report simplex mode but in fact can be told to |
| 2329 | * enter non simplex mode. This implements the necessary logic to |
| 2330 | * perform the task on such devices. Calling it on other devices will |
| 2331 | * have -undefined- behaviour. |
| 2332 | */ |
| 2333 | int ata_pci_clear_simplex(struct pci_dev *pdev) |
Alan | 4112e16 | 2007-01-08 12:10:05 +0000 | [diff] [blame] | 2334 | { |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 2335 | unsigned long bmdma = pci_resource_start(pdev, 4); |
| 2336 | u8 simplex; |
Jeff Garzik | a84471f | 2007-02-26 05:51:33 -0500 | [diff] [blame] | 2337 | |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 2338 | if (bmdma == 0) |
| 2339 | return -ENOENT; |
| 2340 | |
| 2341 | simplex = inb(bmdma + 0x02); |
| 2342 | outb(simplex & 0x60, bmdma + 0x02); |
| 2343 | simplex = inb(bmdma + 0x02); |
| 2344 | if (simplex & 0x80) |
| 2345 | return -EOPNOTSUPP; |
| 2346 | return 0; |
| 2347 | } |
| 2348 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2349 | /** |
Tejun Heo | 0f834de | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2350 | * ata_pci_init_bmdma - acquire PCI BMDMA resources and init ATA host |
| 2351 | * @host: target ATA host |
| 2352 | * |
| 2353 | * Acquire PCI BMDMA resources and initialize @host accordingly. |
| 2354 | * |
| 2355 | * LOCKING: |
| 2356 | * Inherited from calling layer (may sleep). |
| 2357 | * |
| 2358 | * RETURNS: |
| 2359 | * 0 on success, -errno otherwise. |
| 2360 | */ |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2361 | int ata_pci_init_bmdma(struct ata_host *host) |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2362 | { |
Tejun Heo | 0f834de | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2363 | struct device *gdev = host->dev; |
| 2364 | struct pci_dev *pdev = to_pci_dev(gdev); |
| 2365 | int i, rc; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2366 | |
Alan Cox | 6fdc99a | 2007-07-26 18:41:30 +0100 | [diff] [blame] | 2367 | /* No BAR4 allocation: No DMA */ |
| 2368 | if (pci_resource_start(pdev, 4) == 0) |
| 2369 | return 0; |
| 2370 | |
Tejun Heo | 0f834de | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2371 | /* TODO: If we get no DMA mask we should fall back to PIO */ |
| 2372 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); |
| 2373 | if (rc) |
| 2374 | return rc; |
| 2375 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); |
| 2376 | if (rc) |
| 2377 | return rc; |
| 2378 | |
| 2379 | /* request and iomap DMA region */ |
Tejun Heo | 35a10a8 | 2008-01-04 18:42:21 +0900 | [diff] [blame] | 2380 | rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev)); |
Tejun Heo | 0f834de | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2381 | if (rc) { |
| 2382 | dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n"); |
| 2383 | return -ENOMEM; |
| 2384 | } |
| 2385 | host->iomap = pcim_iomap_table(pdev); |
| 2386 | |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2387 | for (i = 0; i < 2; i++) { |
Tejun Heo | 0f834de | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2388 | struct ata_port *ap = host->ports[i]; |
Tejun Heo | 0f834de | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2389 | void __iomem *bmdma = host->iomap[4] + 8 * i; |
| 2390 | |
| 2391 | if (ata_port_is_dummy(ap)) |
| 2392 | continue; |
| 2393 | |
Tejun Heo | 21b0ad4 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2394 | ap->ioaddr.bmdma_addr = bmdma; |
Tejun Heo | 0f834de | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2395 | if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) && |
| 2396 | (ioread8(bmdma + 2) & 0x80)) |
| 2397 | host->flags |= ATA_HOST_SIMPLEX; |
Tejun Heo | cbcdd87 | 2007-08-18 13:14:55 +0900 | [diff] [blame] | 2398 | |
| 2399 | ata_port_desc(ap, "bmdma 0x%llx", |
| 2400 | (unsigned long long)pci_resource_start(pdev, 4) + 8 * i); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 2401 | } |
| 2402 | |
Tejun Heo | 0f834de | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2403 | return 0; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2404 | } |
| 2405 | |
Tejun Heo | 272f788 | 2008-03-25 22:16:40 +0900 | [diff] [blame] | 2406 | static int ata_resources_present(struct pci_dev *pdev, int port) |
| 2407 | { |
| 2408 | int i; |
| 2409 | |
| 2410 | /* Check the PCI resources for this channel are enabled */ |
| 2411 | port = port * 2; |
| 2412 | for (i = 0; i < 2; i ++) { |
| 2413 | if (pci_resource_start(pdev, port + i) == 0 || |
| 2414 | pci_resource_len(pdev, port + i) == 0) |
| 2415 | return 0; |
| 2416 | } |
| 2417 | return 1; |
| 2418 | } |
| 2419 | |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2420 | /** |
Tejun Heo | d583bc1 | 2007-07-04 18:02:07 +0900 | [diff] [blame] | 2421 | * ata_pci_init_sff_host - acquire native PCI ATA resources and init host |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2422 | * @host: target ATA host |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2423 | * |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2424 | * Acquire native PCI ATA resources for @host and initialize the |
| 2425 | * first two ports of @host accordingly. Ports marked dummy are |
| 2426 | * skipped and allocation failure makes the port dummy. |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2427 | * |
Tejun Heo | d583bc1 | 2007-07-04 18:02:07 +0900 | [diff] [blame] | 2428 | * Note that native PCI resources are valid even for legacy hosts |
| 2429 | * as we fix up pdev resources array early in boot, so this |
| 2430 | * function can be used for both native and legacy SFF hosts. |
| 2431 | * |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2432 | * LOCKING: |
| 2433 | * Inherited from calling layer (may sleep). |
| 2434 | * |
| 2435 | * RETURNS: |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2436 | * 0 if at least one port is initialized, -ENODEV if no port is |
| 2437 | * available. |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2438 | */ |
Tejun Heo | d583bc1 | 2007-07-04 18:02:07 +0900 | [diff] [blame] | 2439 | int ata_pci_init_sff_host(struct ata_host *host) |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2440 | { |
| 2441 | struct device *gdev = host->dev; |
| 2442 | struct pci_dev *pdev = to_pci_dev(gdev); |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2443 | unsigned int mask = 0; |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2444 | int i, rc; |
| 2445 | |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2446 | /* request, iomap BARs and init port addresses accordingly */ |
| 2447 | for (i = 0; i < 2; i++) { |
| 2448 | struct ata_port *ap = host->ports[i]; |
| 2449 | int base = i * 2; |
| 2450 | void __iomem * const *iomap; |
| 2451 | |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2452 | if (ata_port_is_dummy(ap)) |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2453 | continue; |
| 2454 | |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2455 | /* Discard disabled ports. Some controllers show |
| 2456 | * their unused channels this way. Disabled ports are |
| 2457 | * made dummy. |
| 2458 | */ |
| 2459 | if (!ata_resources_present(pdev, i)) { |
| 2460 | ap->ops = &ata_dummy_port_ops; |
| 2461 | continue; |
| 2462 | } |
| 2463 | |
Tejun Heo | 35a10a8 | 2008-01-04 18:42:21 +0900 | [diff] [blame] | 2464 | rc = pcim_iomap_regions(pdev, 0x3 << base, |
| 2465 | dev_driver_string(gdev)); |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2466 | if (rc) { |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2467 | dev_printk(KERN_WARNING, gdev, |
| 2468 | "failed to request/iomap BARs for port %d " |
| 2469 | "(errno=%d)\n", i, rc); |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2470 | if (rc == -EBUSY) |
| 2471 | pcim_pin_device(pdev); |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2472 | ap->ops = &ata_dummy_port_ops; |
| 2473 | continue; |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2474 | } |
| 2475 | host->iomap = iomap = pcim_iomap_table(pdev); |
| 2476 | |
| 2477 | ap->ioaddr.cmd_addr = iomap[base]; |
| 2478 | ap->ioaddr.altstatus_addr = |
| 2479 | ap->ioaddr.ctl_addr = (void __iomem *) |
| 2480 | ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS); |
| 2481 | ata_std_ports(&ap->ioaddr); |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2482 | |
Tejun Heo | cbcdd87 | 2007-08-18 13:14:55 +0900 | [diff] [blame] | 2483 | ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx", |
| 2484 | (unsigned long long)pci_resource_start(pdev, base), |
| 2485 | (unsigned long long)pci_resource_start(pdev, base + 1)); |
| 2486 | |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2487 | mask |= 1 << i; |
| 2488 | } |
| 2489 | |
| 2490 | if (!mask) { |
| 2491 | dev_printk(KERN_ERR, gdev, "no available native port\n"); |
| 2492 | return -ENODEV; |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2493 | } |
| 2494 | |
| 2495 | return 0; |
| 2496 | } |
| 2497 | |
Tejun Heo | 21b0ad4 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2498 | /** |
Tejun Heo | d583bc1 | 2007-07-04 18:02:07 +0900 | [diff] [blame] | 2499 | * ata_pci_prepare_sff_host - helper to prepare native PCI ATA host |
Tejun Heo | 21b0ad4 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2500 | * @pdev: target PCI device |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2501 | * @ppi: array of port_info, must be enough for two ports |
Tejun Heo | 21b0ad4 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2502 | * @r_host: out argument for the initialized ATA host |
| 2503 | * |
| 2504 | * Helper to allocate ATA host for @pdev, acquire all native PCI |
| 2505 | * resources and initialize it accordingly in one go. |
| 2506 | * |
| 2507 | * LOCKING: |
| 2508 | * Inherited from calling layer (may sleep). |
| 2509 | * |
| 2510 | * RETURNS: |
| 2511 | * 0 on success, -errno otherwise. |
| 2512 | */ |
Tejun Heo | d583bc1 | 2007-07-04 18:02:07 +0900 | [diff] [blame] | 2513 | int ata_pci_prepare_sff_host(struct pci_dev *pdev, |
| 2514 | const struct ata_port_info * const * ppi, |
| 2515 | struct ata_host **r_host) |
Tejun Heo | 21b0ad4 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2516 | { |
| 2517 | struct ata_host *host; |
Tejun Heo | 21b0ad4 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2518 | int rc; |
| 2519 | |
| 2520 | if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL)) |
| 2521 | return -ENOMEM; |
| 2522 | |
| 2523 | host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2); |
| 2524 | if (!host) { |
| 2525 | dev_printk(KERN_ERR, &pdev->dev, |
| 2526 | "failed to allocate ATA host\n"); |
| 2527 | rc = -ENOMEM; |
| 2528 | goto err_out; |
| 2529 | } |
| 2530 | |
Tejun Heo | d583bc1 | 2007-07-04 18:02:07 +0900 | [diff] [blame] | 2531 | rc = ata_pci_init_sff_host(host); |
Tejun Heo | 21b0ad4 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2532 | if (rc) |
| 2533 | goto err_out; |
| 2534 | |
| 2535 | /* init DMA related stuff */ |
| 2536 | rc = ata_pci_init_bmdma(host); |
| 2537 | if (rc) |
| 2538 | goto err_bmdma; |
| 2539 | |
| 2540 | devres_remove_group(&pdev->dev, NULL); |
| 2541 | *r_host = host; |
| 2542 | return 0; |
| 2543 | |
| 2544 | err_bmdma: |
| 2545 | /* This is necessary because PCI and iomap resources are |
| 2546 | * merged and releasing the top group won't release the |
| 2547 | * acquired resources if some of those have been acquired |
| 2548 | * before entering this function. |
| 2549 | */ |
| 2550 | pcim_iounmap_regions(pdev, 0xf); |
| 2551 | err_out: |
| 2552 | devres_release_group(&pdev->dev, NULL); |
| 2553 | return rc; |
| 2554 | } |
| 2555 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2556 | /** |
Tejun Heo | 4e6b79f | 2008-01-18 18:36:28 +0900 | [diff] [blame] | 2557 | * ata_pci_activate_sff_host - start SFF host, request IRQ and register it |
| 2558 | * @host: target SFF ATA host |
| 2559 | * @irq_handler: irq_handler used when requesting IRQ(s) |
| 2560 | * @sht: scsi_host_template to use when registering the host |
| 2561 | * |
| 2562 | * This is the counterpart of ata_host_activate() for SFF ATA |
| 2563 | * hosts. This separate helper is necessary because SFF hosts |
| 2564 | * use two separate interrupts in legacy mode. |
| 2565 | * |
| 2566 | * LOCKING: |
| 2567 | * Inherited from calling layer (may sleep). |
| 2568 | * |
| 2569 | * RETURNS: |
| 2570 | * 0 on success, -errno otherwise. |
| 2571 | */ |
| 2572 | int ata_pci_activate_sff_host(struct ata_host *host, |
| 2573 | irq_handler_t irq_handler, |
| 2574 | struct scsi_host_template *sht) |
| 2575 | { |
| 2576 | struct device *dev = host->dev; |
| 2577 | struct pci_dev *pdev = to_pci_dev(dev); |
| 2578 | const char *drv_name = dev_driver_string(host->dev); |
| 2579 | int legacy_mode = 0, rc; |
| 2580 | |
| 2581 | rc = ata_host_start(host); |
| 2582 | if (rc) |
| 2583 | return rc; |
| 2584 | |
| 2585 | if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { |
| 2586 | u8 tmp8, mask; |
| 2587 | |
| 2588 | /* TODO: What if one channel is in native mode ... */ |
| 2589 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); |
| 2590 | mask = (1 << 2) | (1 << 0); |
| 2591 | if ((tmp8 & mask) != mask) |
| 2592 | legacy_mode = 1; |
| 2593 | #if defined(CONFIG_NO_ATA_LEGACY) |
| 2594 | /* Some platforms with PCI limits cannot address compat |
| 2595 | port space. In that case we punt if their firmware has |
| 2596 | left a device in compatibility mode */ |
| 2597 | if (legacy_mode) { |
| 2598 | printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n"); |
| 2599 | return -EOPNOTSUPP; |
| 2600 | } |
| 2601 | #endif |
| 2602 | } |
| 2603 | |
| 2604 | if (!devres_open_group(dev, NULL, GFP_KERNEL)) |
| 2605 | return -ENOMEM; |
| 2606 | |
| 2607 | if (!legacy_mode && pdev->irq) { |
| 2608 | rc = devm_request_irq(dev, pdev->irq, irq_handler, |
| 2609 | IRQF_SHARED, drv_name, host); |
| 2610 | if (rc) |
| 2611 | goto out; |
| 2612 | |
| 2613 | ata_port_desc(host->ports[0], "irq %d", pdev->irq); |
| 2614 | ata_port_desc(host->ports[1], "irq %d", pdev->irq); |
| 2615 | } else if (legacy_mode) { |
| 2616 | if (!ata_port_is_dummy(host->ports[0])) { |
| 2617 | rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev), |
| 2618 | irq_handler, IRQF_SHARED, |
| 2619 | drv_name, host); |
| 2620 | if (rc) |
| 2621 | goto out; |
| 2622 | |
| 2623 | ata_port_desc(host->ports[0], "irq %d", |
| 2624 | ATA_PRIMARY_IRQ(pdev)); |
| 2625 | } |
| 2626 | |
| 2627 | if (!ata_port_is_dummy(host->ports[1])) { |
| 2628 | rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev), |
| 2629 | irq_handler, IRQF_SHARED, |
| 2630 | drv_name, host); |
| 2631 | if (rc) |
| 2632 | goto out; |
| 2633 | |
| 2634 | ata_port_desc(host->ports[1], "irq %d", |
| 2635 | ATA_SECONDARY_IRQ(pdev)); |
| 2636 | } |
| 2637 | } |
| 2638 | |
| 2639 | rc = ata_host_register(host, sht); |
| 2640 | out: |
| 2641 | if (rc == 0) |
| 2642 | devres_remove_group(dev, NULL); |
| 2643 | else |
| 2644 | devres_release_group(dev, NULL); |
| 2645 | |
| 2646 | return rc; |
| 2647 | } |
| 2648 | |
| 2649 | /** |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2650 | * ata_pci_init_one - Initialize/register PCI IDE host controller |
| 2651 | * @pdev: Controller to be initialized |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2652 | * @ppi: array of port_info, must be enough for two ports |
Tejun Heo | 1bd5b71 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 2653 | * @sht: scsi_host_template to use when registering the host |
Tejun Heo | 887125e | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 2654 | * @host_priv: host private_data |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2655 | * |
| 2656 | * This is a helper function which can be called from a driver's |
| 2657 | * xxx_init_one() probe function if the hardware uses traditional |
| 2658 | * IDE taskfile registers. |
| 2659 | * |
| 2660 | * This function calls pci_enable_device(), reserves its register |
| 2661 | * regions, sets the dma mask, enables bus master mode, and calls |
| 2662 | * ata_device_add() |
| 2663 | * |
Alan Cox | 2ec7df0 | 2006-08-10 16:59:10 +0900 | [diff] [blame] | 2664 | * ASSUMPTION: |
| 2665 | * Nobody makes a single channel controller that appears solely as |
| 2666 | * the secondary legacy port on PCI. |
| 2667 | * |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2668 | * LOCKING: |
| 2669 | * Inherited from PCI layer (may sleep). |
| 2670 | * |
| 2671 | * RETURNS: |
| 2672 | * Zero on success, negative on errno-based value on error. |
| 2673 | */ |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2674 | int ata_pci_init_one(struct pci_dev *pdev, |
Tejun Heo | 1bd5b71 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 2675 | const struct ata_port_info * const * ppi, |
Tejun Heo | 887125e | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 2676 | struct scsi_host_template *sht, void *host_priv) |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2677 | { |
Tejun Heo | f0d36ef | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 2678 | struct device *dev = &pdev->dev; |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2679 | const struct ata_port_info *pi = NULL; |
Tejun Heo | 0f834de | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2680 | struct ata_host *host = NULL; |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2681 | int i, rc; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2682 | |
| 2683 | DPRINTK("ENTER\n"); |
| 2684 | |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 2685 | /* look up the first valid port_info */ |
| 2686 | for (i = 0; i < 2 && ppi[i]; i++) { |
| 2687 | if (ppi[i]->port_ops != &ata_dummy_port_ops) { |
| 2688 | pi = ppi[i]; |
| 2689 | break; |
| 2690 | } |
| 2691 | } |
| 2692 | |
| 2693 | if (!pi) { |
| 2694 | dev_printk(KERN_ERR, &pdev->dev, |
| 2695 | "no valid port_info specified\n"); |
| 2696 | return -EINVAL; |
| 2697 | } |
| 2698 | |
Tejun Heo | f0d36ef | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 2699 | if (!devres_open_group(dev, NULL, GFP_KERNEL)) |
| 2700 | return -ENOMEM; |
| 2701 | |
Tejun Heo | f0d36ef | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 2702 | rc = pcim_enable_device(pdev); |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2703 | if (rc) |
Tejun Heo | 4e6b79f | 2008-01-18 18:36:28 +0900 | [diff] [blame] | 2704 | goto out; |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2705 | |
Tejun Heo | 4e6b79f | 2008-01-18 18:36:28 +0900 | [diff] [blame] | 2706 | /* prepare and activate SFF host */ |
Tejun Heo | d583bc1 | 2007-07-04 18:02:07 +0900 | [diff] [blame] | 2707 | rc = ata_pci_prepare_sff_host(pdev, ppi, &host); |
| 2708 | if (rc) |
Tejun Heo | 4e6b79f | 2008-01-18 18:36:28 +0900 | [diff] [blame] | 2709 | goto out; |
Tejun Heo | 887125e | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 2710 | host->private_data = host_priv; |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2711 | |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2712 | pci_set_master(pdev); |
Tejun Heo | 1bd5b71 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 2713 | rc = ata_pci_activate_sff_host(host, ata_interrupt, sht); |
Tejun Heo | 4e6b79f | 2008-01-18 18:36:28 +0900 | [diff] [blame] | 2714 | out: |
| 2715 | if (rc == 0) |
| 2716 | devres_remove_group(&pdev->dev, NULL); |
| 2717 | else |
| 2718 | devres_release_group(&pdev->dev, NULL); |
Tejun Heo | d491b27 | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 2719 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2720 | return rc; |
| 2721 | } |
| 2722 | |
Jeff Garzik | 1fdffbc | 2006-02-09 05:15:27 -0500 | [diff] [blame] | 2723 | #endif /* CONFIG_PCI */ |
| 2724 | |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 2725 | EXPORT_SYMBOL_GPL(ata_sff_port_ops); |
| 2726 | EXPORT_SYMBOL_GPL(ata_bmdma_port_ops); |
| 2727 | EXPORT_SYMBOL_GPL(ata_qc_prep); |
| 2728 | EXPORT_SYMBOL_GPL(ata_dumb_qc_prep); |
| 2729 | EXPORT_SYMBOL_GPL(ata_std_dev_select); |
| 2730 | EXPORT_SYMBOL_GPL(ata_check_status); |
| 2731 | EXPORT_SYMBOL_GPL(ata_altstatus); |
| 2732 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
| 2733 | EXPORT_SYMBOL_GPL(ata_wait_ready); |
| 2734 | EXPORT_SYMBOL_GPL(ata_tf_load); |
| 2735 | EXPORT_SYMBOL_GPL(ata_tf_read); |
| 2736 | EXPORT_SYMBOL_GPL(ata_exec_command); |
| 2737 | EXPORT_SYMBOL_GPL(ata_data_xfer); |
| 2738 | EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); |
| 2739 | EXPORT_SYMBOL_GPL(ata_irq_on); |
| 2740 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); |
| 2741 | EXPORT_SYMBOL_GPL(ata_hsm_move); |
| 2742 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
| 2743 | EXPORT_SYMBOL_GPL(ata_host_intr); |
| 2744 | EXPORT_SYMBOL_GPL(ata_interrupt); |
| 2745 | EXPORT_SYMBOL_GPL(ata_bmdma_freeze); |
| 2746 | EXPORT_SYMBOL_GPL(ata_bmdma_thaw); |
| 2747 | EXPORT_SYMBOL_GPL(ata_std_prereset); |
| 2748 | EXPORT_SYMBOL_GPL(ata_dev_try_classify); |
| 2749 | EXPORT_SYMBOL_GPL(ata_wait_after_reset); |
| 2750 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
| 2751 | EXPORT_SYMBOL_GPL(sata_std_hardreset); |
| 2752 | EXPORT_SYMBOL_GPL(ata_std_postreset); |
| 2753 | EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); |
| 2754 | EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); |
| 2755 | EXPORT_SYMBOL_GPL(ata_sff_port_start); |
| 2756 | EXPORT_SYMBOL_GPL(ata_std_ports); |
Tejun Heo | 6fd3639 | 2008-03-25 22:16:44 +0900 | [diff] [blame] | 2757 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 2758 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
| 2759 | EXPORT_SYMBOL_GPL(ata_bmdma_start); |
| 2760 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); |
| 2761 | EXPORT_SYMBOL_GPL(ata_bmdma_status); |
| 2762 | EXPORT_SYMBOL_GPL(ata_bus_reset); |
| 2763 | #ifdef CONFIG_PCI |
| 2764 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); |
Tejun Heo | 624d5c5 | 2008-03-25 22:16:41 +0900 | [diff] [blame] | 2765 | EXPORT_SYMBOL_GPL(ata_pci_init_bmdma); |
| 2766 | EXPORT_SYMBOL_GPL(ata_pci_init_sff_host); |
| 2767 | EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host); |
| 2768 | EXPORT_SYMBOL_GPL(ata_pci_activate_sff_host); |
| 2769 | EXPORT_SYMBOL_GPL(ata_pci_init_one); |
| 2770 | #endif /* CONFIG_PCI */ |